Root/drivers/video/jz4740_slcd_panels.c

Source at commit ae56dee43db20497a8cb74a9df70046557705f6e created 11 years 8 months ago.
By Paul Cercueil, MIPS: JZ4740: add the 'panel' attribute to /sys
1/*
2 * linux/drivers/video/jz4740_slcd_panels.c
3 * -- LCD panel definitions for Ingenic On-Chip SLCD frame buffer device
4 *
5 * Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
6 * Copyright (C) 2009, Ignacio Garcia Perez <iggarpe@gmail.com>
7 * Copyright (C) 2010, Maarten ter Huurne <maarten@treewalker.org>
8 * Copyright (C) 2011, ChinaChip
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 */
15
16#include <asm/io.h>
17#include <asm/mach-jz4740/gpio.h>
18#include <asm/mach-jz4740/jz4740_fb.h>
19#include <linux/delay.h>
20#include <linux/gpio.h>
21#include <linux/kernel.h>
22#include <linux/platform_device.h>
23
24#include "jz4740_slcd.h"
25
26static char *default_slcd_panel;
27#ifdef CONFIG_JZ_SLCD_ILI9338
28static unsigned int default_slcd_rgb[3] = { 100, 100, 100, };
29#endif
30
31/* Send a command without data. */
32static void send_panel_command(struct jzfb *jzfb, u32 cmd) {
33    u16 slcd_cfg = readw(jzfb->base + JZ_REG_SLCD_CFG);
34    switch (slcd_cfg & SLCD_CFG_CWIDTH_MASK) {
35    case SLCD_CFG_CWIDTH_8BIT:
36        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
37        writel(SLCD_DATA_RS_COMMAND | ((cmd&0xff00) >> 8), jzfb->base + JZ_REG_SLCD_DATA);
38        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
39        writel(SLCD_DATA_RS_COMMAND | ((cmd&0xff) >> 0), jzfb->base + JZ_REG_SLCD_DATA);
40        break;
41    case SLCD_CFG_CWIDTH_16BIT:
42        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
43        writel(SLCD_DATA_RS_COMMAND | (cmd&0xffff), jzfb->base + JZ_REG_SLCD_DATA);
44        break;
45    case SLCD_CFG_CWIDTH_18BIT:
46        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
47        writel(SLCD_DATA_RS_COMMAND | ((cmd&0xff00) << 2) | ((cmd&0xff) << 1), jzfb->base + JZ_REG_SLCD_DATA);
48        break;
49    default:
50        break;
51    }
52}
53
54/* Send data without command. */
55static void send_panel_data(struct jzfb *jzfb, u32 data)
56{
57    u16 slcd_cfg = readw(jzfb->base + JZ_REG_SLCD_CFG);
58    switch (slcd_cfg & SLCD_CFG_DWIDTH_MASK) {
59    case SLCD_CFG_DWIDTH_18:
60        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
61        data = ((data & 0xff) << 1) | ((data & 0xff00) << 2);
62        writel(SLCD_DATA_RS_DATA | ((data<<6)&0xfc0000)|((data<<4)&0xfc00) | ((data<<2)&0xfc), jzfb->base + JZ_REG_SLCD_DATA);
63        break;
64    case SLCD_CFG_DWIDTH_16:
65        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
66        writel(SLCD_DATA_RS_DATA | (data&0xffff), jzfb->base + JZ_REG_SLCD_DATA);
67        break;
68    case SLCD_CFG_DWIDTH_9_x2:
69        data = ((data & 0xff) << 1) | ((data & 0xff00) << 2);
70        data = ((data << 6) & 0xfc0000) | ((data << 4) & 0xfc00) | ((data << 2) & 0xfc);
71        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
72        writel(SLCD_DATA_RS_DATA | data, jzfb->base + JZ_REG_SLCD_DATA);
73        break;
74    default:
75        while (readb(jzfb->base + JZ_REG_SLCD_STATE) & SLCD_STATE_BUSY);
76        writel(SLCD_DATA_RS_DATA | (data&0xffff), jzfb->base + JZ_REG_SLCD_DATA);
77        break;
78    }
79}
80
81/* Send command and data. */
82static void set_panel_reg(struct jzfb *jzfb, u32 cmd, u32 data)
83{
84    send_panel_command(jzfb, cmd);
85    send_panel_data(jzfb, data);
86}
87
88#ifdef CONFIG_JZ_SLCD_ILI9325
89
90// TODO(MtH): GPIO assignments belong in the board definition, since two
91// boards using the same panel controller could still use different
92// GPIO assignments.
93// TODO(MtH): CS mismatch: B17 (A320) vs C20 (standard).
94#define ILI9325_GPIO_CS_N JZ_GPIO_PORTB(17) /* Chip select */
95#define ILI9325_GPIO_RESET_N JZ_GPIO_PORTB(18) /* LCD reset */
96
97static void ili9325_enable(struct jzfb *jzfb)
98{
99    /* RESET pulse */
100    gpio_set_value(ILI9325_GPIO_RESET_N, 0);
101    mdelay(10);
102    gpio_set_value(ILI9325_GPIO_RESET_N, 1);
103    mdelay(50);
104
105    /* Enable chip select */
106    gpio_set_value(ILI9325_GPIO_CS_N, 0);
107
108    /* Black magic */
109    set_panel_reg(jzfb, 0xE3, 0x3008);
110    set_panel_reg(jzfb, 0xE7, 0x0012);
111    set_panel_reg(jzfb, 0xEF, 0x1231);
112    set_panel_reg(jzfb, 0x01, 0x0100);
113    set_panel_reg(jzfb, 0x02, 0x0700);
114    set_panel_reg(jzfb, 0x03, 0x1098);
115    set_panel_reg(jzfb, 0x04, 0x0000);
116    set_panel_reg(jzfb, 0x08, 0x0207);
117    set_panel_reg(jzfb, 0x09, 0x0000);
118    set_panel_reg(jzfb, 0x0A, 0x0000);
119    set_panel_reg(jzfb, 0x0C, 0x0000);
120    set_panel_reg(jzfb, 0x0D, 0x0000);
121    set_panel_reg(jzfb, 0x0F, 0x0000);
122    set_panel_reg(jzfb, 0x10, 0x0000);
123    set_panel_reg(jzfb, 0x11, 0x0007);
124    set_panel_reg(jzfb, 0x12, 0x0000);
125    set_panel_reg(jzfb, 0x13, 0x0000);
126    mdelay(200);
127    set_panel_reg(jzfb, 0x10, 0x1290);
128    set_panel_reg(jzfb, 0x11, 0x0227);
129    mdelay(50);
130    set_panel_reg(jzfb, 0x12, 0x001B);
131    mdelay(50);
132    set_panel_reg(jzfb, 0x13, 0x0500);
133    set_panel_reg(jzfb, 0x29, 0x000C);
134    set_panel_reg(jzfb, 0x2B, 0x000D);
135    mdelay(50);
136    set_panel_reg(jzfb, 0x20, 0x0000);
137    set_panel_reg(jzfb, 0x21, 0x0000);
138    set_panel_reg(jzfb, 0x30, 0x0000);
139    set_panel_reg(jzfb, 0x31, 0x0204);
140    set_panel_reg(jzfb, 0x32, 0x0200);
141    set_panel_reg(jzfb, 0x35, 0x0007);
142    set_panel_reg(jzfb, 0x36, 0x1404);
143    set_panel_reg(jzfb, 0x37, 0x0705);
144    set_panel_reg(jzfb, 0x38, 0x0305);
145    set_panel_reg(jzfb, 0x39, 0x0707);
146    set_panel_reg(jzfb, 0x3C, 0x0701);
147    set_panel_reg(jzfb, 0x3D, 0x000E);
148    set_panel_reg(jzfb, 0x50, 0x0000);
149    set_panel_reg(jzfb, 0x51, 0x00EF);
150    set_panel_reg(jzfb, 0x52, 0x0000);
151    set_panel_reg(jzfb, 0x53, 0x013F);
152    set_panel_reg(jzfb, 0x60, 0xA700);
153    set_panel_reg(jzfb, 0x61, 0x0001);
154    set_panel_reg(jzfb, 0x6A, 0x0000);
155    set_panel_reg(jzfb, 0x80, 0x0000);
156    set_panel_reg(jzfb, 0x81, 0x0000);
157    set_panel_reg(jzfb, 0x82, 0x0000);
158    set_panel_reg(jzfb, 0x83, 0x0000);
159    set_panel_reg(jzfb, 0x84, 0x0000);
160    set_panel_reg(jzfb, 0x85, 0x0000);
161    set_panel_reg(jzfb, 0x90, 0x0010);
162    set_panel_reg(jzfb, 0x92, 0x0600);
163    mdelay(50);
164    set_panel_reg(jzfb, 0x07, 0x0133);
165    mdelay(50);
166    send_panel_command(jzfb, 0x22);
167}
168
169/* TODO(IGP): make sure LCD power consumption is low in these conditions */
170static void ili9325_disable(struct jzfb *jzfb)
171{
172    /* Keep chip select disabled */
173    gpio_set_value(ILI9325_GPIO_CS_N, 1);
174    /* Keep RESET active */
175    gpio_set_value(ILI9325_GPIO_RESET_N, 0);
176}
177
178static int ili9325_init(struct jzfb *jzfb)
179{
180    struct device *dev = &jzfb->pdev->dev;
181    int ret;
182
183    ret = gpio_request(ILI9325_GPIO_CS_N, dev_name(dev));
184    if (ret)
185        goto err_cs;
186    gpio_direction_output(ILI9325_GPIO_CS_N, 1);
187
188    ret = gpio_request(ILI9325_GPIO_RESET_N, dev_name(dev));
189    if (ret)
190        goto err_reset;
191    gpio_direction_output(ILI9325_GPIO_RESET_N, 0);
192
193    mdelay(100);
194    return 0;
195
196err_reset:
197    gpio_free(ILI9325_GPIO_CS_N);
198err_cs:
199    dev_err(dev, "Could not reserve GPIO pins for ILI9325 panel driver\n");
200    return ret;
201}
202
203static void ili9325_exit(struct jzfb *jzfb)
204{
205    gpio_free(ILI9325_GPIO_CS_N);
206    gpio_free(ILI9325_GPIO_RESET_N);
207}
208
209#endif
210
211#ifdef CONFIG_JZ_SLCD_ILI9331
212
213#define ILI9331_GPIO_CS_N JZ_GPIO_PORTB(17) /* Chip select */
214#define ILI9331_GPIO_RESET_N JZ_GPIO_PORTB(18) /* LCD reset */
215
216static void ili9331_enable(struct jzfb *jzfb)
217{
218    /* RESET pulse */
219    gpio_set_value(ILI9331_GPIO_RESET_N, 0);
220    mdelay(10);
221    gpio_set_value(ILI9331_GPIO_RESET_N, 1);
222    mdelay(50);
223
224    /* Enable chip select */
225    gpio_set_value(ILI9331_GPIO_CS_N, 0);
226
227    /* Black magic */
228    set_panel_reg(jzfb, 0xE7, 0x1014);
229    set_panel_reg(jzfb, 0x01, 0x0000);
230    set_panel_reg(jzfb, 0x02, 0x0200);
231    set_panel_reg(jzfb, 0x03, 0x1048);
232    set_panel_reg(jzfb, 0x08, 0x0202);
233    set_panel_reg(jzfb, 0x09, 0x0000);
234    set_panel_reg(jzfb, 0x0A, 0x0000);
235    set_panel_reg(jzfb, 0x0C, 0x0000);
236    set_panel_reg(jzfb, 0x0D, 0x0000);
237    set_panel_reg(jzfb, 0x0F, 0x0000);
238    set_panel_reg(jzfb, 0x10, 0x0000);
239    set_panel_reg(jzfb, 0x11, 0x0007);
240    set_panel_reg(jzfb, 0x12, 0x0000);
241    set_panel_reg(jzfb, 0x13, 0x0000);
242    mdelay(100);
243    set_panel_reg(jzfb, 0x10, 0x1690);
244    set_panel_reg(jzfb, 0x11, 0x0224);
245    mdelay(50);
246    set_panel_reg(jzfb, 0x12, 0x001F);
247    mdelay(50);
248    set_panel_reg(jzfb, 0x13, 0x0500);
249    set_panel_reg(jzfb, 0x29, 0x000C);
250    set_panel_reg(jzfb, 0x2B, 0x000D);
251    mdelay(50);
252    set_panel_reg(jzfb, 0x30, 0x0000);
253    set_panel_reg(jzfb, 0x31, 0x0106);
254    set_panel_reg(jzfb, 0x32, 0x0000);
255    set_panel_reg(jzfb, 0x35, 0x0204);
256    set_panel_reg(jzfb, 0x36, 0x160A);
257    set_panel_reg(jzfb, 0x37, 0x0707);
258    set_panel_reg(jzfb, 0x38, 0x0106);
259    set_panel_reg(jzfb, 0x39, 0x0706);
260    set_panel_reg(jzfb, 0x3C, 0x0402);
261    set_panel_reg(jzfb, 0x3D, 0x0C0F);
262    set_panel_reg(jzfb, 0x50, 0x0000);
263    set_panel_reg(jzfb, 0x51, 0x00EF);
264    set_panel_reg(jzfb, 0x52, 0x0000);
265    set_panel_reg(jzfb, 0x53, 0x013F);
266    set_panel_reg(jzfb, 0x20, 0x0000);
267    set_panel_reg(jzfb, 0x21, 0x0000);
268    set_panel_reg(jzfb, 0x60, 0x2700);
269    set_panel_reg(jzfb, 0x61, 0x0001);
270    set_panel_reg(jzfb, 0x6A, 0x0000);
271    set_panel_reg(jzfb, 0x80, 0x0000);
272    set_panel_reg(jzfb, 0x81, 0x0000);
273    set_panel_reg(jzfb, 0x82, 0x0000);
274    set_panel_reg(jzfb, 0x83, 0x0000);
275    set_panel_reg(jzfb, 0x84, 0x0000);
276    set_panel_reg(jzfb, 0x85, 0x0000);
277    set_panel_reg(jzfb, 0x20, 0x00EF);
278    set_panel_reg(jzfb, 0x21, 0x0190);
279    set_panel_reg(jzfb, 0x90, 0x0010);
280    set_panel_reg(jzfb, 0x92, 0x0600);
281    set_panel_reg(jzfb, 0x07, 0x0133);
282    send_panel_command(jzfb, 0x22);
283}
284
285/* TODO(IGP): make sure LCD power consumption is low in these conditions */
286static void ili9331_disable(struct jzfb *jzfb)
287{
288    /* Keep chip select disabled */
289    gpio_set_value(ILI9331_GPIO_CS_N, 1);
290    /* Keep RESET active */
291    gpio_set_value(ILI9331_GPIO_RESET_N, 0);
292}
293
294static int ili9331_init(struct jzfb *jzfb)
295{
296    struct device *dev = &jzfb->pdev->dev;
297    int ret;
298
299    ret = gpio_request(ILI9331_GPIO_CS_N, dev_name(dev));
300    if (ret)
301        goto err_cs;
302    gpio_direction_output(ILI9331_GPIO_CS_N, 1);
303
304    ret = gpio_request(ILI9331_GPIO_RESET_N, dev_name(dev));
305    if (ret)
306        goto err_reset;
307    gpio_direction_output(ILI9331_GPIO_RESET_N, 0);
308
309    mdelay(100);
310    return 0;
311
312err_reset:
313    gpio_free(ILI9331_GPIO_CS_N);
314err_cs:
315    dev_err(dev, "Could not reserve GPIO pins for ILI9331 panel driver\n");
316    return ret;
317}
318
319static void ili9331_exit(struct jzfb *jzfb)
320{
321    gpio_free(ILI9331_GPIO_CS_N);
322    gpio_free(ILI9331_GPIO_RESET_N);
323}
324
325#endif
326
327#ifdef CONFIG_JZ_SLCD_ILI9338
328
329static void ili9338_set_color_table(struct jzfb *jzfb)
330{
331    unsigned int c;
332    struct device *dev = &jzfb->pdev->dev;
333
334    /* Set up a custom color lookup table.
335     * This helps to fix the 'blueish' display on some devices. */
336    send_panel_command(jzfb, 0x2d);
337
338    for (c = 0; c < 3; c++) {
339        unsigned int i, n, v, s;
340        n = c == 1 ? 64 /* 6 bits G */ : 32 /* 5 bits R/B */;
341        s = jzfb->rgb[c] * (((63 << 24) - 1) / (100 * (n - 1)));
342        v = 0;
343        for (i = 0; i < n; i++, v += s)
344            send_panel_data(jzfb, (v >> 24) + ((v >> 23) & 1));
345    }
346
347    dev_info(dev, "ILI9338 color table initialized with R=%u G=%u B=%u\n",
348                jzfb->rgb[0], jzfb->rgb[1], jzfb->rgb[2]);
349}
350
351module_param_array_named(rgb, default_slcd_rgb, uint, NULL, 0);
352MODULE_PARM_DESC(rgb, "comma-separated list of three values representing the percentage of red, green and blue");
353
354#define ILI9338_GPIO_CS_N JZ_GPIO_PORTB(17) /* Chip select */
355#define ILI9338_GPIO_RESET_N JZ_GPIO_PORTB(18) /* LCD reset */
356
357static void ili9338_enable(struct jzfb *jzfb)
358{
359    /* RESET pulse */
360    gpio_set_value(ILI9338_GPIO_RESET_N, 0);
361    mdelay(10);
362    gpio_set_value(ILI9338_GPIO_RESET_N, 1);
363    mdelay(50);
364
365    /* Enable chip select */
366    gpio_set_value(ILI9338_GPIO_CS_N, 0);
367
368    /* Black magic */
369    send_panel_command(jzfb, 0x11);
370    mdelay(100);
371
372    send_panel_command(jzfb, 0xCB);
373    send_panel_data(jzfb, 0x01);
374
375    send_panel_command(jzfb, 0xC0);
376    send_panel_data(jzfb, 0x26);
377    send_panel_data(jzfb, 0x01);
378    send_panel_command(jzfb, 0xC1);
379    send_panel_data(jzfb, 0x10);
380    send_panel_command(jzfb, 0xC5);
381    send_panel_data(jzfb, 0x10);
382    send_panel_data(jzfb, 0x52);
383
384    send_panel_command(jzfb, 0x26);
385    send_panel_data(jzfb, 0x01);
386    send_panel_command(jzfb, 0xE0);
387    send_panel_data(jzfb, 0x10);
388    send_panel_data(jzfb, 0x10);
389    send_panel_data(jzfb, 0x10);
390    send_panel_data(jzfb, 0x08);
391    send_panel_data(jzfb, 0x0E);
392    send_panel_data(jzfb, 0x06);
393    send_panel_data(jzfb, 0x42);
394    send_panel_data(jzfb, 0x28);
395    send_panel_data(jzfb, 0x36);
396    send_panel_data(jzfb, 0x03);
397    send_panel_data(jzfb, 0x0E);
398    send_panel_data(jzfb, 0x04);
399    send_panel_data(jzfb, 0x13);
400    send_panel_data(jzfb, 0x0E);
401    send_panel_data(jzfb, 0x0C);
402    send_panel_command(jzfb, 0XE1);
403    send_panel_data(jzfb, 0x0C);
404    send_panel_data(jzfb, 0x23);
405    send_panel_data(jzfb, 0x26);
406    send_panel_data(jzfb, 0x04);
407    send_panel_data(jzfb, 0x0C);
408    send_panel_data(jzfb, 0x04);
409    send_panel_data(jzfb, 0x39);
410    send_panel_data(jzfb, 0x24);
411    send_panel_data(jzfb, 0x4B);
412    send_panel_data(jzfb, 0x03);
413    send_panel_data(jzfb, 0x0B);
414    send_panel_data(jzfb, 0x0B);
415    send_panel_data(jzfb, 0x33);
416    send_panel_data(jzfb, 0x37);
417    send_panel_data(jzfb, 0x0F);
418
419    send_panel_command(jzfb, 0x2a);
420    send_panel_data(jzfb, 0x00);
421    send_panel_data(jzfb, 0x00);
422    send_panel_data(jzfb, 0x01);
423    send_panel_data(jzfb, 0x3f);
424
425    send_panel_command(jzfb, 0x2b);
426    send_panel_data(jzfb, 0x00);
427    send_panel_data(jzfb, 0x00);
428    send_panel_data(jzfb, 0x00);
429    send_panel_data(jzfb, 0xef);
430
431    send_panel_command(jzfb, 0x36);
432    send_panel_data(jzfb, 0xe8);
433
434    send_panel_command(jzfb, 0x3A);
435    send_panel_data(jzfb, 0x05);
436
437    ili9338_set_color_table(jzfb);
438
439    send_panel_command(jzfb, 0x29);
440
441    send_panel_command(jzfb, 0x2c);
442}
443
444/* TODO(IGP): make sure LCD power consumption is low in these conditions */
445static void ili9338_disable(struct jzfb *jzfb)
446{
447    /* Keep chip select disabled */
448    gpio_set_value(ILI9338_GPIO_CS_N, 1);
449    /* Keep RESET active */
450    gpio_set_value(ILI9338_GPIO_RESET_N, 0);
451}
452
453static int ili9338_init(struct jzfb *jzfb)
454{
455    struct device *dev = &jzfb->pdev->dev;
456    int ret;
457
458    ret = gpio_request(ILI9338_GPIO_CS_N, dev_name(dev));
459    if (ret)
460        goto err_cs;
461    gpio_direction_output(ILI9338_GPIO_CS_N, 1);
462
463    ret = gpio_request(ILI9338_GPIO_RESET_N, dev_name(dev));
464    if (ret)
465        goto err_reset;
466    gpio_direction_output(ILI9338_GPIO_RESET_N, 0);
467
468    memcpy(jzfb->rgb, default_slcd_rgb, sizeof(default_slcd_rgb));
469    mdelay(100);
470    return 0;
471
472err_reset:
473    gpio_free(ILI9338_GPIO_CS_N);
474err_cs:
475    dev_err(dev, "Could not reserve GPIO pins for ILI9338 panel driver\n");
476    return ret;
477}
478
479static void ili9338_exit(struct jzfb *jzfb)
480{
481    gpio_free(ILI9338_GPIO_CS_N);
482    gpio_free(ILI9338_GPIO_RESET_N);
483}
484
485#endif
486
487static const struct jz_slcd_panel jz_slcd_panels[] = {
488#ifdef CONFIG_JZ_SLCD_ILI9325
489    {
490        ili9325_init, ili9325_exit,
491        ili9325_enable, ili9325_disable,
492        "ili9325",
493    },
494#endif
495#ifdef CONFIG_JZ_SLCD_ILI9331
496    {
497        ili9331_init, ili9331_exit,
498        ili9331_enable, ili9331_disable,
499        "ili9331",
500    },
501#endif
502#ifdef CONFIG_JZ_SLCD_ILI9338
503    {
504        ili9338_init, ili9338_exit,
505        ili9338_enable, ili9338_disable,
506        "ili9338",
507    },
508#endif
509};
510
511module_param_named(panel, default_slcd_panel, charp, 0);
512MODULE_PARM_DESC(panel, "SLCD panel used on the device");
513
514const struct jz_slcd_panel *jz_slcd_panel_from_name(const char *name)
515{
516    unsigned int i;
517    for (i = 0; i < ARRAY_SIZE(jz_slcd_panels); i++) {
518        if (sysfs_streq(name, jz_slcd_panels[i].name))
519            return &jz_slcd_panels[i];
520    }
521    return NULL;
522}
523
524const struct jz_slcd_panel *jz_slcd_panels_probe(struct jzfb *jzfb)
525{
526    const struct jz_slcd_panel *panel;
527    if (ARRAY_SIZE(jz_slcd_panels) == 0)
528        return NULL;
529
530    panel = &jz_slcd_panels[0];
531
532    if (default_slcd_panel) {
533        panel = jz_slcd_panel_from_name(default_slcd_panel);
534        if (!panel) {
535            struct device *dev = &jzfb->pdev->dev;
536            dev_err(dev, "Unknown SLCD panel: %s\n",
537                        default_slcd_panel);
538        }
539    }
540    return panel;
541}
542

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