Root/lib/swiotlb.c

Source at commit b386be689295730688885552666ea40b2e639b14 created 8 years 11 months ago.
By Maarten ter Huurne, Revert "MIPS: JZ4740: reset: Initialize hibernate wakeup counters."
1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define OFFSET(val,align) ((unsigned long) \
42                       ( (val) & ( (align) - 1)))
43
44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46/*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53int swiotlb_force;
54
55/*
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
58 * API.
59 */
60static char *io_tlb_start, *io_tlb_end;
61
62/*
63 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
65 */
66static unsigned long io_tlb_nslabs;
67
68/*
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
70 */
71static unsigned long io_tlb_overflow = 32*1024;
72
73static void *io_tlb_overflow_buffer;
74
75/*
76 * This is a free list describing the number of free entries available from
77 * each index
78 */
79static unsigned int *io_tlb_list;
80static unsigned int io_tlb_index;
81
82/*
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
85 */
86static phys_addr_t *io_tlb_orig_addr;
87
88/*
89 * Protect the above data structures in the map and unmap calls
90 */
91static DEFINE_SPINLOCK(io_tlb_lock);
92
93static int late_alloc;
94
95static int __init
96setup_io_tlb_npages(char *str)
97{
98    if (isdigit(*str)) {
99        io_tlb_nslabs = simple_strtoul(str, &str, 0);
100        /* avoid tail segment of size < IO_TLB_SEGSIZE */
101        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
102    }
103    if (*str == ',')
104        ++str;
105    if (!strcmp(str, "force"))
106        swiotlb_force = 1;
107
108    return 1;
109}
110__setup("swiotlb=", setup_io_tlb_npages);
111/* make io_tlb_overflow tunable too? */
112
113unsigned long swiotlb_nr_tbl(void)
114{
115    return io_tlb_nslabs;
116}
117EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
118/* Note that this doesn't work with highmem page */
119static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
120                      volatile void *address)
121{
122    return phys_to_dma(hwdev, virt_to_phys(address));
123}
124
125void swiotlb_print_info(void)
126{
127    unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
128    phys_addr_t pstart, pend;
129
130    pstart = virt_to_phys(io_tlb_start);
131    pend = virt_to_phys(io_tlb_end);
132
133    printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
134           bytes >> 20, io_tlb_start, io_tlb_end);
135    printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
136           (unsigned long long)pstart,
137           (unsigned long long)pend);
138}
139
140void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
141{
142    unsigned long i, bytes;
143
144    bytes = nslabs << IO_TLB_SHIFT;
145
146    io_tlb_nslabs = nslabs;
147    io_tlb_start = tlb;
148    io_tlb_end = io_tlb_start + bytes;
149
150    /*
151     * Allocate and initialize the free list array. This array is used
152     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
153     * between io_tlb_start and io_tlb_end.
154     */
155    io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
156    for (i = 0; i < io_tlb_nslabs; i++)
157         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
158    io_tlb_index = 0;
159    io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
160
161    /*
162     * Get the overflow emergency buffer
163     */
164    io_tlb_overflow_buffer = alloc_bootmem_low_pages(PAGE_ALIGN(io_tlb_overflow));
165    if (!io_tlb_overflow_buffer)
166        panic("Cannot allocate SWIOTLB overflow buffer!\n");
167    if (verbose)
168        swiotlb_print_info();
169}
170
171/*
172 * Statically reserve bounce buffer space and initialize bounce buffer data
173 * structures for the software IO TLB used to implement the DMA API.
174 */
175void __init
176swiotlb_init_with_default_size(size_t default_size, int verbose)
177{
178    unsigned long bytes;
179
180    if (!io_tlb_nslabs) {
181        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
182        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
183    }
184
185    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
186
187    /*
188     * Get IO TLB memory from the low pages
189     */
190    io_tlb_start = alloc_bootmem_low_pages(PAGE_ALIGN(bytes));
191    if (!io_tlb_start)
192        panic("Cannot allocate SWIOTLB buffer");
193
194    swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
195}
196
197void __init
198swiotlb_init(int verbose)
199{
200    swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
201}
202
203/*
204 * Systems with larger DMA zones (those that don't support ISA) can
205 * initialize the swiotlb later using the slab allocator if needed.
206 * This should be just like above, but with some error catching.
207 */
208int
209swiotlb_late_init_with_default_size(size_t default_size)
210{
211    unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
212    unsigned int order;
213
214    if (!io_tlb_nslabs) {
215        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
216        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
217    }
218
219    /*
220     * Get IO TLB memory from the low pages
221     */
222    order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
223    io_tlb_nslabs = SLABS_PER_PAGE << order;
224    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
225
226    while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
227        io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
228                            order);
229        if (io_tlb_start)
230            break;
231        order--;
232    }
233
234    if (!io_tlb_start)
235        goto cleanup1;
236
237    if (order != get_order(bytes)) {
238        printk(KERN_WARNING "Warning: only able to allocate %ld MB "
239               "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
240        io_tlb_nslabs = SLABS_PER_PAGE << order;
241        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
242    }
243    io_tlb_end = io_tlb_start + bytes;
244    memset(io_tlb_start, 0, bytes);
245
246    /*
247     * Allocate and initialize the free list array. This array is used
248     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
249     * between io_tlb_start and io_tlb_end.
250     */
251    io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
252                                  get_order(io_tlb_nslabs * sizeof(int)));
253    if (!io_tlb_list)
254        goto cleanup2;
255
256    for (i = 0; i < io_tlb_nslabs; i++)
257         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
258    io_tlb_index = 0;
259
260    io_tlb_orig_addr = (phys_addr_t *)
261        __get_free_pages(GFP_KERNEL,
262                 get_order(io_tlb_nslabs *
263                       sizeof(phys_addr_t)));
264    if (!io_tlb_orig_addr)
265        goto cleanup3;
266
267    memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
268
269    /*
270     * Get the overflow emergency buffer
271     */
272    io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
273                                              get_order(io_tlb_overflow));
274    if (!io_tlb_overflow_buffer)
275        goto cleanup4;
276
277    swiotlb_print_info();
278
279    late_alloc = 1;
280
281    return 0;
282
283cleanup4:
284    free_pages((unsigned long)io_tlb_orig_addr,
285           get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
286    io_tlb_orig_addr = NULL;
287cleanup3:
288    free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
289                                                     sizeof(int)));
290    io_tlb_list = NULL;
291cleanup2:
292    io_tlb_end = NULL;
293    free_pages((unsigned long)io_tlb_start, order);
294    io_tlb_start = NULL;
295cleanup1:
296    io_tlb_nslabs = req_nslabs;
297    return -ENOMEM;
298}
299
300void __init swiotlb_free(void)
301{
302    if (!io_tlb_overflow_buffer)
303        return;
304
305    if (late_alloc) {
306        free_pages((unsigned long)io_tlb_overflow_buffer,
307               get_order(io_tlb_overflow));
308        free_pages((unsigned long)io_tlb_orig_addr,
309               get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
310        free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
311                                 sizeof(int)));
312        free_pages((unsigned long)io_tlb_start,
313               get_order(io_tlb_nslabs << IO_TLB_SHIFT));
314    } else {
315        free_bootmem_late(__pa(io_tlb_overflow_buffer),
316                  PAGE_ALIGN(io_tlb_overflow));
317        free_bootmem_late(__pa(io_tlb_orig_addr),
318                  PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
319        free_bootmem_late(__pa(io_tlb_list),
320                  PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
321        free_bootmem_late(__pa(io_tlb_start),
322                  PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
323    }
324    io_tlb_nslabs = 0;
325}
326
327static int is_swiotlb_buffer(phys_addr_t paddr)
328{
329    return paddr >= virt_to_phys(io_tlb_start) &&
330        paddr < virt_to_phys(io_tlb_end);
331}
332
333/*
334 * Bounce: copy the swiotlb buffer back to the original dma location
335 */
336void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
337            enum dma_data_direction dir)
338{
339    unsigned long pfn = PFN_DOWN(phys);
340
341    if (PageHighMem(pfn_to_page(pfn))) {
342        /* The buffer does not have a mapping. Map it in and copy */
343        unsigned int offset = phys & ~PAGE_MASK;
344        char *buffer;
345        unsigned int sz = 0;
346        unsigned long flags;
347
348        while (size) {
349            sz = min_t(size_t, PAGE_SIZE - offset, size);
350
351            local_irq_save(flags);
352            buffer = kmap_atomic(pfn_to_page(pfn),
353                         KM_BOUNCE_READ);
354            if (dir == DMA_TO_DEVICE)
355                memcpy(dma_addr, buffer + offset, sz);
356            else
357                memcpy(buffer + offset, dma_addr, sz);
358            kunmap_atomic(buffer, KM_BOUNCE_READ);
359            local_irq_restore(flags);
360
361            size -= sz;
362            pfn++;
363            dma_addr += sz;
364            offset = 0;
365        }
366    } else {
367        if (dir == DMA_TO_DEVICE)
368            memcpy(dma_addr, phys_to_virt(phys), size);
369        else
370            memcpy(phys_to_virt(phys), dma_addr, size);
371    }
372}
373EXPORT_SYMBOL_GPL(swiotlb_bounce);
374
375void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
376                 phys_addr_t phys, size_t size,
377                 enum dma_data_direction dir)
378{
379    unsigned long flags;
380    char *dma_addr;
381    unsigned int nslots, stride, index, wrap;
382    int i;
383    unsigned long mask;
384    unsigned long offset_slots;
385    unsigned long max_slots;
386
387    mask = dma_get_seg_boundary(hwdev);
388
389    tbl_dma_addr &= mask;
390
391    offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
392
393    /*
394      * Carefully handle integer overflow which can occur when mask == ~0UL.
395      */
396    max_slots = mask + 1
397            ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
398            : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
399
400    /*
401     * For mappings greater than a page, we limit the stride (and
402     * hence alignment) to a page size.
403     */
404    nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
405    if (size > PAGE_SIZE)
406        stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
407    else
408        stride = 1;
409
410    BUG_ON(!nslots);
411
412    /*
413     * Find suitable number of IO TLB entries size that will fit this
414     * request and allocate a buffer from that IO TLB pool.
415     */
416    spin_lock_irqsave(&io_tlb_lock, flags);
417    index = ALIGN(io_tlb_index, stride);
418    if (index >= io_tlb_nslabs)
419        index = 0;
420    wrap = index;
421
422    do {
423        while (iommu_is_span_boundary(index, nslots, offset_slots,
424                          max_slots)) {
425            index += stride;
426            if (index >= io_tlb_nslabs)
427                index = 0;
428            if (index == wrap)
429                goto not_found;
430        }
431
432        /*
433         * If we find a slot that indicates we have 'nslots' number of
434         * contiguous buffers, we allocate the buffers from that slot
435         * and mark the entries as '0' indicating unavailable.
436         */
437        if (io_tlb_list[index] >= nslots) {
438            int count = 0;
439
440            for (i = index; i < (int) (index + nslots); i++)
441                io_tlb_list[i] = 0;
442            for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
443                io_tlb_list[i] = ++count;
444            dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
445
446            /*
447             * Update the indices to avoid searching in the next
448             * round.
449             */
450            io_tlb_index = ((index + nslots) < io_tlb_nslabs
451                    ? (index + nslots) : 0);
452
453            goto found;
454        }
455        index += stride;
456        if (index >= io_tlb_nslabs)
457            index = 0;
458    } while (index != wrap);
459
460not_found:
461    spin_unlock_irqrestore(&io_tlb_lock, flags);
462    return NULL;
463found:
464    spin_unlock_irqrestore(&io_tlb_lock, flags);
465
466    /*
467     * Save away the mapping from the original address to the DMA address.
468     * This is needed when we sync the memory. Then we sync the buffer if
469     * needed.
470     */
471    for (i = 0; i < nslots; i++)
472        io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
473    if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
474        swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
475
476    return dma_addr;
477}
478EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
479
480/*
481 * Allocates bounce buffer and returns its kernel virtual address.
482 */
483
484static void *
485map_single(struct device *hwdev, phys_addr_t phys, size_t size,
486       enum dma_data_direction dir)
487{
488    dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
489
490    return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
491}
492
493/*
494 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
495 */
496void
497swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
498            enum dma_data_direction dir)
499{
500    unsigned long flags;
501    int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
502    int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
503    phys_addr_t phys = io_tlb_orig_addr[index];
504
505    /*
506     * First, sync the memory before unmapping the entry
507     */
508    if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
509        swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
510
511    /*
512     * Return the buffer to the free list by setting the corresponding
513     * entries to indicate the number of contiguous entries available.
514     * While returning the entries to the free list, we merge the entries
515     * with slots below and above the pool being returned.
516     */
517    spin_lock_irqsave(&io_tlb_lock, flags);
518    {
519        count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
520             io_tlb_list[index + nslots] : 0);
521        /*
522         * Step 1: return the slots to the free list, merging the
523         * slots with superceeding slots
524         */
525        for (i = index + nslots - 1; i >= index; i--)
526            io_tlb_list[i] = ++count;
527        /*
528         * Step 2: merge the returned slots with the preceding slots,
529         * if available (non zero)
530         */
531        for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
532            io_tlb_list[i] = ++count;
533    }
534    spin_unlock_irqrestore(&io_tlb_lock, flags);
535}
536EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
537
538void
539swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
540            enum dma_data_direction dir,
541            enum dma_sync_target target)
542{
543    int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
544    phys_addr_t phys = io_tlb_orig_addr[index];
545
546    phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
547
548    switch (target) {
549    case SYNC_FOR_CPU:
550        if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
551            swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
552        else
553            BUG_ON(dir != DMA_TO_DEVICE);
554        break;
555    case SYNC_FOR_DEVICE:
556        if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
557            swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
558        else
559            BUG_ON(dir != DMA_FROM_DEVICE);
560        break;
561    default:
562        BUG();
563    }
564}
565EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
566
567void *
568swiotlb_alloc_coherent(struct device *hwdev, size_t size,
569               dma_addr_t *dma_handle, gfp_t flags)
570{
571    dma_addr_t dev_addr;
572    void *ret;
573    int order = get_order(size);
574    u64 dma_mask = DMA_BIT_MASK(32);
575
576    if (hwdev && hwdev->coherent_dma_mask)
577        dma_mask = hwdev->coherent_dma_mask;
578
579    ret = (void *)__get_free_pages(flags, order);
580    if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
581        /*
582         * The allocated memory isn't reachable by the device.
583         */
584        free_pages((unsigned long) ret, order);
585        ret = NULL;
586    }
587    if (!ret) {
588        /*
589         * We are either out of memory or the device can't DMA to
590         * GFP_DMA memory; fall back on map_single(), which
591         * will grab memory from the lowest available address range.
592         */
593        ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
594        if (!ret)
595            return NULL;
596    }
597
598    memset(ret, 0, size);
599    dev_addr = swiotlb_virt_to_bus(hwdev, ret);
600
601    /* Confirm address can be DMA'd by device */
602    if (dev_addr + size - 1 > dma_mask) {
603        printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
604               (unsigned long long)dma_mask,
605               (unsigned long long)dev_addr);
606
607        /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
608        swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
609        return NULL;
610    }
611    *dma_handle = dev_addr;
612    return ret;
613}
614EXPORT_SYMBOL(swiotlb_alloc_coherent);
615
616void
617swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
618              dma_addr_t dev_addr)
619{
620    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
621
622    WARN_ON(irqs_disabled());
623    if (!is_swiotlb_buffer(paddr))
624        free_pages((unsigned long)vaddr, get_order(size));
625    else
626        /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
627        swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
628}
629EXPORT_SYMBOL(swiotlb_free_coherent);
630
631static void
632swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
633         int do_panic)
634{
635    /*
636     * Ran out of IOMMU space for this operation. This is very bad.
637     * Unfortunately the drivers cannot handle this operation properly.
638     * unless they check for dma_mapping_error (most don't)
639     * When the mapping is small enough return a static buffer to limit
640     * the damage, or panic when the transfer is too big.
641     */
642    printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
643           "device %s\n", size, dev ? dev_name(dev) : "?");
644
645    if (size <= io_tlb_overflow || !do_panic)
646        return;
647
648    if (dir == DMA_BIDIRECTIONAL)
649        panic("DMA: Random memory could be DMA accessed\n");
650    if (dir == DMA_FROM_DEVICE)
651        panic("DMA: Random memory could be DMA written\n");
652    if (dir == DMA_TO_DEVICE)
653        panic("DMA: Random memory could be DMA read\n");
654}
655
656/*
657 * Map a single buffer of the indicated size for DMA in streaming mode. The
658 * physical address to use is returned.
659 *
660 * Once the device is given the dma address, the device owns this memory until
661 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
662 */
663dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
664                unsigned long offset, size_t size,
665                enum dma_data_direction dir,
666                struct dma_attrs *attrs)
667{
668    phys_addr_t phys = page_to_phys(page) + offset;
669    dma_addr_t dev_addr = phys_to_dma(dev, phys);
670    void *map;
671
672    BUG_ON(dir == DMA_NONE);
673    /*
674     * If the address happens to be in the device's DMA window,
675     * we can safely return the device addr and not worry about bounce
676     * buffering it.
677     */
678    if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
679        return dev_addr;
680
681    /*
682     * Oh well, have to allocate and map a bounce buffer.
683     */
684    map = map_single(dev, phys, size, dir);
685    if (!map) {
686        swiotlb_full(dev, size, dir, 1);
687        map = io_tlb_overflow_buffer;
688    }
689
690    dev_addr = swiotlb_virt_to_bus(dev, map);
691
692    /*
693     * Ensure that the address returned is DMA'ble
694     */
695    if (!dma_capable(dev, dev_addr, size)) {
696        swiotlb_tbl_unmap_single(dev, map, size, dir);
697        dev_addr = swiotlb_virt_to_bus(dev, io_tlb_overflow_buffer);
698    }
699
700    return dev_addr;
701}
702EXPORT_SYMBOL_GPL(swiotlb_map_page);
703
704/*
705 * Unmap a single streaming mode DMA translation. The dma_addr and size must
706 * match what was provided for in a previous swiotlb_map_page call. All
707 * other usages are undefined.
708 *
709 * After this call, reads by the cpu to the buffer are guaranteed to see
710 * whatever the device wrote there.
711 */
712static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
713             size_t size, enum dma_data_direction dir)
714{
715    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
716
717    BUG_ON(dir == DMA_NONE);
718
719    if (is_swiotlb_buffer(paddr)) {
720        swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
721        return;
722    }
723
724    if (dir != DMA_FROM_DEVICE)
725        return;
726
727    /*
728     * phys_to_virt doesn't work with hihgmem page but we could
729     * call dma_mark_clean() with hihgmem page here. However, we
730     * are fine since dma_mark_clean() is null on POWERPC. We can
731     * make dma_mark_clean() take a physical address if necessary.
732     */
733    dma_mark_clean(phys_to_virt(paddr), size);
734}
735
736void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
737            size_t size, enum dma_data_direction dir,
738            struct dma_attrs *attrs)
739{
740    unmap_single(hwdev, dev_addr, size, dir);
741}
742EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
743
744/*
745 * Make physical memory consistent for a single streaming mode DMA translation
746 * after a transfer.
747 *
748 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
749 * using the cpu, yet do not wish to teardown the dma mapping, you must
750 * call this function before doing so. At the next point you give the dma
751 * address back to the card, you must first perform a
752 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
753 */
754static void
755swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
756            size_t size, enum dma_data_direction dir,
757            enum dma_sync_target target)
758{
759    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
760
761    BUG_ON(dir == DMA_NONE);
762
763    if (is_swiotlb_buffer(paddr)) {
764        swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
765                       target);
766        return;
767    }
768
769    if (dir != DMA_FROM_DEVICE)
770        return;
771
772    dma_mark_clean(phys_to_virt(paddr), size);
773}
774
775void
776swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
777                size_t size, enum dma_data_direction dir)
778{
779    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
780}
781EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
782
783void
784swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
785                   size_t size, enum dma_data_direction dir)
786{
787    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
788}
789EXPORT_SYMBOL(swiotlb_sync_single_for_device);
790
791/*
792 * Map a set of buffers described by scatterlist in streaming mode for DMA.
793 * This is the scatter-gather version of the above swiotlb_map_page
794 * interface. Here the scatter gather list elements are each tagged with the
795 * appropriate dma address and length. They are obtained via
796 * sg_dma_{address,length}(SG).
797 *
798 * NOTE: An implementation may be able to use a smaller number of
799 * DMA address/length pairs than there are SG table elements.
800 * (for example via virtual mapping capabilities)
801 * The routine returns the number of addr/length pairs actually
802 * used, at most nents.
803 *
804 * Device ownership issues as mentioned above for swiotlb_map_page are the
805 * same here.
806 */
807int
808swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
809             enum dma_data_direction dir, struct dma_attrs *attrs)
810{
811    struct scatterlist *sg;
812    int i;
813
814    BUG_ON(dir == DMA_NONE);
815
816    for_each_sg(sgl, sg, nelems, i) {
817        phys_addr_t paddr = sg_phys(sg);
818        dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
819
820        if (swiotlb_force ||
821            !dma_capable(hwdev, dev_addr, sg->length)) {
822            void *map = map_single(hwdev, sg_phys(sg),
823                           sg->length, dir);
824            if (!map) {
825                /* Don't panic here, we expect map_sg users
826                   to do proper error handling. */
827                swiotlb_full(hwdev, sg->length, dir, 0);
828                swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
829                               attrs);
830                sgl[0].dma_length = 0;
831                return 0;
832            }
833            sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
834        } else
835            sg->dma_address = dev_addr;
836        sg->dma_length = sg->length;
837    }
838    return nelems;
839}
840EXPORT_SYMBOL(swiotlb_map_sg_attrs);
841
842int
843swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
844           enum dma_data_direction dir)
845{
846    return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
847}
848EXPORT_SYMBOL(swiotlb_map_sg);
849
850/*
851 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
852 * concerning calls here are the same as for swiotlb_unmap_page() above.
853 */
854void
855swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
856               int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
857{
858    struct scatterlist *sg;
859    int i;
860
861    BUG_ON(dir == DMA_NONE);
862
863    for_each_sg(sgl, sg, nelems, i)
864        unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
865
866}
867EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
868
869void
870swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
871         enum dma_data_direction dir)
872{
873    return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
874}
875EXPORT_SYMBOL(swiotlb_unmap_sg);
876
877/*
878 * Make physical memory consistent for a set of streaming mode DMA translations
879 * after a transfer.
880 *
881 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
882 * and usage.
883 */
884static void
885swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
886        int nelems, enum dma_data_direction dir,
887        enum dma_sync_target target)
888{
889    struct scatterlist *sg;
890    int i;
891
892    for_each_sg(sgl, sg, nelems, i)
893        swiotlb_sync_single(hwdev, sg->dma_address,
894                    sg->dma_length, dir, target);
895}
896
897void
898swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
899            int nelems, enum dma_data_direction dir)
900{
901    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
902}
903EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
904
905void
906swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
907               int nelems, enum dma_data_direction dir)
908{
909    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
910}
911EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
912
913int
914swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
915{
916    return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
917}
918EXPORT_SYMBOL(swiotlb_dma_mapping_error);
919
920/*
921 * Return whether the given device DMA address mask can be supported
922 * properly. For example, if your device can only drive the low 24-bits
923 * during bus mastering, then you would pass 0x00ffffff as the mask to
924 * this function.
925 */
926int
927swiotlb_dma_supported(struct device *hwdev, u64 mask)
928{
929    return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
930}
931EXPORT_SYMBOL(swiotlb_dma_supported);
932

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