Root/scripts/Makefile.build

1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48        ifneq ("$(save-cflags)","$(CFLAGS)")
49                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
50        endif
51endif
52include scripts/Makefile.lib
53
54ifdef host-progs
55ifneq ($(hostprogs-y),$(host-progs))
56$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
57hostprogs-y += $(host-progs)
58endif
59endif
60
61# Do not include host rules unless needed
62ifneq ($(hostprogs-y)$(hostprogs-m),)
63include scripts/Makefile.host
64endif
65
66ifneq ($(KBUILD_SRC),)
67# Create output directory if not already present
68_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
69
70# Create directories for object files if directory does not exist
71# Needed when obj-y := dir/file.o syntax is used
72_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
73endif
74
75ifndef obj
76$(warning kbuild: Makefile.build is included improperly)
77endif
78
79# ===========================================================================
80
81ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
82lib-target := $(obj)/lib.a
83endif
84
85ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
86builtin-target := $(obj)/built-in.o
87endif
88
89modorder-target := $(obj)/modules.order
90
91# We keep a list of all modules in $(MODVERDIR)
92
93__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
94     $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
95     $(subdir-ym) $(always)
96    @:
97
98# Linus' kernel sanity checking tool
99ifneq ($(KBUILD_CHECKSRC),0)
100  ifeq ($(KBUILD_CHECKSRC),2)
101    quiet_cmd_force_checksrc = CHECK $<
102          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
103  else
104      quiet_cmd_checksrc = CHECK $<
105            cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
106  endif
107endif
108
109# Do section mismatch analysis for each module/built-in.o
110ifdef CONFIG_DEBUG_SECTION_MISMATCH
111  cmd_secanalysis = ; scripts/mod/modpost $@
112endif
113
114# Compile C sources (.c)
115# ---------------------------------------------------------------------------
116
117# Default is built-in, unless we know otherwise
118modkern_cflags = \
119    $(if $(part-of-module), \
120        $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
121        $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
122quiet_modtag := $(empty) $(empty)
123
124$(real-objs-m) : part-of-module := y
125$(real-objs-m:.o=.i) : part-of-module := y
126$(real-objs-m:.o=.s) : part-of-module := y
127$(real-objs-m:.o=.lst): part-of-module := y
128
129$(real-objs-m) : quiet_modtag := [M]
130$(real-objs-m:.o=.i) : quiet_modtag := [M]
131$(real-objs-m:.o=.s) : quiet_modtag := [M]
132$(real-objs-m:.o=.lst): quiet_modtag := [M]
133
134$(obj-m) : quiet_modtag := [M]
135
136# Default for not multi-part modules
137modname = $(basetarget)
138
139$(multi-objs-m) : modname = $(modname-multi)
140$(multi-objs-m:.o=.i) : modname = $(modname-multi)
141$(multi-objs-m:.o=.s) : modname = $(modname-multi)
142$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
143$(multi-objs-y) : modname = $(modname-multi)
144$(multi-objs-y:.o=.i) : modname = $(modname-multi)
145$(multi-objs-y:.o=.s) : modname = $(modname-multi)
146$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
147
148quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
149cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
150
151$(obj)/%.s: $(src)/%.c FORCE
152    $(call if_changed_dep,cc_s_c)
153
154quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
155cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
156
157$(obj)/%.i: $(src)/%.c FORCE
158    $(call if_changed_dep,cc_i_c)
159
160cmd_gensymtypes = \
161    $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
162    $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
163     $(if $(KBUILD_PRESERVE),-p) \
164     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
165
166quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
167cmd_cc_symtypes_c = \
168    set -e; \
169    $(call cmd_gensymtypes,true,$@) >/dev/null; \
170    test -s $@ || rm -f $@
171
172$(obj)/%.symtypes : $(src)/%.c FORCE
173    $(call cmd,cc_symtypes_c)
174
175# C (.c) files
176# The C file is compiled and updated dependency information is generated.
177# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
178
179quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
180
181ifndef CONFIG_MODVERSIONS
182cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
183
184else
185# When module versioning is enabled the following steps are executed:
186# o compile a .tmp_<file>.o from <file>.c
187# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
188# not export symbols, we just rename .tmp_<file>.o to <file>.o and
189# are done.
190# o otherwise, we calculate symbol versions using the good old
191# genksyms on the preprocessed source and postprocess them in a way
192# that they are usable as a linker script
193# o generate <file>.o from .tmp_<file>.o using the linker to
194# replace the unresolved symbols __crc_exported_symbol with
195# the actual value of the checksum generated by genksyms
196
197cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
198cmd_modversions = \
199    if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
200        $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
201            > $(@D)/.tmp_$(@F:.o=.ver); \
202                                        \
203        $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
204            -T $(@D)/.tmp_$(@F:.o=.ver); \
205        rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
206    else \
207        mv -f $(@D)/.tmp_$(@F) $@; \
208    fi;
209endif
210
211ifdef CONFIG_FTRACE_MCOUNT_RECORD
212ifdef BUILD_C_RECORDMCOUNT
213# Due to recursion, we must skip empty.o.
214# The empty.o file is created in the make process in order to determine
215# the target endianness and word size. It is made before all other C
216# files, including recordmcount.
217sub_cmd_record_mcount = \
218    if [ $(@) != "scripts/mod/empty.o" ]; then \
219        $(objtree)/scripts/recordmcount "$(@)"; \
220    fi;
221else
222sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
223    "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
224    "$(if $(CONFIG_64BIT),64,32)" \
225    "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
226    "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
227    "$(if $(part-of-module),1,0)" "$(@)";
228endif
229cmd_record_mcount = \
230    if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
231        $(sub_cmd_record_mcount) \
232    fi;
233endif
234
235define rule_cc_o_c
236    $(call echo-cmd,checksrc) $(cmd_checksrc) \
237    $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
238    $(cmd_modversions) \
239    $(call echo-cmd,record_mcount) \
240    $(cmd_record_mcount) \
241    scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
242                                                  $(dot-target).tmp; \
243    rm -f $(depfile); \
244    mv -f $(dot-target).tmp $(dot-target).cmd
245endef
246
247# Built-in and composite module parts
248$(obj)/%.o: $(src)/%.c FORCE
249    $(call cmd,force_checksrc)
250    $(call if_changed_rule,cc_o_c)
251
252# Single-part modules are special since we need to mark them in $(MODVERDIR)
253
254$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
255    $(call cmd,force_checksrc)
256    $(call if_changed_rule,cc_o_c)
257    @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
258
259quiet_cmd_cc_lst_c = MKLST $@
260      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
261             $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
262                     System.map $(OBJDUMP) > $@
263
264$(obj)/%.lst: $(src)/%.c FORCE
265    $(call if_changed_dep,cc_lst_c)
266
267# Compile assembler sources (.S)
268# ---------------------------------------------------------------------------
269
270modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
271
272$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
273$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
274
275quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
276cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
277
278$(obj)/%.s: $(src)/%.S FORCE
279    $(call if_changed_dep,as_s_S)
280
281quiet_cmd_as_o_S = AS $(quiet_modtag) $@
282cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
283
284$(obj)/%.o: $(src)/%.S FORCE
285    $(call if_changed_dep,as_o_S)
286
287targets += $(real-objs-y) $(real-objs-m) $(lib-y)
288targets += $(extra-y) $(MAKECMDGOALS) $(always)
289
290# Linker scripts preprocessor (.lds.S -> .lds)
291# ---------------------------------------------------------------------------
292quiet_cmd_cpp_lds_S = LDS $@
293      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
294                         -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
295
296$(obj)/%.lds: $(src)/%.lds.S FORCE
297    $(call if_changed_dep,cpp_lds_S)
298
299# Build the compiled-in targets
300# ---------------------------------------------------------------------------
301
302# To build objects in subdirs, we need to descend into the directories
303$(sort $(subdir-obj-y)): $(subdir-ym) ;
304
305#
306# Rule to compile a set of .o files into one .o file
307#
308ifdef builtin-target
309quiet_cmd_link_o_target = LD $@
310# If the list of objects to link is empty, just create an empty built-in.o
311cmd_link_o_target = $(if $(strip $(obj-y)),\
312              $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
313              $(cmd_secanalysis),\
314              rm -f $@; $(AR) rcs $@)
315
316$(builtin-target): $(obj-y) FORCE
317    $(call if_changed,link_o_target)
318
319targets += $(builtin-target)
320endif # builtin-target
321
322#
323# Rule to create modules.order file
324#
325# Create commands to either record .ko file or cat modules.order from
326# a subdirectory
327modorder-cmds = \
328    $(foreach m, $(modorder), \
329        $(if $(filter %/modules.order, $m), \
330            cat $m;, echo kernel/$m;))
331
332$(modorder-target): $(subdir-ym) FORCE
333    $(Q)(cat /dev/null; $(modorder-cmds)) > $@
334
335#
336# Rule to compile a set of .o files into one .a file
337#
338ifdef lib-target
339quiet_cmd_link_l_target = AR $@
340cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
341
342$(lib-target): $(lib-y) FORCE
343    $(call if_changed,link_l_target)
344
345targets += $(lib-target)
346endif
347
348#
349# Rule to link composite objects
350#
351# Composite objects are specified in kbuild makefile as follows:
352# <composite-object>-objs := <list of .o files>
353# or
354# <composite-object>-y := <list of .o files>
355link_multi_deps = \
356$(filter $(addprefix $(obj)/, \
357$($(subst $(obj)/,,$(@:.o=-objs))) \
358$($(subst $(obj)/,,$(@:.o=-y)))), $^)
359 
360quiet_cmd_link_multi-y = LD $@
361cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
362
363quiet_cmd_link_multi-m = LD [M] $@
364cmd_link_multi-m = $(cmd_link_multi-y)
365
366# We would rather have a list of rules like
367# foo.o: $(foo-objs)
368# but that's not so easy, so we rather make all composite objects depend
369# on the set of all their parts
370$(multi-used-y) : %.o: $(multi-objs-y) FORCE
371    $(call if_changed,link_multi-y)
372
373$(multi-used-m) : %.o: $(multi-objs-m) FORCE
374    $(call if_changed,link_multi-m)
375    @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
376
377targets += $(multi-used-y) $(multi-used-m)
378
379
380# Descending
381# ---------------------------------------------------------------------------
382
383PHONY += $(subdir-ym)
384$(subdir-ym):
385    $(Q)$(MAKE) $(build)=$@
386
387# Add FORCE to the prequisites of a target to force it to be always rebuilt.
388# ---------------------------------------------------------------------------
389
390PHONY += FORCE
391
392FORCE:
393
394# Read all saved command lines and dependencies for the $(targets) we
395# may be building above, using $(if_changed{,_dep}). As an
396# optimization, we don't need to read them if the target does not
397# exist, we will rebuild anyway in that case.
398
399targets := $(wildcard $(sort $(targets)))
400cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
401
402ifneq ($(cmd_files),)
403  include $(cmd_files)
404endif
405
406
407# Declare the contents of the .PHONY variable as phony. We keep that
408# information in a variable se we can use it in if_changed and friends.
409
410.PHONY: $(PHONY)
411

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