Root/scripts/Makefile.build

Source at commit cdde9cf73945d547acd3e96f9508c79e84ad0bf1 created 9 years 4 months ago.
By Maarten ter Huurne, MMC: JZ4740: Added support for CPU frequency changing
1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48        ifneq ("$(save-cflags)","$(CFLAGS)")
49                $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50        endif
51endif
52
53#
54# make W=... settings
55#
56# W=1 - warnings that may be relevant and does not occur too often
57# W=2 - warnings that occur quite often but may still be relevant
58# W=3 - the more obscure warnings, can most likely be ignored
59#
60# $(call cc-option, -W...) handles gcc -W.. options which
61# are not supported by all versions of the compiler
62ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
63warning- := $(empty)
64
65warning-1 := -Wextra -Wunused -Wno-unused-parameter
66warning-1 += -Wmissing-declarations
67warning-1 += -Wmissing-format-attribute
68warning-1 += -Wmissing-prototypes
69warning-1 += -Wold-style-definition
70warning-1 += $(call cc-option, -Wmissing-include-dirs)
71warning-1 += $(call cc-option, -Wunused-but-set-variable)
72warning-1 += $(call cc-disable-warning, missing-field-initializers)
73
74warning-2 := -Waggregate-return
75warning-2 += -Wcast-align
76warning-2 += -Wdisabled-optimization
77warning-2 += -Wnested-externs
78warning-2 += -Wshadow
79warning-2 += $(call cc-option, -Wlogical-op)
80warning-2 += $(call cc-option, -Wmissing-field-initializers)
81
82warning-3 := -Wbad-function-cast
83warning-3 += -Wcast-qual
84warning-3 += -Wconversion
85warning-3 += -Wpacked
86warning-3 += -Wpadded
87warning-3 += -Wpointer-arith
88warning-3 += -Wredundant-decls
89warning-3 += -Wswitch-default
90warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
91warning-3 += $(call cc-option, -Wvla)
92
93warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
94warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
95warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
96
97ifeq ("$(strip $(warning))","")
98        $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
99endif
100
101KBUILD_CFLAGS += $(warning)
102endif
103
104include scripts/Makefile.lib
105
106ifdef host-progs
107ifneq ($(hostprogs-y),$(host-progs))
108$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
109hostprogs-y += $(host-progs)
110endif
111endif
112
113# Do not include host rules unless needed
114ifneq ($(hostprogs-y)$(hostprogs-m),)
115include scripts/Makefile.host
116endif
117
118ifneq ($(KBUILD_SRC),)
119# Create output directory if not already present
120_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
121
122# Create directories for object files if directory does not exist
123# Needed when obj-y := dir/file.o syntax is used
124_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
125endif
126
127ifndef obj
128$(warning kbuild: Makefile.build is included improperly)
129endif
130
131# ===========================================================================
132
133ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
134lib-target := $(obj)/lib.a
135endif
136
137ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
138builtin-target := $(obj)/built-in.o
139endif
140
141modorder-target := $(obj)/modules.order
142
143# We keep a list of all modules in $(MODVERDIR)
144
145__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
146     $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
147     $(subdir-ym) $(always)
148    @:
149
150# Linus' kernel sanity checking tool
151ifneq ($(KBUILD_CHECKSRC),0)
152  ifeq ($(KBUILD_CHECKSRC),2)
153    quiet_cmd_force_checksrc = CHECK $<
154          cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
155  else
156      quiet_cmd_checksrc = CHECK $<
157            cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
158  endif
159endif
160
161# Do section mismatch analysis for each module/built-in.o
162ifdef CONFIG_DEBUG_SECTION_MISMATCH
163  cmd_secanalysis = ; scripts/mod/modpost $@
164endif
165
166# Compile C sources (.c)
167# ---------------------------------------------------------------------------
168
169# Default is built-in, unless we know otherwise
170modkern_cflags = \
171    $(if $(part-of-module), \
172        $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
173        $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
174quiet_modtag := $(empty) $(empty)
175
176$(real-objs-m) : part-of-module := y
177$(real-objs-m:.o=.i) : part-of-module := y
178$(real-objs-m:.o=.s) : part-of-module := y
179$(real-objs-m:.o=.lst): part-of-module := y
180
181$(real-objs-m) : quiet_modtag := [M]
182$(real-objs-m:.o=.i) : quiet_modtag := [M]
183$(real-objs-m:.o=.s) : quiet_modtag := [M]
184$(real-objs-m:.o=.lst): quiet_modtag := [M]
185
186$(obj-m) : quiet_modtag := [M]
187
188# Default for not multi-part modules
189modname = $(basetarget)
190
191$(multi-objs-m) : modname = $(modname-multi)
192$(multi-objs-m:.o=.i) : modname = $(modname-multi)
193$(multi-objs-m:.o=.s) : modname = $(modname-multi)
194$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
195$(multi-objs-y) : modname = $(modname-multi)
196$(multi-objs-y:.o=.i) : modname = $(modname-multi)
197$(multi-objs-y:.o=.s) : modname = $(modname-multi)
198$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
199
200quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
201cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
202
203$(obj)/%.s: $(src)/%.c FORCE
204    $(call if_changed_dep,cc_s_c)
205
206quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
207cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
208
209$(obj)/%.i: $(src)/%.c FORCE
210    $(call if_changed_dep,cc_i_c)
211
212cmd_gensymtypes = \
213    $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
214    $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
215     $(if $(KBUILD_PRESERVE),-p) \
216     -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
217
218quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
219cmd_cc_symtypes_c = \
220    set -e; \
221    $(call cmd_gensymtypes,true,$@) >/dev/null; \
222    test -s $@ || rm -f $@
223
224$(obj)/%.symtypes : $(src)/%.c FORCE
225    $(call cmd,cc_symtypes_c)
226
227# C (.c) files
228# The C file is compiled and updated dependency information is generated.
229# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
230
231quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
232
233ifndef CONFIG_MODVERSIONS
234cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
235
236else
237# When module versioning is enabled the following steps are executed:
238# o compile a .tmp_<file>.o from <file>.c
239# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
240# not export symbols, we just rename .tmp_<file>.o to <file>.o and
241# are done.
242# o otherwise, we calculate symbol versions using the good old
243# genksyms on the preprocessed source and postprocess them in a way
244# that they are usable as a linker script
245# o generate <file>.o from .tmp_<file>.o using the linker to
246# replace the unresolved symbols __crc_exported_symbol with
247# the actual value of the checksum generated by genksyms
248
249cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
250cmd_modversions = \
251    if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
252        $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
253            > $(@D)/.tmp_$(@F:.o=.ver); \
254                                        \
255        $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
256            -T $(@D)/.tmp_$(@F:.o=.ver); \
257        rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
258    else \
259        mv -f $(@D)/.tmp_$(@F) $@; \
260    fi;
261endif
262
263ifdef CONFIG_FTRACE_MCOUNT_RECORD
264ifdef BUILD_C_RECORDMCOUNT
265ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
266  RECORDMCOUNT_FLAGS = -w
267endif
268# Due to recursion, we must skip empty.o.
269# The empty.o file is created in the make process in order to determine
270# the target endianness and word size. It is made before all other C
271# files, including recordmcount.
272sub_cmd_record_mcount = \
273    if [ $(@) != "scripts/mod/empty.o" ]; then \
274        $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
275    fi;
276recordmcount_source := $(srctree)/scripts/recordmcount.c \
277            $(srctree)/scripts/recordmcount.h
278else
279sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
280    "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
281    "$(if $(CONFIG_64BIT),64,32)" \
282    "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
283    "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
284    "$(if $(part-of-module),1,0)" "$(@)";
285recordmcount_source := $(srctree)/scripts/recordmcount.pl
286endif
287cmd_record_mcount = \
288    if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
289        $(sub_cmd_record_mcount) \
290    fi;
291endif
292
293define rule_cc_o_c
294    $(call echo-cmd,checksrc) $(cmd_checksrc) \
295    $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
296    $(cmd_modversions) \
297    $(call echo-cmd,record_mcount) \
298    $(cmd_record_mcount) \
299    scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
300                                                  $(dot-target).tmp; \
301    rm -f $(depfile); \
302    mv -f $(dot-target).tmp $(dot-target).cmd
303endef
304
305# Built-in and composite module parts
306$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
307    $(call cmd,force_checksrc)
308    $(call if_changed_rule,cc_o_c)
309
310# Single-part modules are special since we need to mark them in $(MODVERDIR)
311
312$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
313    $(call cmd,force_checksrc)
314    $(call if_changed_rule,cc_o_c)
315    @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
316
317quiet_cmd_cc_lst_c = MKLST $@
318      cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
319             $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
320                     System.map $(OBJDUMP) > $@
321
322$(obj)/%.lst: $(src)/%.c FORCE
323    $(call if_changed_dep,cc_lst_c)
324
325# Compile assembler sources (.S)
326# ---------------------------------------------------------------------------
327
328modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
329
330$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
331$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
332
333quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
334cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
335
336$(obj)/%.s: $(src)/%.S FORCE
337    $(call if_changed_dep,as_s_S)
338
339quiet_cmd_as_o_S = AS $(quiet_modtag) $@
340cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
341
342$(obj)/%.o: $(src)/%.S FORCE
343    $(call if_changed_dep,as_o_S)
344
345targets += $(real-objs-y) $(real-objs-m) $(lib-y)
346targets += $(extra-y) $(MAKECMDGOALS) $(always)
347
348# Linker scripts preprocessor (.lds.S -> .lds)
349# ---------------------------------------------------------------------------
350quiet_cmd_cpp_lds_S = LDS $@
351      cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
352                         -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
353
354$(obj)/%.lds: $(src)/%.lds.S FORCE
355    $(call if_changed_dep,cpp_lds_S)
356
357# Build the compiled-in targets
358# ---------------------------------------------------------------------------
359
360# To build objects in subdirs, we need to descend into the directories
361$(sort $(subdir-obj-y)): $(subdir-ym) ;
362
363#
364# Rule to compile a set of .o files into one .o file
365#
366ifdef builtin-target
367quiet_cmd_link_o_target = LD $@
368# If the list of objects to link is empty, just create an empty built-in.o
369cmd_link_o_target = $(if $(strip $(obj-y)),\
370              $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
371              $(cmd_secanalysis),\
372              rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
373
374$(builtin-target): $(obj-y) FORCE
375    $(call if_changed,link_o_target)
376
377targets += $(builtin-target)
378endif # builtin-target
379
380#
381# Rule to create modules.order file
382#
383# Create commands to either record .ko file or cat modules.order from
384# a subdirectory
385modorder-cmds = \
386    $(foreach m, $(modorder), \
387        $(if $(filter %/modules.order, $m), \
388            cat $m;, echo kernel/$m;))
389
390$(modorder-target): $(subdir-ym) FORCE
391    $(Q)(cat /dev/null; $(modorder-cmds)) > $@
392
393#
394# Rule to compile a set of .o files into one .a file
395#
396ifdef lib-target
397quiet_cmd_link_l_target = AR $@
398cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
399
400$(lib-target): $(lib-y) FORCE
401    $(call if_changed,link_l_target)
402
403targets += $(lib-target)
404endif
405
406#
407# Rule to link composite objects
408#
409# Composite objects are specified in kbuild makefile as follows:
410# <composite-object>-objs := <list of .o files>
411# or
412# <composite-object>-y := <list of .o files>
413link_multi_deps = \
414$(filter $(addprefix $(obj)/, \
415$($(subst $(obj)/,,$(@:.o=-objs))) \
416$($(subst $(obj)/,,$(@:.o=-y)))), $^)
417 
418quiet_cmd_link_multi-y = LD $@
419cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
420
421quiet_cmd_link_multi-m = LD [M] $@
422cmd_link_multi-m = $(cmd_link_multi-y)
423
424# We would rather have a list of rules like
425# foo.o: $(foo-objs)
426# but that's not so easy, so we rather make all composite objects depend
427# on the set of all their parts
428$(multi-used-y) : %.o: $(multi-objs-y) FORCE
429    $(call if_changed,link_multi-y)
430
431$(multi-used-m) : %.o: $(multi-objs-m) FORCE
432    $(call if_changed,link_multi-m)
433    @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
434
435targets += $(multi-used-y) $(multi-used-m)
436
437
438# Descending
439# ---------------------------------------------------------------------------
440
441PHONY += $(subdir-ym)
442$(subdir-ym):
443    $(Q)$(MAKE) $(build)=$@
444
445# Add FORCE to the prequisites of a target to force it to be always rebuilt.
446# ---------------------------------------------------------------------------
447
448PHONY += FORCE
449
450FORCE:
451
452# Read all saved command lines and dependencies for the $(targets) we
453# may be building above, using $(if_changed{,_dep}). As an
454# optimization, we don't need to read them if the target does not
455# exist, we will rebuild anyway in that case.
456
457targets := $(wildcard $(sort $(targets)))
458cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
459
460ifneq ($(cmd_files),)
461  include $(cmd_files)
462endif
463
464# Declare the contents of the .PHONY variable as phony. We keep that
465# information in a variable se we can use it in if_changed and friends.
466
467.PHONY: $(PHONY)
468

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