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Source at commit ef60fc3200a68f7ebd2a5a9fff585073f233bb5e created 14 years 3 months ago. By xiangfu, file | |
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1 | /* |
2 | * linux/include/asm-mips/mach-jz4740/clock.h |
3 | * |
4 | * JZ4740 clocks definition. |
5 | * |
6 | * Copyright (C) 2006 - 2007 Ingenic Semiconductor Inc. |
7 | * |
8 | * Author: <lhhuang@ingenic.cn> |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. |
13 | */ |
14 | |
15 | #ifndef __ASM_JZ4740_CLOCK_H__ |
16 | #define __ASM_JZ4740_CLOCK_H__ |
17 | |
18 | #include <asm/mach-jz4740/ops.h> |
19 | |
20 | #ifndef JZ_EXTAL |
21 | //#define JZ_EXTAL 3686400 /* 3.6864 MHz */ |
22 | #define JZ_EXTAL 12000000 /* 3.6864 MHz */ |
23 | #endif |
24 | #ifndef JZ_EXTAL2 |
25 | #define JZ_EXTAL2 32768 /* 32.768 KHz */ |
26 | #endif |
27 | |
28 | /* |
29 | * JZ4740 clocks structure |
30 | */ |
31 | typedef struct { |
32 | unsigned int cclk; /* CPU clock */ |
33 | unsigned int hclk; /* System bus clock */ |
34 | unsigned int pclk; /* Peripheral bus clock */ |
35 | unsigned int mclk; /* Flash/SRAM/SDRAM clock */ |
36 | unsigned int lcdclk; /* LCDC module clock */ |
37 | unsigned int pixclk; /* LCD pixel clock */ |
38 | unsigned int i2sclk; /* AIC module clock */ |
39 | unsigned int usbclk; /* USB module clock */ |
40 | unsigned int mscclk; /* MSC module clock */ |
41 | unsigned int extalclk; /* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */ |
42 | unsigned int rtcclk; /* RTC clock for CPM,INTC,RTC,TCU,WDT */ |
43 | } jz_clocks_t; |
44 | |
45 | extern jz_clocks_t jz_clocks; |
46 | |
47 | |
48 | /* PLL output frequency */ |
49 | static __inline__ unsigned int __cpm_get_pllout(void) |
50 | { |
51 | unsigned long m, n, no, pllout; |
52 | unsigned long cppcr = REG_CPM_CPPCR; |
53 | unsigned long od[4] = {1, 2, 2, 4}; |
54 | if ((cppcr & CPM_CPPCR_PLLEN) && !(cppcr & CPM_CPPCR_PLLBP)) { |
55 | m = __cpm_get_pllm() + 2; |
56 | n = __cpm_get_plln() + 2; |
57 | no = od[__cpm_get_pllod()]; |
58 | pllout = ((JZ_EXTAL) / (n * no)) * m; |
59 | } else |
60 | pllout = JZ_EXTAL; |
61 | return pllout; |
62 | } |
63 | |
64 | /* PLL output frequency for MSC/I2S/LCD/USB */ |
65 | static __inline__ unsigned int __cpm_get_pllout2(void) |
66 | { |
67 | if (REG_CPM_CPCCR & CPM_CPCCR_PCS) |
68 | return __cpm_get_pllout(); |
69 | else |
70 | return __cpm_get_pllout()/2; |
71 | } |
72 | |
73 | /* CPU core clock */ |
74 | static __inline__ unsigned int __cpm_get_cclk(void) |
75 | { |
76 | int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; |
77 | |
78 | return __cpm_get_pllout() / div[__cpm_get_cdiv()]; |
79 | } |
80 | |
81 | /* AHB system bus clock */ |
82 | static __inline__ unsigned int __cpm_get_hclk(void) |
83 | { |
84 | int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; |
85 | |
86 | return __cpm_get_pllout() / div[__cpm_get_hdiv()]; |
87 | } |
88 | |
89 | /* Memory bus clock */ |
90 | static __inline__ unsigned int __cpm_get_mclk(void) |
91 | { |
92 | int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; |
93 | |
94 | return __cpm_get_pllout() / div[__cpm_get_mdiv()]; |
95 | } |
96 | |
97 | /* APB peripheral bus clock */ |
98 | static __inline__ unsigned int __cpm_get_pclk(void) |
99 | { |
100 | int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; |
101 | |
102 | return __cpm_get_pllout() / div[__cpm_get_pdiv()]; |
103 | } |
104 | |
105 | /* LCDC module clock */ |
106 | static __inline__ unsigned int __cpm_get_lcdclk(void) |
107 | { |
108 | return __cpm_get_pllout2() / (__cpm_get_ldiv() + 1); |
109 | } |
110 | |
111 | /* LCD pixel clock */ |
112 | static __inline__ unsigned int __cpm_get_pixclk(void) |
113 | { |
114 | return __cpm_get_pllout2() / (__cpm_get_pixdiv() + 1); |
115 | } |
116 | |
117 | /* I2S clock */ |
118 | static __inline__ unsigned int __cpm_get_i2sclk(void) |
119 | { |
120 | if (REG_CPM_CPCCR & CPM_CPCCR_I2CS) { |
121 | return __cpm_get_pllout2() / (__cpm_get_i2sdiv() + 1); |
122 | } |
123 | else { |
124 | return JZ_EXTAL; |
125 | } |
126 | } |
127 | |
128 | /* USB clock */ |
129 | static __inline__ unsigned int __cpm_get_usbclk(void) |
130 | { |
131 | if (REG_CPM_CPCCR & CPM_CPCCR_UCS) { |
132 | return __cpm_get_pllout2() / (__cpm_get_udiv() + 1); |
133 | } |
134 | else { |
135 | return JZ_EXTAL; |
136 | } |
137 | } |
138 | |
139 | /* MSC clock */ |
140 | static __inline__ unsigned int __cpm_get_mscclk(void) |
141 | { |
142 | return __cpm_get_pllout2() / (__cpm_get_mscdiv() + 1); |
143 | } |
144 | |
145 | /* EXTAL clock for UART,I2C,SSI,TCU,USB-PHY */ |
146 | static __inline__ unsigned int __cpm_get_extalclk(void) |
147 | { |
148 | return JZ_EXTAL; |
149 | } |
150 | |
151 | /* RTC clock for CPM,INTC,RTC,TCU,WDT */ |
152 | static __inline__ unsigned int __cpm_get_rtcclk(void) |
153 | { |
154 | return JZ_EXTAL2; |
155 | } |
156 | |
157 | /* |
158 | * Output 24MHz for SD and 16MHz for MMC. |
159 | */ |
160 | static inline void __cpm_select_msc_clk(int sd) |
161 | { |
162 | unsigned int pllout2 = __cpm_get_pllout2(); |
163 | unsigned int div = 0; |
164 | |
165 | if (sd) { |
166 | div = pllout2 / 24000000; |
167 | } |
168 | else { |
169 | div = pllout2 / 16000000; |
170 | } |
171 | |
172 | REG_CPM_MSCCDR = div - 1; |
173 | } |
174 | |
175 | int jz_init_clocks(unsigned long ext_rate); |
176 | |
177 | #endif /* __ASM_JZ4740_CLOCK_H__ */ |
178 |
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