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Source at commit ef60fc3200a68f7ebd2a5a9fff585073f233bb5e created 14 years 3 months ago. By xiangfu, file | |
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1 | /* |
2 | * Platform device support for Jz4740 SoC. |
3 | * |
4 | * Copyright 2007, <yliu@ingenic.cn> |
5 | * |
6 | * This file is licensed under the terms of the GNU General Public |
7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. |
9 | */ |
10 | |
11 | #include <linux/device.h> |
12 | #include <linux/platform_device.h> |
13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> |
15 | #include <linux/resource.h> |
16 | |
17 | #include <asm/mach-jz4740/platform.h> |
18 | #include <asm/mach-jz4740/regs.h> |
19 | #include <asm/mach-jz4740/irq.h> |
20 | |
21 | /* OHCI (USB full speed host controller) */ |
22 | static struct resource jz4740_usb_ohci_resources[] = { |
23 | [0] = { |
24 | .start = CPHYSADDR(UHC_BASE), |
25 | .end = CPHYSADDR(UHC_BASE) + 0x10000 - 1, |
26 | .flags = IORESOURCE_MEM, |
27 | }, |
28 | [1] = { |
29 | .start = JZ_IRQ_UHC, |
30 | .end = JZ_IRQ_UHC, |
31 | .flags = IORESOURCE_IRQ, |
32 | }, |
33 | }; |
34 | |
35 | /* The dmamask must be set for OHCI to work */ |
36 | static u64 ohci_dmamask = ~(u32)0; |
37 | |
38 | struct platform_device jz4740_usb_ohci_device = { |
39 | .name = "jz-ohci", |
40 | .id = 0, |
41 | .dev = { |
42 | .dma_mask = &ohci_dmamask, |
43 | .coherent_dma_mask = 0xffffffff, |
44 | }, |
45 | .num_resources = ARRAY_SIZE(jz4740_usb_ohci_resources), |
46 | .resource = jz4740_usb_ohci_resources, |
47 | }; |
48 | |
49 | /* UDC (USB gadget controller) */ |
50 | static struct resource jz4740_usb_gdt_resources[] = { |
51 | [0] = { |
52 | .start = CPHYSADDR(UDC_BASE), |
53 | .end = CPHYSADDR(UDC_BASE) + 0x10000 - 1, |
54 | .flags = IORESOURCE_MEM, |
55 | }, |
56 | [1] = { |
57 | .start = JZ_IRQ_UDC, |
58 | .end = JZ_IRQ_UDC, |
59 | .flags = IORESOURCE_IRQ, |
60 | }, |
61 | }; |
62 | |
63 | static u64 jz4740_udc_dmamask = ~(u32)0; |
64 | |
65 | struct platform_device jz4740_usb_gdt_device = { |
66 | .name = "jz-udc", |
67 | .id = -1, |
68 | .dev = { |
69 | .dma_mask = &jz4740_udc_dmamask, |
70 | .coherent_dma_mask = 0xffffffff, |
71 | }, |
72 | .num_resources = ARRAY_SIZE(jz4740_usb_gdt_resources), |
73 | .resource = jz4740_usb_gdt_resources, |
74 | }; |
75 | |
76 | /** MMC/SD controller **/ |
77 | static struct resource jz4740_mmc_resources[] = { |
78 | [0] = { |
79 | .start = CPHYSADDR(MSC_BASE), |
80 | .end = CPHYSADDR(MSC_BASE) + 0x10000 - 1, |
81 | .flags = IORESOURCE_MEM, |
82 | }, |
83 | [1] = { |
84 | .start = JZ_IRQ_MSC, |
85 | .end = JZ_IRQ_MSC, |
86 | .flags = IORESOURCE_IRQ, |
87 | } |
88 | }; |
89 | |
90 | static u64 jz4740_mmc_dmamask = ~(u32)0; |
91 | |
92 | struct platform_device jz4740_mmc_device = { |
93 | .name = "jz-mmc", |
94 | .id = 0, |
95 | .dev = { |
96 | .dma_mask = &jz4740_mmc_dmamask, |
97 | .coherent_dma_mask = 0xffffffff, |
98 | }, |
99 | .num_resources = ARRAY_SIZE(jz4740_mmc_resources), |
100 | .resource = jz4740_mmc_resources, |
101 | }; |
102 | |
103 | static struct resource jz4740_rtc_resources[] = { |
104 | [0] = { |
105 | .start = CPHYSADDR(RTC_BASE), |
106 | .end = CPHYSADDR(RTC_BASE) + 0x10, |
107 | .flags = IORESOURCE_MEM, |
108 | }, |
109 | [1] = { |
110 | .start = JZ_IRQ_RTC, |
111 | .end = JZ_IRQ_RTC, |
112 | .flags = IORESOURCE_IRQ, |
113 | }, |
114 | }; |
115 | |
116 | struct platform_device jz4740_rtc_device = { |
117 | .name = "jz4740-rtc", |
118 | .id = -1, |
119 | .num_resources = ARRAY_SIZE(jz4740_rtc_resources), |
120 | .resource = jz4740_rtc_resources, |
121 | }; |
122 | |
123 | /** I2C controller **/ |
124 | static struct resource jz4740_i2c_resources[] = { |
125 | [0] = { |
126 | .start = CPHYSADDR(I2C_BASE), |
127 | .end = CPHYSADDR(I2C_BASE) + 0x10000 - 1, |
128 | .flags = IORESOURCE_MEM, |
129 | }, |
130 | [1] = { |
131 | .start = JZ_IRQ_I2C, |
132 | .end = JZ_IRQ_I2C, |
133 | .flags = IORESOURCE_IRQ, |
134 | } |
135 | }; |
136 | |
137 | static u64 jz4740_i2c_dmamask = ~(u32)0; |
138 | |
139 | struct platform_device jz4740_i2c_device = { |
140 | .name = "jz_i2c", |
141 | .id = 0, |
142 | .dev = { |
143 | .dma_mask = &jz4740_i2c_dmamask, |
144 | .coherent_dma_mask = 0xffffffff, |
145 | }, |
146 | .num_resources = ARRAY_SIZE(jz4740_i2c_resources), |
147 | .resource = jz4740_i2c_resources, |
148 | }; |
149 | |
150 | static struct resource jz4740_nand_resources[] = { |
151 | [0] = { |
152 | .start = CPHYSADDR(EMC_BASE), |
153 | .end = CPHYSADDR(EMC_BASE) + 0x10000 - 1, |
154 | .flags = IORESOURCE_MEM, |
155 | }, |
156 | }; |
157 | |
158 | struct platform_device jz4740_nand_device = { |
159 | .name = "jz4740-nand", |
160 | .num_resources = ARRAY_SIZE(jz4740_nand_resources), |
161 | .resource = jz4740_nand_resources, |
162 | }; |
163 | |
164 | static struct resource jz4740_framebuffer_resources[] = { |
165 | [0] = { |
166 | .start = CPHYSADDR(LCD_BASE), |
167 | .end = CPHYSADDR(LCD_BASE) + 0x10000 - 1, |
168 | .flags = IORESOURCE_MEM, |
169 | }, |
170 | }; |
171 | |
172 | static u64 jz4740_fb_dmamask = ~(u32)0; |
173 | |
174 | struct platform_device jz4740_framebuffer_device = { |
175 | .name = "jz4740-fb", |
176 | .id = -1, |
177 | .num_resources = ARRAY_SIZE(jz4740_framebuffer_resources), |
178 | .resource = jz4740_framebuffer_resources, |
179 | .dev = { |
180 | .dma_mask = &jz4740_fb_dmamask, |
181 | .coherent_dma_mask = 0xffffffff, |
182 | }, |
183 | }; |
184 | |
185 | static struct resource jz4740_i2s_resources[] = { |
186 | [0] = { |
187 | .start = CPHYSADDR(AIC_BASE), |
188 | .end = CPHYSADDR(AIC_BASE) + 0x38 - 1, |
189 | .flags = IORESOURCE_MEM, |
190 | }, |
191 | }; |
192 | |
193 | struct platform_device jz4740_i2s_device = { |
194 | .name = "jz4740-i2s", |
195 | .id = -1, |
196 | .num_resources = ARRAY_SIZE(jz4740_i2s_resources), |
197 | .resource = jz4740_i2s_resources, |
198 | }; |
199 | |
200 | static struct resource jz4740_codec_resources[] = { |
201 | [0] = { |
202 | .start = CPHYSADDR(AIC_BASE) + 0x80, |
203 | .end = CPHYSADDR(AIC_BASE) + 0x88 - 1, |
204 | .flags = IORESOURCE_MEM, |
205 | }, |
206 | }; |
207 | |
208 | struct platform_device jz4740_codec_device = { |
209 | .name = "jz4740-codec", |
210 | .id = -1, |
211 | .num_resources = ARRAY_SIZE(jz4740_codec_resources), |
212 | .resource = jz4740_codec_resources, |
213 | }; |
214 | |
215 | static struct resource jz4740_adc_resources[] = { |
216 | [0] = { |
217 | .start = CPHYSADDR(SADC_BASE), |
218 | .end = CPHYSADDR(SADC_BASE) + 0x30, |
219 | .flags = IORESOURCE_MEM, |
220 | }, |
221 | [1] = { |
222 | .start = JZ_IRQ_SADC, |
223 | .end = JZ_IRQ_SADC, |
224 | .flags = IORESOURCE_IRQ, |
225 | }, |
226 | }; |
227 | |
228 | struct platform_device jz4740_adc_device = { |
229 | .name = "jz4740-adc", |
230 | .id = -1, |
231 | .num_resources = ARRAY_SIZE(jz4740_adc_resources), |
232 | .resource = jz4740_adc_resources, |
233 | }; |
234 | |
235 | struct platform_device jz4740_battery_device = { |
236 | .name = "jz4740-battery", |
237 | .id = -1, |
238 | .dev = { |
239 | .parent = &jz4740_adc_device.dev |
240 | }, |
241 | }; |
242 |
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
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v3.9