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Source at commit ef60fc3200a68f7ebd2a5a9fff585073f233bb5e created 14 years 3 months ago. By xiangfu, file | |
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1 | /* |
2 | * Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de> |
3 | * JZ4720/JZ4740 SoC LCD framebuffer driver |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it |
6 | * under the terms of the GNU General Public License as published by the |
7 | * Free Software Foundation; either version 2 of the License, or (at your |
8 | * option) any later version. |
9 | * |
10 | * You should have received a copy of the GNU General Public License along |
11 | * with this program; if not, write to the Free Software Foundation, Inc., |
12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
13 | * |
14 | */ |
15 | |
16 | #include <linux/types.h> |
17 | #include <linux/platform_device.h> |
18 | #include <linux/fb.h> |
19 | #include <linux/module.h> |
20 | #include <linux/dma-mapping.h> |
21 | #include <linux/jz4740_fb.h> |
22 | |
23 | #include <linux/delay.h> |
24 | |
25 | #define JZ_REG_LCD_CFG 0x00 |
26 | #define JZ_REG_LCD_VSYNC 0x04 |
27 | #define JZ_REG_LCD_HSYNC 0x08 |
28 | #define JZ_REG_LCD_VAT 0x0C |
29 | #define JZ_REG_LCD_DAH 0x10 |
30 | #define JZ_REG_LCD_DAV 0x14 |
31 | #define JZ_REG_LCD_PS 0x18 |
32 | #define JZ_REG_LCD_CLS 0x1C |
33 | #define JZ_REG_LCD_SPL 0x20 |
34 | #define JZ_REG_LCD_REV 0x24 |
35 | #define JZ_REG_LCD_CTRL 0x30 |
36 | #define JZ_REG_LCD_STATE 0x34 |
37 | #define JZ_REG_LCD_IID 0x38 |
38 | #define JZ_REG_LCD_DA0 0x40 |
39 | #define JZ_REG_LCD_SA0 0x44 |
40 | #define JZ_REG_LCD_FID0 0x48 |
41 | #define JZ_REG_LCD_CMD0 0x4C |
42 | #define JZ_REG_LCD_DA1 0x50 |
43 | #define JZ_REG_LCD_SA1 0x54 |
44 | #define JZ_REG_LCD_FID1 0x58 |
45 | #define JZ_REG_LCD_CMD1 0x5C |
46 | |
47 | #define JZ_LCD_CFG_SLCD BIT(31) |
48 | #define JZ_LCD_CFG_PSM BIT(23) |
49 | #define JZ_LCD_CFG_CLSM BIT(22) |
50 | #define JZ_LCD_CFG_SPLM BIT(21) |
51 | #define JZ_LCD_CFG_REVM BIT(20) |
52 | #define JZ_LCD_CFG_HSYNCM BIT(19) |
53 | #define JZ_LCD_CFG_PCLKM BIT(18) |
54 | #define JZ_LCD_CFG_INV BIT(17) |
55 | #define JZ_LCD_CFG_SYNC_DIR BIT(16) |
56 | #define JZ_LCD_CFG_PSP BIT(15) |
57 | #define JZ_LCD_CFG_CLSP BIT(14) |
58 | #define JZ_LCD_CFG_SPLP BIT(13) |
59 | #define JZ_LCD_CFG_REVP BIT(12) |
60 | #define JZ_LCD_CFG_HSYNCP BIT(11) |
61 | #define JZ_LCD_CFG_PCLKP BIT(10) |
62 | #define JZ_LCD_CFG_DEP BIT(9) |
63 | #define JZ_LCD_CFG_VSYNCP BIT(8) |
64 | #define JZ_LCD_CFG_18_BIT BIT(7) |
65 | #define JZ_LCD_CFG_PDW BIT(5) | BIT(4) |
66 | #define JZ_LCD_CFG_MODE_MASK 0xf |
67 | |
68 | #define JZ_LCD_CTRL_BURST_4 (0x0 << 28) |
69 | #define JZ_LCD_CTRL_BURST_8 (0x1 << 28) |
70 | #define JZ_LCD_CTRL_BURST_16 (0x2 << 28) |
71 | #define JZ_LCD_CTRL_RGB555 BIT(27) |
72 | #define JZ_LCD_CTRL_OFUP BIT(26) |
73 | #define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24) |
74 | #define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24) |
75 | #define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24) |
76 | #define JZ_LCD_CTRL_PDD_MASK (0xff << 16) |
77 | #define JZ_LCD_CTRL_EOF_IRQ BIT(13) |
78 | #define JZ_LCD_CTRL_SOF_IRQ BIT(12) |
79 | #define JZ_LCD_CTRL_OFU_IRQ BIT(11) |
80 | #define JZ_LCD_CTRL_IFU0_IRQ BIT(10) |
81 | #define JZ_LCD_CTRL_IFU1_IRQ BIT(9) |
82 | #define JZ_LCD_CTRL_DD_IRQ BIT(8) |
83 | #define JZ_LCD_CTRL_QDD_IRQ BIT(7) |
84 | #define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6) |
85 | #define JZ_LCD_CTRL_LSB_FISRT BIT(5) |
86 | #define JZ_LCD_CTRL_DISABLE BIT(4) |
87 | #define JZ_LCD_CTRL_ENABLE BIT(3) |
88 | #define JZ_LCD_CTRL_BPP_1 0x0 |
89 | #define JZ_LCD_CTRL_BPP_2 0x1 |
90 | #define JZ_LCD_CTRL_BPP_4 0x2 |
91 | #define JZ_LCD_CTRL_BPP_8 0x3 |
92 | #define JZ_LCD_CTRL_BPP_15_16 0x4 |
93 | #define JZ_LCD_CTRL_BPP_18_24 0x5 |
94 | |
95 | #define JZ_LCD_CMD_SOF_IRQ BIT(15) |
96 | #define JZ_LCD_CMD_EOF_IRQ BIT(16) |
97 | #define JZ_LCD_CMD_ENABLE_PAL BIT(12) |
98 | |
99 | #define JZ_LCD_SYNC_MASK 0x3ff |
100 | |
101 | struct jzfb_framedesc { |
102 | uint32_t next; |
103 | uint32_t addr; |
104 | uint32_t id; |
105 | uint32_t cmd; |
106 | } __attribute__((packed)); |
107 | |
108 | struct jzfb { |
109 | struct fb_info *fb; |
110 | struct platform_device *pdev; |
111 | void __iomem *base; |
112 | struct resource *mem; |
113 | struct jz4740_fb_platform_data *pdata; |
114 | |
115 | void *devmem; |
116 | size_t devmem_size; |
117 | dma_addr_t devmem_phys; |
118 | void *vidmem; |
119 | size_t vidmem_size; |
120 | dma_addr_t vidmem_phys; |
121 | struct jzfb_framedesc *framedesc; |
122 | |
123 | uint32_t pseudo_palette[16]; |
124 | }; |
125 | |
126 | static struct fb_fix_screeninfo jzfb_fix __devinitdata = { |
127 | .id = "JZ4740 FB", |
128 | .type = FB_TYPE_PACKED_PIXELS, |
129 | .visual = FB_VISUAL_TRUECOLOR, |
130 | .xpanstep = 0, |
131 | .ypanstep = 0, |
132 | .ywrapstep = 0, |
133 | .accel = FB_ACCEL_NONE, |
134 | }; |
135 | |
136 | int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, |
137 | unsigned transp, struct fb_info *fb) |
138 | { |
139 | ((uint32_t*)fb->pseudo_palette)[regno] = red << 16 | green << 8 | blue; |
140 | return 0; |
141 | } |
142 | |
143 | static int jzfb_get_controller_bpp(struct jzfb *jzfb) |
144 | { |
145 | switch(jzfb->pdata->bpp) { |
146 | case 18: |
147 | case 24: |
148 | return 32; |
149 | break; |
150 | default: |
151 | return jzfb->pdata->bpp; |
152 | } |
153 | } |
154 | |
155 | static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb) |
156 | { |
157 | struct jzfb* jzfb = fb->par; |
158 | struct fb_videomode *mode = jzfb->pdata->modes; |
159 | int i; |
160 | |
161 | if (fb->var.bits_per_pixel != jzfb_get_controller_bpp(jzfb) && |
162 | fb->var.bits_per_pixel != jzfb->pdata->bpp) |
163 | return -EINVAL; |
164 | |
165 | for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) { |
166 | if (mode->xres == fb->var.xres && mode->yres == fb->var.yres) |
167 | break; |
168 | } |
169 | |
170 | if (i == jzfb->pdata->num_modes) |
171 | return -EINVAL; |
172 | |
173 | fb_videomode_to_var(&fb->var, fb->mode); |
174 | |
175 | switch (jzfb->pdata->bpp) { |
176 | case 8: |
177 | break; |
178 | case 15: |
179 | var->red.offset = 10; |
180 | var->red.length = 5; |
181 | var->green.offset = 6; |
182 | var->green.length = 5; |
183 | var->blue.offset = 0; |
184 | var->blue.length = 5; |
185 | break; |
186 | case 16: |
187 | var->red.offset = 11; |
188 | var->red.length = 5; |
189 | var->green.offset = 6; |
190 | var->green.length = 6; |
191 | var->blue.offset = 0; |
192 | var->blue.length = 5; |
193 | break; |
194 | case 18: |
195 | var->red.offset = 16; |
196 | var->red.length = 6; |
197 | var->green.offset = 8; |
198 | var->green.length = 6; |
199 | var->blue.offset = 0; |
200 | var->blue.length = 6; |
201 | fb->var.bits_per_pixel = 32; |
202 | break; |
203 | case 32: |
204 | case 24: |
205 | var->transp.offset = 24; |
206 | var->transp.length = 8; |
207 | var->red.offset = 16; |
208 | var->red.length = 8; |
209 | var->green.offset = 8; |
210 | var->green.length = 8; |
211 | var->blue.offset = 0; |
212 | var->blue.length = 8; |
213 | fb->var.bits_per_pixel = 32; |
214 | break; |
215 | default: |
216 | break; |
217 | } |
218 | |
219 | return 0; |
220 | } |
221 | |
222 | static int jzfb_set_par(struct fb_info *info) |
223 | { |
224 | struct jzfb* jzfb = info->par; |
225 | struct fb_var_screeninfo *var = &info->var; |
226 | uint16_t hds, vds; |
227 | uint16_t hde, vde; |
228 | uint16_t ht, vt; |
229 | uint32_t ctrl; |
230 | |
231 | hds = var->hsync_len + var->left_margin; |
232 | hde = hds + var->xres; |
233 | ht = hde + var->right_margin; |
234 | |
235 | vds = var->vsync_len + var->upper_margin; |
236 | vde = vds + var->yres; |
237 | vt = vde + var->lower_margin; |
238 | |
239 | writel(var->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC); |
240 | writel(var->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC); |
241 | |
242 | writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT); |
243 | |
244 | writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH); |
245 | writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV); |
246 | |
247 | ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16; |
248 | ctrl |= JZ_LCD_CTRL_ENABLE; |
249 | |
250 | switch (jzfb->pdata->bpp) { |
251 | case 1: |
252 | ctrl |= JZ_LCD_CTRL_BPP_1; |
253 | break; |
254 | case 2: |
255 | ctrl |= JZ_LCD_CTRL_BPP_2; |
256 | break; |
257 | case 4: |
258 | ctrl |= JZ_LCD_CTRL_BPP_4; |
259 | break; |
260 | case 8: |
261 | ctrl |= JZ_LCD_CTRL_BPP_8; |
262 | break; |
263 | case 15: |
264 | ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */ |
265 | case 16: |
266 | ctrl |= JZ_LCD_CTRL_BPP_15_16; |
267 | break; |
268 | case 18: |
269 | case 24: |
270 | case 32: |
271 | ctrl |= JZ_LCD_CTRL_BPP_18_24; |
272 | break; |
273 | default: |
274 | break; |
275 | } |
276 | writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL); |
277 | |
278 | return 0; |
279 | } |
280 | |
281 | |
282 | static int jzfb_alloc_vidmem(struct jzfb *jzfb) |
283 | { |
284 | size_t devmem_size; |
285 | int max_videosize = 0; |
286 | struct fb_videomode *mode = jzfb->pdata->modes; |
287 | struct jzfb_framedesc *framedesc; |
288 | void *page; |
289 | int i; |
290 | |
291 | for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) { |
292 | if (max_videosize < mode->xres * mode->yres) |
293 | max_videosize = mode->xres * mode->yres; |
294 | } |
295 | |
296 | max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3; |
297 | |
298 | devmem_size = max_videosize + sizeof(struct jzfb_framedesc); |
299 | |
300 | jzfb->devmem_size = devmem_size; |
301 | jzfb->devmem = dma_alloc_coherent(&jzfb->pdev->dev, |
302 | PAGE_ALIGN(devmem_size), |
303 | &jzfb->devmem_phys, GFP_KERNEL); |
304 | |
305 | if (!jzfb->devmem) { |
306 | return -ENOMEM; |
307 | } |
308 | |
309 | for (page = jzfb->vidmem; |
310 | page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size); |
311 | page += PAGE_SIZE) { |
312 | SetPageReserved(virt_to_page(page)); |
313 | } |
314 | |
315 | |
316 | framedesc = jzfb->devmem + max_videosize; |
317 | jzfb->vidmem = jzfb->devmem; |
318 | jzfb->vidmem_phys = jzfb->devmem_phys; |
319 | |
320 | framedesc->next = jzfb->devmem_phys + max_videosize; |
321 | framedesc->addr = jzfb->devmem_phys; |
322 | framedesc->id = 0; |
323 | framedesc->cmd = 0; |
324 | framedesc->cmd |= max_videosize / 4; |
325 | |
326 | jzfb->framedesc = framedesc; |
327 | |
328 | |
329 | return 0; |
330 | } |
331 | |
332 | static void jzfb_free_devmem(struct jzfb *jzfb) |
333 | { |
334 | dma_free_coherent(&jzfb->pdev->dev, jzfb->devmem_size, jzfb->devmem, |
335 | jzfb->devmem_phys); |
336 | } |
337 | |
338 | static struct fb_ops jzfb_ops = { |
339 | .owner = THIS_MODULE, |
340 | .fb_check_var = jzfb_check_var, |
341 | .fb_set_par = jzfb_set_par, |
342 | /* .fb_blank = jzfb_blank,*/ |
343 | .fb_fillrect = sys_fillrect, |
344 | .fb_copyarea = sys_copyarea, |
345 | .fb_imageblit = sys_imageblit, |
346 | .fb_setcolreg = jzfb_setcolreg, |
347 | }; |
348 | |
349 | static int __devinit jzfb_probe(struct platform_device *pdev) |
350 | { |
351 | int ret; |
352 | struct jzfb *jzfb; |
353 | struct fb_info *fb; |
354 | struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data; |
355 | struct resource *mem; |
356 | |
357 | if (!pdata) { |
358 | dev_err(&pdev->dev, "Missing platform data\n"); |
359 | return -ENOENT; |
360 | } |
361 | |
362 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
363 | |
364 | if (!mem) { |
365 | dev_err(&pdev->dev, "Failed to get register memory resource\n"); |
366 | return -ENOENT; |
367 | } |
368 | |
369 | mem = request_mem_region(mem->start, resource_size(mem), pdev->name); |
370 | |
371 | if (!mem) { |
372 | dev_err(&pdev->dev, "Failed to request register memory region\n"); |
373 | return -EBUSY; |
374 | } |
375 | |
376 | |
377 | fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev); |
378 | |
379 | if (!fb) { |
380 | dev_err(&pdev->dev, "Failed to allocate framebuffer device\n"); |
381 | ret = -ENOMEM; |
382 | goto err_release_mem_region; |
383 | } |
384 | |
385 | fb->fbops = &jzfb_ops; |
386 | fb->flags = FBINFO_DEFAULT; |
387 | |
388 | jzfb = fb->par; |
389 | jzfb->pdev = pdev; |
390 | jzfb->pdata = pdata; |
391 | jzfb->mem = mem; |
392 | |
393 | jzfb->base = ioremap(mem->start, resource_size(mem)); |
394 | |
395 | if (!jzfb->base) { |
396 | dev_err(&pdev->dev, "Failed to ioremap register memory region\n"); |
397 | ret = -EBUSY; |
398 | goto err_framebuffer_release; |
399 | } |
400 | |
401 | platform_set_drvdata(pdev, jzfb); |
402 | |
403 | fb_videomode_to_modelist(pdata->modes, pdata->num_modes, |
404 | &fb->modelist); |
405 | fb->mode = pdata->modes; |
406 | |
407 | fb_videomode_to_var(&fb->var, fb->mode); |
408 | fb->var.bits_per_pixel = pdata->bpp; |
409 | jzfb_check_var(&fb->var, fb); |
410 | |
411 | ret = jzfb_alloc_vidmem(jzfb); |
412 | if (ret) { |
413 | dev_err(&pdev->dev, "Failed to allocate video memory\n"); |
414 | goto err_iounmap; |
415 | } |
416 | |
417 | fb->fix = jzfb_fix; |
418 | fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8; |
419 | fb->fix.mmio_start = mem->start; |
420 | fb->fix.mmio_len = resource_size(mem); |
421 | fb->fix.smem_start = jzfb->vidmem_phys; |
422 | fb->fix.smem_len = fb->fix.line_length * fb->var.yres; |
423 | fb->screen_base = jzfb->vidmem; |
424 | fb->pseudo_palette = jzfb->pseudo_palette; |
425 | |
426 | fb_alloc_cmap(&fb->cmap, 256, 0); |
427 | |
428 | jzfb_set_par(fb); |
429 | writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0); |
430 | |
431 | ret = register_framebuffer(fb); |
432 | if (ret) { |
433 | dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret); |
434 | goto err_free_devmem; |
435 | } |
436 | |
437 | return 0; |
438 | err_free_devmem: |
439 | jzfb_free_devmem(jzfb); |
440 | err_iounmap: |
441 | iounmap(jzfb->base); |
442 | err_framebuffer_release: |
443 | framebuffer_release(fb); |
444 | err_release_mem_region: |
445 | release_mem_region(mem->start, resource_size(mem)); |
446 | return ret; |
447 | } |
448 | |
449 | static int __devexit jzfb_remove(struct platform_device *pdev) |
450 | { |
451 | struct jzfb *jzfb = platform_get_drvdata(pdev); |
452 | |
453 | iounmap(jzfb->base); |
454 | release_mem_region(jzfb->mem->start, resource_size(jzfb->mem)); |
455 | jzfb_free_devmem(jzfb); |
456 | platform_set_drvdata(pdev, NULL); |
457 | framebuffer_release(jzfb->fb); |
458 | return 0; |
459 | } |
460 | |
461 | static struct platform_driver jzfb_driver = { |
462 | .probe = jzfb_probe, |
463 | .remove = __devexit_p(jzfb_remove), |
464 | |
465 | .driver = { |
466 | .name = "jz4740-fb", |
467 | }, |
468 | }; |
469 | |
470 | int __init jzfb_init(void) |
471 | { |
472 | return platform_driver_register(&jzfb_driver); |
473 | } |
474 | module_init(jzfb_init); |
475 | |
476 | void __exit jzfb_exit(void) |
477 | { |
478 | platform_driver_unregister(&jzfb_driver); |
479 | } |
480 | module_exit(jzfb_exit); |
481 | |
482 | MODULE_LICENSE("GPL"); |
483 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); |
484 | MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver"); |
485 | MODULE_ALIAS("platform:jz4740-fb"); |
486 | MODULE_ALIAS("platform:jz4720-fb"); |
487 |
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