Root/Documentation/IRQ-affinity.txt

1ChangeLog:
2    Started by Ingo Molnar <mingo@redhat.com>
3    Update by Max Krasnyansky <maxk@qualcomm.com>
4
5SMP IRQ affinity
6
7/proc/irq/IRQ#/smp_affinity specifies which target CPUs are permitted
8for a given IRQ source. It's a bitmask of allowed CPUs. It's not allowed
9to turn off all CPUs, and if an IRQ controller does not support IRQ
10affinity then the value will not change from the default 0xffffffff.
11
12/proc/irq/default_smp_affinity specifies default affinity mask that applies
13to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
14will be set to the default mask. It can then be changed as described above.
15Default mask is 0xffffffff.
16
17Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting
18it to CPU4-7 (this is an 8-CPU SMP box):
19
20[root@moon 44]# cd /proc/irq/44
21[root@moon 44]# cat smp_affinity
22ffffffff
23
24[root@moon 44]# echo 0f > smp_affinity
25[root@moon 44]# cat smp_affinity
260000000f
27[root@moon 44]# ping -f h
28PING hell (195.4.7.3): 56 data bytes
29...
30--- hell ping statistics ---
316029 packets transmitted, 6027 packets received, 0% packet loss
32round-trip min/avg/max = 0.1/0.1/0.4 ms
33[root@moon 44]# cat /proc/interrupts | grep 'CPU\|44:'
34           CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
35 44: 1068 1785 1785 1783 0 0 0 0 IO-APIC-level eth1
36
37As can be seen from the line above IRQ44 was delivered only to the first four
38processors (0-3).
39Now lets restrict that IRQ to CPU(4-7).
40
41[root@moon 44]# echo f0 > smp_affinity
42[root@moon 44]# cat smp_affinity
43000000f0
44[root@moon 44]# ping -f h
45PING hell (195.4.7.3): 56 data bytes
46..
47--- hell ping statistics ---
482779 packets transmitted, 2777 packets received, 0% packet loss
49round-trip min/avg/max = 0.1/0.5/585.4 ms
50[root@moon 44]# cat /proc/interrupts | 'CPU\|44:'
51           CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7
52 44: 1068 1785 1785 1783 1784 1069 1070 1069 IO-APIC-level eth1
53
54This time around IRQ44 was delivered only to the last four processors.
55i.e counters for the CPU0-3 did not change.
56
57

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