Root/
1 | /****************************************************************************** |
2 | ** Device driver for the PCI-SCSI NCR538XX controller family. |
3 | ** |
4 | ** Copyright (C) 1994 Wolfgang Stanglmeier |
5 | ** |
6 | ** This program is free software; you can redistribute it and/or modify |
7 | ** it under the terms of the GNU General Public License as published by |
8 | ** the Free Software Foundation; either version 2 of the License, or |
9 | ** (at your option) any later version. |
10 | ** |
11 | ** This program is distributed in the hope that it will be useful, |
12 | ** but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
14 | ** GNU General Public License for more details. |
15 | ** |
16 | ** You should have received a copy of the GNU General Public License |
17 | ** along with this program; if not, write to the Free Software |
18 | ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
19 | ** |
20 | **----------------------------------------------------------------------------- |
21 | ** |
22 | ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver |
23 | ** and is currently maintained by |
24 | ** |
25 | ** Gerard Roudier <groudier@free.fr> |
26 | ** |
27 | ** Being given that this driver originates from the FreeBSD version, and |
28 | ** in order to keep synergy on both, any suggested enhancements and corrections |
29 | ** received on Linux are automatically a potential candidate for the FreeBSD |
30 | ** version. |
31 | ** |
32 | ** The original driver has been written for 386bsd and FreeBSD by |
33 | ** Wolfgang Stanglmeier <wolf@cologne.de> |
34 | ** Stefan Esser <se@mi.Uni-Koeln.de> |
35 | ** |
36 | ** And has been ported to NetBSD by |
37 | ** Charles M. Hannum <mycroft@gnu.ai.mit.edu> |
38 | ** |
39 | **----------------------------------------------------------------------------- |
40 | ** |
41 | ** Brief history |
42 | ** |
43 | ** December 10 1995 by Gerard Roudier: |
44 | ** Initial port to Linux. |
45 | ** |
46 | ** June 23 1996 by Gerard Roudier: |
47 | ** Support for 64 bits architectures (Alpha). |
48 | ** |
49 | ** November 30 1996 by Gerard Roudier: |
50 | ** Support for Fast-20 scsi. |
51 | ** Support for large DMA fifo and 128 dwords bursting. |
52 | ** |
53 | ** February 27 1997 by Gerard Roudier: |
54 | ** Support for Fast-40 scsi. |
55 | ** Support for on-Board RAM. |
56 | ** |
57 | ** May 3 1997 by Gerard Roudier: |
58 | ** Full support for scsi scripts instructions pre-fetching. |
59 | ** |
60 | ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: |
61 | ** Support for NvRAM detection and reading. |
62 | ** |
63 | ** August 18 1997 by Cort <cort@cs.nmt.edu>: |
64 | ** Support for Power/PC (Big Endian). |
65 | ** |
66 | ** June 20 1998 by Gerard Roudier |
67 | ** Support for up to 64 tags per lun. |
68 | ** O(1) everywhere (C and SCRIPTS) for normal cases. |
69 | ** Low PCI traffic for command handling when on-chip RAM is present. |
70 | ** Aggressive SCSI SCRIPTS optimizations. |
71 | ** |
72 | ** 2005 by Matthew Wilcox and James Bottomley |
73 | ** PCI-ectomy. This driver now supports only the 720 chip (see the |
74 | ** NCR_Q720 and zalon drivers for the bus probe logic). |
75 | ** |
76 | ******************************************************************************* |
77 | */ |
78 | |
79 | /* |
80 | ** Supported SCSI-II features: |
81 | ** Synchronous negotiation |
82 | ** Wide negotiation (depends on the NCR Chip) |
83 | ** Enable disconnection |
84 | ** Tagged command queuing |
85 | ** Parity checking |
86 | ** Etc... |
87 | ** |
88 | ** Supported NCR/SYMBIOS chips: |
89 | ** 53C720 (Wide, Fast SCSI-2, intfly problems) |
90 | */ |
91 | |
92 | /* Name and version of the driver */ |
93 | #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" |
94 | |
95 | #define SCSI_NCR_DEBUG_FLAGS (0) |
96 | |
97 | #include <linux/blkdev.h> |
98 | #include <linux/delay.h> |
99 | #include <linux/dma-mapping.h> |
100 | #include <linux/errno.h> |
101 | #include <linux/gfp.h> |
102 | #include <linux/init.h> |
103 | #include <linux/interrupt.h> |
104 | #include <linux/ioport.h> |
105 | #include <linux/mm.h> |
106 | #include <linux/module.h> |
107 | #include <linux/sched.h> |
108 | #include <linux/signal.h> |
109 | #include <linux/spinlock.h> |
110 | #include <linux/stat.h> |
111 | #include <linux/string.h> |
112 | #include <linux/time.h> |
113 | #include <linux/timer.h> |
114 | #include <linux/types.h> |
115 | |
116 | #include <asm/dma.h> |
117 | #include <asm/io.h> |
118 | #include <asm/system.h> |
119 | |
120 | #include <scsi/scsi.h> |
121 | #include <scsi/scsi_cmnd.h> |
122 | #include <scsi/scsi_dbg.h> |
123 | #include <scsi/scsi_device.h> |
124 | #include <scsi/scsi_tcq.h> |
125 | #include <scsi/scsi_transport.h> |
126 | #include <scsi/scsi_transport_spi.h> |
127 | |
128 | #include "ncr53c8xx.h" |
129 | |
130 | #define NAME53C8XX "ncr53c8xx" |
131 | |
132 | /*========================================================== |
133 | ** |
134 | ** Debugging tags |
135 | ** |
136 | **========================================================== |
137 | */ |
138 | |
139 | #define DEBUG_ALLOC (0x0001) |
140 | #define DEBUG_PHASE (0x0002) |
141 | #define DEBUG_QUEUE (0x0008) |
142 | #define DEBUG_RESULT (0x0010) |
143 | #define DEBUG_POINTER (0x0020) |
144 | #define DEBUG_SCRIPT (0x0040) |
145 | #define DEBUG_TINY (0x0080) |
146 | #define DEBUG_TIMING (0x0100) |
147 | #define DEBUG_NEGO (0x0200) |
148 | #define DEBUG_TAGS (0x0400) |
149 | #define DEBUG_SCATTER (0x0800) |
150 | #define DEBUG_IC (0x1000) |
151 | |
152 | /* |
153 | ** Enable/Disable debug messages. |
154 | ** Can be changed at runtime too. |
155 | */ |
156 | |
157 | #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT |
158 | static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; |
159 | #define DEBUG_FLAGS ncr_debug |
160 | #else |
161 | #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS |
162 | #endif |
163 | |
164 | static inline struct list_head *ncr_list_pop(struct list_head *head) |
165 | { |
166 | if (!list_empty(head)) { |
167 | struct list_head *elem = head->next; |
168 | |
169 | list_del(elem); |
170 | return elem; |
171 | } |
172 | |
173 | return NULL; |
174 | } |
175 | |
176 | /*========================================================== |
177 | ** |
178 | ** Simple power of two buddy-like allocator. |
179 | ** |
180 | ** This simple code is not intended to be fast, but to |
181 | ** provide power of 2 aligned memory allocations. |
182 | ** Since the SCRIPTS processor only supplies 8 bit |
183 | ** arithmetic, this allocator allows simple and fast |
184 | ** address calculations from the SCRIPTS code. |
185 | ** In addition, cache line alignment is guaranteed for |
186 | ** power of 2 cache line size. |
187 | ** Enhanced in linux-2.3.44 to provide a memory pool |
188 | ** per pcidev to support dynamic dma mapping. (I would |
189 | ** have preferred a real bus abstraction, btw). |
190 | ** |
191 | **========================================================== |
192 | */ |
193 | |
194 | #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ |
195 | #if PAGE_SIZE >= 8192 |
196 | #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ |
197 | #else |
198 | #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ |
199 | #endif |
200 | #define MEMO_FREE_UNUSED /* Free unused pages immediately */ |
201 | #define MEMO_WARN 1 |
202 | #define MEMO_GFP_FLAGS GFP_ATOMIC |
203 | #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) |
204 | #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) |
205 | #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) |
206 | |
207 | typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ |
208 | typedef struct device *m_bush_t; /* Something that addresses DMAable */ |
209 | |
210 | typedef struct m_link { /* Link between free memory chunks */ |
211 | struct m_link *next; |
212 | } m_link_s; |
213 | |
214 | typedef struct m_vtob { /* Virtual to Bus address translation */ |
215 | struct m_vtob *next; |
216 | m_addr_t vaddr; |
217 | m_addr_t baddr; |
218 | } m_vtob_s; |
219 | #define VTOB_HASH_SHIFT 5 |
220 | #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) |
221 | #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) |
222 | #define VTOB_HASH_CODE(m) \ |
223 | ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) |
224 | |
225 | typedef struct m_pool { /* Memory pool of a given kind */ |
226 | m_bush_t bush; |
227 | m_addr_t (*getp)(struct m_pool *); |
228 | void (*freep)(struct m_pool *, m_addr_t); |
229 | int nump; |
230 | m_vtob_s *(vtob[VTOB_HASH_SIZE]); |
231 | struct m_pool *next; |
232 | struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; |
233 | } m_pool_s; |
234 | |
235 | static void *___m_alloc(m_pool_s *mp, int size) |
236 | { |
237 | int i = 0; |
238 | int s = (1 << MEMO_SHIFT); |
239 | int j; |
240 | m_addr_t a; |
241 | m_link_s *h = mp->h; |
242 | |
243 | if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) |
244 | return NULL; |
245 | |
246 | while (size > s) { |
247 | s <<= 1; |
248 | ++i; |
249 | } |
250 | |
251 | j = i; |
252 | while (!h[j].next) { |
253 | if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { |
254 | h[j].next = (m_link_s *)mp->getp(mp); |
255 | if (h[j].next) |
256 | h[j].next->next = NULL; |
257 | break; |
258 | } |
259 | ++j; |
260 | s <<= 1; |
261 | } |
262 | a = (m_addr_t) h[j].next; |
263 | if (a) { |
264 | h[j].next = h[j].next->next; |
265 | while (j > i) { |
266 | j -= 1; |
267 | s >>= 1; |
268 | h[j].next = (m_link_s *) (a+s); |
269 | h[j].next->next = NULL; |
270 | } |
271 | } |
272 | #ifdef DEBUG |
273 | printk("___m_alloc(%d) = %p\n", size, (void *) a); |
274 | #endif |
275 | return (void *) a; |
276 | } |
277 | |
278 | static void ___m_free(m_pool_s *mp, void *ptr, int size) |
279 | { |
280 | int i = 0; |
281 | int s = (1 << MEMO_SHIFT); |
282 | m_link_s *q; |
283 | m_addr_t a, b; |
284 | m_link_s *h = mp->h; |
285 | |
286 | #ifdef DEBUG |
287 | printk("___m_free(%p, %d)\n", ptr, size); |
288 | #endif |
289 | |
290 | if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) |
291 | return; |
292 | |
293 | while (size > s) { |
294 | s <<= 1; |
295 | ++i; |
296 | } |
297 | |
298 | a = (m_addr_t) ptr; |
299 | |
300 | while (1) { |
301 | #ifdef MEMO_FREE_UNUSED |
302 | if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { |
303 | mp->freep(mp, a); |
304 | break; |
305 | } |
306 | #endif |
307 | b = a ^ s; |
308 | q = &h[i]; |
309 | while (q->next && q->next != (m_link_s *) b) { |
310 | q = q->next; |
311 | } |
312 | if (!q->next) { |
313 | ((m_link_s *) a)->next = h[i].next; |
314 | h[i].next = (m_link_s *) a; |
315 | break; |
316 | } |
317 | q->next = q->next->next; |
318 | a = a & b; |
319 | s <<= 1; |
320 | ++i; |
321 | } |
322 | } |
323 | |
324 | static DEFINE_SPINLOCK(ncr53c8xx_lock); |
325 | |
326 | static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) |
327 | { |
328 | void *p; |
329 | |
330 | p = ___m_alloc(mp, size); |
331 | |
332 | if (DEBUG_FLAGS & DEBUG_ALLOC) |
333 | printk ("new %-10s[%4d] @%p.\n", name, size, p); |
334 | |
335 | if (p) |
336 | memset(p, 0, size); |
337 | else if (uflags & MEMO_WARN) |
338 | printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size); |
339 | |
340 | return p; |
341 | } |
342 | |
343 | #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) |
344 | |
345 | static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) |
346 | { |
347 | if (DEBUG_FLAGS & DEBUG_ALLOC) |
348 | printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr); |
349 | |
350 | ___m_free(mp, ptr, size); |
351 | |
352 | } |
353 | |
354 | /* |
355 | * With pci bus iommu support, we use a default pool of unmapped memory |
356 | * for memory we donnot need to DMA from/to and one pool per pcidev for |
357 | * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. |
358 | */ |
359 | |
360 | static m_addr_t ___mp0_getp(m_pool_s *mp) |
361 | { |
362 | m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); |
363 | if (m) |
364 | ++mp->nump; |
365 | return m; |
366 | } |
367 | |
368 | static void ___mp0_freep(m_pool_s *mp, m_addr_t m) |
369 | { |
370 | free_pages(m, MEMO_PAGE_ORDER); |
371 | --mp->nump; |
372 | } |
373 | |
374 | static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; |
375 | |
376 | /* |
377 | * DMAable pools. |
378 | */ |
379 | |
380 | /* |
381 | * With pci bus iommu support, we maintain one pool per pcidev and a |
382 | * hashed reverse table for virtual to bus physical address translations. |
383 | */ |
384 | static m_addr_t ___dma_getp(m_pool_s *mp) |
385 | { |
386 | m_addr_t vp; |
387 | m_vtob_s *vbp; |
388 | |
389 | vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); |
390 | if (vbp) { |
391 | dma_addr_t daddr; |
392 | vp = (m_addr_t) dma_alloc_coherent(mp->bush, |
393 | PAGE_SIZE<<MEMO_PAGE_ORDER, |
394 | &daddr, GFP_ATOMIC); |
395 | if (vp) { |
396 | int hc = VTOB_HASH_CODE(vp); |
397 | vbp->vaddr = vp; |
398 | vbp->baddr = daddr; |
399 | vbp->next = mp->vtob[hc]; |
400 | mp->vtob[hc] = vbp; |
401 | ++mp->nump; |
402 | return vp; |
403 | } |
404 | } |
405 | if (vbp) |
406 | __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); |
407 | return 0; |
408 | } |
409 | |
410 | static void ___dma_freep(m_pool_s *mp, m_addr_t m) |
411 | { |
412 | m_vtob_s **vbpp, *vbp; |
413 | int hc = VTOB_HASH_CODE(m); |
414 | |
415 | vbpp = &mp->vtob[hc]; |
416 | while (*vbpp && (*vbpp)->vaddr != m) |
417 | vbpp = &(*vbpp)->next; |
418 | if (*vbpp) { |
419 | vbp = *vbpp; |
420 | *vbpp = (*vbpp)->next; |
421 | dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, |
422 | (void *)vbp->vaddr, (dma_addr_t)vbp->baddr); |
423 | __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); |
424 | --mp->nump; |
425 | } |
426 | } |
427 | |
428 | static inline m_pool_s *___get_dma_pool(m_bush_t bush) |
429 | { |
430 | m_pool_s *mp; |
431 | for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); |
432 | return mp; |
433 | } |
434 | |
435 | static m_pool_s *___cre_dma_pool(m_bush_t bush) |
436 | { |
437 | m_pool_s *mp; |
438 | mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL"); |
439 | if (mp) { |
440 | memset(mp, 0, sizeof(*mp)); |
441 | mp->bush = bush; |
442 | mp->getp = ___dma_getp; |
443 | mp->freep = ___dma_freep; |
444 | mp->next = mp0.next; |
445 | mp0.next = mp; |
446 | } |
447 | return mp; |
448 | } |
449 | |
450 | static void ___del_dma_pool(m_pool_s *p) |
451 | { |
452 | struct m_pool **pp = &mp0.next; |
453 | |
454 | while (*pp && *pp != p) |
455 | pp = &(*pp)->next; |
456 | if (*pp) { |
457 | *pp = (*pp)->next; |
458 | __m_free(&mp0, p, sizeof(*p), "MPOOL"); |
459 | } |
460 | } |
461 | |
462 | static void *__m_calloc_dma(m_bush_t bush, int size, char *name) |
463 | { |
464 | u_long flags; |
465 | struct m_pool *mp; |
466 | void *m = NULL; |
467 | |
468 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
469 | mp = ___get_dma_pool(bush); |
470 | if (!mp) |
471 | mp = ___cre_dma_pool(bush); |
472 | if (mp) |
473 | m = __m_calloc(mp, size, name); |
474 | if (mp && !mp->nump) |
475 | ___del_dma_pool(mp); |
476 | spin_unlock_irqrestore(&ncr53c8xx_lock, flags); |
477 | |
478 | return m; |
479 | } |
480 | |
481 | static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) |
482 | { |
483 | u_long flags; |
484 | struct m_pool *mp; |
485 | |
486 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
487 | mp = ___get_dma_pool(bush); |
488 | if (mp) |
489 | __m_free(mp, m, size, name); |
490 | if (mp && !mp->nump) |
491 | ___del_dma_pool(mp); |
492 | spin_unlock_irqrestore(&ncr53c8xx_lock, flags); |
493 | } |
494 | |
495 | static m_addr_t __vtobus(m_bush_t bush, void *m) |
496 | { |
497 | u_long flags; |
498 | m_pool_s *mp; |
499 | int hc = VTOB_HASH_CODE(m); |
500 | m_vtob_s *vp = NULL; |
501 | m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; |
502 | |
503 | spin_lock_irqsave(&ncr53c8xx_lock, flags); |
504 | mp = ___get_dma_pool(bush); |
505 | if (mp) { |
506 | vp = mp->vtob[hc]; |
507 | while (vp && (m_addr_t) vp->vaddr != a) |
508 | vp = vp->next; |
509 | } |
510 | spin_unlock_irqrestore(&ncr53c8xx_lock, flags); |
511 | return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; |
512 | } |
513 | |
514 | #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) |
515 | #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) |
516 | #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) |
517 | #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) |
518 | #define _vtobus(np, p) __vtobus(np->dev, p) |
519 | #define vtobus(p) _vtobus(np, p) |
520 | |
521 | /* |
522 | * Deal with DMA mapping/unmapping. |
523 | */ |
524 | |
525 | /* To keep track of the dma mapping (sg/single) that has been set */ |
526 | #define __data_mapped SCp.phase |
527 | #define __data_mapping SCp.have_data_in |
528 | |
529 | static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) |
530 | { |
531 | switch(cmd->__data_mapped) { |
532 | case 2: |
533 | scsi_dma_unmap(cmd); |
534 | break; |
535 | } |
536 | cmd->__data_mapped = 0; |
537 | } |
538 | |
539 | static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) |
540 | { |
541 | int use_sg; |
542 | |
543 | use_sg = scsi_dma_map(cmd); |
544 | if (!use_sg) |
545 | return 0; |
546 | |
547 | cmd->__data_mapped = 2; |
548 | cmd->__data_mapping = use_sg; |
549 | |
550 | return use_sg; |
551 | } |
552 | |
553 | #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) |
554 | #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) |
555 | |
556 | /*========================================================== |
557 | ** |
558 | ** Driver setup. |
559 | ** |
560 | ** This structure is initialized from linux config |
561 | ** options. It can be overridden at boot-up by the boot |
562 | ** command line. |
563 | ** |
564 | **========================================================== |
565 | */ |
566 | static struct ncr_driver_setup |
567 | driver_setup = SCSI_NCR_DRIVER_SETUP; |
568 | |
569 | #ifndef MODULE |
570 | #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT |
571 | static struct ncr_driver_setup |
572 | driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; |
573 | #endif |
574 | #endif /* !MODULE */ |
575 | |
576 | #define initverbose (driver_setup.verbose) |
577 | #define bootverbose (np->verbose) |
578 | |
579 | |
580 | /*=================================================================== |
581 | ** |
582 | ** Driver setup from the boot command line |
583 | ** |
584 | **=================================================================== |
585 | */ |
586 | |
587 | #ifdef MODULE |
588 | #define ARG_SEP ' ' |
589 | #else |
590 | #define ARG_SEP ',' |
591 | #endif |
592 | |
593 | #define OPT_TAGS 1 |
594 | #define OPT_MASTER_PARITY 2 |
595 | #define OPT_SCSI_PARITY 3 |
596 | #define OPT_DISCONNECTION 4 |
597 | #define OPT_SPECIAL_FEATURES 5 |
598 | #define OPT_UNUSED_1 6 |
599 | #define OPT_FORCE_SYNC_NEGO 7 |
600 | #define OPT_REVERSE_PROBE 8 |
601 | #define OPT_DEFAULT_SYNC 9 |
602 | #define OPT_VERBOSE 10 |
603 | #define OPT_DEBUG 11 |
604 | #define OPT_BURST_MAX 12 |
605 | #define OPT_LED_PIN 13 |
606 | #define OPT_MAX_WIDE 14 |
607 | #define OPT_SETTLE_DELAY 15 |
608 | #define OPT_DIFF_SUPPORT 16 |
609 | #define OPT_IRQM 17 |
610 | #define OPT_PCI_FIX_UP 18 |
611 | #define OPT_BUS_CHECK 19 |
612 | #define OPT_OPTIMIZE 20 |
613 | #define OPT_RECOVERY 21 |
614 | #define OPT_SAFE_SETUP 22 |
615 | #define OPT_USE_NVRAM 23 |
616 | #define OPT_EXCLUDE 24 |
617 | #define OPT_HOST_ID 25 |
618 | |
619 | #ifdef SCSI_NCR_IARB_SUPPORT |
620 | #define OPT_IARB 26 |
621 | #endif |
622 | |
623 | #ifdef MODULE |
624 | #define ARG_SEP ' ' |
625 | #else |
626 | #define ARG_SEP ',' |
627 | #endif |
628 | |
629 | #ifndef MODULE |
630 | static char setup_token[] __initdata = |
631 | "tags:" "mpar:" |
632 | "spar:" "disc:" |
633 | "specf:" "ultra:" |
634 | "fsn:" "revprob:" |
635 | "sync:" "verb:" |
636 | "debug:" "burst:" |
637 | "led:" "wide:" |
638 | "settle:" "diff:" |
639 | "irqm:" "pcifix:" |
640 | "buschk:" "optim:" |
641 | "recovery:" |
642 | "safe:" "nvram:" |
643 | "excl:" "hostid:" |
644 | #ifdef SCSI_NCR_IARB_SUPPORT |
645 | "iarb:" |
646 | #endif |
647 | ; /* DONNOT REMOVE THIS ';' */ |
648 | |
649 | static int __init get_setup_token(char *p) |
650 | { |
651 | char *cur = setup_token; |
652 | char *pc; |
653 | int i = 0; |
654 | |
655 | while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { |
656 | ++pc; |
657 | ++i; |
658 | if (!strncmp(p, cur, pc - cur)) |
659 | return i; |
660 | cur = pc; |
661 | } |
662 | return 0; |
663 | } |
664 | |
665 | static int __init sym53c8xx__setup(char *str) |
666 | { |
667 | #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT |
668 | char *cur = str; |
669 | char *pc, *pv; |
670 | int i, val, c; |
671 | int xi = 0; |
672 | |
673 | while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { |
674 | char *pe; |
675 | |
676 | val = 0; |
677 | pv = pc; |
678 | c = *++pv; |
679 | |
680 | if (c == 'n') |
681 | val = 0; |
682 | else if (c == 'y') |
683 | val = 1; |
684 | else |
685 | val = (int) simple_strtoul(pv, &pe, 0); |
686 | |
687 | switch (get_setup_token(cur)) { |
688 | case OPT_TAGS: |
689 | driver_setup.default_tags = val; |
690 | if (pe && *pe == '/') { |
691 | i = 0; |
692 | while (*pe && *pe != ARG_SEP && |
693 | i < sizeof(driver_setup.tag_ctrl)-1) { |
694 | driver_setup.tag_ctrl[i++] = *pe++; |
695 | } |
696 | driver_setup.tag_ctrl[i] = '\0'; |
697 | } |
698 | break; |
699 | case OPT_MASTER_PARITY: |
700 | driver_setup.master_parity = val; |
701 | break; |
702 | case OPT_SCSI_PARITY: |
703 | driver_setup.scsi_parity = val; |
704 | break; |
705 | case OPT_DISCONNECTION: |
706 | driver_setup.disconnection = val; |
707 | break; |
708 | case OPT_SPECIAL_FEATURES: |
709 | driver_setup.special_features = val; |
710 | break; |
711 | case OPT_FORCE_SYNC_NEGO: |
712 | driver_setup.force_sync_nego = val; |
713 | break; |
714 | case OPT_REVERSE_PROBE: |
715 | driver_setup.reverse_probe = val; |
716 | break; |
717 | case OPT_DEFAULT_SYNC: |
718 | driver_setup.default_sync = val; |
719 | break; |
720 | case OPT_VERBOSE: |
721 | driver_setup.verbose = val; |
722 | break; |
723 | case OPT_DEBUG: |
724 | driver_setup.debug = val; |
725 | break; |
726 | case OPT_BURST_MAX: |
727 | driver_setup.burst_max = val; |
728 | break; |
729 | case OPT_LED_PIN: |
730 | driver_setup.led_pin = val; |
731 | break; |
732 | case OPT_MAX_WIDE: |
733 | driver_setup.max_wide = val? 1:0; |
734 | break; |
735 | case OPT_SETTLE_DELAY: |
736 | driver_setup.settle_delay = val; |
737 | break; |
738 | case OPT_DIFF_SUPPORT: |
739 | driver_setup.diff_support = val; |
740 | break; |
741 | case OPT_IRQM: |
742 | driver_setup.irqm = val; |
743 | break; |
744 | case OPT_PCI_FIX_UP: |
745 | driver_setup.pci_fix_up = val; |
746 | break; |
747 | case OPT_BUS_CHECK: |
748 | driver_setup.bus_check = val; |
749 | break; |
750 | case OPT_OPTIMIZE: |
751 | driver_setup.optimize = val; |
752 | break; |
753 | case OPT_RECOVERY: |
754 | driver_setup.recovery = val; |
755 | break; |
756 | case OPT_USE_NVRAM: |
757 | driver_setup.use_nvram = val; |
758 | break; |
759 | case OPT_SAFE_SETUP: |
760 | memcpy(&driver_setup, &driver_safe_setup, |
761 | sizeof(driver_setup)); |
762 | break; |
763 | case OPT_EXCLUDE: |
764 | if (xi < SCSI_NCR_MAX_EXCLUDES) |
765 | driver_setup.excludes[xi++] = val; |
766 | break; |
767 | case OPT_HOST_ID: |
768 | driver_setup.host_id = val; |
769 | break; |
770 | #ifdef SCSI_NCR_IARB_SUPPORT |
771 | case OPT_IARB: |
772 | driver_setup.iarb = val; |
773 | break; |
774 | #endif |
775 | default: |
776 | printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur); |
777 | break; |
778 | } |
779 | |
780 | if ((cur = strchr(cur, ARG_SEP)) != NULL) |
781 | ++cur; |
782 | } |
783 | #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ |
784 | return 1; |
785 | } |
786 | #endif /* !MODULE */ |
787 | |
788 | /*=================================================================== |
789 | ** |
790 | ** Get device queue depth from boot command line. |
791 | ** |
792 | **=================================================================== |
793 | */ |
794 | #define DEF_DEPTH (driver_setup.default_tags) |
795 | #define ALL_TARGETS -2 |
796 | #define NO_TARGET -1 |
797 | #define ALL_LUNS -2 |
798 | #define NO_LUN -1 |
799 | |
800 | static int device_queue_depth(int unit, int target, int lun) |
801 | { |
802 | int c, h, t, u, v; |
803 | char *p = driver_setup.tag_ctrl; |
804 | char *ep; |
805 | |
806 | h = -1; |
807 | t = NO_TARGET; |
808 | u = NO_LUN; |
809 | while ((c = *p++) != 0) { |
810 | v = simple_strtoul(p, &ep, 0); |
811 | switch(c) { |
812 | case '/': |
813 | ++h; |
814 | t = ALL_TARGETS; |
815 | u = ALL_LUNS; |
816 | break; |
817 | case 't': |
818 | if (t != target) |
819 | t = (target == v) ? v : NO_TARGET; |
820 | u = ALL_LUNS; |
821 | break; |
822 | case 'u': |
823 | if (u != lun) |
824 | u = (lun == v) ? v : NO_LUN; |
825 | break; |
826 | case 'q': |
827 | if (h == unit && |
828 | (t == ALL_TARGETS || t == target) && |
829 | (u == ALL_LUNS || u == lun)) |
830 | return v; |
831 | break; |
832 | case '-': |
833 | t = ALL_TARGETS; |
834 | u = ALL_LUNS; |
835 | break; |
836 | default: |
837 | break; |
838 | } |
839 | p = ep; |
840 | } |
841 | return DEF_DEPTH; |
842 | } |
843 | |
844 | |
845 | /*========================================================== |
846 | ** |
847 | ** The CCB done queue uses an array of CCB virtual |
848 | ** addresses. Empty entries are flagged using the bogus |
849 | ** virtual address 0xffffffff. |
850 | ** |
851 | ** Since PCI ensures that only aligned DWORDs are accessed |
852 | ** atomically, 64 bit little-endian architecture requires |
853 | ** to test the high order DWORD of the entry to determine |
854 | ** if it is empty or valid. |
855 | ** |
856 | ** BTW, I will make things differently as soon as I will |
857 | ** have a better idea, but this is simple and should work. |
858 | ** |
859 | **========================================================== |
860 | */ |
861 | |
862 | #define SCSI_NCR_CCB_DONE_SUPPORT |
863 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
864 | |
865 | #define MAX_DONE 24 |
866 | #define CCB_DONE_EMPTY 0xffffffffUL |
867 | |
868 | /* All 32 bit architectures */ |
869 | #if BITS_PER_LONG == 32 |
870 | #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) |
871 | |
872 | /* All > 32 bit (64 bit) architectures regardless endian-ness */ |
873 | #else |
874 | #define CCB_DONE_VALID(cp) \ |
875 | ((((u_long) cp) & 0xffffffff00000000ul) && \ |
876 | (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) |
877 | #endif |
878 | |
879 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
880 | |
881 | /*========================================================== |
882 | ** |
883 | ** Configuration and Debugging |
884 | ** |
885 | **========================================================== |
886 | */ |
887 | |
888 | /* |
889 | ** SCSI address of this device. |
890 | ** The boot routines should have set it. |
891 | ** If not, use this. |
892 | */ |
893 | |
894 | #ifndef SCSI_NCR_MYADDR |
895 | #define SCSI_NCR_MYADDR (7) |
896 | #endif |
897 | |
898 | /* |
899 | ** The maximum number of tags per logic unit. |
900 | ** Used only for disk devices that support tags. |
901 | */ |
902 | |
903 | #ifndef SCSI_NCR_MAX_TAGS |
904 | #define SCSI_NCR_MAX_TAGS (8) |
905 | #endif |
906 | |
907 | /* |
908 | ** TAGS are actually limited to 64 tags/lun. |
909 | ** We need to deal with power of 2, for alignment constraints. |
910 | */ |
911 | #if SCSI_NCR_MAX_TAGS > 64 |
912 | #define MAX_TAGS (64) |
913 | #else |
914 | #define MAX_TAGS SCSI_NCR_MAX_TAGS |
915 | #endif |
916 | |
917 | #define NO_TAG (255) |
918 | |
919 | /* |
920 | ** Choose appropriate type for tag bitmap. |
921 | */ |
922 | #if MAX_TAGS > 32 |
923 | typedef u64 tagmap_t; |
924 | #else |
925 | typedef u32 tagmap_t; |
926 | #endif |
927 | |
928 | /* |
929 | ** Number of targets supported by the driver. |
930 | ** n permits target numbers 0..n-1. |
931 | ** Default is 16, meaning targets #0..#15. |
932 | ** #7 .. is myself. |
933 | */ |
934 | |
935 | #ifdef SCSI_NCR_MAX_TARGET |
936 | #define MAX_TARGET (SCSI_NCR_MAX_TARGET) |
937 | #else |
938 | #define MAX_TARGET (16) |
939 | #endif |
940 | |
941 | /* |
942 | ** Number of logic units supported by the driver. |
943 | ** n enables logic unit numbers 0..n-1. |
944 | ** The common SCSI devices require only |
945 | ** one lun, so take 1 as the default. |
946 | */ |
947 | |
948 | #ifdef SCSI_NCR_MAX_LUN |
949 | #define MAX_LUN SCSI_NCR_MAX_LUN |
950 | #else |
951 | #define MAX_LUN (1) |
952 | #endif |
953 | |
954 | /* |
955 | ** Asynchronous pre-scaler (ns). Shall be 40 |
956 | */ |
957 | |
958 | #ifndef SCSI_NCR_MIN_ASYNC |
959 | #define SCSI_NCR_MIN_ASYNC (40) |
960 | #endif |
961 | |
962 | /* |
963 | ** The maximum number of jobs scheduled for starting. |
964 | ** There should be one slot per target, and one slot |
965 | ** for each tag of each target in use. |
966 | ** The calculation below is actually quite silly ... |
967 | */ |
968 | |
969 | #ifdef SCSI_NCR_CAN_QUEUE |
970 | #define MAX_START (SCSI_NCR_CAN_QUEUE + 4) |
971 | #else |
972 | #define MAX_START (MAX_TARGET + 7 * MAX_TAGS) |
973 | #endif |
974 | |
975 | /* |
976 | ** We limit the max number of pending IO to 250. |
977 | ** since we donnot want to allocate more than 1 |
978 | ** PAGE for 'scripth'. |
979 | */ |
980 | #if MAX_START > 250 |
981 | #undef MAX_START |
982 | #define MAX_START 250 |
983 | #endif |
984 | |
985 | /* |
986 | ** The maximum number of segments a transfer is split into. |
987 | ** We support up to 127 segments for both read and write. |
988 | ** The data scripts are broken into 2 sub-scripts. |
989 | ** 80 (MAX_SCATTERL) segments are moved from a sub-script |
990 | ** in on-chip RAM. This makes data transfers shorter than |
991 | ** 80k (assuming 1k fs) as fast as possible. |
992 | */ |
993 | |
994 | #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) |
995 | |
996 | #if (MAX_SCATTER > 80) |
997 | #define MAX_SCATTERL 80 |
998 | #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) |
999 | #else |
1000 | #define MAX_SCATTERL (MAX_SCATTER-1) |
1001 | #define MAX_SCATTERH 1 |
1002 | #endif |
1003 | |
1004 | /* |
1005 | ** other |
1006 | */ |
1007 | |
1008 | #define NCR_SNOOP_TIMEOUT (1000000) |
1009 | |
1010 | /* |
1011 | ** Other definitions |
1012 | */ |
1013 | |
1014 | #define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f)) |
1015 | |
1016 | #define initverbose (driver_setup.verbose) |
1017 | #define bootverbose (np->verbose) |
1018 | |
1019 | /*========================================================== |
1020 | ** |
1021 | ** Command control block states. |
1022 | ** |
1023 | **========================================================== |
1024 | */ |
1025 | |
1026 | #define HS_IDLE (0) |
1027 | #define HS_BUSY (1) |
1028 | #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ |
1029 | #define HS_DISCONNECT (3) /* Disconnected by target */ |
1030 | |
1031 | #define HS_DONEMASK (0x80) |
1032 | #define HS_COMPLETE (4|HS_DONEMASK) |
1033 | #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ |
1034 | #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ |
1035 | #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ |
1036 | #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ |
1037 | #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ |
1038 | #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ |
1039 | |
1040 | /* |
1041 | ** Invalid host status values used by the SCRIPTS processor |
1042 | ** when the nexus is not fully identified. |
1043 | ** Shall never appear in a CCB. |
1044 | */ |
1045 | |
1046 | #define HS_INVALMASK (0x40) |
1047 | #define HS_SELECTING (0|HS_INVALMASK) |
1048 | #define HS_IN_RESELECT (1|HS_INVALMASK) |
1049 | #define HS_STARTING (2|HS_INVALMASK) |
1050 | |
1051 | /* |
1052 | ** Flags set by the SCRIPT processor for commands |
1053 | ** that have been skipped. |
1054 | */ |
1055 | #define HS_SKIPMASK (0x20) |
1056 | |
1057 | /*========================================================== |
1058 | ** |
1059 | ** Software Interrupt Codes |
1060 | ** |
1061 | **========================================================== |
1062 | */ |
1063 | |
1064 | #define SIR_BAD_STATUS (1) |
1065 | #define SIR_XXXXXXXXXX (2) |
1066 | #define SIR_NEGO_SYNC (3) |
1067 | #define SIR_NEGO_WIDE (4) |
1068 | #define SIR_NEGO_FAILED (5) |
1069 | #define SIR_NEGO_PROTO (6) |
1070 | #define SIR_REJECT_RECEIVED (7) |
1071 | #define SIR_REJECT_SENT (8) |
1072 | #define SIR_IGN_RESIDUE (9) |
1073 | #define SIR_MISSING_SAVE (10) |
1074 | #define SIR_RESEL_NO_MSG_IN (11) |
1075 | #define SIR_RESEL_NO_IDENTIFY (12) |
1076 | #define SIR_RESEL_BAD_LUN (13) |
1077 | #define SIR_RESEL_BAD_TARGET (14) |
1078 | #define SIR_RESEL_BAD_I_T_L (15) |
1079 | #define SIR_RESEL_BAD_I_T_L_Q (16) |
1080 | #define SIR_DONE_OVERFLOW (17) |
1081 | #define SIR_INTFLY (18) |
1082 | #define SIR_MAX (18) |
1083 | |
1084 | /*========================================================== |
1085 | ** |
1086 | ** Extended error codes. |
1087 | ** xerr_status field of struct ccb. |
1088 | ** |
1089 | **========================================================== |
1090 | */ |
1091 | |
1092 | #define XE_OK (0) |
1093 | #define XE_EXTRA_DATA (1) /* unexpected data phase */ |
1094 | #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ |
1095 | |
1096 | /*========================================================== |
1097 | ** |
1098 | ** Negotiation status. |
1099 | ** nego_status field of struct ccb. |
1100 | ** |
1101 | **========================================================== |
1102 | */ |
1103 | |
1104 | #define NS_NOCHANGE (0) |
1105 | #define NS_SYNC (1) |
1106 | #define NS_WIDE (2) |
1107 | #define NS_PPR (4) |
1108 | |
1109 | /*========================================================== |
1110 | ** |
1111 | ** Misc. |
1112 | ** |
1113 | **========================================================== |
1114 | */ |
1115 | |
1116 | #define CCB_MAGIC (0xf2691ad2) |
1117 | |
1118 | /*========================================================== |
1119 | ** |
1120 | ** Declaration of structs. |
1121 | ** |
1122 | **========================================================== |
1123 | */ |
1124 | |
1125 | static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; |
1126 | |
1127 | struct tcb; |
1128 | struct lcb; |
1129 | struct ccb; |
1130 | struct ncb; |
1131 | struct script; |
1132 | |
1133 | struct link { |
1134 | ncrcmd l_cmd; |
1135 | ncrcmd l_paddr; |
1136 | }; |
1137 | |
1138 | struct usrcmd { |
1139 | u_long target; |
1140 | u_long lun; |
1141 | u_long data; |
1142 | u_long cmd; |
1143 | }; |
1144 | |
1145 | #define UC_SETSYNC 10 |
1146 | #define UC_SETTAGS 11 |
1147 | #define UC_SETDEBUG 12 |
1148 | #define UC_SETORDER 13 |
1149 | #define UC_SETWIDE 14 |
1150 | #define UC_SETFLAG 15 |
1151 | #define UC_SETVERBOSE 17 |
1152 | |
1153 | #define UF_TRACE (0x01) |
1154 | #define UF_NODISC (0x02) |
1155 | #define UF_NOSCAN (0x04) |
1156 | |
1157 | /*======================================================================== |
1158 | ** |
1159 | ** Declaration of structs: target control block |
1160 | ** |
1161 | **======================================================================== |
1162 | */ |
1163 | struct tcb { |
1164 | /*---------------------------------------------------------------- |
1165 | ** During reselection the ncr jumps to this point with SFBR |
1166 | ** set to the encoded target number with bit 7 set. |
1167 | ** if it's not this target, jump to the next. |
1168 | ** |
1169 | ** JUMP IF (SFBR != #target#), @(next tcb) |
1170 | **---------------------------------------------------------------- |
1171 | */ |
1172 | struct link jump_tcb; |
1173 | |
1174 | /*---------------------------------------------------------------- |
1175 | ** Load the actual values for the sxfer and the scntl3 |
1176 | ** register (sync/wide mode). |
1177 | ** |
1178 | ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) |
1179 | ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) |
1180 | **---------------------------------------------------------------- |
1181 | */ |
1182 | ncrcmd getscr[6]; |
1183 | |
1184 | /*---------------------------------------------------------------- |
1185 | ** Get the IDENTIFY message and load the LUN to SFBR. |
1186 | ** |
1187 | ** CALL, <RESEL_LUN> |
1188 | **---------------------------------------------------------------- |
1189 | */ |
1190 | struct link call_lun; |
1191 | |
1192 | /*---------------------------------------------------------------- |
1193 | ** Now look for the right lun. |
1194 | ** |
1195 | ** For i = 0 to 3 |
1196 | ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) |
1197 | ** |
1198 | ** Recent chips will prefetch the 4 JUMPS using only 1 burst. |
1199 | ** It is kind of hashcoding. |
1200 | **---------------------------------------------------------------- |
1201 | */ |
1202 | struct link jump_lcb[4]; /* JUMPs for reselection */ |
1203 | struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ |
1204 | |
1205 | /*---------------------------------------------------------------- |
1206 | ** Pointer to the ccb used for negotiation. |
1207 | ** Prevent from starting a negotiation for all queued commands |
1208 | ** when tagged command queuing is enabled. |
1209 | **---------------------------------------------------------------- |
1210 | */ |
1211 | struct ccb * nego_cp; |
1212 | |
1213 | /*---------------------------------------------------------------- |
1214 | ** statistical data |
1215 | **---------------------------------------------------------------- |
1216 | */ |
1217 | u_long transfers; |
1218 | u_long bytes; |
1219 | |
1220 | /*---------------------------------------------------------------- |
1221 | ** negotiation of wide and synch transfer and device quirks. |
1222 | **---------------------------------------------------------------- |
1223 | */ |
1224 | #ifdef SCSI_NCR_BIG_ENDIAN |
1225 | /*0*/ u16 period; |
1226 | /*2*/ u_char sval; |
1227 | /*3*/ u_char minsync; |
1228 | /*0*/ u_char wval; |
1229 | /*1*/ u_char widedone; |
1230 | /*2*/ u_char quirks; |
1231 | /*3*/ u_char maxoffs; |
1232 | #else |
1233 | /*0*/ u_char minsync; |
1234 | /*1*/ u_char sval; |
1235 | /*2*/ u16 period; |
1236 | /*0*/ u_char maxoffs; |
1237 | /*1*/ u_char quirks; |
1238 | /*2*/ u_char widedone; |
1239 | /*3*/ u_char wval; |
1240 | #endif |
1241 | |
1242 | /* User settable limits and options. */ |
1243 | u_char usrsync; |
1244 | u_char usrwide; |
1245 | u_char usrtags; |
1246 | u_char usrflag; |
1247 | struct scsi_target *starget; |
1248 | }; |
1249 | |
1250 | /*======================================================================== |
1251 | ** |
1252 | ** Declaration of structs: lun control block |
1253 | ** |
1254 | **======================================================================== |
1255 | */ |
1256 | struct lcb { |
1257 | /*---------------------------------------------------------------- |
1258 | ** During reselection the ncr jumps to this point |
1259 | ** with SFBR set to the "Identify" message. |
1260 | ** if it's not this lun, jump to the next. |
1261 | ** |
1262 | ** JUMP IF (SFBR != #lun#), @(next lcb of this target) |
1263 | ** |
1264 | ** It is this lun. Load TEMP with the nexus jumps table |
1265 | ** address and jump to RESEL_TAG (or RESEL_NOTAG). |
1266 | ** |
1267 | ** SCR_COPY (4), p_jump_ccb, TEMP, |
1268 | ** SCR_JUMP, <RESEL_TAG> |
1269 | **---------------------------------------------------------------- |
1270 | */ |
1271 | struct link jump_lcb; |
1272 | ncrcmd load_jump_ccb[3]; |
1273 | struct link jump_tag; |
1274 | ncrcmd p_jump_ccb; /* Jump table bus address */ |
1275 | |
1276 | /*---------------------------------------------------------------- |
1277 | ** Jump table used by the script processor to directly jump |
1278 | ** to the CCB corresponding to the reselected nexus. |
1279 | ** Address is allocated on 256 bytes boundary in order to |
1280 | ** allow 8 bit calculation of the tag jump entry for up to |
1281 | ** 64 possible tags. |
1282 | **---------------------------------------------------------------- |
1283 | */ |
1284 | u32 jump_ccb_0; /* Default table if no tags */ |
1285 | u32 *jump_ccb; /* Virtual address */ |
1286 | |
1287 | /*---------------------------------------------------------------- |
1288 | ** CCB queue management. |
1289 | **---------------------------------------------------------------- |
1290 | */ |
1291 | struct list_head free_ccbq; /* Queue of available CCBs */ |
1292 | struct list_head busy_ccbq; /* Queue of busy CCBs */ |
1293 | struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ |
1294 | struct list_head skip_ccbq; /* Queue of skipped CCBs */ |
1295 | u_char actccbs; /* Number of allocated CCBs */ |
1296 | u_char busyccbs; /* CCBs busy for this lun */ |
1297 | u_char queuedccbs; /* CCBs queued to the controller*/ |
1298 | u_char queuedepth; /* Queue depth for this lun */ |
1299 | u_char scdev_depth; /* SCSI device queue depth */ |
1300 | u_char maxnxs; /* Max possible nexuses */ |
1301 | |
1302 | /*---------------------------------------------------------------- |
1303 | ** Control of tagged command queuing. |
1304 | ** Tags allocation is performed using a circular buffer. |
1305 | ** This avoids using a loop for tag allocation. |
1306 | **---------------------------------------------------------------- |
1307 | */ |
1308 | u_char ia_tag; /* Allocation index */ |
1309 | u_char if_tag; /* Freeing index */ |
1310 | u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ |
1311 | u_char usetags; /* Command queuing is active */ |
1312 | u_char maxtags; /* Max nr of tags asked by user */ |
1313 | u_char numtags; /* Current number of tags */ |
1314 | |
1315 | /*---------------------------------------------------------------- |
1316 | ** QUEUE FULL control and ORDERED tag control. |
1317 | **---------------------------------------------------------------- |
1318 | */ |
1319 | /*---------------------------------------------------------------- |
1320 | ** QUEUE FULL and ORDERED tag control. |
1321 | **---------------------------------------------------------------- |
1322 | */ |
1323 | u16 num_good; /* Nr of GOOD since QUEUE FULL */ |
1324 | tagmap_t tags_umap; /* Used tags bitmap */ |
1325 | tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ |
1326 | u_long tags_stime; /* Last time we set smap=umap */ |
1327 | struct ccb * held_ccb; /* CCB held for QUEUE FULL */ |
1328 | }; |
1329 | |
1330 | /*======================================================================== |
1331 | ** |
1332 | ** Declaration of structs: the launch script. |
1333 | ** |
1334 | **======================================================================== |
1335 | ** |
1336 | ** It is part of the CCB and is called by the scripts processor to |
1337 | ** start or restart the data structure (nexus). |
1338 | ** This 6 DWORDs mini script makes use of prefetching. |
1339 | ** |
1340 | **------------------------------------------------------------------------ |
1341 | */ |
1342 | struct launch { |
1343 | /*---------------------------------------------------------------- |
1344 | ** SCR_COPY(4), @(p_phys), @(dsa register) |
1345 | ** SCR_JUMP, @(scheduler_point) |
1346 | **---------------------------------------------------------------- |
1347 | */ |
1348 | ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ |
1349 | struct link schedule; /* Jump to scheduler point */ |
1350 | ncrcmd p_phys; /* 'phys' header bus address */ |
1351 | }; |
1352 | |
1353 | /*======================================================================== |
1354 | ** |
1355 | ** Declaration of structs: global HEADER. |
1356 | ** |
1357 | **======================================================================== |
1358 | ** |
1359 | ** This substructure is copied from the ccb to a global address after |
1360 | ** selection (or reselection) and copied back before disconnect. |
1361 | ** |
1362 | ** These fields are accessible to the script processor. |
1363 | ** |
1364 | **------------------------------------------------------------------------ |
1365 | */ |
1366 | |
1367 | struct head { |
1368 | /*---------------------------------------------------------------- |
1369 | ** Saved data pointer. |
1370 | ** Points to the position in the script responsible for the |
1371 | ** actual transfer transfer of data. |
1372 | ** It's written after reception of a SAVE_DATA_POINTER message. |
1373 | ** The goalpointer points after the last transfer command. |
1374 | **---------------------------------------------------------------- |
1375 | */ |
1376 | u32 savep; |
1377 | u32 lastp; |
1378 | u32 goalp; |
1379 | |
1380 | /*---------------------------------------------------------------- |
1381 | ** Alternate data pointer. |
1382 | ** They are copied back to savep/lastp/goalp by the SCRIPTS |
1383 | ** when the direction is unknown and the device claims data out. |
1384 | **---------------------------------------------------------------- |
1385 | */ |
1386 | u32 wlastp; |
1387 | u32 wgoalp; |
1388 | |
1389 | /*---------------------------------------------------------------- |
1390 | ** The virtual address of the ccb containing this header. |
1391 | **---------------------------------------------------------------- |
1392 | */ |
1393 | struct ccb * cp; |
1394 | |
1395 | /*---------------------------------------------------------------- |
1396 | ** Status fields. |
1397 | **---------------------------------------------------------------- |
1398 | */ |
1399 | u_char scr_st[4]; /* script status */ |
1400 | u_char status[4]; /* host status. must be the */ |
1401 | /* last DWORD of the header. */ |
1402 | }; |
1403 | |
1404 | /* |
1405 | ** The status bytes are used by the host and the script processor. |
1406 | ** |
1407 | ** The byte corresponding to the host_status must be stored in the |
1408 | ** last DWORD of the CCB header since it is used for command |
1409 | ** completion (ncr_wakeup()). Doing so, we are sure that the header |
1410 | ** has been entirely copied back to the CCB when the host_status is |
1411 | ** seen complete by the CPU. |
1412 | ** |
1413 | ** The last four bytes (status[4]) are copied to the scratchb register |
1414 | ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, |
1415 | ** and copied back just after disconnecting. |
1416 | ** Inside the script the XX_REG are used. |
1417 | ** |
1418 | ** The first four bytes (scr_st[4]) are used inside the script by |
1419 | ** "COPY" commands. |
1420 | ** Because source and destination must have the same alignment |
1421 | ** in a DWORD, the fields HAVE to be at the chosen offsets. |
1422 | ** xerr_st 0 (0x34) scratcha |
1423 | ** sync_st 1 (0x05) sxfer |
1424 | ** wide_st 3 (0x03) scntl3 |
1425 | */ |
1426 | |
1427 | /* |
1428 | ** Last four bytes (script) |
1429 | */ |
1430 | #define QU_REG scr0 |
1431 | #define HS_REG scr1 |
1432 | #define HS_PRT nc_scr1 |
1433 | #define SS_REG scr2 |
1434 | #define SS_PRT nc_scr2 |
1435 | #define PS_REG scr3 |
1436 | |
1437 | /* |
1438 | ** Last four bytes (host) |
1439 | */ |
1440 | #ifdef SCSI_NCR_BIG_ENDIAN |
1441 | #define actualquirks phys.header.status[3] |
1442 | #define host_status phys.header.status[2] |
1443 | #define scsi_status phys.header.status[1] |
1444 | #define parity_status phys.header.status[0] |
1445 | #else |
1446 | #define actualquirks phys.header.status[0] |
1447 | #define host_status phys.header.status[1] |
1448 | #define scsi_status phys.header.status[2] |
1449 | #define parity_status phys.header.status[3] |
1450 | #endif |
1451 | |
1452 | /* |
1453 | ** First four bytes (script) |
1454 | */ |
1455 | #define xerr_st header.scr_st[0] |
1456 | #define sync_st header.scr_st[1] |
1457 | #define nego_st header.scr_st[2] |
1458 | #define wide_st header.scr_st[3] |
1459 | |
1460 | /* |
1461 | ** First four bytes (host) |
1462 | */ |
1463 | #define xerr_status phys.xerr_st |
1464 | #define nego_status phys.nego_st |
1465 | |
1466 | #if 0 |
1467 | #define sync_status phys.sync_st |
1468 | #define wide_status phys.wide_st |
1469 | #endif |
1470 | |
1471 | /*========================================================== |
1472 | ** |
1473 | ** Declaration of structs: Data structure block |
1474 | ** |
1475 | **========================================================== |
1476 | ** |
1477 | ** During execution of a ccb by the script processor, |
1478 | ** the DSA (data structure address) register points |
1479 | ** to this substructure of the ccb. |
1480 | ** This substructure contains the header with |
1481 | ** the script-processor-changeable data and |
1482 | ** data blocks for the indirect move commands. |
1483 | ** |
1484 | **---------------------------------------------------------- |
1485 | */ |
1486 | |
1487 | struct dsb { |
1488 | |
1489 | /* |
1490 | ** Header. |
1491 | */ |
1492 | |
1493 | struct head header; |
1494 | |
1495 | /* |
1496 | ** Table data for Script |
1497 | */ |
1498 | |
1499 | struct scr_tblsel select; |
1500 | struct scr_tblmove smsg ; |
1501 | struct scr_tblmove cmd ; |
1502 | struct scr_tblmove sense ; |
1503 | struct scr_tblmove data[MAX_SCATTER]; |
1504 | }; |
1505 | |
1506 | |
1507 | /*======================================================================== |
1508 | ** |
1509 | ** Declaration of structs: Command control block. |
1510 | ** |
1511 | **======================================================================== |
1512 | */ |
1513 | struct ccb { |
1514 | /*---------------------------------------------------------------- |
1515 | ** This is the data structure which is pointed by the DSA |
1516 | ** register when it is executed by the script processor. |
1517 | ** It must be the first entry because it contains the header |
1518 | ** as first entry that must be cache line aligned. |
1519 | **---------------------------------------------------------------- |
1520 | */ |
1521 | struct dsb phys; |
1522 | |
1523 | /*---------------------------------------------------------------- |
1524 | ** Mini-script used at CCB execution start-up. |
1525 | ** Load the DSA with the data structure address (phys) and |
1526 | ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. |
1527 | **---------------------------------------------------------------- |
1528 | */ |
1529 | struct launch start; |
1530 | |
1531 | /*---------------------------------------------------------------- |
1532 | ** Mini-script used at CCB relection to restart the nexus. |
1533 | ** Load the DSA with the data structure address (phys) and |
1534 | ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. |
1535 | **---------------------------------------------------------------- |
1536 | */ |
1537 | struct launch restart; |
1538 | |
1539 | /*---------------------------------------------------------------- |
1540 | ** If a data transfer phase is terminated too early |
1541 | ** (after reception of a message (i.e. DISCONNECT)), |
1542 | ** we have to prepare a mini script to transfer |
1543 | ** the rest of the data. |
1544 | **---------------------------------------------------------------- |
1545 | */ |
1546 | ncrcmd patch[8]; |
1547 | |
1548 | /*---------------------------------------------------------------- |
1549 | ** The general SCSI driver provides a |
1550 | ** pointer to a control block. |
1551 | **---------------------------------------------------------------- |
1552 | */ |
1553 | struct scsi_cmnd *cmd; /* SCSI command */ |
1554 | u_char cdb_buf[16]; /* Copy of CDB */ |
1555 | u_char sense_buf[64]; |
1556 | int data_len; /* Total data length */ |
1557 | |
1558 | /*---------------------------------------------------------------- |
1559 | ** Message areas. |
1560 | ** We prepare a message to be sent after selection. |
1561 | ** We may use a second one if the command is rescheduled |
1562 | ** due to GETCC or QFULL. |
1563 | ** Contents are IDENTIFY and SIMPLE_TAG. |
1564 | ** While negotiating sync or wide transfer, |
1565 | ** a SDTR or WDTR message is appended. |
1566 | **---------------------------------------------------------------- |
1567 | */ |
1568 | u_char scsi_smsg [8]; |
1569 | u_char scsi_smsg2[8]; |
1570 | |
1571 | /*---------------------------------------------------------------- |
1572 | ** Other fields. |
1573 | **---------------------------------------------------------------- |
1574 | */ |
1575 | u_long p_ccb; /* BUS address of this CCB */ |
1576 | u_char sensecmd[6]; /* Sense command */ |
1577 | u_char tag; /* Tag for this transfer */ |
1578 | /* 255 means no tag */ |
1579 | u_char target; |
1580 | u_char lun; |
1581 | u_char queued; |
1582 | u_char auto_sense; |
1583 | struct ccb * link_ccb; /* Host adapter CCB chain */ |
1584 | struct list_head link_ccbq; /* Link to unit CCB queue */ |
1585 | u32 startp; /* Initial data pointer */ |
1586 | u_long magic; /* Free / busy CCB flag */ |
1587 | }; |
1588 | |
1589 | #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) |
1590 | |
1591 | |
1592 | /*======================================================================== |
1593 | ** |
1594 | ** Declaration of structs: NCR device descriptor |
1595 | ** |
1596 | **======================================================================== |
1597 | */ |
1598 | struct ncb { |
1599 | /*---------------------------------------------------------------- |
1600 | ** The global header. |
1601 | ** It is accessible to both the host and the script processor. |
1602 | ** Must be cache line size aligned (32 for x86) in order to |
1603 | ** allow cache line bursting when it is copied to/from CCB. |
1604 | **---------------------------------------------------------------- |
1605 | */ |
1606 | struct head header; |
1607 | |
1608 | /*---------------------------------------------------------------- |
1609 | ** CCBs management queues. |
1610 | **---------------------------------------------------------------- |
1611 | */ |
1612 | struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ |
1613 | /* when lcb is not allocated. */ |
1614 | struct scsi_cmnd *done_list; /* Commands waiting for done() */ |
1615 | /* callback to be invoked. */ |
1616 | spinlock_t smp_lock; /* Lock for SMP threading */ |
1617 | |
1618 | /*---------------------------------------------------------------- |
1619 | ** Chip and controller indentification. |
1620 | **---------------------------------------------------------------- |
1621 | */ |
1622 | int unit; /* Unit number */ |
1623 | char inst_name[16]; /* ncb instance name */ |
1624 | |
1625 | /*---------------------------------------------------------------- |
1626 | ** Initial value of some IO register bits. |
1627 | ** These values are assumed to have been set by BIOS, and may |
1628 | ** be used for probing adapter implementation differences. |
1629 | **---------------------------------------------------------------- |
1630 | */ |
1631 | u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, |
1632 | sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; |
1633 | |
1634 | /*---------------------------------------------------------------- |
1635 | ** Actual initial value of IO register bits used by the |
1636 | ** driver. They are loaded at initialisation according to |
1637 | ** features that are to be enabled. |
1638 | **---------------------------------------------------------------- |
1639 | */ |
1640 | u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, |
1641 | rv_ctest4, rv_ctest5, rv_stest2; |
1642 | |
1643 | /*---------------------------------------------------------------- |
1644 | ** Targets management. |
1645 | ** During reselection the ncr jumps to jump_tcb. |
1646 | ** The SFBR register is loaded with the encoded target id. |
1647 | ** For i = 0 to 3 |
1648 | ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) |
1649 | ** |
1650 | ** Recent chips will prefetch the 4 JUMPS using only 1 burst. |
1651 | ** It is kind of hashcoding. |
1652 | **---------------------------------------------------------------- |
1653 | */ |
1654 | struct link jump_tcb[4]; /* JUMPs for reselection */ |
1655 | struct tcb target[MAX_TARGET]; /* Target data */ |
1656 | |
1657 | /*---------------------------------------------------------------- |
1658 | ** Virtual and physical bus addresses of the chip. |
1659 | **---------------------------------------------------------------- |
1660 | */ |
1661 | void __iomem *vaddr; /* Virtual and bus address of */ |
1662 | unsigned long paddr; /* chip's IO registers. */ |
1663 | unsigned long paddr2; /* On-chip RAM bus address. */ |
1664 | volatile /* Pointer to volatile for */ |
1665 | struct ncr_reg __iomem *reg; /* memory mapped IO. */ |
1666 | |
1667 | /*---------------------------------------------------------------- |
1668 | ** SCRIPTS virtual and physical bus addresses. |
1669 | ** 'script' is loaded in the on-chip RAM if present. |
1670 | ** 'scripth' stays in main memory. |
1671 | **---------------------------------------------------------------- |
1672 | */ |
1673 | struct script *script0; /* Copies of script and scripth */ |
1674 | struct scripth *scripth0; /* relocated for this ncb. */ |
1675 | struct scripth *scripth; /* Actual scripth virt. address */ |
1676 | u_long p_script; /* Actual script and scripth */ |
1677 | u_long p_scripth; /* bus addresses. */ |
1678 | |
1679 | /*---------------------------------------------------------------- |
1680 | ** General controller parameters and configuration. |
1681 | **---------------------------------------------------------------- |
1682 | */ |
1683 | struct device *dev; |
1684 | u_char revision_id; /* PCI device revision id */ |
1685 | u32 irq; /* IRQ level */ |
1686 | u32 features; /* Chip features map */ |
1687 | u_char myaddr; /* SCSI id of the adapter */ |
1688 | u_char maxburst; /* log base 2 of dwords burst */ |
1689 | u_char maxwide; /* Maximum transfer width */ |
1690 | u_char minsync; /* Minimum sync period factor */ |
1691 | u_char maxsync; /* Maximum sync period factor */ |
1692 | u_char maxoffs; /* Max scsi offset */ |
1693 | u_char multiplier; /* Clock multiplier (1,2,4) */ |
1694 | u_char clock_divn; /* Number of clock divisors */ |
1695 | u_long clock_khz; /* SCSI clock frequency in KHz */ |
1696 | |
1697 | /*---------------------------------------------------------------- |
1698 | ** Start queue management. |
1699 | ** It is filled up by the host processor and accessed by the |
1700 | ** SCRIPTS processor in order to start SCSI commands. |
1701 | **---------------------------------------------------------------- |
1702 | */ |
1703 | u16 squeueput; /* Next free slot of the queue */ |
1704 | u16 actccbs; /* Number of allocated CCBs */ |
1705 | u16 queuedccbs; /* Number of CCBs in start queue*/ |
1706 | u16 queuedepth; /* Start queue depth */ |
1707 | |
1708 | /*---------------------------------------------------------------- |
1709 | ** Timeout handler. |
1710 | **---------------------------------------------------------------- |
1711 | */ |
1712 | struct timer_list timer; /* Timer handler link header */ |
1713 | u_long lasttime; |
1714 | u_long settle_time; /* Resetting the SCSI BUS */ |
1715 | |
1716 | /*---------------------------------------------------------------- |
1717 | ** Debugging and profiling. |
1718 | **---------------------------------------------------------------- |
1719 | */ |
1720 | struct ncr_reg regdump; /* Register dump */ |
1721 | u_long regtime; /* Time it has been done */ |
1722 | |
1723 | /*---------------------------------------------------------------- |
1724 | ** Miscellaneous buffers accessed by the scripts-processor. |
1725 | ** They shall be DWORD aligned, because they may be read or |
1726 | ** written with a SCR_COPY script command. |
1727 | **---------------------------------------------------------------- |
1728 | */ |
1729 | u_char msgout[8]; /* Buffer for MESSAGE OUT */ |
1730 | u_char msgin [8]; /* Buffer for MESSAGE IN */ |
1731 | u32 lastmsg; /* Last SCSI message sent */ |
1732 | u_char scratch; /* Scratch for SCSI receive */ |
1733 | |
1734 | /*---------------------------------------------------------------- |
1735 | ** Miscellaneous configuration and status parameters. |
1736 | **---------------------------------------------------------------- |
1737 | */ |
1738 | u_char disc; /* Diconnection allowed */ |
1739 | u_char scsi_mode; /* Current SCSI BUS mode */ |
1740 | u_char order; /* Tag order to use */ |
1741 | u_char verbose; /* Verbosity for this controller*/ |
1742 | int ncr_cache; /* Used for cache test at init. */ |
1743 | u_long p_ncb; /* BUS address of this NCB */ |
1744 | |
1745 | /*---------------------------------------------------------------- |
1746 | ** Command completion handling. |
1747 | **---------------------------------------------------------------- |
1748 | */ |
1749 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
1750 | struct ccb *(ccb_done[MAX_DONE]); |
1751 | int ccb_done_ic; |
1752 | #endif |
1753 | /*---------------------------------------------------------------- |
1754 | ** Fields that should be removed or changed. |
1755 | **---------------------------------------------------------------- |
1756 | */ |
1757 | struct ccb *ccb; /* Global CCB */ |
1758 | struct usrcmd user; /* Command from user */ |
1759 | volatile u_char release_stage; /* Synchronisation stage on release */ |
1760 | }; |
1761 | |
1762 | #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) |
1763 | #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) |
1764 | |
1765 | /*========================================================== |
1766 | ** |
1767 | ** |
1768 | ** Script for NCR-Processor. |
1769 | ** |
1770 | ** Use ncr_script_fill() to create the variable parts. |
1771 | ** Use ncr_script_copy_and_bind() to make a copy and |
1772 | ** bind to physical addresses. |
1773 | ** |
1774 | ** |
1775 | **========================================================== |
1776 | ** |
1777 | ** We have to know the offsets of all labels before |
1778 | ** we reach them (for forward jumps). |
1779 | ** Therefore we declare a struct here. |
1780 | ** If you make changes inside the script, |
1781 | ** DONT FORGET TO CHANGE THE LENGTHS HERE! |
1782 | ** |
1783 | **---------------------------------------------------------- |
1784 | */ |
1785 | |
1786 | /* |
1787 | ** For HP Zalon/53c720 systems, the Zalon interface |
1788 | ** between CPU and 53c720 does prefetches, which causes |
1789 | ** problems with self modifying scripts. The problem |
1790 | ** is overcome by calling a dummy subroutine after each |
1791 | ** modification, to force a refetch of the script on |
1792 | ** return from the subroutine. |
1793 | */ |
1794 | |
1795 | #ifdef CONFIG_NCR53C8XX_PREFETCH |
1796 | #define PREFETCH_FLUSH_CNT 2 |
1797 | #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), |
1798 | #else |
1799 | #define PREFETCH_FLUSH_CNT 0 |
1800 | #define PREFETCH_FLUSH |
1801 | #endif |
1802 | |
1803 | /* |
1804 | ** Script fragments which are loaded into the on-chip RAM |
1805 | ** of 825A, 875 and 895 chips. |
1806 | */ |
1807 | struct script { |
1808 | ncrcmd start [ 5]; |
1809 | ncrcmd startpos [ 1]; |
1810 | ncrcmd select [ 6]; |
1811 | ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; |
1812 | ncrcmd loadpos [ 4]; |
1813 | ncrcmd send_ident [ 9]; |
1814 | ncrcmd prepare [ 6]; |
1815 | ncrcmd prepare2 [ 7]; |
1816 | ncrcmd command [ 6]; |
1817 | ncrcmd dispatch [ 32]; |
1818 | ncrcmd clrack [ 4]; |
1819 | ncrcmd no_data [ 17]; |
1820 | ncrcmd status [ 8]; |
1821 | ncrcmd msg_in [ 2]; |
1822 | ncrcmd msg_in2 [ 16]; |
1823 | ncrcmd msg_bad [ 4]; |
1824 | ncrcmd setmsg [ 7]; |
1825 | ncrcmd cleanup [ 6]; |
1826 | ncrcmd complete [ 9]; |
1827 | ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; |
1828 | ncrcmd cleanup0 [ 1]; |
1829 | #ifndef SCSI_NCR_CCB_DONE_SUPPORT |
1830 | ncrcmd signal [ 12]; |
1831 | #else |
1832 | ncrcmd signal [ 9]; |
1833 | ncrcmd done_pos [ 1]; |
1834 | ncrcmd done_plug [ 2]; |
1835 | ncrcmd done_end [ 7]; |
1836 | #endif |
1837 | ncrcmd save_dp [ 7]; |
1838 | ncrcmd restore_dp [ 5]; |
1839 | ncrcmd disconnect [ 10]; |
1840 | ncrcmd msg_out [ 9]; |
1841 | ncrcmd msg_out_done [ 7]; |
1842 | ncrcmd idle [ 2]; |
1843 | ncrcmd reselect [ 8]; |
1844 | ncrcmd reselected [ 8]; |
1845 | ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; |
1846 | ncrcmd loadpos1 [ 4]; |
1847 | ncrcmd resel_lun [ 6]; |
1848 | ncrcmd resel_tag [ 6]; |
1849 | ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; |
1850 | ncrcmd nexus_indirect [ 4]; |
1851 | ncrcmd resel_notag [ 4]; |
1852 | ncrcmd data_in [MAX_SCATTERL * 4]; |
1853 | ncrcmd data_in2 [ 4]; |
1854 | ncrcmd data_out [MAX_SCATTERL * 4]; |
1855 | ncrcmd data_out2 [ 4]; |
1856 | }; |
1857 | |
1858 | /* |
1859 | ** Script fragments which stay in main memory for all chips. |
1860 | */ |
1861 | struct scripth { |
1862 | ncrcmd tryloop [MAX_START*2]; |
1863 | ncrcmd tryloop2 [ 2]; |
1864 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
1865 | ncrcmd done_queue [MAX_DONE*5]; |
1866 | ncrcmd done_queue2 [ 2]; |
1867 | #endif |
1868 | ncrcmd select_no_atn [ 8]; |
1869 | ncrcmd cancel [ 4]; |
1870 | ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; |
1871 | ncrcmd skip2 [ 19]; |
1872 | ncrcmd par_err_data_in [ 6]; |
1873 | ncrcmd par_err_other [ 4]; |
1874 | ncrcmd msg_reject [ 8]; |
1875 | ncrcmd msg_ign_residue [ 24]; |
1876 | ncrcmd msg_extended [ 10]; |
1877 | ncrcmd msg_ext_2 [ 10]; |
1878 | ncrcmd msg_wdtr [ 14]; |
1879 | ncrcmd send_wdtr [ 7]; |
1880 | ncrcmd msg_ext_3 [ 10]; |
1881 | ncrcmd msg_sdtr [ 14]; |
1882 | ncrcmd send_sdtr [ 7]; |
1883 | ncrcmd nego_bad_phase [ 4]; |
1884 | ncrcmd msg_out_abort [ 10]; |
1885 | ncrcmd hdata_in [MAX_SCATTERH * 4]; |
1886 | ncrcmd hdata_in2 [ 2]; |
1887 | ncrcmd hdata_out [MAX_SCATTERH * 4]; |
1888 | ncrcmd hdata_out2 [ 2]; |
1889 | ncrcmd reset [ 4]; |
1890 | ncrcmd aborttag [ 4]; |
1891 | ncrcmd abort [ 2]; |
1892 | ncrcmd abort_resel [ 20]; |
1893 | ncrcmd resend_ident [ 4]; |
1894 | ncrcmd clratn_go_on [ 3]; |
1895 | ncrcmd nxtdsp_go_on [ 1]; |
1896 | ncrcmd sdata_in [ 8]; |
1897 | ncrcmd data_io [ 18]; |
1898 | ncrcmd bad_identify [ 12]; |
1899 | ncrcmd bad_i_t_l [ 4]; |
1900 | ncrcmd bad_i_t_l_q [ 4]; |
1901 | ncrcmd bad_target [ 8]; |
1902 | ncrcmd bad_status [ 8]; |
1903 | ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; |
1904 | ncrcmd start_ram0 [ 4]; |
1905 | ncrcmd sto_restart [ 5]; |
1906 | ncrcmd wait_dma [ 2]; |
1907 | ncrcmd snooptest [ 9]; |
1908 | ncrcmd snoopend [ 2]; |
1909 | }; |
1910 | |
1911 | /*========================================================== |
1912 | ** |
1913 | ** |
1914 | ** Function headers. |
1915 | ** |
1916 | ** |
1917 | **========================================================== |
1918 | */ |
1919 | |
1920 | static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); |
1921 | static void ncr_complete (struct ncb *np, struct ccb *cp); |
1922 | static void ncr_exception (struct ncb *np); |
1923 | static void ncr_free_ccb (struct ncb *np, struct ccb *cp); |
1924 | static void ncr_init_ccb (struct ncb *np, struct ccb *cp); |
1925 | static void ncr_init_tcb (struct ncb *np, u_char tn); |
1926 | static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); |
1927 | static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); |
1928 | static void ncr_getclock (struct ncb *np, int mult); |
1929 | static void ncr_selectclock (struct ncb *np, u_char scntl3); |
1930 | static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); |
1931 | static void ncr_chip_reset (struct ncb *np, int delay); |
1932 | static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); |
1933 | static int ncr_int_sbmc (struct ncb *np); |
1934 | static int ncr_int_par (struct ncb *np); |
1935 | static void ncr_int_ma (struct ncb *np); |
1936 | static void ncr_int_sir (struct ncb *np); |
1937 | static void ncr_int_sto (struct ncb *np); |
1938 | static void ncr_negotiate (struct ncb* np, struct tcb* tp); |
1939 | static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); |
1940 | |
1941 | static void ncr_script_copy_and_bind |
1942 | (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); |
1943 | static void ncr_script_fill (struct script * scr, struct scripth * scripth); |
1944 | static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); |
1945 | static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); |
1946 | static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); |
1947 | static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); |
1948 | static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); |
1949 | static int ncr_snooptest (struct ncb *np); |
1950 | static void ncr_timeout (struct ncb *np); |
1951 | static void ncr_wakeup (struct ncb *np, u_long code); |
1952 | static void ncr_wakeup_done (struct ncb *np); |
1953 | static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); |
1954 | static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); |
1955 | |
1956 | static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); |
1957 | static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd); |
1958 | static void process_waiting_list(struct ncb *np, int sts); |
1959 | |
1960 | #define remove_from_waiting_list(np, cmd) \ |
1961 | retrieve_from_waiting_list(1, (np), (cmd)) |
1962 | #define requeue_waiting_list(np) process_waiting_list((np), DID_OK) |
1963 | #define reset_waiting_list(np) process_waiting_list((np), DID_RESET) |
1964 | |
1965 | static inline char *ncr_name (struct ncb *np) |
1966 | { |
1967 | return np->inst_name; |
1968 | } |
1969 | |
1970 | |
1971 | /*========================================================== |
1972 | ** |
1973 | ** |
1974 | ** Scripts for NCR-Processor. |
1975 | ** |
1976 | ** Use ncr_script_bind for binding to physical addresses. |
1977 | ** |
1978 | ** |
1979 | **========================================================== |
1980 | ** |
1981 | ** NADDR generates a reference to a field of the controller data. |
1982 | ** PADDR generates a reference to another part of the script. |
1983 | ** RADDR generates a reference to a script processor register. |
1984 | ** FADDR generates a reference to a script processor register |
1985 | ** with offset. |
1986 | ** |
1987 | **---------------------------------------------------------- |
1988 | */ |
1989 | |
1990 | #define RELOC_SOFTC 0x40000000 |
1991 | #define RELOC_LABEL 0x50000000 |
1992 | #define RELOC_REGISTER 0x60000000 |
1993 | #if 0 |
1994 | #define RELOC_KVAR 0x70000000 |
1995 | #endif |
1996 | #define RELOC_LABELH 0x80000000 |
1997 | #define RELOC_MASK 0xf0000000 |
1998 | |
1999 | #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) |
2000 | #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) |
2001 | #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) |
2002 | #define RADDR(label) (RELOC_REGISTER | REG(label)) |
2003 | #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) |
2004 | #if 0 |
2005 | #define KVAR(which) (RELOC_KVAR | (which)) |
2006 | #endif |
2007 | |
2008 | #if 0 |
2009 | #define SCRIPT_KVAR_JIFFIES (0) |
2010 | #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES |
2011 | #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES |
2012 | /* |
2013 | * Kernel variables referenced in the scripts. |
2014 | * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY. |
2015 | */ |
2016 | static void *script_kvars[] __initdata = |
2017 | { (void *)&jiffies }; |
2018 | #endif |
2019 | |
2020 | static struct script script0 __initdata = { |
2021 | /*--------------------------< START >-----------------------*/ { |
2022 | /* |
2023 | ** This NOP will be patched with LED ON |
2024 | ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) |
2025 | */ |
2026 | SCR_NO_OP, |
2027 | 0, |
2028 | /* |
2029 | ** Clear SIGP. |
2030 | */ |
2031 | SCR_FROM_REG (ctest2), |
2032 | 0, |
2033 | /* |
2034 | ** Then jump to a certain point in tryloop. |
2035 | ** Due to the lack of indirect addressing the code |
2036 | ** is self modifying here. |
2037 | */ |
2038 | SCR_JUMP, |
2039 | }/*-------------------------< STARTPOS >--------------------*/,{ |
2040 | PADDRH(tryloop), |
2041 | |
2042 | }/*-------------------------< SELECT >----------------------*/,{ |
2043 | /* |
2044 | ** DSA contains the address of a scheduled |
2045 | ** data structure. |
2046 | ** |
2047 | ** SCRATCHA contains the address of the script, |
2048 | ** which starts the next entry. |
2049 | ** |
2050 | ** Set Initiator mode. |
2051 | ** |
2052 | ** (Target mode is left as an exercise for the reader) |
2053 | */ |
2054 | |
2055 | SCR_CLR (SCR_TRG), |
2056 | 0, |
2057 | SCR_LOAD_REG (HS_REG, HS_SELECTING), |
2058 | 0, |
2059 | |
2060 | /* |
2061 | ** And try to select this target. |
2062 | */ |
2063 | SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), |
2064 | PADDR (reselect), |
2065 | |
2066 | }/*-------------------------< SELECT2 >----------------------*/,{ |
2067 | /* |
2068 | ** Now there are 4 possibilities: |
2069 | ** |
2070 | ** (1) The ncr loses arbitration. |
2071 | ** This is ok, because it will try again, |
2072 | ** when the bus becomes idle. |
2073 | ** (But beware of the timeout function!) |
2074 | ** |
2075 | ** (2) The ncr is reselected. |
2076 | ** Then the script processor takes the jump |
2077 | ** to the RESELECT label. |
2078 | ** |
2079 | ** (3) The ncr wins arbitration. |
2080 | ** Then it will execute SCRIPTS instruction until |
2081 | ** the next instruction that checks SCSI phase. |
2082 | ** Then will stop and wait for selection to be |
2083 | ** complete or selection time-out to occur. |
2084 | ** As a result the SCRIPTS instructions until |
2085 | ** LOADPOS + 2 should be executed in parallel with |
2086 | ** the SCSI core performing selection. |
2087 | */ |
2088 | |
2089 | /* |
2090 | ** The MESSAGE_REJECT problem seems to be due to a selection |
2091 | ** timing problem. |
2092 | ** Wait immediately for the selection to complete. |
2093 | ** (2.5x behaves so) |
2094 | */ |
2095 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
2096 | 0, |
2097 | |
2098 | /* |
2099 | ** Next time use the next slot. |
2100 | */ |
2101 | SCR_COPY (4), |
2102 | RADDR (temp), |
2103 | PADDR (startpos), |
2104 | /* |
2105 | ** The ncr doesn't have an indirect load |
2106 | ** or store command. So we have to |
2107 | ** copy part of the control block to a |
2108 | ** fixed place, where we can access it. |
2109 | ** |
2110 | ** We patch the address part of a |
2111 | ** COPY command with the DSA-register. |
2112 | */ |
2113 | SCR_COPY_F (4), |
2114 | RADDR (dsa), |
2115 | PADDR (loadpos), |
2116 | /* |
2117 | ** Flush script prefetch if required |
2118 | */ |
2119 | PREFETCH_FLUSH |
2120 | /* |
2121 | ** then we do the actual copy. |
2122 | */ |
2123 | SCR_COPY (sizeof (struct head)), |
2124 | /* |
2125 | ** continued after the next label ... |
2126 | */ |
2127 | }/*-------------------------< LOADPOS >---------------------*/,{ |
2128 | 0, |
2129 | NADDR (header), |
2130 | /* |
2131 | ** Wait for the next phase or the selection |
2132 | ** to complete or time-out. |
2133 | */ |
2134 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
2135 | PADDR (prepare), |
2136 | |
2137 | }/*-------------------------< SEND_IDENT >----------------------*/,{ |
2138 | /* |
2139 | ** Selection complete. |
2140 | ** Send the IDENTIFY and SIMPLE_TAG messages |
2141 | ** (and the EXTENDED_SDTR message) |
2142 | */ |
2143 | SCR_MOVE_TBL ^ SCR_MSG_OUT, |
2144 | offsetof (struct dsb, smsg), |
2145 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), |
2146 | PADDRH (resend_ident), |
2147 | SCR_LOAD_REG (scratcha, 0x80), |
2148 | 0, |
2149 | SCR_COPY (1), |
2150 | RADDR (scratcha), |
2151 | NADDR (lastmsg), |
2152 | }/*-------------------------< PREPARE >----------------------*/,{ |
2153 | /* |
2154 | ** load the savep (saved pointer) into |
2155 | ** the TEMP register (actual pointer) |
2156 | */ |
2157 | SCR_COPY (4), |
2158 | NADDR (header.savep), |
2159 | RADDR (temp), |
2160 | /* |
2161 | ** Initialize the status registers |
2162 | */ |
2163 | SCR_COPY (4), |
2164 | NADDR (header.status), |
2165 | RADDR (scr0), |
2166 | }/*-------------------------< PREPARE2 >---------------------*/,{ |
2167 | /* |
2168 | ** Initialize the msgout buffer with a NOOP message. |
2169 | */ |
2170 | SCR_LOAD_REG (scratcha, NOP), |
2171 | 0, |
2172 | SCR_COPY (1), |
2173 | RADDR (scratcha), |
2174 | NADDR (msgout), |
2175 | #if 0 |
2176 | SCR_COPY (1), |
2177 | RADDR (scratcha), |
2178 | NADDR (msgin), |
2179 | #endif |
2180 | /* |
2181 | ** Anticipate the COMMAND phase. |
2182 | ** This is the normal case for initial selection. |
2183 | */ |
2184 | SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), |
2185 | PADDR (dispatch), |
2186 | |
2187 | }/*-------------------------< COMMAND >--------------------*/,{ |
2188 | /* |
2189 | ** ... and send the command |
2190 | */ |
2191 | SCR_MOVE_TBL ^ SCR_COMMAND, |
2192 | offsetof (struct dsb, cmd), |
2193 | /* |
2194 | ** If status is still HS_NEGOTIATE, negotiation failed. |
2195 | ** We check this here, since we want to do that |
2196 | ** only once. |
2197 | */ |
2198 | SCR_FROM_REG (HS_REG), |
2199 | 0, |
2200 | SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), |
2201 | SIR_NEGO_FAILED, |
2202 | |
2203 | }/*-----------------------< DISPATCH >----------------------*/,{ |
2204 | /* |
2205 | ** MSG_IN is the only phase that shall be |
2206 | ** entered at least once for each (re)selection. |
2207 | ** So we test it first. |
2208 | */ |
2209 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), |
2210 | PADDR (msg_in), |
2211 | |
2212 | SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), |
2213 | 0, |
2214 | /* |
2215 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4. |
2216 | ** Possible data corruption during Memory Write and Invalidate. |
2217 | ** This work-around resets the addressing logic prior to the |
2218 | ** start of the first MOVE of a DATA IN phase. |
2219 | ** (See Documentation/scsi/ncr53c8xx.txt for more information) |
2220 | */ |
2221 | SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), |
2222 | 20, |
2223 | SCR_COPY (4), |
2224 | RADDR (scratcha), |
2225 | RADDR (scratcha), |
2226 | SCR_RETURN, |
2227 | 0, |
2228 | SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), |
2229 | PADDR (status), |
2230 | SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), |
2231 | PADDR (command), |
2232 | SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), |
2233 | PADDR (msg_out), |
2234 | /* |
2235 | ** Discard one illegal phase byte, if required. |
2236 | */ |
2237 | SCR_LOAD_REG (scratcha, XE_BAD_PHASE), |
2238 | 0, |
2239 | SCR_COPY (1), |
2240 | RADDR (scratcha), |
2241 | NADDR (xerr_st), |
2242 | SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), |
2243 | 8, |
2244 | SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, |
2245 | NADDR (scratch), |
2246 | SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), |
2247 | 8, |
2248 | SCR_MOVE_ABS (1) ^ SCR_ILG_IN, |
2249 | NADDR (scratch), |
2250 | SCR_JUMP, |
2251 | PADDR (dispatch), |
2252 | |
2253 | }/*-------------------------< CLRACK >----------------------*/,{ |
2254 | /* |
2255 | ** Terminate possible pending message phase. |
2256 | */ |
2257 | SCR_CLR (SCR_ACK), |
2258 | 0, |
2259 | SCR_JUMP, |
2260 | PADDR (dispatch), |
2261 | |
2262 | }/*-------------------------< NO_DATA >--------------------*/,{ |
2263 | /* |
2264 | ** The target wants to tranfer too much data |
2265 | ** or in the wrong direction. |
2266 | ** Remember that in extended error. |
2267 | */ |
2268 | SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), |
2269 | 0, |
2270 | SCR_COPY (1), |
2271 | RADDR (scratcha), |
2272 | NADDR (xerr_st), |
2273 | /* |
2274 | ** Discard one data byte, if required. |
2275 | */ |
2276 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
2277 | 8, |
2278 | SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, |
2279 | NADDR (scratch), |
2280 | SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), |
2281 | 8, |
2282 | SCR_MOVE_ABS (1) ^ SCR_DATA_IN, |
2283 | NADDR (scratch), |
2284 | /* |
2285 | ** .. and repeat as required. |
2286 | */ |
2287 | SCR_CALL, |
2288 | PADDR (dispatch), |
2289 | SCR_JUMP, |
2290 | PADDR (no_data), |
2291 | |
2292 | }/*-------------------------< STATUS >--------------------*/,{ |
2293 | /* |
2294 | ** get the status |
2295 | */ |
2296 | SCR_MOVE_ABS (1) ^ SCR_STATUS, |
2297 | NADDR (scratch), |
2298 | /* |
2299 | ** save status to scsi_status. |
2300 | ** mark as complete. |
2301 | */ |
2302 | SCR_TO_REG (SS_REG), |
2303 | 0, |
2304 | SCR_LOAD_REG (HS_REG, HS_COMPLETE), |
2305 | 0, |
2306 | SCR_JUMP, |
2307 | PADDR (dispatch), |
2308 | }/*-------------------------< MSG_IN >--------------------*/,{ |
2309 | /* |
2310 | ** Get the first byte of the message |
2311 | ** and save it to SCRATCHA. |
2312 | ** |
2313 | ** The script processor doesn't negate the |
2314 | ** ACK signal after this transfer. |
2315 | */ |
2316 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2317 | NADDR (msgin[0]), |
2318 | }/*-------------------------< MSG_IN2 >--------------------*/,{ |
2319 | /* |
2320 | ** Handle this message. |
2321 | */ |
2322 | SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), |
2323 | PADDR (complete), |
2324 | SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), |
2325 | PADDR (disconnect), |
2326 | SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), |
2327 | PADDR (save_dp), |
2328 | SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), |
2329 | PADDR (restore_dp), |
2330 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), |
2331 | PADDRH (msg_extended), |
2332 | SCR_JUMP ^ IFTRUE (DATA (NOP)), |
2333 | PADDR (clrack), |
2334 | SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), |
2335 | PADDRH (msg_reject), |
2336 | SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), |
2337 | PADDRH (msg_ign_residue), |
2338 | /* |
2339 | ** Rest of the messages left as |
2340 | ** an exercise ... |
2341 | ** |
2342 | ** Unimplemented messages: |
2343 | ** fall through to MSG_BAD. |
2344 | */ |
2345 | }/*-------------------------< MSG_BAD >------------------*/,{ |
2346 | /* |
2347 | ** unimplemented message - reject it. |
2348 | */ |
2349 | SCR_INT, |
2350 | SIR_REJECT_SENT, |
2351 | SCR_LOAD_REG (scratcha, MESSAGE_REJECT), |
2352 | 0, |
2353 | }/*-------------------------< SETMSG >----------------------*/,{ |
2354 | SCR_COPY (1), |
2355 | RADDR (scratcha), |
2356 | NADDR (msgout), |
2357 | SCR_SET (SCR_ATN), |
2358 | 0, |
2359 | SCR_JUMP, |
2360 | PADDR (clrack), |
2361 | }/*-------------------------< CLEANUP >-------------------*/,{ |
2362 | /* |
2363 | ** dsa: Pointer to ccb |
2364 | ** or xxxxxxFF (no ccb) |
2365 | ** |
2366 | ** HS_REG: Host-Status (<>0!) |
2367 | */ |
2368 | SCR_FROM_REG (dsa), |
2369 | 0, |
2370 | SCR_JUMP ^ IFTRUE (DATA (0xff)), |
2371 | PADDR (start), |
2372 | /* |
2373 | ** dsa is valid. |
2374 | ** complete the cleanup. |
2375 | */ |
2376 | SCR_JUMP, |
2377 | PADDR (cleanup_ok), |
2378 | |
2379 | }/*-------------------------< COMPLETE >-----------------*/,{ |
2380 | /* |
2381 | ** Complete message. |
2382 | ** |
2383 | ** Copy TEMP register to LASTP in header. |
2384 | */ |
2385 | SCR_COPY (4), |
2386 | RADDR (temp), |
2387 | NADDR (header.lastp), |
2388 | /* |
2389 | ** When we terminate the cycle by clearing ACK, |
2390 | ** the target may disconnect immediately. |
2391 | ** |
2392 | ** We don't want to be told of an |
2393 | ** "unexpected disconnect", |
2394 | ** so we disable this feature. |
2395 | */ |
2396 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
2397 | 0, |
2398 | /* |
2399 | ** Terminate cycle ... |
2400 | */ |
2401 | SCR_CLR (SCR_ACK|SCR_ATN), |
2402 | 0, |
2403 | /* |
2404 | ** ... and wait for the disconnect. |
2405 | */ |
2406 | SCR_WAIT_DISC, |
2407 | 0, |
2408 | }/*-------------------------< CLEANUP_OK >----------------*/,{ |
2409 | /* |
2410 | ** Save host status to header. |
2411 | */ |
2412 | SCR_COPY (4), |
2413 | RADDR (scr0), |
2414 | NADDR (header.status), |
2415 | /* |
2416 | ** and copy back the header to the ccb. |
2417 | */ |
2418 | SCR_COPY_F (4), |
2419 | RADDR (dsa), |
2420 | PADDR (cleanup0), |
2421 | /* |
2422 | ** Flush script prefetch if required |
2423 | */ |
2424 | PREFETCH_FLUSH |
2425 | SCR_COPY (sizeof (struct head)), |
2426 | NADDR (header), |
2427 | }/*-------------------------< CLEANUP0 >--------------------*/,{ |
2428 | 0, |
2429 | }/*-------------------------< SIGNAL >----------------------*/,{ |
2430 | /* |
2431 | ** if job not completed ... |
2432 | */ |
2433 | SCR_FROM_REG (HS_REG), |
2434 | 0, |
2435 | /* |
2436 | ** ... start the next command. |
2437 | */ |
2438 | SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), |
2439 | PADDR(start), |
2440 | /* |
2441 | ** If command resulted in not GOOD status, |
2442 | ** call the C code if needed. |
2443 | */ |
2444 | SCR_FROM_REG (SS_REG), |
2445 | 0, |
2446 | SCR_CALL ^ IFFALSE (DATA (S_GOOD)), |
2447 | PADDRH (bad_status), |
2448 | |
2449 | #ifndef SCSI_NCR_CCB_DONE_SUPPORT |
2450 | |
2451 | /* |
2452 | ** ... signal completion to the host |
2453 | */ |
2454 | SCR_INT, |
2455 | SIR_INTFLY, |
2456 | /* |
2457 | ** Auf zu neuen Schandtaten! |
2458 | */ |
2459 | SCR_JUMP, |
2460 | PADDR(start), |
2461 | |
2462 | #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ |
2463 | |
2464 | /* |
2465 | ** ... signal completion to the host |
2466 | */ |
2467 | SCR_JUMP, |
2468 | }/*------------------------< DONE_POS >---------------------*/,{ |
2469 | PADDRH (done_queue), |
2470 | }/*------------------------< DONE_PLUG >--------------------*/,{ |
2471 | SCR_INT, |
2472 | SIR_DONE_OVERFLOW, |
2473 | }/*------------------------< DONE_END >---------------------*/,{ |
2474 | SCR_INT, |
2475 | SIR_INTFLY, |
2476 | SCR_COPY (4), |
2477 | RADDR (temp), |
2478 | PADDR (done_pos), |
2479 | SCR_JUMP, |
2480 | PADDR (start), |
2481 | |
2482 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
2483 | |
2484 | }/*-------------------------< SAVE_DP >------------------*/,{ |
2485 | /* |
2486 | ** SAVE_DP message: |
2487 | ** Copy TEMP register to SAVEP in header. |
2488 | */ |
2489 | SCR_COPY (4), |
2490 | RADDR (temp), |
2491 | NADDR (header.savep), |
2492 | SCR_CLR (SCR_ACK), |
2493 | 0, |
2494 | SCR_JUMP, |
2495 | PADDR (dispatch), |
2496 | }/*-------------------------< RESTORE_DP >---------------*/,{ |
2497 | /* |
2498 | ** RESTORE_DP message: |
2499 | ** Copy SAVEP in header to TEMP register. |
2500 | */ |
2501 | SCR_COPY (4), |
2502 | NADDR (header.savep), |
2503 | RADDR (temp), |
2504 | SCR_JUMP, |
2505 | PADDR (clrack), |
2506 | |
2507 | }/*-------------------------< DISCONNECT >---------------*/,{ |
2508 | /* |
2509 | ** DISCONNECTing ... |
2510 | ** |
2511 | ** disable the "unexpected disconnect" feature, |
2512 | ** and remove the ACK signal. |
2513 | */ |
2514 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
2515 | 0, |
2516 | SCR_CLR (SCR_ACK|SCR_ATN), |
2517 | 0, |
2518 | /* |
2519 | ** Wait for the disconnect. |
2520 | */ |
2521 | SCR_WAIT_DISC, |
2522 | 0, |
2523 | /* |
2524 | ** Status is: DISCONNECTED. |
2525 | */ |
2526 | SCR_LOAD_REG (HS_REG, HS_DISCONNECT), |
2527 | 0, |
2528 | SCR_JUMP, |
2529 | PADDR (cleanup_ok), |
2530 | |
2531 | }/*-------------------------< MSG_OUT >-------------------*/,{ |
2532 | /* |
2533 | ** The target requests a message. |
2534 | */ |
2535 | SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, |
2536 | NADDR (msgout), |
2537 | SCR_COPY (1), |
2538 | NADDR (msgout), |
2539 | NADDR (lastmsg), |
2540 | /* |
2541 | ** If it was no ABORT message ... |
2542 | */ |
2543 | SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), |
2544 | PADDRH (msg_out_abort), |
2545 | /* |
2546 | ** ... wait for the next phase |
2547 | ** if it's a message out, send it again, ... |
2548 | */ |
2549 | SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), |
2550 | PADDR (msg_out), |
2551 | }/*-------------------------< MSG_OUT_DONE >--------------*/,{ |
2552 | /* |
2553 | ** ... else clear the message ... |
2554 | */ |
2555 | SCR_LOAD_REG (scratcha, NOP), |
2556 | 0, |
2557 | SCR_COPY (4), |
2558 | RADDR (scratcha), |
2559 | NADDR (msgout), |
2560 | /* |
2561 | ** ... and process the next phase |
2562 | */ |
2563 | SCR_JUMP, |
2564 | PADDR (dispatch), |
2565 | }/*-------------------------< IDLE >------------------------*/,{ |
2566 | /* |
2567 | ** Nothing to do? |
2568 | ** Wait for reselect. |
2569 | ** This NOP will be patched with LED OFF |
2570 | ** SCR_REG_REG (gpreg, SCR_OR, 0x01) |
2571 | */ |
2572 | SCR_NO_OP, |
2573 | 0, |
2574 | }/*-------------------------< RESELECT >--------------------*/,{ |
2575 | /* |
2576 | ** make the DSA invalid. |
2577 | */ |
2578 | SCR_LOAD_REG (dsa, 0xff), |
2579 | 0, |
2580 | SCR_CLR (SCR_TRG), |
2581 | 0, |
2582 | SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), |
2583 | 0, |
2584 | /* |
2585 | ** Sleep waiting for a reselection. |
2586 | ** If SIGP is set, special treatment. |
2587 | ** |
2588 | ** Zu allem bereit .. |
2589 | */ |
2590 | SCR_WAIT_RESEL, |
2591 | PADDR(start), |
2592 | }/*-------------------------< RESELECTED >------------------*/,{ |
2593 | /* |
2594 | ** This NOP will be patched with LED ON |
2595 | ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) |
2596 | */ |
2597 | SCR_NO_OP, |
2598 | 0, |
2599 | /* |
2600 | ** ... zu nichts zu gebrauchen ? |
2601 | ** |
2602 | ** load the target id into the SFBR |
2603 | ** and jump to the control block. |
2604 | ** |
2605 | ** Look at the declarations of |
2606 | ** - struct ncb |
2607 | ** - struct tcb |
2608 | ** - struct lcb |
2609 | ** - struct ccb |
2610 | ** to understand what's going on. |
2611 | */ |
2612 | SCR_REG_SFBR (ssid, SCR_AND, 0x8F), |
2613 | 0, |
2614 | SCR_TO_REG (sdid), |
2615 | 0, |
2616 | SCR_JUMP, |
2617 | NADDR (jump_tcb), |
2618 | |
2619 | }/*-------------------------< RESEL_DSA >-------------------*/,{ |
2620 | /* |
2621 | ** Ack the IDENTIFY or TAG previously received. |
2622 | */ |
2623 | SCR_CLR (SCR_ACK), |
2624 | 0, |
2625 | /* |
2626 | ** The ncr doesn't have an indirect load |
2627 | ** or store command. So we have to |
2628 | ** copy part of the control block to a |
2629 | ** fixed place, where we can access it. |
2630 | ** |
2631 | ** We patch the address part of a |
2632 | ** COPY command with the DSA-register. |
2633 | */ |
2634 | SCR_COPY_F (4), |
2635 | RADDR (dsa), |
2636 | PADDR (loadpos1), |
2637 | /* |
2638 | ** Flush script prefetch if required |
2639 | */ |
2640 | PREFETCH_FLUSH |
2641 | /* |
2642 | ** then we do the actual copy. |
2643 | */ |
2644 | SCR_COPY (sizeof (struct head)), |
2645 | /* |
2646 | ** continued after the next label ... |
2647 | */ |
2648 | |
2649 | }/*-------------------------< LOADPOS1 >-------------------*/,{ |
2650 | 0, |
2651 | NADDR (header), |
2652 | /* |
2653 | ** The DSA contains the data structure address. |
2654 | */ |
2655 | SCR_JUMP, |
2656 | PADDR (prepare), |
2657 | |
2658 | }/*-------------------------< RESEL_LUN >-------------------*/,{ |
2659 | /* |
2660 | ** come back to this point |
2661 | ** to get an IDENTIFY message |
2662 | ** Wait for a msg_in phase. |
2663 | */ |
2664 | SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2665 | SIR_RESEL_NO_MSG_IN, |
2666 | /* |
2667 | ** message phase. |
2668 | ** Read the data directly from the BUS DATA lines. |
2669 | ** This helps to support very old SCSI devices that |
2670 | ** may reselect without sending an IDENTIFY. |
2671 | */ |
2672 | SCR_FROM_REG (sbdl), |
2673 | 0, |
2674 | /* |
2675 | ** It should be an Identify message. |
2676 | */ |
2677 | SCR_RETURN, |
2678 | 0, |
2679 | }/*-------------------------< RESEL_TAG >-------------------*/,{ |
2680 | /* |
2681 | ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. |
2682 | ** Agressive optimization, is'nt it? |
2683 | ** No need to test the SIMPLE TAG message, since the |
2684 | ** driver only supports conformant devices for tags. ;-) |
2685 | */ |
2686 | SCR_MOVE_ABS (3) ^ SCR_MSG_IN, |
2687 | NADDR (msgin), |
2688 | /* |
2689 | ** Read the TAG from the SIDL. |
2690 | ** Still an aggressive optimization. ;-) |
2691 | ** Compute the CCB indirect jump address which |
2692 | ** is (#TAG*2 & 0xfc) due to tag numbering using |
2693 | ** 1,3,5..MAXTAGS*2+1 actual values. |
2694 | */ |
2695 | SCR_REG_SFBR (sidl, SCR_SHL, 0), |
2696 | 0, |
2697 | SCR_SFBR_REG (temp, SCR_AND, 0xfc), |
2698 | 0, |
2699 | }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ |
2700 | SCR_COPY_F (4), |
2701 | RADDR (temp), |
2702 | PADDR (nexus_indirect), |
2703 | /* |
2704 | ** Flush script prefetch if required |
2705 | */ |
2706 | PREFETCH_FLUSH |
2707 | SCR_COPY (4), |
2708 | }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ |
2709 | 0, |
2710 | RADDR (temp), |
2711 | SCR_RETURN, |
2712 | 0, |
2713 | }/*-------------------------< RESEL_NOTAG >-------------------*/,{ |
2714 | /* |
2715 | ** No tag expected. |
2716 | ** Read an throw away the IDENTIFY. |
2717 | */ |
2718 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2719 | NADDR (msgin), |
2720 | SCR_JUMP, |
2721 | PADDR (jump_to_nexus), |
2722 | }/*-------------------------< DATA_IN >--------------------*/,{ |
2723 | /* |
2724 | ** Because the size depends on the |
2725 | ** #define MAX_SCATTERL parameter, |
2726 | ** it is filled in at runtime. |
2727 | ** |
2728 | ** ##===========< i=0; i<MAX_SCATTERL >========= |
2729 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
2730 | ** || PADDR (dispatch), |
2731 | ** || SCR_MOVE_TBL ^ SCR_DATA_IN, |
2732 | ** || offsetof (struct dsb, data[ i]), |
2733 | ** ##========================================== |
2734 | ** |
2735 | **--------------------------------------------------------- |
2736 | */ |
2737 | 0 |
2738 | }/*-------------------------< DATA_IN2 >-------------------*/,{ |
2739 | SCR_CALL, |
2740 | PADDR (dispatch), |
2741 | SCR_JUMP, |
2742 | PADDR (no_data), |
2743 | }/*-------------------------< DATA_OUT >--------------------*/,{ |
2744 | /* |
2745 | ** Because the size depends on the |
2746 | ** #define MAX_SCATTERL parameter, |
2747 | ** it is filled in at runtime. |
2748 | ** |
2749 | ** ##===========< i=0; i<MAX_SCATTERL >========= |
2750 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
2751 | ** || PADDR (dispatch), |
2752 | ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, |
2753 | ** || offsetof (struct dsb, data[ i]), |
2754 | ** ##========================================== |
2755 | ** |
2756 | **--------------------------------------------------------- |
2757 | */ |
2758 | 0 |
2759 | }/*-------------------------< DATA_OUT2 >-------------------*/,{ |
2760 | SCR_CALL, |
2761 | PADDR (dispatch), |
2762 | SCR_JUMP, |
2763 | PADDR (no_data), |
2764 | }/*--------------------------------------------------------*/ |
2765 | }; |
2766 | |
2767 | static struct scripth scripth0 __initdata = { |
2768 | /*-------------------------< TRYLOOP >---------------------*/{ |
2769 | /* |
2770 | ** Start the next entry. |
2771 | ** Called addresses point to the launch script in the CCB. |
2772 | ** They are patched by the main processor. |
2773 | ** |
2774 | ** Because the size depends on the |
2775 | ** #define MAX_START parameter, it is filled |
2776 | ** in at runtime. |
2777 | ** |
2778 | **----------------------------------------------------------- |
2779 | ** |
2780 | ** ##===========< I=0; i<MAX_START >=========== |
2781 | ** || SCR_CALL, |
2782 | ** || PADDR (idle), |
2783 | ** ##========================================== |
2784 | ** |
2785 | **----------------------------------------------------------- |
2786 | */ |
2787 | 0 |
2788 | }/*------------------------< TRYLOOP2 >---------------------*/,{ |
2789 | SCR_JUMP, |
2790 | PADDRH(tryloop), |
2791 | |
2792 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
2793 | |
2794 | }/*------------------------< DONE_QUEUE >-------------------*/,{ |
2795 | /* |
2796 | ** Copy the CCB address to the next done entry. |
2797 | ** Because the size depends on the |
2798 | ** #define MAX_DONE parameter, it is filled |
2799 | ** in at runtime. |
2800 | ** |
2801 | **----------------------------------------------------------- |
2802 | ** |
2803 | ** ##===========< I=0; i<MAX_DONE >=========== |
2804 | ** || SCR_COPY (sizeof(struct ccb *), |
2805 | ** || NADDR (header.cp), |
2806 | ** || NADDR (ccb_done[i]), |
2807 | ** || SCR_CALL, |
2808 | ** || PADDR (done_end), |
2809 | ** ##========================================== |
2810 | ** |
2811 | **----------------------------------------------------------- |
2812 | */ |
2813 | 0 |
2814 | }/*------------------------< DONE_QUEUE2 >------------------*/,{ |
2815 | SCR_JUMP, |
2816 | PADDRH (done_queue), |
2817 | |
2818 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
2819 | }/*------------------------< SELECT_NO_ATN >-----------------*/,{ |
2820 | /* |
2821 | ** Set Initiator mode. |
2822 | ** And try to select this target without ATN. |
2823 | */ |
2824 | |
2825 | SCR_CLR (SCR_TRG), |
2826 | 0, |
2827 | SCR_LOAD_REG (HS_REG, HS_SELECTING), |
2828 | 0, |
2829 | SCR_SEL_TBL ^ offsetof (struct dsb, select), |
2830 | PADDR (reselect), |
2831 | SCR_JUMP, |
2832 | PADDR (select2), |
2833 | |
2834 | }/*-------------------------< CANCEL >------------------------*/,{ |
2835 | |
2836 | SCR_LOAD_REG (scratcha, HS_ABORTED), |
2837 | 0, |
2838 | SCR_JUMPR, |
2839 | 8, |
2840 | }/*-------------------------< SKIP >------------------------*/,{ |
2841 | SCR_LOAD_REG (scratcha, 0), |
2842 | 0, |
2843 | /* |
2844 | ** This entry has been canceled. |
2845 | ** Next time use the next slot. |
2846 | */ |
2847 | SCR_COPY (4), |
2848 | RADDR (temp), |
2849 | PADDR (startpos), |
2850 | /* |
2851 | ** The ncr doesn't have an indirect load |
2852 | ** or store command. So we have to |
2853 | ** copy part of the control block to a |
2854 | ** fixed place, where we can access it. |
2855 | ** |
2856 | ** We patch the address part of a |
2857 | ** COPY command with the DSA-register. |
2858 | */ |
2859 | SCR_COPY_F (4), |
2860 | RADDR (dsa), |
2861 | PADDRH (skip2), |
2862 | /* |
2863 | ** Flush script prefetch if required |
2864 | */ |
2865 | PREFETCH_FLUSH |
2866 | /* |
2867 | ** then we do the actual copy. |
2868 | */ |
2869 | SCR_COPY (sizeof (struct head)), |
2870 | /* |
2871 | ** continued after the next label ... |
2872 | */ |
2873 | }/*-------------------------< SKIP2 >---------------------*/,{ |
2874 | 0, |
2875 | NADDR (header), |
2876 | /* |
2877 | ** Initialize the status registers |
2878 | */ |
2879 | SCR_COPY (4), |
2880 | NADDR (header.status), |
2881 | RADDR (scr0), |
2882 | /* |
2883 | ** Force host status. |
2884 | */ |
2885 | SCR_FROM_REG (scratcha), |
2886 | 0, |
2887 | SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), |
2888 | 16, |
2889 | SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), |
2890 | 0, |
2891 | SCR_JUMPR, |
2892 | 8, |
2893 | SCR_TO_REG (HS_REG), |
2894 | 0, |
2895 | SCR_LOAD_REG (SS_REG, S_GOOD), |
2896 | 0, |
2897 | SCR_JUMP, |
2898 | PADDR (cleanup_ok), |
2899 | |
2900 | },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ |
2901 | /* |
2902 | ** Ignore all data in byte, until next phase |
2903 | */ |
2904 | SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), |
2905 | PADDRH (par_err_other), |
2906 | SCR_MOVE_ABS (1) ^ SCR_DATA_IN, |
2907 | NADDR (scratch), |
2908 | SCR_JUMPR, |
2909 | -24, |
2910 | },/*-------------------------< PAR_ERR_OTHER >------------------*/{ |
2911 | /* |
2912 | ** count it. |
2913 | */ |
2914 | SCR_REG_REG (PS_REG, SCR_ADD, 0x01), |
2915 | 0, |
2916 | /* |
2917 | ** jump to dispatcher. |
2918 | */ |
2919 | SCR_JUMP, |
2920 | PADDR (dispatch), |
2921 | }/*-------------------------< MSG_REJECT >---------------*/,{ |
2922 | /* |
2923 | ** If a negotiation was in progress, |
2924 | ** negotiation failed. |
2925 | ** Otherwise, let the C code print |
2926 | ** some message. |
2927 | */ |
2928 | SCR_FROM_REG (HS_REG), |
2929 | 0, |
2930 | SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), |
2931 | SIR_REJECT_RECEIVED, |
2932 | SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), |
2933 | SIR_NEGO_FAILED, |
2934 | SCR_JUMP, |
2935 | PADDR (clrack), |
2936 | |
2937 | }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ |
2938 | /* |
2939 | ** Terminate cycle |
2940 | */ |
2941 | SCR_CLR (SCR_ACK), |
2942 | 0, |
2943 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2944 | PADDR (dispatch), |
2945 | /* |
2946 | ** get residue size. |
2947 | */ |
2948 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2949 | NADDR (msgin[1]), |
2950 | /* |
2951 | ** Size is 0 .. ignore message. |
2952 | */ |
2953 | SCR_JUMP ^ IFTRUE (DATA (0)), |
2954 | PADDR (clrack), |
2955 | /* |
2956 | ** Size is not 1 .. have to interrupt. |
2957 | */ |
2958 | SCR_JUMPR ^ IFFALSE (DATA (1)), |
2959 | 40, |
2960 | /* |
2961 | ** Check for residue byte in swide register |
2962 | */ |
2963 | SCR_FROM_REG (scntl2), |
2964 | 0, |
2965 | SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), |
2966 | 16, |
2967 | /* |
2968 | ** There IS data in the swide register. |
2969 | ** Discard it. |
2970 | */ |
2971 | SCR_REG_REG (scntl2, SCR_OR, WSR), |
2972 | 0, |
2973 | SCR_JUMP, |
2974 | PADDR (clrack), |
2975 | /* |
2976 | ** Load again the size to the sfbr register. |
2977 | */ |
2978 | SCR_FROM_REG (scratcha), |
2979 | 0, |
2980 | SCR_INT, |
2981 | SIR_IGN_RESIDUE, |
2982 | SCR_JUMP, |
2983 | PADDR (clrack), |
2984 | |
2985 | }/*-------------------------< MSG_EXTENDED >-------------*/,{ |
2986 | /* |
2987 | ** Terminate cycle |
2988 | */ |
2989 | SCR_CLR (SCR_ACK), |
2990 | 0, |
2991 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
2992 | PADDR (dispatch), |
2993 | /* |
2994 | ** get length. |
2995 | */ |
2996 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
2997 | NADDR (msgin[1]), |
2998 | /* |
2999 | */ |
3000 | SCR_JUMP ^ IFTRUE (DATA (3)), |
3001 | PADDRH (msg_ext_3), |
3002 | SCR_JUMP ^ IFFALSE (DATA (2)), |
3003 | PADDR (msg_bad), |
3004 | }/*-------------------------< MSG_EXT_2 >----------------*/,{ |
3005 | SCR_CLR (SCR_ACK), |
3006 | 0, |
3007 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3008 | PADDR (dispatch), |
3009 | /* |
3010 | ** get extended message code. |
3011 | */ |
3012 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3013 | NADDR (msgin[2]), |
3014 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), |
3015 | PADDRH (msg_wdtr), |
3016 | /* |
3017 | ** unknown extended message |
3018 | */ |
3019 | SCR_JUMP, |
3020 | PADDR (msg_bad) |
3021 | }/*-------------------------< MSG_WDTR >-----------------*/,{ |
3022 | SCR_CLR (SCR_ACK), |
3023 | 0, |
3024 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3025 | PADDR (dispatch), |
3026 | /* |
3027 | ** get data bus width |
3028 | */ |
3029 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3030 | NADDR (msgin[3]), |
3031 | /* |
3032 | ** let the host do the real work. |
3033 | */ |
3034 | SCR_INT, |
3035 | SIR_NEGO_WIDE, |
3036 | /* |
3037 | ** let the target fetch our answer. |
3038 | */ |
3039 | SCR_SET (SCR_ATN), |
3040 | 0, |
3041 | SCR_CLR (SCR_ACK), |
3042 | 0, |
3043 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
3044 | PADDRH (nego_bad_phase), |
3045 | |
3046 | }/*-------------------------< SEND_WDTR >----------------*/,{ |
3047 | /* |
3048 | ** Send the EXTENDED_WDTR |
3049 | */ |
3050 | SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, |
3051 | NADDR (msgout), |
3052 | SCR_COPY (1), |
3053 | NADDR (msgout), |
3054 | NADDR (lastmsg), |
3055 | SCR_JUMP, |
3056 | PADDR (msg_out_done), |
3057 | |
3058 | }/*-------------------------< MSG_EXT_3 >----------------*/,{ |
3059 | SCR_CLR (SCR_ACK), |
3060 | 0, |
3061 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3062 | PADDR (dispatch), |
3063 | /* |
3064 | ** get extended message code. |
3065 | */ |
3066 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3067 | NADDR (msgin[2]), |
3068 | SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), |
3069 | PADDRH (msg_sdtr), |
3070 | /* |
3071 | ** unknown extended message |
3072 | */ |
3073 | SCR_JUMP, |
3074 | PADDR (msg_bad) |
3075 | |
3076 | }/*-------------------------< MSG_SDTR >-----------------*/,{ |
3077 | SCR_CLR (SCR_ACK), |
3078 | 0, |
3079 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3080 | PADDR (dispatch), |
3081 | /* |
3082 | ** get period and offset |
3083 | */ |
3084 | SCR_MOVE_ABS (2) ^ SCR_MSG_IN, |
3085 | NADDR (msgin[3]), |
3086 | /* |
3087 | ** let the host do the real work. |
3088 | */ |
3089 | SCR_INT, |
3090 | SIR_NEGO_SYNC, |
3091 | /* |
3092 | ** let the target fetch our answer. |
3093 | */ |
3094 | SCR_SET (SCR_ATN), |
3095 | 0, |
3096 | SCR_CLR (SCR_ACK), |
3097 | 0, |
3098 | SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), |
3099 | PADDRH (nego_bad_phase), |
3100 | |
3101 | }/*-------------------------< SEND_SDTR >-------------*/,{ |
3102 | /* |
3103 | ** Send the EXTENDED_SDTR |
3104 | */ |
3105 | SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, |
3106 | NADDR (msgout), |
3107 | SCR_COPY (1), |
3108 | NADDR (msgout), |
3109 | NADDR (lastmsg), |
3110 | SCR_JUMP, |
3111 | PADDR (msg_out_done), |
3112 | |
3113 | }/*-------------------------< NEGO_BAD_PHASE >------------*/,{ |
3114 | SCR_INT, |
3115 | SIR_NEGO_PROTO, |
3116 | SCR_JUMP, |
3117 | PADDR (dispatch), |
3118 | |
3119 | }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ |
3120 | /* |
3121 | ** After ABORT message, |
3122 | ** |
3123 | ** expect an immediate disconnect, ... |
3124 | */ |
3125 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
3126 | 0, |
3127 | SCR_CLR (SCR_ACK|SCR_ATN), |
3128 | 0, |
3129 | SCR_WAIT_DISC, |
3130 | 0, |
3131 | /* |
3132 | ** ... and set the status to "ABORTED" |
3133 | */ |
3134 | SCR_LOAD_REG (HS_REG, HS_ABORTED), |
3135 | 0, |
3136 | SCR_JUMP, |
3137 | PADDR (cleanup), |
3138 | |
3139 | }/*-------------------------< HDATA_IN >-------------------*/,{ |
3140 | /* |
3141 | ** Because the size depends on the |
3142 | ** #define MAX_SCATTERH parameter, |
3143 | ** it is filled in at runtime. |
3144 | ** |
3145 | ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== |
3146 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
3147 | ** || PADDR (dispatch), |
3148 | ** || SCR_MOVE_TBL ^ SCR_DATA_IN, |
3149 | ** || offsetof (struct dsb, data[ i]), |
3150 | ** ##=================================================== |
3151 | ** |
3152 | **--------------------------------------------------------- |
3153 | */ |
3154 | 0 |
3155 | }/*-------------------------< HDATA_IN2 >------------------*/,{ |
3156 | SCR_JUMP, |
3157 | PADDR (data_in), |
3158 | |
3159 | }/*-------------------------< HDATA_OUT >-------------------*/,{ |
3160 | /* |
3161 | ** Because the size depends on the |
3162 | ** #define MAX_SCATTERH parameter, |
3163 | ** it is filled in at runtime. |
3164 | ** |
3165 | ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== |
3166 | ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), |
3167 | ** || PADDR (dispatch), |
3168 | ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, |
3169 | ** || offsetof (struct dsb, data[ i]), |
3170 | ** ##=================================================== |
3171 | ** |
3172 | **--------------------------------------------------------- |
3173 | */ |
3174 | 0 |
3175 | }/*-------------------------< HDATA_OUT2 >------------------*/,{ |
3176 | SCR_JUMP, |
3177 | PADDR (data_out), |
3178 | |
3179 | }/*-------------------------< RESET >----------------------*/,{ |
3180 | /* |
3181 | ** Send a TARGET_RESET message if bad IDENTIFY |
3182 | ** received on reselection. |
3183 | */ |
3184 | SCR_LOAD_REG (scratcha, ABORT_TASK), |
3185 | 0, |
3186 | SCR_JUMP, |
3187 | PADDRH (abort_resel), |
3188 | }/*-------------------------< ABORTTAG >-------------------*/,{ |
3189 | /* |
3190 | ** Abort a wrong tag received on reselection. |
3191 | */ |
3192 | SCR_LOAD_REG (scratcha, ABORT_TASK), |
3193 | 0, |
3194 | SCR_JUMP, |
3195 | PADDRH (abort_resel), |
3196 | }/*-------------------------< ABORT >----------------------*/,{ |
3197 | /* |
3198 | ** Abort a reselection when no active CCB. |
3199 | */ |
3200 | SCR_LOAD_REG (scratcha, ABORT_TASK_SET), |
3201 | 0, |
3202 | }/*-------------------------< ABORT_RESEL >----------------*/,{ |
3203 | SCR_COPY (1), |
3204 | RADDR (scratcha), |
3205 | NADDR (msgout), |
3206 | SCR_SET (SCR_ATN), |
3207 | 0, |
3208 | SCR_CLR (SCR_ACK), |
3209 | 0, |
3210 | /* |
3211 | ** and send it. |
3212 | ** we expect an immediate disconnect |
3213 | */ |
3214 | SCR_REG_REG (scntl2, SCR_AND, 0x7f), |
3215 | 0, |
3216 | SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, |
3217 | NADDR (msgout), |
3218 | SCR_COPY (1), |
3219 | NADDR (msgout), |
3220 | NADDR (lastmsg), |
3221 | SCR_CLR (SCR_ACK|SCR_ATN), |
3222 | 0, |
3223 | SCR_WAIT_DISC, |
3224 | 0, |
3225 | SCR_JUMP, |
3226 | PADDR (start), |
3227 | }/*-------------------------< RESEND_IDENT >-------------------*/,{ |
3228 | /* |
3229 | ** The target stays in MSG OUT phase after having acked |
3230 | ** Identify [+ Tag [+ Extended message ]]. Targets shall |
3231 | ** behave this way on parity error. |
3232 | ** We must send it again all the messages. |
3233 | */ |
3234 | SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ |
3235 | 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ |
3236 | SCR_JUMP, |
3237 | PADDR (send_ident), |
3238 | }/*-------------------------< CLRATN_GO_ON >-------------------*/,{ |
3239 | SCR_CLR (SCR_ATN), |
3240 | 0, |
3241 | SCR_JUMP, |
3242 | }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ |
3243 | 0, |
3244 | }/*-------------------------< SDATA_IN >-------------------*/,{ |
3245 | SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), |
3246 | PADDR (dispatch), |
3247 | SCR_MOVE_TBL ^ SCR_DATA_IN, |
3248 | offsetof (struct dsb, sense), |
3249 | SCR_CALL, |
3250 | PADDR (dispatch), |
3251 | SCR_JUMP, |
3252 | PADDR (no_data), |
3253 | }/*-------------------------< DATA_IO >--------------------*/,{ |
3254 | /* |
3255 | ** We jump here if the data direction was unknown at the |
3256 | ** time we had to queue the command to the scripts processor. |
3257 | ** Pointers had been set as follow in this situation: |
3258 | ** savep --> DATA_IO |
3259 | ** lastp --> start pointer when DATA_IN |
3260 | ** goalp --> goal pointer when DATA_IN |
3261 | ** wlastp --> start pointer when DATA_OUT |
3262 | ** wgoalp --> goal pointer when DATA_OUT |
3263 | ** This script sets savep/lastp/goalp according to the |
3264 | ** direction chosen by the target. |
3265 | */ |
3266 | SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), |
3267 | 32, |
3268 | /* |
3269 | ** Direction is DATA IN. |
3270 | ** Warning: we jump here, even when phase is DATA OUT. |
3271 | */ |
3272 | SCR_COPY (4), |
3273 | NADDR (header.lastp), |
3274 | NADDR (header.savep), |
3275 | |
3276 | /* |
3277 | ** Jump to the SCRIPTS according to actual direction. |
3278 | */ |
3279 | SCR_COPY (4), |
3280 | NADDR (header.savep), |
3281 | RADDR (temp), |
3282 | SCR_RETURN, |
3283 | 0, |
3284 | /* |
3285 | ** Direction is DATA OUT. |
3286 | */ |
3287 | SCR_COPY (4), |
3288 | NADDR (header.wlastp), |
3289 | NADDR (header.lastp), |
3290 | SCR_COPY (4), |
3291 | NADDR (header.wgoalp), |
3292 | NADDR (header.goalp), |
3293 | SCR_JUMPR, |
3294 | -64, |
3295 | }/*-------------------------< BAD_IDENTIFY >---------------*/,{ |
3296 | /* |
3297 | ** If message phase but not an IDENTIFY, |
3298 | ** get some help from the C code. |
3299 | ** Old SCSI device may behave so. |
3300 | */ |
3301 | SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), |
3302 | 16, |
3303 | SCR_INT, |
3304 | SIR_RESEL_NO_IDENTIFY, |
3305 | SCR_JUMP, |
3306 | PADDRH (reset), |
3307 | /* |
3308 | ** Message is an IDENTIFY, but lun is unknown. |
3309 | ** Read the message, since we got it directly |
3310 | ** from the SCSI BUS data lines. |
3311 | ** Signal problem to C code for logging the event. |
3312 | ** Send an ABORT_TASK_SET to clear all pending tasks. |
3313 | */ |
3314 | SCR_INT, |
3315 | SIR_RESEL_BAD_LUN, |
3316 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3317 | NADDR (msgin), |
3318 | SCR_JUMP, |
3319 | PADDRH (abort), |
3320 | }/*-------------------------< BAD_I_T_L >------------------*/,{ |
3321 | /* |
3322 | ** We donnot have a task for that I_T_L. |
3323 | ** Signal problem to C code for logging the event. |
3324 | ** Send an ABORT_TASK_SET message. |
3325 | */ |
3326 | SCR_INT, |
3327 | SIR_RESEL_BAD_I_T_L, |
3328 | SCR_JUMP, |
3329 | PADDRH (abort), |
3330 | }/*-------------------------< BAD_I_T_L_Q >----------------*/,{ |
3331 | /* |
3332 | ** We donnot have a task that matches the tag. |
3333 | ** Signal problem to C code for logging the event. |
3334 | ** Send an ABORT_TASK message. |
3335 | */ |
3336 | SCR_INT, |
3337 | SIR_RESEL_BAD_I_T_L_Q, |
3338 | SCR_JUMP, |
3339 | PADDRH (aborttag), |
3340 | }/*-------------------------< BAD_TARGET >-----------------*/,{ |
3341 | /* |
3342 | ** We donnot know the target that reselected us. |
3343 | ** Grab the first message if any (IDENTIFY). |
3344 | ** Signal problem to C code for logging the event. |
3345 | ** TARGET_RESET message. |
3346 | */ |
3347 | SCR_INT, |
3348 | SIR_RESEL_BAD_TARGET, |
3349 | SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), |
3350 | 8, |
3351 | SCR_MOVE_ABS (1) ^ SCR_MSG_IN, |
3352 | NADDR (msgin), |
3353 | SCR_JUMP, |
3354 | PADDRH (reset), |
3355 | }/*-------------------------< BAD_STATUS >-----------------*/,{ |
3356 | /* |
3357 | ** If command resulted in either QUEUE FULL, |
3358 | ** CHECK CONDITION or COMMAND TERMINATED, |
3359 | ** call the C code. |
3360 | */ |
3361 | SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)), |
3362 | SIR_BAD_STATUS, |
3363 | SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)), |
3364 | SIR_BAD_STATUS, |
3365 | SCR_INT ^ IFTRUE (DATA (S_TERMINATED)), |
3366 | SIR_BAD_STATUS, |
3367 | SCR_RETURN, |
3368 | 0, |
3369 | }/*-------------------------< START_RAM >-------------------*/,{ |
3370 | /* |
3371 | ** Load the script into on-chip RAM, |
3372 | ** and jump to start point. |
3373 | */ |
3374 | SCR_COPY_F (4), |
3375 | RADDR (scratcha), |
3376 | PADDRH (start_ram0), |
3377 | /* |
3378 | ** Flush script prefetch if required |
3379 | */ |
3380 | PREFETCH_FLUSH |
3381 | SCR_COPY (sizeof (struct script)), |
3382 | }/*-------------------------< START_RAM0 >--------------------*/,{ |
3383 | 0, |
3384 | PADDR (start), |
3385 | SCR_JUMP, |
3386 | PADDR (start), |
3387 | }/*-------------------------< STO_RESTART >-------------------*/,{ |
3388 | /* |
3389 | ** |
3390 | ** Repair start queue (e.g. next time use the next slot) |
3391 | ** and jump to start point. |
3392 | */ |
3393 | SCR_COPY (4), |
3394 | RADDR (temp), |
3395 | PADDR (startpos), |
3396 | SCR_JUMP, |
3397 | PADDR (start), |
3398 | }/*-------------------------< WAIT_DMA >-------------------*/,{ |
3399 | /* |
3400 | ** For HP Zalon/53c720 systems, the Zalon interface |
3401 | ** between CPU and 53c720 does prefetches, which causes |
3402 | ** problems with self modifying scripts. The problem |
3403 | ** is overcome by calling a dummy subroutine after each |
3404 | ** modification, to force a refetch of the script on |
3405 | ** return from the subroutine. |
3406 | */ |
3407 | SCR_RETURN, |
3408 | 0, |
3409 | }/*-------------------------< SNOOPTEST >-------------------*/,{ |
3410 | /* |
3411 | ** Read the variable. |
3412 | */ |
3413 | SCR_COPY (4), |
3414 | NADDR(ncr_cache), |
3415 | RADDR (scratcha), |
3416 | /* |
3417 | ** Write the variable. |
3418 | */ |
3419 | SCR_COPY (4), |
3420 | RADDR (temp), |
3421 | NADDR(ncr_cache), |
3422 | /* |
3423 | ** Read back the variable. |
3424 | */ |
3425 | SCR_COPY (4), |
3426 | NADDR(ncr_cache), |
3427 | RADDR (temp), |
3428 | }/*-------------------------< SNOOPEND >-------------------*/,{ |
3429 | /* |
3430 | ** And stop. |
3431 | */ |
3432 | SCR_INT, |
3433 | 99, |
3434 | }/*--------------------------------------------------------*/ |
3435 | }; |
3436 | |
3437 | /*========================================================== |
3438 | ** |
3439 | ** |
3440 | ** Fill in #define dependent parts of the script |
3441 | ** |
3442 | ** |
3443 | **========================================================== |
3444 | */ |
3445 | |
3446 | void __init ncr_script_fill (struct script * scr, struct scripth * scrh) |
3447 | { |
3448 | int i; |
3449 | ncrcmd *p; |
3450 | |
3451 | p = scrh->tryloop; |
3452 | for (i=0; i<MAX_START; i++) { |
3453 | *p++ =SCR_CALL; |
3454 | *p++ =PADDR (idle); |
3455 | } |
3456 | |
3457 | BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); |
3458 | |
3459 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
3460 | |
3461 | p = scrh->done_queue; |
3462 | for (i = 0; i<MAX_DONE; i++) { |
3463 | *p++ =SCR_COPY (sizeof(struct ccb *)); |
3464 | *p++ =NADDR (header.cp); |
3465 | *p++ =NADDR (ccb_done[i]); |
3466 | *p++ =SCR_CALL; |
3467 | *p++ =PADDR (done_end); |
3468 | } |
3469 | |
3470 | BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); |
3471 | |
3472 | #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ |
3473 | |
3474 | p = scrh->hdata_in; |
3475 | for (i=0; i<MAX_SCATTERH; i++) { |
3476 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); |
3477 | *p++ =PADDR (dispatch); |
3478 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; |
3479 | *p++ =offsetof (struct dsb, data[i]); |
3480 | } |
3481 | |
3482 | BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); |
3483 | |
3484 | p = scr->data_in; |
3485 | for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { |
3486 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); |
3487 | *p++ =PADDR (dispatch); |
3488 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; |
3489 | *p++ =offsetof (struct dsb, data[i]); |
3490 | } |
3491 | |
3492 | BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); |
3493 | |
3494 | p = scrh->hdata_out; |
3495 | for (i=0; i<MAX_SCATTERH; i++) { |
3496 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); |
3497 | *p++ =PADDR (dispatch); |
3498 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; |
3499 | *p++ =offsetof (struct dsb, data[i]); |
3500 | } |
3501 | |
3502 | BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); |
3503 | |
3504 | p = scr->data_out; |
3505 | for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { |
3506 | *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); |
3507 | *p++ =PADDR (dispatch); |
3508 | *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; |
3509 | *p++ =offsetof (struct dsb, data[i]); |
3510 | } |
3511 | |
3512 | BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); |
3513 | } |
3514 | |
3515 | /*========================================================== |
3516 | ** |
3517 | ** |
3518 | ** Copy and rebind a script. |
3519 | ** |
3520 | ** |
3521 | **========================================================== |
3522 | */ |
3523 | |
3524 | static void __init |
3525 | ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) |
3526 | { |
3527 | ncrcmd opcode, new, old, tmp1, tmp2; |
3528 | ncrcmd *start, *end; |
3529 | int relocs; |
3530 | int opchanged = 0; |
3531 | |
3532 | start = src; |
3533 | end = src + len/4; |
3534 | |
3535 | while (src < end) { |
3536 | |
3537 | opcode = *src++; |
3538 | *dst++ = cpu_to_scr(opcode); |
3539 | |
3540 | /* |
3541 | ** If we forget to change the length |
3542 | ** in struct script, a field will be |
3543 | ** padded with 0. This is an illegal |
3544 | ** command. |
3545 | */ |
3546 | |
3547 | if (opcode == 0) { |
3548 | printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n", |
3549 | ncr_name(np), (int) (src-start-1)); |
3550 | mdelay(1000); |
3551 | } |
3552 | |
3553 | if (DEBUG_FLAGS & DEBUG_SCRIPT) |
3554 | printk (KERN_DEBUG "%p: <%x>\n", |
3555 | (src-1), (unsigned)opcode); |
3556 | |
3557 | /* |
3558 | ** We don't have to decode ALL commands |
3559 | */ |
3560 | switch (opcode >> 28) { |
3561 | |
3562 | case 0xc: |
3563 | /* |
3564 | ** COPY has TWO arguments. |
3565 | */ |
3566 | relocs = 2; |
3567 | tmp1 = src[0]; |
3568 | #ifdef RELOC_KVAR |
3569 | if ((tmp1 & RELOC_MASK) == RELOC_KVAR) |
3570 | tmp1 = 0; |
3571 | #endif |
3572 | tmp2 = src[1]; |
3573 | #ifdef RELOC_KVAR |
3574 | if ((tmp2 & RELOC_MASK) == RELOC_KVAR) |
3575 | tmp2 = 0; |
3576 | #endif |
3577 | if ((tmp1 ^ tmp2) & 3) { |
3578 | printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n", |
3579 | ncr_name(np), (int) (src-start-1)); |
3580 | mdelay(1000); |
3581 | } |
3582 | /* |
3583 | ** If PREFETCH feature not enabled, remove |
3584 | ** the NO FLUSH bit if present. |
3585 | */ |
3586 | if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { |
3587 | dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); |
3588 | ++opchanged; |
3589 | } |
3590 | break; |
3591 | |
3592 | case 0x0: |
3593 | /* |
3594 | ** MOVE (absolute address) |
3595 | */ |
3596 | relocs = 1; |
3597 | break; |
3598 | |
3599 | case 0x8: |
3600 | /* |
3601 | ** JUMP / CALL |
3602 | ** don't relocate if relative :-) |
3603 | */ |
3604 | if (opcode & 0x00800000) |
3605 | relocs = 0; |
3606 | else |
3607 | relocs = 1; |
3608 | break; |
3609 | |
3610 | case 0x4: |
3611 | case 0x5: |
3612 | case 0x6: |
3613 | case 0x7: |
3614 | relocs = 1; |
3615 | break; |
3616 | |
3617 | default: |
3618 | relocs = 0; |
3619 | break; |
3620 | } |
3621 | |
3622 | if (relocs) { |
3623 | while (relocs--) { |
3624 | old = *src++; |
3625 | |
3626 | switch (old & RELOC_MASK) { |
3627 | case RELOC_REGISTER: |
3628 | new = (old & ~RELOC_MASK) + np->paddr; |
3629 | break; |
3630 | case RELOC_LABEL: |
3631 | new = (old & ~RELOC_MASK) + np->p_script; |
3632 | break; |
3633 | case RELOC_LABELH: |
3634 | new = (old & ~RELOC_MASK) + np->p_scripth; |
3635 | break; |
3636 | case RELOC_SOFTC: |
3637 | new = (old & ~RELOC_MASK) + np->p_ncb; |
3638 | break; |
3639 | #ifdef RELOC_KVAR |
3640 | case RELOC_KVAR: |
3641 | if (((old & ~RELOC_MASK) < |
3642 | SCRIPT_KVAR_FIRST) || |
3643 | ((old & ~RELOC_MASK) > |
3644 | SCRIPT_KVAR_LAST)) |
3645 | panic("ncr KVAR out of range"); |
3646 | new = vtophys(script_kvars[old & |
3647 | ~RELOC_MASK]); |
3648 | break; |
3649 | #endif |
3650 | case 0: |
3651 | /* Don't relocate a 0 address. */ |
3652 | if (old == 0) { |
3653 | new = old; |
3654 | break; |
3655 | } |
3656 | /* fall through */ |
3657 | default: |
3658 | panic("ncr_script_copy_and_bind: weird relocation %x\n", old); |
3659 | break; |
3660 | } |
3661 | |
3662 | *dst++ = cpu_to_scr(new); |
3663 | } |
3664 | } else |
3665 | *dst++ = cpu_to_scr(*src++); |
3666 | |
3667 | } |
3668 | } |
3669 | |
3670 | /* |
3671 | ** Linux host data structure |
3672 | */ |
3673 | |
3674 | struct host_data { |
3675 | struct ncb *ncb; |
3676 | }; |
3677 | |
3678 | #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) |
3679 | |
3680 | static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) |
3681 | { |
3682 | PRINT_ADDR(cp->cmd, "%s: ", label); |
3683 | |
3684 | spi_print_msg(msg); |
3685 | printk("\n"); |
3686 | } |
3687 | |
3688 | /*========================================================== |
3689 | ** |
3690 | ** NCR chip clock divisor table. |
3691 | ** Divisors are multiplied by 10,000,000 in order to make |
3692 | ** calculations more simple. |
3693 | ** |
3694 | **========================================================== |
3695 | */ |
3696 | |
3697 | #define _5M 5000000 |
3698 | static u_long div_10M[] = |
3699 | {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; |
3700 | |
3701 | |
3702 | /*=============================================================== |
3703 | ** |
3704 | ** Prepare io register values used by ncr_init() according |
3705 | ** to selected and supported features. |
3706 | ** |
3707 | ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 |
3708 | ** transfers. 32,64,128 are only supported by 875 and 895 chips. |
3709 | ** We use log base 2 (burst length) as internal code, with |
3710 | ** value 0 meaning "burst disabled". |
3711 | ** |
3712 | **=============================================================== |
3713 | */ |
3714 | |
3715 | /* |
3716 | * Burst length from burst code. |
3717 | */ |
3718 | #define burst_length(bc) (!(bc))? 0 : 1 << (bc) |
3719 | |
3720 | /* |
3721 | * Burst code from io register bits. Burst enable is ctest0 for c720 |
3722 | */ |
3723 | #define burst_code(dmode, ctest0) \ |
3724 | (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 |
3725 | |
3726 | /* |
3727 | * Set initial io register bits from burst code. |
3728 | */ |
3729 | static inline void ncr_init_burst(struct ncb *np, u_char bc) |
3730 | { |
3731 | u_char *be = &np->rv_ctest0; |
3732 | *be &= ~0x80; |
3733 | np->rv_dmode &= ~(0x3 << 6); |
3734 | np->rv_ctest5 &= ~0x4; |
3735 | |
3736 | if (!bc) { |
3737 | *be |= 0x80; |
3738 | } else { |
3739 | --bc; |
3740 | np->rv_dmode |= ((bc & 0x3) << 6); |
3741 | np->rv_ctest5 |= (bc & 0x4); |
3742 | } |
3743 | } |
3744 | |
3745 | static void __init ncr_prepare_setting(struct ncb *np) |
3746 | { |
3747 | u_char burst_max; |
3748 | u_long period; |
3749 | int i; |
3750 | |
3751 | /* |
3752 | ** Save assumed BIOS setting |
3753 | */ |
3754 | |
3755 | np->sv_scntl0 = INB(nc_scntl0) & 0x0a; |
3756 | np->sv_scntl3 = INB(nc_scntl3) & 0x07; |
3757 | np->sv_dmode = INB(nc_dmode) & 0xce; |
3758 | np->sv_dcntl = INB(nc_dcntl) & 0xa8; |
3759 | np->sv_ctest0 = INB(nc_ctest0) & 0x84; |
3760 | np->sv_ctest3 = INB(nc_ctest3) & 0x01; |
3761 | np->sv_ctest4 = INB(nc_ctest4) & 0x80; |
3762 | np->sv_ctest5 = INB(nc_ctest5) & 0x24; |
3763 | np->sv_gpcntl = INB(nc_gpcntl); |
3764 | np->sv_stest2 = INB(nc_stest2) & 0x20; |
3765 | np->sv_stest4 = INB(nc_stest4); |
3766 | |
3767 | /* |
3768 | ** Wide ? |
3769 | */ |
3770 | |
3771 | np->maxwide = (np->features & FE_WIDE)? 1 : 0; |
3772 | |
3773 | /* |
3774 | * Guess the frequency of the chip's clock. |
3775 | */ |
3776 | if (np->features & FE_ULTRA) |
3777 | np->clock_khz = 80000; |
3778 | else |
3779 | np->clock_khz = 40000; |
3780 | |
3781 | /* |
3782 | * Get the clock multiplier factor. |
3783 | */ |
3784 | if (np->features & FE_QUAD) |
3785 | np->multiplier = 4; |
3786 | else if (np->features & FE_DBLR) |
3787 | np->multiplier = 2; |
3788 | else |
3789 | np->multiplier = 1; |
3790 | |
3791 | /* |
3792 | * Measure SCSI clock frequency for chips |
3793 | * it may vary from assumed one. |
3794 | */ |
3795 | if (np->features & FE_VARCLK) |
3796 | ncr_getclock(np, np->multiplier); |
3797 | |
3798 | /* |
3799 | * Divisor to be used for async (timer pre-scaler). |
3800 | */ |
3801 | i = np->clock_divn - 1; |
3802 | while (--i >= 0) { |
3803 | if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { |
3804 | ++i; |
3805 | break; |
3806 | } |
3807 | } |
3808 | np->rv_scntl3 = i+1; |
3809 | |
3810 | /* |
3811 | * Minimum synchronous period factor supported by the chip. |
3812 | * Btw, 'period' is in tenths of nanoseconds. |
3813 | */ |
3814 | |
3815 | period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; |
3816 | if (period <= 250) np->minsync = 10; |
3817 | else if (period <= 303) np->minsync = 11; |
3818 | else if (period <= 500) np->minsync = 12; |
3819 | else np->minsync = (period + 40 - 1) / 40; |
3820 | |
3821 | /* |
3822 | * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). |
3823 | */ |
3824 | |
3825 | if (np->minsync < 25 && !(np->features & FE_ULTRA)) |
3826 | np->minsync = 25; |
3827 | |
3828 | /* |
3829 | * Maximum synchronous period factor supported by the chip. |
3830 | */ |
3831 | |
3832 | period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); |
3833 | np->maxsync = period > 2540 ? 254 : period / 10; |
3834 | |
3835 | /* |
3836 | ** Prepare initial value of other IO registers |
3837 | */ |
3838 | #if defined SCSI_NCR_TRUST_BIOS_SETTING |
3839 | np->rv_scntl0 = np->sv_scntl0; |
3840 | np->rv_dmode = np->sv_dmode; |
3841 | np->rv_dcntl = np->sv_dcntl; |
3842 | np->rv_ctest0 = np->sv_ctest0; |
3843 | np->rv_ctest3 = np->sv_ctest3; |
3844 | np->rv_ctest4 = np->sv_ctest4; |
3845 | np->rv_ctest5 = np->sv_ctest5; |
3846 | burst_max = burst_code(np->sv_dmode, np->sv_ctest0); |
3847 | #else |
3848 | |
3849 | /* |
3850 | ** Select burst length (dwords) |
3851 | */ |
3852 | burst_max = driver_setup.burst_max; |
3853 | if (burst_max == 255) |
3854 | burst_max = burst_code(np->sv_dmode, np->sv_ctest0); |
3855 | if (burst_max > 7) |
3856 | burst_max = 7; |
3857 | if (burst_max > np->maxburst) |
3858 | burst_max = np->maxburst; |
3859 | |
3860 | /* |
3861 | ** Select all supported special features |
3862 | */ |
3863 | if (np->features & FE_ERL) |
3864 | np->rv_dmode |= ERL; /* Enable Read Line */ |
3865 | if (np->features & FE_BOF) |
3866 | np->rv_dmode |= BOF; /* Burst Opcode Fetch */ |
3867 | if (np->features & FE_ERMP) |
3868 | np->rv_dmode |= ERMP; /* Enable Read Multiple */ |
3869 | if (np->features & FE_PFEN) |
3870 | np->rv_dcntl |= PFEN; /* Prefetch Enable */ |
3871 | if (np->features & FE_CLSE) |
3872 | np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ |
3873 | if (np->features & FE_WRIE) |
3874 | np->rv_ctest3 |= WRIE; /* Write and Invalidate */ |
3875 | if (np->features & FE_DFS) |
3876 | np->rv_ctest5 |= DFS; /* Dma Fifo Size */ |
3877 | if (np->features & FE_MUX) |
3878 | np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ |
3879 | if (np->features & FE_EA) |
3880 | np->rv_dcntl |= EA; /* Enable ACK */ |
3881 | if (np->features & FE_EHP) |
3882 | np->rv_ctest0 |= EHP; /* Even host parity */ |
3883 | |
3884 | /* |
3885 | ** Select some other |
3886 | */ |
3887 | if (driver_setup.master_parity) |
3888 | np->rv_ctest4 |= MPEE; /* Master parity checking */ |
3889 | if (driver_setup.scsi_parity) |
3890 | np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ |
3891 | |
3892 | /* |
3893 | ** Get SCSI addr of host adapter (set by bios?). |
3894 | */ |
3895 | if (np->myaddr == 255) { |
3896 | np->myaddr = INB(nc_scid) & 0x07; |
3897 | if (!np->myaddr) |
3898 | np->myaddr = SCSI_NCR_MYADDR; |
3899 | } |
3900 | |
3901 | #endif /* SCSI_NCR_TRUST_BIOS_SETTING */ |
3902 | |
3903 | /* |
3904 | * Prepare initial io register bits for burst length |
3905 | */ |
3906 | ncr_init_burst(np, burst_max); |
3907 | |
3908 | /* |
3909 | ** Set SCSI BUS mode. |
3910 | ** |
3911 | ** - ULTRA2 chips (895/895A/896) report the current |
3912 | ** BUS mode through the STEST4 IO register. |
3913 | ** - For previous generation chips (825/825A/875), |
3914 | ** user has to tell us how to check against HVD, |
3915 | ** since a 100% safe algorithm is not possible. |
3916 | */ |
3917 | np->scsi_mode = SMODE_SE; |
3918 | if (np->features & FE_DIFF) { |
3919 | switch(driver_setup.diff_support) { |
3920 | case 4: /* Trust previous settings if present, then GPIO3 */ |
3921 | if (np->sv_scntl3) { |
3922 | if (np->sv_stest2 & 0x20) |
3923 | np->scsi_mode = SMODE_HVD; |
3924 | break; |
3925 | } |
3926 | case 3: /* SYMBIOS controllers report HVD through GPIO3 */ |
3927 | if (INB(nc_gpreg) & 0x08) |
3928 | break; |
3929 | case 2: /* Set HVD unconditionally */ |
3930 | np->scsi_mode = SMODE_HVD; |
3931 | case 1: /* Trust previous settings for HVD */ |
3932 | if (np->sv_stest2 & 0x20) |
3933 | np->scsi_mode = SMODE_HVD; |
3934 | break; |
3935 | default:/* Don't care about HVD */ |
3936 | break; |
3937 | } |
3938 | } |
3939 | if (np->scsi_mode == SMODE_HVD) |
3940 | np->rv_stest2 |= 0x20; |
3941 | |
3942 | /* |
3943 | ** Set LED support from SCRIPTS. |
3944 | ** Ignore this feature for boards known to use a |
3945 | ** specific GPIO wiring and for the 895A or 896 |
3946 | ** that drive the LED directly. |
3947 | ** Also probe initial setting of GPIO0 as output. |
3948 | */ |
3949 | if ((driver_setup.led_pin) && |
3950 | !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) |
3951 | np->features |= FE_LED0; |
3952 | |
3953 | /* |
3954 | ** Set irq mode. |
3955 | */ |
3956 | switch(driver_setup.irqm & 3) { |
3957 | case 2: |
3958 | np->rv_dcntl |= IRQM; |
3959 | break; |
3960 | case 1: |
3961 | np->rv_dcntl |= (np->sv_dcntl & IRQM); |
3962 | break; |
3963 | default: |
3964 | break; |
3965 | } |
3966 | |
3967 | /* |
3968 | ** Configure targets according to driver setup. |
3969 | ** Allow to override sync, wide and NOSCAN from |
3970 | ** boot command line. |
3971 | */ |
3972 | for (i = 0 ; i < MAX_TARGET ; i++) { |
3973 | struct tcb *tp = &np->target[i]; |
3974 | |
3975 | tp->usrsync = driver_setup.default_sync; |
3976 | tp->usrwide = driver_setup.max_wide; |
3977 | tp->usrtags = MAX_TAGS; |
3978 | tp->period = 0xffff; |
3979 | if (!driver_setup.disconnection) |
3980 | np->target[i].usrflag = UF_NODISC; |
3981 | } |
3982 | |
3983 | /* |
3984 | ** Announce all that stuff to user. |
3985 | */ |
3986 | |
3987 | printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np), |
3988 | np->myaddr, |
3989 | np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), |
3990 | (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity", |
3991 | (np->rv_stest2 & 0x20) ? ", Differential" : ""); |
3992 | |
3993 | if (bootverbose > 1) { |
3994 | printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
3995 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", |
3996 | ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, |
3997 | np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); |
3998 | |
3999 | printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " |
4000 | "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", |
4001 | ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, |
4002 | np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); |
4003 | } |
4004 | |
4005 | if (bootverbose && np->paddr2) |
4006 | printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n", |
4007 | ncr_name(np), np->paddr2); |
4008 | } |
4009 | |
4010 | /*========================================================== |
4011 | ** |
4012 | ** |
4013 | ** Done SCSI commands list management. |
4014 | ** |
4015 | ** We donnot enter the scsi_done() callback immediately |
4016 | ** after a command has been seen as completed but we |
4017 | ** insert it into a list which is flushed outside any kind |
4018 | ** of driver critical section. |
4019 | ** This allows to do minimal stuff under interrupt and |
4020 | ** inside critical sections and to also avoid locking up |
4021 | ** on recursive calls to driver entry points under SMP. |
4022 | ** In fact, the only kernel point which is entered by the |
4023 | ** driver with a driver lock set is kmalloc(GFP_ATOMIC) |
4024 | ** that shall not reenter the driver under any circumstances, |
4025 | ** AFAIK. |
4026 | ** |
4027 | **========================================================== |
4028 | */ |
4029 | static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) |
4030 | { |
4031 | unmap_scsi_data(np, cmd); |
4032 | cmd->host_scribble = (char *) np->done_list; |
4033 | np->done_list = cmd; |
4034 | } |
4035 | |
4036 | static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) |
4037 | { |
4038 | struct scsi_cmnd *cmd; |
4039 | |
4040 | while (lcmd) { |
4041 | cmd = lcmd; |
4042 | lcmd = (struct scsi_cmnd *) cmd->host_scribble; |
4043 | cmd->scsi_done(cmd); |
4044 | } |
4045 | } |
4046 | |
4047 | /*========================================================== |
4048 | ** |
4049 | ** |
4050 | ** Prepare the next negotiation message if needed. |
4051 | ** |
4052 | ** Fill in the part of message buffer that contains the |
4053 | ** negotiation and the nego_status field of the CCB. |
4054 | ** Returns the size of the message in bytes. |
4055 | ** |
4056 | ** |
4057 | **========================================================== |
4058 | */ |
4059 | |
4060 | |
4061 | static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) |
4062 | { |
4063 | struct tcb *tp = &np->target[cp->target]; |
4064 | int msglen = 0; |
4065 | int nego = 0; |
4066 | struct scsi_target *starget = tp->starget; |
4067 | |
4068 | /* negotiate wide transfers ? */ |
4069 | if (!tp->widedone) { |
4070 | if (spi_support_wide(starget)) { |
4071 | nego = NS_WIDE; |
4072 | } else |
4073 | tp->widedone=1; |
4074 | } |
4075 | |
4076 | /* negotiate synchronous transfers? */ |
4077 | if (!nego && !tp->period) { |
4078 | if (spi_support_sync(starget)) { |
4079 | nego = NS_SYNC; |
4080 | } else { |
4081 | tp->period =0xffff; |
4082 | dev_info(&starget->dev, "target did not report SYNC.\n"); |
4083 | } |
4084 | } |
4085 | |
4086 | switch (nego) { |
4087 | case NS_SYNC: |
4088 | msglen += spi_populate_sync_msg(msgptr + msglen, |
4089 | tp->maxoffs ? tp->minsync : 0, tp->maxoffs); |
4090 | break; |
4091 | case NS_WIDE: |
4092 | msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide); |
4093 | break; |
4094 | } |
4095 | |
4096 | cp->nego_status = nego; |
4097 | |
4098 | if (nego) { |
4099 | tp->nego_cp = cp; |
4100 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
4101 | ncr_print_msg(cp, nego == NS_WIDE ? |
4102 | "wide msgout":"sync_msgout", msgptr); |
4103 | } |
4104 | } |
4105 | |
4106 | return msglen; |
4107 | } |
4108 | |
4109 | |
4110 | |
4111 | /*========================================================== |
4112 | ** |
4113 | ** |
4114 | ** Start execution of a SCSI command. |
4115 | ** This is called from the generic SCSI driver. |
4116 | ** |
4117 | ** |
4118 | **========================================================== |
4119 | */ |
4120 | static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) |
4121 | { |
4122 | struct scsi_device *sdev = cmd->device; |
4123 | struct tcb *tp = &np->target[sdev->id]; |
4124 | struct lcb *lp = tp->lp[sdev->lun]; |
4125 | struct ccb *cp; |
4126 | |
4127 | int segments; |
4128 | u_char idmsg, *msgptr; |
4129 | u32 msglen; |
4130 | int direction; |
4131 | u32 lastp, goalp; |
4132 | |
4133 | /*--------------------------------------------- |
4134 | ** |
4135 | ** Some shortcuts ... |
4136 | ** |
4137 | **--------------------------------------------- |
4138 | */ |
4139 | if ((sdev->id == np->myaddr ) || |
4140 | (sdev->id >= MAX_TARGET) || |
4141 | (sdev->lun >= MAX_LUN )) { |
4142 | return(DID_BAD_TARGET); |
4143 | } |
4144 | |
4145 | /*--------------------------------------------- |
4146 | ** |
4147 | ** Complete the 1st TEST UNIT READY command |
4148 | ** with error condition if the device is |
4149 | ** flagged NOSCAN, in order to speed up |
4150 | ** the boot. |
4151 | ** |
4152 | **--------------------------------------------- |
4153 | */ |
4154 | if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && |
4155 | (tp->usrflag & UF_NOSCAN)) { |
4156 | tp->usrflag &= ~UF_NOSCAN; |
4157 | return DID_BAD_TARGET; |
4158 | } |
4159 | |
4160 | if (DEBUG_FLAGS & DEBUG_TINY) { |
4161 | PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]); |
4162 | } |
4163 | |
4164 | /*--------------------------------------------------- |
4165 | ** |
4166 | ** Assign a ccb / bind cmd. |
4167 | ** If resetting, shorten settle_time if necessary |
4168 | ** in order to avoid spurious timeouts. |
4169 | ** If resetting or no free ccb, |
4170 | ** insert cmd into the waiting list. |
4171 | ** |
4172 | **---------------------------------------------------- |
4173 | */ |
4174 | if (np->settle_time && cmd->request->timeout >= HZ) { |
4175 | u_long tlimit = jiffies + cmd->request->timeout - HZ; |
4176 | if (time_after(np->settle_time, tlimit)) |
4177 | np->settle_time = tlimit; |
4178 | } |
4179 | |
4180 | if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { |
4181 | insert_into_waiting_list(np, cmd); |
4182 | return(DID_OK); |
4183 | } |
4184 | cp->cmd = cmd; |
4185 | |
4186 | /*---------------------------------------------------- |
4187 | ** |
4188 | ** Build the identify / tag / sdtr message |
4189 | ** |
4190 | **---------------------------------------------------- |
4191 | */ |
4192 | |
4193 | idmsg = IDENTIFY(0, sdev->lun); |
4194 | |
4195 | if (cp ->tag != NO_TAG || |
4196 | (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) |
4197 | idmsg |= 0x40; |
4198 | |
4199 | msgptr = cp->scsi_smsg; |
4200 | msglen = 0; |
4201 | msgptr[msglen++] = idmsg; |
4202 | |
4203 | if (cp->tag != NO_TAG) { |
4204 | char order = np->order; |
4205 | |
4206 | /* |
4207 | ** Force ordered tag if necessary to avoid timeouts |
4208 | ** and to preserve interactivity. |
4209 | */ |
4210 | if (lp && time_after(jiffies, lp->tags_stime)) { |
4211 | if (lp->tags_smap) { |
4212 | order = ORDERED_QUEUE_TAG; |
4213 | if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ |
4214 | PRINT_ADDR(cmd, |
4215 | "ordered tag forced.\n"); |
4216 | } |
4217 | } |
4218 | lp->tags_stime = jiffies + 3*HZ; |
4219 | lp->tags_smap = lp->tags_umap; |
4220 | } |
4221 | |
4222 | if (order == 0) { |
4223 | /* |
4224 | ** Ordered write ops, unordered read ops. |
4225 | */ |
4226 | switch (cmd->cmnd[0]) { |
4227 | case 0x08: /* READ_SMALL (6) */ |
4228 | case 0x28: /* READ_BIG (10) */ |
4229 | case 0xa8: /* READ_HUGE (12) */ |
4230 | order = SIMPLE_QUEUE_TAG; |
4231 | break; |
4232 | default: |
4233 | order = ORDERED_QUEUE_TAG; |
4234 | } |
4235 | } |
4236 | msgptr[msglen++] = order; |
4237 | /* |
4238 | ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, |
4239 | ** since we may have to deal with devices that have |
4240 | ** problems with #TAG 0 or too great #TAG numbers. |
4241 | */ |
4242 | msgptr[msglen++] = (cp->tag << 1) + 1; |
4243 | } |
4244 | |
4245 | /*---------------------------------------------------- |
4246 | ** |
4247 | ** Build the data descriptors |
4248 | ** |
4249 | **---------------------------------------------------- |
4250 | */ |
4251 | |
4252 | direction = cmd->sc_data_direction; |
4253 | if (direction != DMA_NONE) { |
4254 | segments = ncr_scatter(np, cp, cp->cmd); |
4255 | if (segments < 0) { |
4256 | ncr_free_ccb(np, cp); |
4257 | return(DID_ERROR); |
4258 | } |
4259 | } |
4260 | else { |
4261 | cp->data_len = 0; |
4262 | segments = 0; |
4263 | } |
4264 | |
4265 | /*--------------------------------------------------- |
4266 | ** |
4267 | ** negotiation required? |
4268 | ** |
4269 | ** (nego_status is filled by ncr_prepare_nego()) |
4270 | ** |
4271 | **--------------------------------------------------- |
4272 | */ |
4273 | |
4274 | cp->nego_status = 0; |
4275 | |
4276 | if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { |
4277 | msglen += ncr_prepare_nego (np, cp, msgptr + msglen); |
4278 | } |
4279 | |
4280 | /*---------------------------------------------------- |
4281 | ** |
4282 | ** Determine xfer direction. |
4283 | ** |
4284 | **---------------------------------------------------- |
4285 | */ |
4286 | if (!cp->data_len) |
4287 | direction = DMA_NONE; |
4288 | |
4289 | /* |
4290 | ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE |
4291 | ** but prepare alternate pointers for TO_DEVICE in case |
4292 | ** of our speculation will be just wrong. |
4293 | ** SCRIPTS will swap values if needed. |
4294 | */ |
4295 | switch(direction) { |
4296 | case DMA_BIDIRECTIONAL: |
4297 | case DMA_TO_DEVICE: |
4298 | goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; |
4299 | if (segments <= MAX_SCATTERL) |
4300 | lastp = goalp - 8 - (segments * 16); |
4301 | else { |
4302 | lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); |
4303 | lastp -= (segments - MAX_SCATTERL) * 16; |
4304 | } |
4305 | if (direction != DMA_BIDIRECTIONAL) |
4306 | break; |
4307 | cp->phys.header.wgoalp = cpu_to_scr(goalp); |
4308 | cp->phys.header.wlastp = cpu_to_scr(lastp); |
4309 | /* fall through */ |
4310 | case DMA_FROM_DEVICE: |
4311 | goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; |
4312 | if (segments <= MAX_SCATTERL) |
4313 | lastp = goalp - 8 - (segments * 16); |
4314 | else { |
4315 | lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); |
4316 | lastp -= (segments - MAX_SCATTERL) * 16; |
4317 | } |
4318 | break; |
4319 | default: |
4320 | case DMA_NONE: |
4321 | lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); |
4322 | break; |
4323 | } |
4324 | |
4325 | /* |
4326 | ** Set all pointers values needed by SCRIPTS. |
4327 | ** If direction is unknown, start at data_io. |
4328 | */ |
4329 | cp->phys.header.lastp = cpu_to_scr(lastp); |
4330 | cp->phys.header.goalp = cpu_to_scr(goalp); |
4331 | |
4332 | if (direction == DMA_BIDIRECTIONAL) |
4333 | cp->phys.header.savep = |
4334 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); |
4335 | else |
4336 | cp->phys.header.savep= cpu_to_scr(lastp); |
4337 | |
4338 | /* |
4339 | ** Save the initial data pointer in order to be able |
4340 | ** to redo the command. |
4341 | */ |
4342 | cp->startp = cp->phys.header.savep; |
4343 | |
4344 | /*---------------------------------------------------- |
4345 | ** |
4346 | ** fill in ccb |
4347 | ** |
4348 | **---------------------------------------------------- |
4349 | ** |
4350 | ** |
4351 | ** physical -> virtual backlink |
4352 | ** Generic SCSI command |
4353 | */ |
4354 | |
4355 | /* |
4356 | ** Startqueue |
4357 | */ |
4358 | cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
4359 | cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); |
4360 | /* |
4361 | ** select |
4362 | */ |
4363 | cp->phys.select.sel_id = sdev_id(sdev); |
4364 | cp->phys.select.sel_scntl3 = tp->wval; |
4365 | cp->phys.select.sel_sxfer = tp->sval; |
4366 | /* |
4367 | ** message |
4368 | */ |
4369 | cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); |
4370 | cp->phys.smsg.size = cpu_to_scr(msglen); |
4371 | |
4372 | /* |
4373 | ** command |
4374 | */ |
4375 | memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); |
4376 | cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); |
4377 | cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); |
4378 | |
4379 | /* |
4380 | ** status |
4381 | */ |
4382 | cp->actualquirks = 0; |
4383 | cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; |
4384 | cp->scsi_status = S_ILLEGAL; |
4385 | cp->parity_status = 0; |
4386 | |
4387 | cp->xerr_status = XE_OK; |
4388 | #if 0 |
4389 | cp->sync_status = tp->sval; |
4390 | cp->wide_status = tp->wval; |
4391 | #endif |
4392 | |
4393 | /*---------------------------------------------------- |
4394 | ** |
4395 | ** Critical region: start this job. |
4396 | ** |
4397 | **---------------------------------------------------- |
4398 | */ |
4399 | |
4400 | /* activate this job. */ |
4401 | cp->magic = CCB_MAGIC; |
4402 | |
4403 | /* |
4404 | ** insert next CCBs into start queue. |
4405 | ** 2 max at a time is enough to flush the CCB wait queue. |
4406 | */ |
4407 | cp->auto_sense = 0; |
4408 | if (lp) |
4409 | ncr_start_next_ccb(np, lp, 2); |
4410 | else |
4411 | ncr_put_start_queue(np, cp); |
4412 | |
4413 | /* Command is successfully queued. */ |
4414 | |
4415 | return DID_OK; |
4416 | } |
4417 | |
4418 | |
4419 | /*========================================================== |
4420 | ** |
4421 | ** |
4422 | ** Insert a CCB into the start queue and wake up the |
4423 | ** SCRIPTS processor. |
4424 | ** |
4425 | ** |
4426 | **========================================================== |
4427 | */ |
4428 | |
4429 | static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) |
4430 | { |
4431 | struct list_head *qp; |
4432 | struct ccb *cp; |
4433 | |
4434 | if (lp->held_ccb) |
4435 | return; |
4436 | |
4437 | while (maxn-- && lp->queuedccbs < lp->queuedepth) { |
4438 | qp = ncr_list_pop(&lp->wait_ccbq); |
4439 | if (!qp) |
4440 | break; |
4441 | ++lp->queuedccbs; |
4442 | cp = list_entry(qp, struct ccb, link_ccbq); |
4443 | list_add_tail(qp, &lp->busy_ccbq); |
4444 | lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = |
4445 | cpu_to_scr(CCB_PHYS (cp, restart)); |
4446 | ncr_put_start_queue(np, cp); |
4447 | } |
4448 | } |
4449 | |
4450 | static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) |
4451 | { |
4452 | u16 qidx; |
4453 | |
4454 | /* |
4455 | ** insert into start queue. |
4456 | */ |
4457 | if (!np->squeueput) np->squeueput = 1; |
4458 | qidx = np->squeueput + 2; |
4459 | if (qidx >= MAX_START + MAX_START) qidx = 1; |
4460 | |
4461 | np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
4462 | MEMORY_BARRIER(); |
4463 | np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); |
4464 | |
4465 | np->squeueput = qidx; |
4466 | ++np->queuedccbs; |
4467 | cp->queued = 1; |
4468 | |
4469 | if (DEBUG_FLAGS & DEBUG_QUEUE) |
4470 | printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput); |
4471 | |
4472 | /* |
4473 | ** Script processor may be waiting for reselect. |
4474 | ** Wake it up. |
4475 | */ |
4476 | MEMORY_BARRIER(); |
4477 | OUTB (nc_istat, SIGP); |
4478 | } |
4479 | |
4480 | |
4481 | static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) |
4482 | { |
4483 | u32 term; |
4484 | int retv = 0; |
4485 | |
4486 | np->settle_time = jiffies + settle_delay * HZ; |
4487 | |
4488 | if (bootverbose > 1) |
4489 | printk("%s: resetting, " |
4490 | "command processing suspended for %d seconds\n", |
4491 | ncr_name(np), settle_delay); |
4492 | |
4493 | ncr_chip_reset(np, 100); |
4494 | udelay(2000); /* The 895 needs time for the bus mode to settle */ |
4495 | if (enab_int) |
4496 | OUTW (nc_sien, RST); |
4497 | /* |
4498 | ** Enable Tolerant, reset IRQD if present and |
4499 | ** properly set IRQ mode, prior to resetting the bus. |
4500 | */ |
4501 | OUTB (nc_stest3, TE); |
4502 | OUTB (nc_scntl1, CRST); |
4503 | udelay(200); |
4504 | |
4505 | if (!driver_setup.bus_check) |
4506 | goto out; |
4507 | /* |
4508 | ** Check for no terminators or SCSI bus shorts to ground. |
4509 | ** Read SCSI data bus, data parity bits and control signals. |
4510 | ** We are expecting RESET to be TRUE and other signals to be |
4511 | ** FALSE. |
4512 | */ |
4513 | |
4514 | term = INB(nc_sstat0); |
4515 | term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ |
4516 | term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ |
4517 | ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ |
4518 | ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ |
4519 | INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ |
4520 | |
4521 | if (!(np->features & FE_WIDE)) |
4522 | term &= 0x3ffff; |
4523 | |
4524 | if (term != (2<<7)) { |
4525 | printk("%s: suspicious SCSI data while resetting the BUS.\n", |
4526 | ncr_name(np)); |
4527 | printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " |
4528 | "0x%lx, expecting 0x%lx\n", |
4529 | ncr_name(np), |
4530 | (np->features & FE_WIDE) ? "dp1,d15-8," : "", |
4531 | (u_long)term, (u_long)(2<<7)); |
4532 | if (driver_setup.bus_check == 1) |
4533 | retv = 1; |
4534 | } |
4535 | out: |
4536 | OUTB (nc_scntl1, 0); |
4537 | return retv; |
4538 | } |
4539 | |
4540 | /* |
4541 | * Start reset process. |
4542 | * If reset in progress do nothing. |
4543 | * The interrupt handler will reinitialize the chip. |
4544 | * The timeout handler will wait for settle_time before |
4545 | * clearing it and so resuming command processing. |
4546 | */ |
4547 | static void ncr_start_reset(struct ncb *np) |
4548 | { |
4549 | if (!np->settle_time) { |
4550 | ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay); |
4551 | } |
4552 | } |
4553 | |
4554 | /*========================================================== |
4555 | ** |
4556 | ** |
4557 | ** Reset the SCSI BUS. |
4558 | ** This is called from the generic SCSI driver. |
4559 | ** |
4560 | ** |
4561 | **========================================================== |
4562 | */ |
4563 | static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset) |
4564 | { |
4565 | /* struct scsi_device *device = cmd->device; */ |
4566 | struct ccb *cp; |
4567 | int found; |
4568 | |
4569 | /* |
4570 | * Return immediately if reset is in progress. |
4571 | */ |
4572 | if (np->settle_time) { |
4573 | return FAILED; |
4574 | } |
4575 | /* |
4576 | * Start the reset process. |
4577 | * The script processor is then assumed to be stopped. |
4578 | * Commands will now be queued in the waiting list until a settle |
4579 | * delay of 2 seconds will be completed. |
4580 | */ |
4581 | ncr_start_reset(np); |
4582 | /* |
4583 | * First, look in the wakeup list |
4584 | */ |
4585 | for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { |
4586 | /* |
4587 | ** look for the ccb of this command. |
4588 | */ |
4589 | if (cp->host_status == HS_IDLE) continue; |
4590 | if (cp->cmd == cmd) { |
4591 | found = 1; |
4592 | break; |
4593 | } |
4594 | } |
4595 | /* |
4596 | * Then, look in the waiting list |
4597 | */ |
4598 | if (!found && retrieve_from_waiting_list(0, np, cmd)) |
4599 | found = 1; |
4600 | /* |
4601 | * Wake-up all awaiting commands with DID_RESET. |
4602 | */ |
4603 | reset_waiting_list(np); |
4604 | /* |
4605 | * Wake-up all pending commands with HS_RESET -> DID_RESET. |
4606 | */ |
4607 | ncr_wakeup(np, HS_RESET); |
4608 | /* |
4609 | * If the involved command was not in a driver queue, and the |
4610 | * scsi driver told us reset is synchronous, and the command is not |
4611 | * currently in the waiting list, complete it with DID_RESET status, |
4612 | * in order to keep it alive. |
4613 | */ |
4614 | if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) { |
4615 | cmd->result = ScsiResult(DID_RESET, 0); |
4616 | ncr_queue_done_cmd(np, cmd); |
4617 | } |
4618 | |
4619 | return SUCCESS; |
4620 | } |
4621 | |
4622 | #if 0 /* unused and broken.. */ |
4623 | /*========================================================== |
4624 | ** |
4625 | ** |
4626 | ** Abort an SCSI command. |
4627 | ** This is called from the generic SCSI driver. |
4628 | ** |
4629 | ** |
4630 | **========================================================== |
4631 | */ |
4632 | static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd) |
4633 | { |
4634 | /* struct scsi_device *device = cmd->device; */ |
4635 | struct ccb *cp; |
4636 | int found; |
4637 | int retv; |
4638 | |
4639 | /* |
4640 | * First, look for the scsi command in the waiting list |
4641 | */ |
4642 | if (remove_from_waiting_list(np, cmd)) { |
4643 | cmd->result = ScsiResult(DID_ABORT, 0); |
4644 | ncr_queue_done_cmd(np, cmd); |
4645 | return SCSI_ABORT_SUCCESS; |
4646 | } |
4647 | |
4648 | /* |
4649 | * Then, look in the wakeup list |
4650 | */ |
4651 | for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { |
4652 | /* |
4653 | ** look for the ccb of this command. |
4654 | */ |
4655 | if (cp->host_status == HS_IDLE) continue; |
4656 | if (cp->cmd == cmd) { |
4657 | found = 1; |
4658 | break; |
4659 | } |
4660 | } |
4661 | |
4662 | if (!found) { |
4663 | return SCSI_ABORT_NOT_RUNNING; |
4664 | } |
4665 | |
4666 | if (np->settle_time) { |
4667 | return SCSI_ABORT_SNOOZE; |
4668 | } |
4669 | |
4670 | /* |
4671 | ** If the CCB is active, patch schedule jumps for the |
4672 | ** script to abort the command. |
4673 | */ |
4674 | |
4675 | switch(cp->host_status) { |
4676 | case HS_BUSY: |
4677 | case HS_NEGOTIATE: |
4678 | printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp); |
4679 | cp->start.schedule.l_paddr = |
4680 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel)); |
4681 | retv = SCSI_ABORT_PENDING; |
4682 | break; |
4683 | case HS_DISCONNECT: |
4684 | cp->restart.schedule.l_paddr = |
4685 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); |
4686 | retv = SCSI_ABORT_PENDING; |
4687 | break; |
4688 | default: |
4689 | retv = SCSI_ABORT_NOT_RUNNING; |
4690 | break; |
4691 | |
4692 | } |
4693 | |
4694 | /* |
4695 | ** If there are no requests, the script |
4696 | ** processor will sleep on SEL_WAIT_RESEL. |
4697 | ** Let's wake it up, since it may have to work. |
4698 | */ |
4699 | OUTB (nc_istat, SIGP); |
4700 | |
4701 | return retv; |
4702 | } |
4703 | #endif |
4704 | |
4705 | static void ncr_detach(struct ncb *np) |
4706 | { |
4707 | struct ccb *cp; |
4708 | struct tcb *tp; |
4709 | struct lcb *lp; |
4710 | int target, lun; |
4711 | int i; |
4712 | char inst_name[16]; |
4713 | |
4714 | /* Local copy so we don't access np after freeing it! */ |
4715 | strlcpy(inst_name, ncr_name(np), sizeof(inst_name)); |
4716 | |
4717 | printk("%s: releasing host resources\n", ncr_name(np)); |
4718 | |
4719 | /* |
4720 | ** Stop the ncr_timeout process |
4721 | ** Set release_stage to 1 and wait that ncr_timeout() set it to 2. |
4722 | */ |
4723 | |
4724 | #ifdef DEBUG_NCR53C8XX |
4725 | printk("%s: stopping the timer\n", ncr_name(np)); |
4726 | #endif |
4727 | np->release_stage = 1; |
4728 | for (i = 50 ; i && np->release_stage != 2 ; i--) |
4729 | mdelay(100); |
4730 | if (np->release_stage != 2) |
4731 | printk("%s: the timer seems to be already stopped\n", ncr_name(np)); |
4732 | else np->release_stage = 2; |
4733 | |
4734 | /* |
4735 | ** Disable chip interrupts |
4736 | */ |
4737 | |
4738 | #ifdef DEBUG_NCR53C8XX |
4739 | printk("%s: disabling chip interrupts\n", ncr_name(np)); |
4740 | #endif |
4741 | OUTW (nc_sien , 0); |
4742 | OUTB (nc_dien , 0); |
4743 | |
4744 | /* |
4745 | ** Reset NCR chip |
4746 | ** Restore bios setting for automatic clock detection. |
4747 | */ |
4748 | |
4749 | printk("%s: resetting chip\n", ncr_name(np)); |
4750 | ncr_chip_reset(np, 100); |
4751 | |
4752 | OUTB(nc_dmode, np->sv_dmode); |
4753 | OUTB(nc_dcntl, np->sv_dcntl); |
4754 | OUTB(nc_ctest0, np->sv_ctest0); |
4755 | OUTB(nc_ctest3, np->sv_ctest3); |
4756 | OUTB(nc_ctest4, np->sv_ctest4); |
4757 | OUTB(nc_ctest5, np->sv_ctest5); |
4758 | OUTB(nc_gpcntl, np->sv_gpcntl); |
4759 | OUTB(nc_stest2, np->sv_stest2); |
4760 | |
4761 | ncr_selectclock(np, np->sv_scntl3); |
4762 | |
4763 | /* |
4764 | ** Free allocated ccb(s) |
4765 | */ |
4766 | |
4767 | while ((cp=np->ccb->link_ccb) != NULL) { |
4768 | np->ccb->link_ccb = cp->link_ccb; |
4769 | if (cp->host_status) { |
4770 | printk("%s: shall free an active ccb (host_status=%d)\n", |
4771 | ncr_name(np), cp->host_status); |
4772 | } |
4773 | #ifdef DEBUG_NCR53C8XX |
4774 | printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp); |
4775 | #endif |
4776 | m_free_dma(cp, sizeof(*cp), "CCB"); |
4777 | } |
4778 | |
4779 | /* Free allocated tp(s) */ |
4780 | |
4781 | for (target = 0; target < MAX_TARGET ; target++) { |
4782 | tp=&np->target[target]; |
4783 | for (lun = 0 ; lun < MAX_LUN ; lun++) { |
4784 | lp = tp->lp[lun]; |
4785 | if (lp) { |
4786 | #ifdef DEBUG_NCR53C8XX |
4787 | printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp); |
4788 | #endif |
4789 | if (lp->jump_ccb != &lp->jump_ccb_0) |
4790 | m_free_dma(lp->jump_ccb,256,"JUMP_CCB"); |
4791 | m_free_dma(lp, sizeof(*lp), "LCB"); |
4792 | } |
4793 | } |
4794 | } |
4795 | |
4796 | if (np->scripth0) |
4797 | m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); |
4798 | if (np->script0) |
4799 | m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); |
4800 | if (np->ccb) |
4801 | m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); |
4802 | m_free_dma(np, sizeof(struct ncb), "NCB"); |
4803 | |
4804 | printk("%s: host resources successfully released\n", inst_name); |
4805 | } |
4806 | |
4807 | /*========================================================== |
4808 | ** |
4809 | ** |
4810 | ** Complete execution of a SCSI command. |
4811 | ** Signal completion to the generic SCSI driver. |
4812 | ** |
4813 | ** |
4814 | **========================================================== |
4815 | */ |
4816 | |
4817 | void ncr_complete (struct ncb *np, struct ccb *cp) |
4818 | { |
4819 | struct scsi_cmnd *cmd; |
4820 | struct tcb *tp; |
4821 | struct lcb *lp; |
4822 | |
4823 | /* |
4824 | ** Sanity check |
4825 | */ |
4826 | |
4827 | if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) |
4828 | return; |
4829 | |
4830 | /* |
4831 | ** Print minimal debug information. |
4832 | */ |
4833 | |
4834 | if (DEBUG_FLAGS & DEBUG_TINY) |
4835 | printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp, |
4836 | cp->host_status,cp->scsi_status); |
4837 | |
4838 | /* |
4839 | ** Get command, target and lun pointers. |
4840 | */ |
4841 | |
4842 | cmd = cp->cmd; |
4843 | cp->cmd = NULL; |
4844 | tp = &np->target[cmd->device->id]; |
4845 | lp = tp->lp[cmd->device->lun]; |
4846 | |
4847 | /* |
4848 | ** We donnot queue more than 1 ccb per target |
4849 | ** with negotiation at any time. If this ccb was |
4850 | ** used for negotiation, clear this info in the tcb. |
4851 | */ |
4852 | |
4853 | if (cp == tp->nego_cp) |
4854 | tp->nego_cp = NULL; |
4855 | |
4856 | /* |
4857 | ** If auto-sense performed, change scsi status. |
4858 | */ |
4859 | if (cp->auto_sense) { |
4860 | cp->scsi_status = cp->auto_sense; |
4861 | } |
4862 | |
4863 | /* |
4864 | ** If we were recovering from queue full or performing |
4865 | ** auto-sense, requeue skipped CCBs to the wait queue. |
4866 | */ |
4867 | |
4868 | if (lp && lp->held_ccb) { |
4869 | if (cp == lp->held_ccb) { |
4870 | list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq); |
4871 | lp->held_ccb = NULL; |
4872 | } |
4873 | } |
4874 | |
4875 | /* |
4876 | ** Check for parity errors. |
4877 | */ |
4878 | |
4879 | if (cp->parity_status > 1) { |
4880 | PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status); |
4881 | } |
4882 | |
4883 | /* |
4884 | ** Check for extended errors. |
4885 | */ |
4886 | |
4887 | if (cp->xerr_status != XE_OK) { |
4888 | switch (cp->xerr_status) { |
4889 | case XE_EXTRA_DATA: |
4890 | PRINT_ADDR(cmd, "extraneous data discarded.\n"); |
4891 | break; |
4892 | case XE_BAD_PHASE: |
4893 | PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n"); |
4894 | break; |
4895 | default: |
4896 | PRINT_ADDR(cmd, "extended error %d.\n", |
4897 | cp->xerr_status); |
4898 | break; |
4899 | } |
4900 | if (cp->host_status==HS_COMPLETE) |
4901 | cp->host_status = HS_FAIL; |
4902 | } |
4903 | |
4904 | /* |
4905 | ** Print out any error for debugging purpose. |
4906 | */ |
4907 | if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { |
4908 | if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) { |
4909 | PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " |
4910 | "scsi_status=%x\n", cmd->cmnd[0], |
4911 | cp->host_status, cp->scsi_status); |
4912 | } |
4913 | } |
4914 | |
4915 | /* |
4916 | ** Check the status. |
4917 | */ |
4918 | if ( (cp->host_status == HS_COMPLETE) |
4919 | && (cp->scsi_status == S_GOOD || |
4920 | cp->scsi_status == S_COND_MET)) { |
4921 | /* |
4922 | * All went well (GOOD status). |
4923 | * CONDITION MET status is returned on |
4924 | * `Pre-Fetch' or `Search data' success. |
4925 | */ |
4926 | cmd->result = ScsiResult(DID_OK, cp->scsi_status); |
4927 | |
4928 | /* |
4929 | ** @RESID@ |
4930 | ** Could dig out the correct value for resid, |
4931 | ** but it would be quite complicated. |
4932 | */ |
4933 | /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ |
4934 | |
4935 | /* |
4936 | ** Allocate the lcb if not yet. |
4937 | */ |
4938 | if (!lp) |
4939 | ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun); |
4940 | |
4941 | tp->bytes += cp->data_len; |
4942 | tp->transfers ++; |
4943 | |
4944 | /* |
4945 | ** If tags was reduced due to queue full, |
4946 | ** increase tags if 1000 good status received. |
4947 | */ |
4948 | if (lp && lp->usetags && lp->numtags < lp->maxtags) { |
4949 | ++lp->num_good; |
4950 | if (lp->num_good >= 1000) { |
4951 | lp->num_good = 0; |
4952 | ++lp->numtags; |
4953 | ncr_setup_tags (np, cmd->device); |
4954 | } |
4955 | } |
4956 | } else if ((cp->host_status == HS_COMPLETE) |
4957 | && (cp->scsi_status == S_CHECK_COND)) { |
4958 | /* |
4959 | ** Check condition code |
4960 | */ |
4961 | cmd->result = ScsiResult(DID_OK, S_CHECK_COND); |
4962 | |
4963 | /* |
4964 | ** Copy back sense data to caller's buffer. |
4965 | */ |
4966 | memcpy(cmd->sense_buffer, cp->sense_buf, |
4967 | min_t(size_t, SCSI_SENSE_BUFFERSIZE, |
4968 | sizeof(cp->sense_buf))); |
4969 | |
4970 | if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { |
4971 | u_char *p = cmd->sense_buffer; |
4972 | int i; |
4973 | PRINT_ADDR(cmd, "sense data:"); |
4974 | for (i=0; i<14; i++) printk (" %x", *p++); |
4975 | printk (".\n"); |
4976 | } |
4977 | } else if ((cp->host_status == HS_COMPLETE) |
4978 | && (cp->scsi_status == S_CONFLICT)) { |
4979 | /* |
4980 | ** Reservation Conflict condition code |
4981 | */ |
4982 | cmd->result = ScsiResult(DID_OK, S_CONFLICT); |
4983 | |
4984 | } else if ((cp->host_status == HS_COMPLETE) |
4985 | && (cp->scsi_status == S_BUSY || |
4986 | cp->scsi_status == S_QUEUE_FULL)) { |
4987 | |
4988 | /* |
4989 | ** Target is busy. |
4990 | */ |
4991 | cmd->result = ScsiResult(DID_OK, cp->scsi_status); |
4992 | |
4993 | } else if ((cp->host_status == HS_SEL_TIMEOUT) |
4994 | || (cp->host_status == HS_TIMEOUT)) { |
4995 | |
4996 | /* |
4997 | ** No response |
4998 | */ |
4999 | cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status); |
5000 | |
5001 | } else if (cp->host_status == HS_RESET) { |
5002 | |
5003 | /* |
5004 | ** SCSI bus reset |
5005 | */ |
5006 | cmd->result = ScsiResult(DID_RESET, cp->scsi_status); |
5007 | |
5008 | } else if (cp->host_status == HS_ABORTED) { |
5009 | |
5010 | /* |
5011 | ** Transfer aborted |
5012 | */ |
5013 | cmd->result = ScsiResult(DID_ABORT, cp->scsi_status); |
5014 | |
5015 | } else { |
5016 | |
5017 | /* |
5018 | ** Other protocol messes |
5019 | */ |
5020 | PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n", |
5021 | cp->host_status, cp->scsi_status, cp); |
5022 | |
5023 | cmd->result = ScsiResult(DID_ERROR, cp->scsi_status); |
5024 | } |
5025 | |
5026 | /* |
5027 | ** trace output |
5028 | */ |
5029 | |
5030 | if (tp->usrflag & UF_TRACE) { |
5031 | u_char * p; |
5032 | int i; |
5033 | PRINT_ADDR(cmd, " CMD:"); |
5034 | p = (u_char*) &cmd->cmnd[0]; |
5035 | for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++); |
5036 | |
5037 | if (cp->host_status==HS_COMPLETE) { |
5038 | switch (cp->scsi_status) { |
5039 | case S_GOOD: |
5040 | printk (" GOOD"); |
5041 | break; |
5042 | case S_CHECK_COND: |
5043 | printk (" SENSE:"); |
5044 | p = (u_char*) &cmd->sense_buffer; |
5045 | for (i=0; i<14; i++) |
5046 | printk (" %x", *p++); |
5047 | break; |
5048 | default: |
5049 | printk (" STAT: %x\n", cp->scsi_status); |
5050 | break; |
5051 | } |
5052 | } else printk (" HOSTERROR: %x", cp->host_status); |
5053 | printk ("\n"); |
5054 | } |
5055 | |
5056 | /* |
5057 | ** Free this ccb |
5058 | */ |
5059 | ncr_free_ccb (np, cp); |
5060 | |
5061 | /* |
5062 | ** requeue awaiting scsi commands for this lun. |
5063 | */ |
5064 | if (lp && lp->queuedccbs < lp->queuedepth && |
5065 | !list_empty(&lp->wait_ccbq)) |
5066 | ncr_start_next_ccb(np, lp, 2); |
5067 | |
5068 | /* |
5069 | ** requeue awaiting scsi commands for this controller. |
5070 | */ |
5071 | if (np->waiting_list) |
5072 | requeue_waiting_list(np); |
5073 | |
5074 | /* |
5075 | ** signal completion to generic driver. |
5076 | */ |
5077 | ncr_queue_done_cmd(np, cmd); |
5078 | } |
5079 | |
5080 | /*========================================================== |
5081 | ** |
5082 | ** |
5083 | ** Signal all (or one) control block done. |
5084 | ** |
5085 | ** |
5086 | **========================================================== |
5087 | */ |
5088 | |
5089 | /* |
5090 | ** This CCB has been skipped by the NCR. |
5091 | ** Queue it in the corresponding unit queue. |
5092 | */ |
5093 | static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) |
5094 | { |
5095 | struct tcb *tp = &np->target[cp->target]; |
5096 | struct lcb *lp = tp->lp[cp->lun]; |
5097 | |
5098 | if (lp && cp != np->ccb) { |
5099 | cp->host_status &= ~HS_SKIPMASK; |
5100 | cp->start.schedule.l_paddr = |
5101 | cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
5102 | list_move_tail(&cp->link_ccbq, &lp->skip_ccbq); |
5103 | if (cp->queued) { |
5104 | --lp->queuedccbs; |
5105 | } |
5106 | } |
5107 | if (cp->queued) { |
5108 | --np->queuedccbs; |
5109 | cp->queued = 0; |
5110 | } |
5111 | } |
5112 | |
5113 | /* |
5114 | ** The NCR has completed CCBs. |
5115 | ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs |
5116 | */ |
5117 | void ncr_wakeup_done (struct ncb *np) |
5118 | { |
5119 | struct ccb *cp; |
5120 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
5121 | int i, j; |
5122 | |
5123 | i = np->ccb_done_ic; |
5124 | while (1) { |
5125 | j = i+1; |
5126 | if (j >= MAX_DONE) |
5127 | j = 0; |
5128 | |
5129 | cp = np->ccb_done[j]; |
5130 | if (!CCB_DONE_VALID(cp)) |
5131 | break; |
5132 | |
5133 | np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; |
5134 | np->scripth->done_queue[5*j + 4] = |
5135 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); |
5136 | MEMORY_BARRIER(); |
5137 | np->scripth->done_queue[5*i + 4] = |
5138 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); |
5139 | |
5140 | if (cp->host_status & HS_DONEMASK) |
5141 | ncr_complete (np, cp); |
5142 | else if (cp->host_status & HS_SKIPMASK) |
5143 | ncr_ccb_skipped (np, cp); |
5144 | |
5145 | i = j; |
5146 | } |
5147 | np->ccb_done_ic = i; |
5148 | #else |
5149 | cp = np->ccb; |
5150 | while (cp) { |
5151 | if (cp->host_status & HS_DONEMASK) |
5152 | ncr_complete (np, cp); |
5153 | else if (cp->host_status & HS_SKIPMASK) |
5154 | ncr_ccb_skipped (np, cp); |
5155 | cp = cp->link_ccb; |
5156 | } |
5157 | #endif |
5158 | } |
5159 | |
5160 | /* |
5161 | ** Complete all active CCBs. |
5162 | */ |
5163 | void ncr_wakeup (struct ncb *np, u_long code) |
5164 | { |
5165 | struct ccb *cp = np->ccb; |
5166 | |
5167 | while (cp) { |
5168 | if (cp->host_status != HS_IDLE) { |
5169 | cp->host_status = code; |
5170 | ncr_complete (np, cp); |
5171 | } |
5172 | cp = cp->link_ccb; |
5173 | } |
5174 | } |
5175 | |
5176 | /* |
5177 | ** Reset ncr chip. |
5178 | */ |
5179 | |
5180 | /* Some initialisation must be done immediately following reset, for 53c720, |
5181 | * at least. EA (dcntl bit 5) isn't set here as it is set once only in |
5182 | * the _detect function. |
5183 | */ |
5184 | static void ncr_chip_reset(struct ncb *np, int delay) |
5185 | { |
5186 | OUTB (nc_istat, SRST); |
5187 | udelay(delay); |
5188 | OUTB (nc_istat, 0 ); |
5189 | |
5190 | if (np->features & FE_EHP) |
5191 | OUTB (nc_ctest0, EHP); |
5192 | if (np->features & FE_MUX) |
5193 | OUTB (nc_ctest4, MUX); |
5194 | } |
5195 | |
5196 | |
5197 | /*========================================================== |
5198 | ** |
5199 | ** |
5200 | ** Start NCR chip. |
5201 | ** |
5202 | ** |
5203 | **========================================================== |
5204 | */ |
5205 | |
5206 | void ncr_init (struct ncb *np, int reset, char * msg, u_long code) |
5207 | { |
5208 | int i; |
5209 | |
5210 | /* |
5211 | ** Reset chip if asked, otherwise just clear fifos. |
5212 | */ |
5213 | |
5214 | if (reset) { |
5215 | OUTB (nc_istat, SRST); |
5216 | udelay(100); |
5217 | } |
5218 | else { |
5219 | OUTB (nc_stest3, TE|CSF); |
5220 | OUTONB (nc_ctest3, CLF); |
5221 | } |
5222 | |
5223 | /* |
5224 | ** Message. |
5225 | */ |
5226 | |
5227 | if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg); |
5228 | |
5229 | /* |
5230 | ** Clear Start Queue |
5231 | */ |
5232 | np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ |
5233 | for (i = 1; i < MAX_START + MAX_START; i += 2) |
5234 | np->scripth0->tryloop[i] = |
5235 | cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
5236 | |
5237 | /* |
5238 | ** Start at first entry. |
5239 | */ |
5240 | np->squeueput = 0; |
5241 | np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); |
5242 | |
5243 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
5244 | /* |
5245 | ** Clear Done Queue |
5246 | */ |
5247 | for (i = 0; i < MAX_DONE; i++) { |
5248 | np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; |
5249 | np->scripth0->done_queue[5*i + 4] = |
5250 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); |
5251 | } |
5252 | #endif |
5253 | |
5254 | /* |
5255 | ** Start at first entry. |
5256 | */ |
5257 | np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); |
5258 | np->ccb_done_ic = MAX_DONE-1; |
5259 | np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = |
5260 | cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); |
5261 | |
5262 | /* |
5263 | ** Wakeup all pending jobs. |
5264 | */ |
5265 | ncr_wakeup (np, code); |
5266 | |
5267 | /* |
5268 | ** Init chip. |
5269 | */ |
5270 | |
5271 | /* |
5272 | ** Remove reset; big delay because the 895 needs time for the |
5273 | ** bus mode to settle |
5274 | */ |
5275 | ncr_chip_reset(np, 2000); |
5276 | |
5277 | OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); |
5278 | /* full arb., ena parity, par->ATN */ |
5279 | OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ |
5280 | |
5281 | ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ |
5282 | |
5283 | OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ |
5284 | OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ |
5285 | OUTB (nc_istat , SIGP ); /* Signal Process */ |
5286 | OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ |
5287 | OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ |
5288 | |
5289 | OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ |
5290 | OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ |
5291 | OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ |
5292 | OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ |
5293 | |
5294 | OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ |
5295 | OUTB (nc_stest3, TE); /* TolerANT enable */ |
5296 | OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ |
5297 | |
5298 | /* |
5299 | ** Disable disconnects. |
5300 | */ |
5301 | |
5302 | np->disc = 0; |
5303 | |
5304 | /* |
5305 | ** Enable GPIO0 pin for writing if LED support. |
5306 | */ |
5307 | |
5308 | if (np->features & FE_LED0) { |
5309 | OUTOFFB (nc_gpcntl, 0x01); |
5310 | } |
5311 | |
5312 | /* |
5313 | ** enable ints |
5314 | */ |
5315 | |
5316 | OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); |
5317 | OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); |
5318 | |
5319 | /* |
5320 | ** Fill in target structure. |
5321 | ** Reinitialize usrsync. |
5322 | ** Reinitialize usrwide. |
5323 | ** Prepare sync negotiation according to actual SCSI bus mode. |
5324 | */ |
5325 | |
5326 | for (i=0;i<MAX_TARGET;i++) { |
5327 | struct tcb *tp = &np->target[i]; |
5328 | |
5329 | tp->sval = 0; |
5330 | tp->wval = np->rv_scntl3; |
5331 | |
5332 | if (tp->usrsync != 255) { |
5333 | if (tp->usrsync <= np->maxsync) { |
5334 | if (tp->usrsync < np->minsync) { |
5335 | tp->usrsync = np->minsync; |
5336 | } |
5337 | } |
5338 | else |
5339 | tp->usrsync = 255; |
5340 | } |
5341 | |
5342 | if (tp->usrwide > np->maxwide) |
5343 | tp->usrwide = np->maxwide; |
5344 | |
5345 | } |
5346 | |
5347 | /* |
5348 | ** Start script processor. |
5349 | */ |
5350 | if (np->paddr2) { |
5351 | if (bootverbose) |
5352 | printk ("%s: Downloading SCSI SCRIPTS.\n", |
5353 | ncr_name(np)); |
5354 | OUTL (nc_scratcha, vtobus(np->script0)); |
5355 | OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); |
5356 | } |
5357 | else |
5358 | OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); |
5359 | } |
5360 | |
5361 | /*========================================================== |
5362 | ** |
5363 | ** Prepare the negotiation values for wide and |
5364 | ** synchronous transfers. |
5365 | ** |
5366 | **========================================================== |
5367 | */ |
5368 | |
5369 | static void ncr_negotiate (struct ncb* np, struct tcb* tp) |
5370 | { |
5371 | /* |
5372 | ** minsync unit is 4ns ! |
5373 | */ |
5374 | |
5375 | u_long minsync = tp->usrsync; |
5376 | |
5377 | /* |
5378 | ** SCSI bus mode limit |
5379 | */ |
5380 | |
5381 | if (np->scsi_mode && np->scsi_mode == SMODE_SE) { |
5382 | if (minsync < 12) minsync = 12; |
5383 | } |
5384 | |
5385 | /* |
5386 | ** our limit .. |
5387 | */ |
5388 | |
5389 | if (minsync < np->minsync) |
5390 | minsync = np->minsync; |
5391 | |
5392 | /* |
5393 | ** divider limit |
5394 | */ |
5395 | |
5396 | if (minsync > np->maxsync) |
5397 | minsync = 255; |
5398 | |
5399 | if (tp->maxoffs > np->maxoffs) |
5400 | tp->maxoffs = np->maxoffs; |
5401 | |
5402 | tp->minsync = minsync; |
5403 | tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); |
5404 | |
5405 | /* |
5406 | ** period=0: has to negotiate sync transfer |
5407 | */ |
5408 | |
5409 | tp->period=0; |
5410 | |
5411 | /* |
5412 | ** widedone=0: has to negotiate wide transfer |
5413 | */ |
5414 | tp->widedone=0; |
5415 | } |
5416 | |
5417 | /*========================================================== |
5418 | ** |
5419 | ** Get clock factor and sync divisor for a given |
5420 | ** synchronous factor period. |
5421 | ** Returns the clock factor (in sxfer) and scntl3 |
5422 | ** synchronous divisor field. |
5423 | ** |
5424 | **========================================================== |
5425 | */ |
5426 | |
5427 | static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) |
5428 | { |
5429 | u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ |
5430 | int div = np->clock_divn; /* Number of divisors supported */ |
5431 | u_long fak; /* Sync factor in sxfer */ |
5432 | u_long per; /* Period in tenths of ns */ |
5433 | u_long kpc; /* (per * clk) */ |
5434 | |
5435 | /* |
5436 | ** Compute the synchronous period in tenths of nano-seconds |
5437 | */ |
5438 | if (sfac <= 10) per = 250; |
5439 | else if (sfac == 11) per = 303; |
5440 | else if (sfac == 12) per = 500; |
5441 | else per = 40 * sfac; |
5442 | |
5443 | /* |
5444 | ** Look for the greatest clock divisor that allows an |
5445 | ** input speed faster than the period. |
5446 | */ |
5447 | kpc = per * clk; |
5448 | while (--div > 0) |
5449 | if (kpc >= (div_10M[div] << 2)) break; |
5450 | |
5451 | /* |
5452 | ** Calculate the lowest clock factor that allows an output |
5453 | ** speed not faster than the period. |
5454 | */ |
5455 | fak = (kpc - 1) / div_10M[div] + 1; |
5456 | |
5457 | #if 0 /* This optimization does not seem very useful */ |
5458 | |
5459 | per = (fak * div_10M[div]) / clk; |
5460 | |
5461 | /* |
5462 | ** Why not to try the immediate lower divisor and to choose |
5463 | ** the one that allows the fastest output speed ? |
5464 | ** We don't want input speed too much greater than output speed. |
5465 | */ |
5466 | if (div >= 1 && fak < 8) { |
5467 | u_long fak2, per2; |
5468 | fak2 = (kpc - 1) / div_10M[div-1] + 1; |
5469 | per2 = (fak2 * div_10M[div-1]) / clk; |
5470 | if (per2 < per && fak2 <= 8) { |
5471 | fak = fak2; |
5472 | per = per2; |
5473 | --div; |
5474 | } |
5475 | } |
5476 | #endif |
5477 | |
5478 | if (fak < 4) fak = 4; /* Should never happen, too bad ... */ |
5479 | |
5480 | /* |
5481 | ** Compute and return sync parameters for the ncr |
5482 | */ |
5483 | *fakp = fak - 4; |
5484 | *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); |
5485 | } |
5486 | |
5487 | |
5488 | /*========================================================== |
5489 | ** |
5490 | ** Set actual values, sync status and patch all ccbs of |
5491 | ** a target according to new sync/wide agreement. |
5492 | ** |
5493 | **========================================================== |
5494 | */ |
5495 | |
5496 | static void ncr_set_sync_wide_status (struct ncb *np, u_char target) |
5497 | { |
5498 | struct ccb *cp; |
5499 | struct tcb *tp = &np->target[target]; |
5500 | |
5501 | /* |
5502 | ** set actual value and sync_status |
5503 | */ |
5504 | OUTB (nc_sxfer, tp->sval); |
5505 | np->sync_st = tp->sval; |
5506 | OUTB (nc_scntl3, tp->wval); |
5507 | np->wide_st = tp->wval; |
5508 | |
5509 | /* |
5510 | ** patch ALL ccbs of this target. |
5511 | */ |
5512 | for (cp = np->ccb; cp; cp = cp->link_ccb) { |
5513 | if (!cp->cmd) continue; |
5514 | if (scmd_id(cp->cmd) != target) continue; |
5515 | #if 0 |
5516 | cp->sync_status = tp->sval; |
5517 | cp->wide_status = tp->wval; |
5518 | #endif |
5519 | cp->phys.select.sel_scntl3 = tp->wval; |
5520 | cp->phys.select.sel_sxfer = tp->sval; |
5521 | } |
5522 | } |
5523 | |
5524 | /*========================================================== |
5525 | ** |
5526 | ** Switch sync mode for current job and it's target |
5527 | ** |
5528 | **========================================================== |
5529 | */ |
5530 | |
5531 | static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) |
5532 | { |
5533 | struct scsi_cmnd *cmd = cp->cmd; |
5534 | struct tcb *tp; |
5535 | u_char target = INB (nc_sdid) & 0x0f; |
5536 | u_char idiv; |
5537 | |
5538 | BUG_ON(target != (scmd_id(cmd) & 0xf)); |
5539 | |
5540 | tp = &np->target[target]; |
5541 | |
5542 | if (!scntl3 || !(sxfer & 0x1f)) |
5543 | scntl3 = np->rv_scntl3; |
5544 | scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); |
5545 | |
5546 | /* |
5547 | ** Deduce the value of controller sync period from scntl3. |
5548 | ** period is in tenths of nano-seconds. |
5549 | */ |
5550 | |
5551 | idiv = ((scntl3 >> 4) & 0x7); |
5552 | if ((sxfer & 0x1f) && idiv) |
5553 | tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; |
5554 | else |
5555 | tp->period = 0xffff; |
5556 | |
5557 | /* Stop there if sync parameters are unchanged */ |
5558 | if (tp->sval == sxfer && tp->wval == scntl3) |
5559 | return; |
5560 | tp->sval = sxfer; |
5561 | tp->wval = scntl3; |
5562 | |
5563 | if (sxfer & 0x01f) { |
5564 | /* Disable extended Sreq/Sack filtering */ |
5565 | if (tp->period <= 2000) |
5566 | OUTOFFB(nc_stest2, EXT); |
5567 | } |
5568 | |
5569 | spi_display_xfer_agreement(tp->starget); |
5570 | |
5571 | /* |
5572 | ** set actual value and sync_status |
5573 | ** patch ALL ccbs of this target. |
5574 | */ |
5575 | ncr_set_sync_wide_status(np, target); |
5576 | } |
5577 | |
5578 | /*========================================================== |
5579 | ** |
5580 | ** Switch wide mode for current job and it's target |
5581 | ** SCSI specs say: a SCSI device that accepts a WDTR |
5582 | ** message shall reset the synchronous agreement to |
5583 | ** asynchronous mode. |
5584 | ** |
5585 | **========================================================== |
5586 | */ |
5587 | |
5588 | static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) |
5589 | { |
5590 | struct scsi_cmnd *cmd = cp->cmd; |
5591 | u16 target = INB (nc_sdid) & 0x0f; |
5592 | struct tcb *tp; |
5593 | u_char scntl3; |
5594 | u_char sxfer; |
5595 | |
5596 | BUG_ON(target != (scmd_id(cmd) & 0xf)); |
5597 | |
5598 | tp = &np->target[target]; |
5599 | tp->widedone = wide+1; |
5600 | scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); |
5601 | |
5602 | sxfer = ack ? 0 : tp->sval; |
5603 | |
5604 | /* |
5605 | ** Stop there if sync/wide parameters are unchanged |
5606 | */ |
5607 | if (tp->sval == sxfer && tp->wval == scntl3) return; |
5608 | tp->sval = sxfer; |
5609 | tp->wval = scntl3; |
5610 | |
5611 | /* |
5612 | ** Bells and whistles ;-) |
5613 | */ |
5614 | if (bootverbose >= 2) { |
5615 | dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n", |
5616 | (scntl3 & EWS) ? "en" : "dis"); |
5617 | } |
5618 | |
5619 | /* |
5620 | ** set actual value and sync_status |
5621 | ** patch ALL ccbs of this target. |
5622 | */ |
5623 | ncr_set_sync_wide_status(np, target); |
5624 | } |
5625 | |
5626 | /*========================================================== |
5627 | ** |
5628 | ** Switch tagged mode for a target. |
5629 | ** |
5630 | **========================================================== |
5631 | */ |
5632 | |
5633 | static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) |
5634 | { |
5635 | unsigned char tn = sdev->id, ln = sdev->lun; |
5636 | struct tcb *tp = &np->target[tn]; |
5637 | struct lcb *lp = tp->lp[ln]; |
5638 | u_char reqtags, maxdepth; |
5639 | |
5640 | /* |
5641 | ** Just in case ... |
5642 | */ |
5643 | if ((!tp) || (!lp) || !sdev) |
5644 | return; |
5645 | |
5646 | /* |
5647 | ** If SCSI device queue depth is not yet set, leave here. |
5648 | */ |
5649 | if (!lp->scdev_depth) |
5650 | return; |
5651 | |
5652 | /* |
5653 | ** Donnot allow more tags than the SCSI driver can queue |
5654 | ** for this device. |
5655 | ** Donnot allow more tags than we can handle. |
5656 | */ |
5657 | maxdepth = lp->scdev_depth; |
5658 | if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; |
5659 | if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; |
5660 | if (lp->numtags > maxdepth) lp->numtags = maxdepth; |
5661 | |
5662 | /* |
5663 | ** only devices conformant to ANSI Version >= 2 |
5664 | ** only devices capable of tagged commands |
5665 | ** only if enabled by user .. |
5666 | */ |
5667 | if (sdev->tagged_supported && lp->numtags > 1) { |
5668 | reqtags = lp->numtags; |
5669 | } else { |
5670 | reqtags = 1; |
5671 | } |
5672 | |
5673 | /* |
5674 | ** Update max number of tags |
5675 | */ |
5676 | lp->numtags = reqtags; |
5677 | if (lp->numtags > lp->maxtags) |
5678 | lp->maxtags = lp->numtags; |
5679 | |
5680 | /* |
5681 | ** If we want to switch tag mode, we must wait |
5682 | ** for no CCB to be active. |
5683 | */ |
5684 | if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ |
5685 | if (lp->queuedepth == reqtags) /* Already announced */ |
5686 | return; |
5687 | lp->queuedepth = reqtags; |
5688 | } |
5689 | else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ |
5690 | lp->queuedepth = reqtags; |
5691 | return; |
5692 | } |
5693 | else { /* Want to switch tag mode */ |
5694 | if (lp->busyccbs) /* If not yet safe, return */ |
5695 | return; |
5696 | lp->queuedepth = reqtags; |
5697 | lp->usetags = reqtags > 1 ? 1 : 0; |
5698 | } |
5699 | |
5700 | /* |
5701 | ** Patch the lun mini-script, according to tag mode. |
5702 | */ |
5703 | lp->jump_tag.l_paddr = lp->usetags? |
5704 | cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : |
5705 | cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); |
5706 | |
5707 | /* |
5708 | ** Announce change to user. |
5709 | */ |
5710 | if (bootverbose) { |
5711 | if (lp->usetags) { |
5712 | dev_info(&sdev->sdev_gendev, |
5713 | "tagged command queue depth set to %d\n", |
5714 | reqtags); |
5715 | } else { |
5716 | dev_info(&sdev->sdev_gendev, |
5717 | "tagged command queueing disabled\n"); |
5718 | } |
5719 | } |
5720 | } |
5721 | |
5722 | /*========================================================== |
5723 | ** |
5724 | ** |
5725 | ** ncr timeout handler. |
5726 | ** |
5727 | ** |
5728 | **========================================================== |
5729 | ** |
5730 | ** Misused to keep the driver running when |
5731 | ** interrupts are not configured correctly. |
5732 | ** |
5733 | **---------------------------------------------------------- |
5734 | */ |
5735 | |
5736 | static void ncr_timeout (struct ncb *np) |
5737 | { |
5738 | u_long thistime = jiffies; |
5739 | |
5740 | /* |
5741 | ** If release process in progress, let's go |
5742 | ** Set the release stage from 1 to 2 to synchronize |
5743 | ** with the release process. |
5744 | */ |
5745 | |
5746 | if (np->release_stage) { |
5747 | if (np->release_stage == 1) np->release_stage = 2; |
5748 | return; |
5749 | } |
5750 | |
5751 | np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; |
5752 | add_timer(&np->timer); |
5753 | |
5754 | /* |
5755 | ** If we are resetting the ncr, wait for settle_time before |
5756 | ** clearing it. Then command processing will be resumed. |
5757 | */ |
5758 | if (np->settle_time) { |
5759 | if (np->settle_time <= thistime) { |
5760 | if (bootverbose > 1) |
5761 | printk("%s: command processing resumed\n", ncr_name(np)); |
5762 | np->settle_time = 0; |
5763 | np->disc = 1; |
5764 | requeue_waiting_list(np); |
5765 | } |
5766 | return; |
5767 | } |
5768 | |
5769 | /* |
5770 | ** Since the generic scsi driver only allows us 0.5 second |
5771 | ** to perform abort of a command, we must look at ccbs about |
5772 | ** every 0.25 second. |
5773 | */ |
5774 | if (np->lasttime + 4*HZ < thistime) { |
5775 | /* |
5776 | ** block ncr interrupts |
5777 | */ |
5778 | np->lasttime = thistime; |
5779 | } |
5780 | |
5781 | #ifdef SCSI_NCR_BROKEN_INTR |
5782 | if (INB(nc_istat) & (INTF|SIP|DIP)) { |
5783 | |
5784 | /* |
5785 | ** Process pending interrupts. |
5786 | */ |
5787 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("{"); |
5788 | ncr_exception (np); |
5789 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("}"); |
5790 | } |
5791 | #endif /* SCSI_NCR_BROKEN_INTR */ |
5792 | } |
5793 | |
5794 | /*========================================================== |
5795 | ** |
5796 | ** log message for real hard errors |
5797 | ** |
5798 | ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." |
5799 | ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." |
5800 | ** |
5801 | ** exception register: |
5802 | ** ds: dstat |
5803 | ** si: sist |
5804 | ** |
5805 | ** SCSI bus lines: |
5806 | ** so: control lines as driver by NCR. |
5807 | ** si: control lines as seen by NCR. |
5808 | ** sd: scsi data lines as seen by NCR. |
5809 | ** |
5810 | ** wide/fastmode: |
5811 | ** sxfer: (see the manual) |
5812 | ** scntl3: (see the manual) |
5813 | ** |
5814 | ** current script command: |
5815 | ** dsp: script address (relative to start of script). |
5816 | ** dbc: first word of script command. |
5817 | ** |
5818 | ** First 16 register of the chip: |
5819 | ** r0..rf |
5820 | ** |
5821 | **========================================================== |
5822 | */ |
5823 | |
5824 | static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) |
5825 | { |
5826 | u32 dsp; |
5827 | int script_ofs; |
5828 | int script_size; |
5829 | char *script_name; |
5830 | u_char *script_base; |
5831 | int i; |
5832 | |
5833 | dsp = INL (nc_dsp); |
5834 | |
5835 | if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { |
5836 | script_ofs = dsp - np->p_script; |
5837 | script_size = sizeof(struct script); |
5838 | script_base = (u_char *) np->script0; |
5839 | script_name = "script"; |
5840 | } |
5841 | else if (np->p_scripth < dsp && |
5842 | dsp <= np->p_scripth + sizeof(struct scripth)) { |
5843 | script_ofs = dsp - np->p_scripth; |
5844 | script_size = sizeof(struct scripth); |
5845 | script_base = (u_char *) np->scripth0; |
5846 | script_name = "scripth"; |
5847 | } else { |
5848 | script_ofs = dsp; |
5849 | script_size = 0; |
5850 | script_base = NULL; |
5851 | script_name = "mem"; |
5852 | } |
5853 | |
5854 | printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", |
5855 | ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, |
5856 | (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), |
5857 | (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, |
5858 | (unsigned)INL (nc_dbc)); |
5859 | |
5860 | if (((script_ofs & 3) == 0) && |
5861 | (unsigned)script_ofs < script_size) { |
5862 | printk ("%s: script cmd = %08x\n", ncr_name(np), |
5863 | scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); |
5864 | } |
5865 | |
5866 | printk ("%s: regdump:", ncr_name(np)); |
5867 | for (i=0; i<16;i++) |
5868 | printk (" %02x", (unsigned)INB_OFF(i)); |
5869 | printk (".\n"); |
5870 | } |
5871 | |
5872 | /*============================================================ |
5873 | ** |
5874 | ** ncr chip exception handler. |
5875 | ** |
5876 | **============================================================ |
5877 | ** |
5878 | ** In normal cases, interrupt conditions occur one at a |
5879 | ** time. The ncr is able to stack in some extra registers |
5880 | ** other interrupts that will occur after the first one. |
5881 | ** But, several interrupts may occur at the same time. |
5882 | ** |
5883 | ** We probably should only try to deal with the normal |
5884 | ** case, but it seems that multiple interrupts occur in |
5885 | ** some cases that are not abnormal at all. |
5886 | ** |
5887 | ** The most frequent interrupt condition is Phase Mismatch. |
5888 | ** We should want to service this interrupt quickly. |
5889 | ** A SCSI parity error may be delivered at the same time. |
5890 | ** The SIR interrupt is not very frequent in this driver, |
5891 | ** since the INTFLY is likely used for command completion |
5892 | ** signaling. |
5893 | ** The Selection Timeout interrupt may be triggered with |
5894 | ** IID and/or UDC. |
5895 | ** The SBMC interrupt (SCSI Bus Mode Change) may probably |
5896 | ** occur at any time. |
5897 | ** |
5898 | ** This handler try to deal as cleverly as possible with all |
5899 | ** the above. |
5900 | ** |
5901 | **============================================================ |
5902 | */ |
5903 | |
5904 | void ncr_exception (struct ncb *np) |
5905 | { |
5906 | u_char istat, dstat; |
5907 | u16 sist; |
5908 | int i; |
5909 | |
5910 | /* |
5911 | ** interrupt on the fly ? |
5912 | ** Since the global header may be copied back to a CCB |
5913 | ** using a posted PCI memory write, the last operation on |
5914 | ** the istat register is a READ in order to flush posted |
5915 | ** PCI write commands. |
5916 | */ |
5917 | istat = INB (nc_istat); |
5918 | if (istat & INTF) { |
5919 | OUTB (nc_istat, (istat & SIGP) | INTF); |
5920 | istat = INB (nc_istat); |
5921 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("F "); |
5922 | ncr_wakeup_done (np); |
5923 | } |
5924 | |
5925 | if (!(istat & (SIP|DIP))) |
5926 | return; |
5927 | |
5928 | if (istat & CABRT) |
5929 | OUTB (nc_istat, CABRT); |
5930 | |
5931 | /* |
5932 | ** Steinbach's Guideline for Systems Programming: |
5933 | ** Never test for an error condition you don't know how to handle. |
5934 | */ |
5935 | |
5936 | sist = (istat & SIP) ? INW (nc_sist) : 0; |
5937 | dstat = (istat & DIP) ? INB (nc_dstat) : 0; |
5938 | |
5939 | if (DEBUG_FLAGS & DEBUG_TINY) |
5940 | printk ("<%d|%x:%x|%x:%x>", |
5941 | (int)INB(nc_scr0), |
5942 | dstat,sist, |
5943 | (unsigned)INL(nc_dsp), |
5944 | (unsigned)INL(nc_dbc)); |
5945 | |
5946 | /*======================================================== |
5947 | ** First, interrupts we want to service cleanly. |
5948 | ** |
5949 | ** Phase mismatch is the most frequent interrupt, and |
5950 | ** so we have to service it as quickly and as cleanly |
5951 | ** as possible. |
5952 | ** Programmed interrupts are rarely used in this driver, |
5953 | ** but we must handle them cleanly anyway. |
5954 | ** We try to deal with PAR and SBMC combined with |
5955 | ** some other interrupt(s). |
5956 | **========================================================= |
5957 | */ |
5958 | |
5959 | if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && |
5960 | !(dstat & (MDPE|BF|ABRT|IID))) { |
5961 | if ((sist & SBMC) && ncr_int_sbmc (np)) |
5962 | return; |
5963 | if ((sist & PAR) && ncr_int_par (np)) |
5964 | return; |
5965 | if (sist & MA) { |
5966 | ncr_int_ma (np); |
5967 | return; |
5968 | } |
5969 | if (dstat & SIR) { |
5970 | ncr_int_sir (np); |
5971 | return; |
5972 | } |
5973 | /* |
5974 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. |
5975 | */ |
5976 | if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { |
5977 | printk( "%s: unknown interrupt(s) ignored, " |
5978 | "ISTAT=%x DSTAT=%x SIST=%x\n", |
5979 | ncr_name(np), istat, dstat, sist); |
5980 | return; |
5981 | } |
5982 | OUTONB_STD (); |
5983 | return; |
5984 | } |
5985 | |
5986 | /*======================================================== |
5987 | ** Now, interrupts that need some fixing up. |
5988 | ** Order and multiple interrupts is so less important. |
5989 | ** |
5990 | ** If SRST has been asserted, we just reset the chip. |
5991 | ** |
5992 | ** Selection is intirely handled by the chip. If the |
5993 | ** chip says STO, we trust it. Seems some other |
5994 | ** interrupts may occur at the same time (UDC, IID), so |
5995 | ** we ignore them. In any case we do enough fix-up |
5996 | ** in the service routine. |
5997 | ** We just exclude some fatal dma errors. |
5998 | **========================================================= |
5999 | */ |
6000 | |
6001 | if (sist & RST) { |
6002 | ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET); |
6003 | return; |
6004 | } |
6005 | |
6006 | if ((sist & STO) && |
6007 | !(dstat & (MDPE|BF|ABRT))) { |
6008 | /* |
6009 | ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. |
6010 | */ |
6011 | OUTONB (nc_ctest3, CLF); |
6012 | |
6013 | ncr_int_sto (np); |
6014 | return; |
6015 | } |
6016 | |
6017 | /*========================================================= |
6018 | ** Now, interrupts we are not able to recover cleanly. |
6019 | ** (At least for the moment). |
6020 | ** |
6021 | ** Do the register dump. |
6022 | ** Log message for real hard errors. |
6023 | ** Clear all fifos. |
6024 | ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the |
6025 | ** BUS and the chip. |
6026 | ** We are more soft for UDC. |
6027 | **========================================================= |
6028 | */ |
6029 | |
6030 | if (time_after(jiffies, np->regtime)) { |
6031 | np->regtime = jiffies + 10*HZ; |
6032 | for (i = 0; i<sizeof(np->regdump); i++) |
6033 | ((char*)&np->regdump)[i] = INB_OFF(i); |
6034 | np->regdump.nc_dstat = dstat; |
6035 | np->regdump.nc_sist = sist; |
6036 | } |
6037 | |
6038 | ncr_log_hard_error(np, sist, dstat); |
6039 | |
6040 | printk ("%s: have to clear fifos.\n", ncr_name (np)); |
6041 | OUTB (nc_stest3, TE|CSF); |
6042 | OUTONB (nc_ctest3, CLF); |
6043 | |
6044 | if ((sist & (SGE)) || |
6045 | (dstat & (MDPE|BF|ABRT|IID))) { |
6046 | ncr_start_reset(np); |
6047 | return; |
6048 | } |
6049 | |
6050 | if (sist & HTH) { |
6051 | printk ("%s: handshake timeout\n", ncr_name(np)); |
6052 | ncr_start_reset(np); |
6053 | return; |
6054 | } |
6055 | |
6056 | if (sist & UDC) { |
6057 | printk ("%s: unexpected disconnect\n", ncr_name(np)); |
6058 | OUTB (HS_PRT, HS_UNEXPECTED); |
6059 | OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); |
6060 | return; |
6061 | } |
6062 | |
6063 | /*========================================================= |
6064 | ** We just miss the cause of the interrupt. :( |
6065 | ** Print a message. The timeout will do the real work. |
6066 | **========================================================= |
6067 | */ |
6068 | printk ("%s: unknown interrupt\n", ncr_name(np)); |
6069 | } |
6070 | |
6071 | /*========================================================== |
6072 | ** |
6073 | ** ncr chip exception handler for selection timeout |
6074 | ** |
6075 | **========================================================== |
6076 | ** |
6077 | ** There seems to be a bug in the 53c810. |
6078 | ** Although a STO-Interrupt is pending, |
6079 | ** it continues executing script commands. |
6080 | ** But it will fail and interrupt (IID) on |
6081 | ** the next instruction where it's looking |
6082 | ** for a valid phase. |
6083 | ** |
6084 | **---------------------------------------------------------- |
6085 | */ |
6086 | |
6087 | void ncr_int_sto (struct ncb *np) |
6088 | { |
6089 | u_long dsa; |
6090 | struct ccb *cp; |
6091 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("T"); |
6092 | |
6093 | /* |
6094 | ** look for ccb and set the status. |
6095 | */ |
6096 | |
6097 | dsa = INL (nc_dsa); |
6098 | cp = np->ccb; |
6099 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
6100 | cp = cp->link_ccb; |
6101 | |
6102 | if (cp) { |
6103 | cp-> host_status = HS_SEL_TIMEOUT; |
6104 | ncr_complete (np, cp); |
6105 | } |
6106 | |
6107 | /* |
6108 | ** repair start queue and jump to start point. |
6109 | */ |
6110 | |
6111 | OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); |
6112 | return; |
6113 | } |
6114 | |
6115 | /*========================================================== |
6116 | ** |
6117 | ** ncr chip exception handler for SCSI bus mode change |
6118 | ** |
6119 | **========================================================== |
6120 | ** |
6121 | ** spi2-r12 11.2.3 says a transceiver mode change must |
6122 | ** generate a reset event and a device that detects a reset |
6123 | ** event shall initiate a hard reset. It says also that a |
6124 | ** device that detects a mode change shall set data transfer |
6125 | ** mode to eight bit asynchronous, etc... |
6126 | ** So, just resetting should be enough. |
6127 | ** |
6128 | ** |
6129 | **---------------------------------------------------------- |
6130 | */ |
6131 | |
6132 | static int ncr_int_sbmc (struct ncb *np) |
6133 | { |
6134 | u_char scsi_mode = INB (nc_stest4) & SMODE; |
6135 | |
6136 | if (scsi_mode != np->scsi_mode) { |
6137 | printk("%s: SCSI bus mode change from %x to %x.\n", |
6138 | ncr_name(np), np->scsi_mode, scsi_mode); |
6139 | |
6140 | np->scsi_mode = scsi_mode; |
6141 | |
6142 | |
6143 | /* |
6144 | ** Suspend command processing for 1 second and |
6145 | ** reinitialize all except the chip. |
6146 | */ |
6147 | np->settle_time = jiffies + HZ; |
6148 | ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); |
6149 | return 1; |
6150 | } |
6151 | return 0; |
6152 | } |
6153 | |
6154 | /*========================================================== |
6155 | ** |
6156 | ** ncr chip exception handler for SCSI parity error. |
6157 | ** |
6158 | **========================================================== |
6159 | ** |
6160 | ** |
6161 | **---------------------------------------------------------- |
6162 | */ |
6163 | |
6164 | static int ncr_int_par (struct ncb *np) |
6165 | { |
6166 | u_char hsts = INB (HS_PRT); |
6167 | u32 dbc = INL (nc_dbc); |
6168 | u_char sstat1 = INB (nc_sstat1); |
6169 | int phase = -1; |
6170 | int msg = -1; |
6171 | u32 jmp; |
6172 | |
6173 | printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", |
6174 | ncr_name(np), hsts, dbc, sstat1); |
6175 | |
6176 | /* |
6177 | * Ignore the interrupt if the NCR is not connected |
6178 | * to the SCSI bus, since the right work should have |
6179 | * been done on unexpected disconnection handling. |
6180 | */ |
6181 | if (!(INB (nc_scntl1) & ISCON)) |
6182 | return 0; |
6183 | |
6184 | /* |
6185 | * If the nexus is not clearly identified, reset the bus. |
6186 | * We will try to do better later. |
6187 | */ |
6188 | if (hsts & HS_INVALMASK) |
6189 | goto reset_all; |
6190 | |
6191 | /* |
6192 | * If the SCSI parity error occurs in MSG IN phase, prepare a |
6193 | * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED |
6194 | * ERROR message and let the device decide to retry the command |
6195 | * or to terminate with check condition. If we were in MSG IN |
6196 | * phase waiting for the response of a negotiation, we will |
6197 | * get SIR_NEGO_FAILED at dispatch. |
6198 | */ |
6199 | if (!(dbc & 0xc0000000)) |
6200 | phase = (dbc >> 24) & 7; |
6201 | if (phase == 7) |
6202 | msg = MSG_PARITY_ERROR; |
6203 | else |
6204 | msg = INITIATOR_ERROR; |
6205 | |
6206 | |
6207 | /* |
6208 | * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a |
6209 | * script that will ignore all data in bytes until phase |
6210 | * change, since we are not sure the chip will wait the phase |
6211 | * change prior to delivering the interrupt. |
6212 | */ |
6213 | if (phase == 1) |
6214 | jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); |
6215 | else |
6216 | jmp = NCB_SCRIPTH_PHYS (np, par_err_other); |
6217 | |
6218 | OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ |
6219 | OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ |
6220 | |
6221 | np->msgout[0] = msg; |
6222 | OUTL_DSP (jmp); |
6223 | return 1; |
6224 | |
6225 | reset_all: |
6226 | ncr_start_reset(np); |
6227 | return 1; |
6228 | } |
6229 | |
6230 | /*========================================================== |
6231 | ** |
6232 | ** |
6233 | ** ncr chip exception handler for phase errors. |
6234 | ** |
6235 | ** |
6236 | **========================================================== |
6237 | ** |
6238 | ** We have to construct a new transfer descriptor, |
6239 | ** to transfer the rest of the current block. |
6240 | ** |
6241 | **---------------------------------------------------------- |
6242 | */ |
6243 | |
6244 | static void ncr_int_ma (struct ncb *np) |
6245 | { |
6246 | u32 dbc; |
6247 | u32 rest; |
6248 | u32 dsp; |
6249 | u32 dsa; |
6250 | u32 nxtdsp; |
6251 | u32 newtmp; |
6252 | u32 *vdsp; |
6253 | u32 oadr, olen; |
6254 | u32 *tblp; |
6255 | ncrcmd *newcmd; |
6256 | u_char cmd, sbcl; |
6257 | struct ccb *cp; |
6258 | |
6259 | dsp = INL (nc_dsp); |
6260 | dbc = INL (nc_dbc); |
6261 | sbcl = INB (nc_sbcl); |
6262 | |
6263 | cmd = dbc >> 24; |
6264 | rest = dbc & 0xffffff; |
6265 | |
6266 | /* |
6267 | ** Take into account dma fifo and various buffers and latches, |
6268 | ** only if the interrupted phase is an OUTPUT phase. |
6269 | */ |
6270 | |
6271 | if ((cmd & 1) == 0) { |
6272 | u_char ctest5, ss0, ss2; |
6273 | u16 delta; |
6274 | |
6275 | ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; |
6276 | if (ctest5 & DFS) |
6277 | delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; |
6278 | else |
6279 | delta=(INB (nc_dfifo) - rest) & 0x7f; |
6280 | |
6281 | /* |
6282 | ** The data in the dma fifo has not been transferred to |
6283 | ** the target -> add the amount to the rest |
6284 | ** and clear the data. |
6285 | ** Check the sstat2 register in case of wide transfer. |
6286 | */ |
6287 | |
6288 | rest += delta; |
6289 | ss0 = INB (nc_sstat0); |
6290 | if (ss0 & OLF) rest++; |
6291 | if (ss0 & ORF) rest++; |
6292 | if (INB(nc_scntl3) & EWS) { |
6293 | ss2 = INB (nc_sstat2); |
6294 | if (ss2 & OLF1) rest++; |
6295 | if (ss2 & ORF1) rest++; |
6296 | } |
6297 | |
6298 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) |
6299 | printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7, |
6300 | (unsigned) rest, (unsigned) delta, ss0); |
6301 | |
6302 | } else { |
6303 | if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) |
6304 | printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest); |
6305 | } |
6306 | |
6307 | /* |
6308 | ** Clear fifos. |
6309 | */ |
6310 | OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ |
6311 | OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ |
6312 | |
6313 | /* |
6314 | ** locate matching cp. |
6315 | ** if the interrupted phase is DATA IN or DATA OUT, |
6316 | ** trust the global header. |
6317 | */ |
6318 | dsa = INL (nc_dsa); |
6319 | if (!(cmd & 6)) { |
6320 | cp = np->header.cp; |
6321 | if (CCB_PHYS(cp, phys) != dsa) |
6322 | cp = NULL; |
6323 | } else { |
6324 | cp = np->ccb; |
6325 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
6326 | cp = cp->link_ccb; |
6327 | } |
6328 | |
6329 | /* |
6330 | ** try to find the interrupted script command, |
6331 | ** and the address at which to continue. |
6332 | */ |
6333 | vdsp = NULL; |
6334 | nxtdsp = 0; |
6335 | if (dsp > np->p_script && |
6336 | dsp <= np->p_script + sizeof(struct script)) { |
6337 | vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); |
6338 | nxtdsp = dsp; |
6339 | } |
6340 | else if (dsp > np->p_scripth && |
6341 | dsp <= np->p_scripth + sizeof(struct scripth)) { |
6342 | vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); |
6343 | nxtdsp = dsp; |
6344 | } |
6345 | else if (cp) { |
6346 | if (dsp == CCB_PHYS (cp, patch[2])) { |
6347 | vdsp = &cp->patch[0]; |
6348 | nxtdsp = scr_to_cpu(vdsp[3]); |
6349 | } |
6350 | else if (dsp == CCB_PHYS (cp, patch[6])) { |
6351 | vdsp = &cp->patch[4]; |
6352 | nxtdsp = scr_to_cpu(vdsp[3]); |
6353 | } |
6354 | } |
6355 | |
6356 | /* |
6357 | ** log the information |
6358 | */ |
6359 | |
6360 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6361 | printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", |
6362 | cp, np->header.cp, |
6363 | (unsigned)dsp, |
6364 | (unsigned)nxtdsp, vdsp, cmd); |
6365 | } |
6366 | |
6367 | /* |
6368 | ** cp=0 means that the DSA does not point to a valid control |
6369 | ** block. This should not happen since we donnot use multi-byte |
6370 | ** move while we are being reselected ot after command complete. |
6371 | ** We are not able to recover from such a phase error. |
6372 | */ |
6373 | if (!cp) { |
6374 | printk ("%s: SCSI phase error fixup: " |
6375 | "CCB already dequeued (0x%08lx)\n", |
6376 | ncr_name (np), (u_long) np->header.cp); |
6377 | goto reset_all; |
6378 | } |
6379 | |
6380 | /* |
6381 | ** get old startaddress and old length. |
6382 | */ |
6383 | |
6384 | oadr = scr_to_cpu(vdsp[1]); |
6385 | |
6386 | if (cmd & 0x10) { /* Table indirect */ |
6387 | tblp = (u32 *) ((char*) &cp->phys + oadr); |
6388 | olen = scr_to_cpu(tblp[0]); |
6389 | oadr = scr_to_cpu(tblp[1]); |
6390 | } else { |
6391 | tblp = (u32 *) 0; |
6392 | olen = scr_to_cpu(vdsp[0]) & 0xffffff; |
6393 | } |
6394 | |
6395 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6396 | printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", |
6397 | (unsigned) (scr_to_cpu(vdsp[0]) >> 24), |
6398 | tblp, |
6399 | (unsigned) olen, |
6400 | (unsigned) oadr); |
6401 | } |
6402 | |
6403 | /* |
6404 | ** check cmd against assumed interrupted script command. |
6405 | */ |
6406 | |
6407 | if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { |
6408 | PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " |
6409 | ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24); |
6410 | |
6411 | goto reset_all; |
6412 | } |
6413 | |
6414 | /* |
6415 | ** cp != np->header.cp means that the header of the CCB |
6416 | ** currently being processed has not yet been copied to |
6417 | ** the global header area. That may happen if the device did |
6418 | ** not accept all our messages after having been selected. |
6419 | */ |
6420 | if (cp != np->header.cp) { |
6421 | printk ("%s: SCSI phase error fixup: " |
6422 | "CCB address mismatch (0x%08lx != 0x%08lx)\n", |
6423 | ncr_name (np), (u_long) cp, (u_long) np->header.cp); |
6424 | } |
6425 | |
6426 | /* |
6427 | ** if old phase not dataphase, leave here. |
6428 | */ |
6429 | |
6430 | if (cmd & 0x06) { |
6431 | PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n", |
6432 | cmd&7, sbcl&7, (unsigned)olen, |
6433 | (unsigned)oadr, (unsigned)rest); |
6434 | goto unexpected_phase; |
6435 | } |
6436 | |
6437 | /* |
6438 | ** choose the correct patch area. |
6439 | ** if savep points to one, choose the other. |
6440 | */ |
6441 | |
6442 | newcmd = cp->patch; |
6443 | newtmp = CCB_PHYS (cp, patch); |
6444 | if (newtmp == scr_to_cpu(cp->phys.header.savep)) { |
6445 | newcmd = &cp->patch[4]; |
6446 | newtmp = CCB_PHYS (cp, patch[4]); |
6447 | } |
6448 | |
6449 | /* |
6450 | ** fillin the commands |
6451 | */ |
6452 | |
6453 | newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); |
6454 | newcmd[1] = cpu_to_scr(oadr + olen - rest); |
6455 | newcmd[2] = cpu_to_scr(SCR_JUMP); |
6456 | newcmd[3] = cpu_to_scr(nxtdsp); |
6457 | |
6458 | if (DEBUG_FLAGS & DEBUG_PHASE) { |
6459 | PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n", |
6460 | (int) (newcmd - cp->patch), |
6461 | (unsigned)scr_to_cpu(newcmd[0]), |
6462 | (unsigned)scr_to_cpu(newcmd[1]), |
6463 | (unsigned)scr_to_cpu(newcmd[2]), |
6464 | (unsigned)scr_to_cpu(newcmd[3])); |
6465 | } |
6466 | /* |
6467 | ** fake the return address (to the patch). |
6468 | ** and restart script processor at dispatcher. |
6469 | */ |
6470 | OUTL (nc_temp, newtmp); |
6471 | OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); |
6472 | return; |
6473 | |
6474 | /* |
6475 | ** Unexpected phase changes that occurs when the current phase |
6476 | ** is not a DATA IN or DATA OUT phase are due to error conditions. |
6477 | ** Such event may only happen when the SCRIPTS is using a |
6478 | ** multibyte SCSI MOVE. |
6479 | ** |
6480 | ** Phase change Some possible cause |
6481 | ** |
6482 | ** COMMAND --> MSG IN SCSI parity error detected by target. |
6483 | ** COMMAND --> STATUS Bad command or refused by target. |
6484 | ** MSG OUT --> MSG IN Message rejected by target. |
6485 | ** MSG OUT --> COMMAND Bogus target that discards extended |
6486 | ** negotiation messages. |
6487 | ** |
6488 | ** The code below does not care of the new phase and so |
6489 | ** trusts the target. Why to annoy it ? |
6490 | ** If the interrupted phase is COMMAND phase, we restart at |
6491 | ** dispatcher. |
6492 | ** If a target does not get all the messages after selection, |
6493 | ** the code assumes blindly that the target discards extended |
6494 | ** messages and clears the negotiation status. |
6495 | ** If the target does not want all our response to negotiation, |
6496 | ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids |
6497 | ** bloat for such a should_not_happen situation). |
6498 | ** In all other situation, we reset the BUS. |
6499 | ** Are these assumptions reasonable ? (Wait and see ...) |
6500 | */ |
6501 | unexpected_phase: |
6502 | dsp -= 8; |
6503 | nxtdsp = 0; |
6504 | |
6505 | switch (cmd & 7) { |
6506 | case 2: /* COMMAND phase */ |
6507 | nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); |
6508 | break; |
6509 | #if 0 |
6510 | case 3: /* STATUS phase */ |
6511 | nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); |
6512 | break; |
6513 | #endif |
6514 | case 6: /* MSG OUT phase */ |
6515 | np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); |
6516 | if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { |
6517 | cp->host_status = HS_BUSY; |
6518 | nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); |
6519 | } |
6520 | else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || |
6521 | dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { |
6522 | nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); |
6523 | } |
6524 | break; |
6525 | #if 0 |
6526 | case 7: /* MSG IN phase */ |
6527 | nxtdsp = NCB_SCRIPT_PHYS (np, clrack); |
6528 | break; |
6529 | #endif |
6530 | } |
6531 | |
6532 | if (nxtdsp) { |
6533 | OUTL_DSP (nxtdsp); |
6534 | return; |
6535 | } |
6536 | |
6537 | reset_all: |
6538 | ncr_start_reset(np); |
6539 | } |
6540 | |
6541 | |
6542 | static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) |
6543 | { |
6544 | struct scsi_cmnd *cmd = cp->cmd; |
6545 | struct tcb *tp = &np->target[cmd->device->id]; |
6546 | struct lcb *lp = tp->lp[cmd->device->lun]; |
6547 | struct list_head *qp; |
6548 | struct ccb * cp2; |
6549 | int disc_cnt = 0; |
6550 | int busy_cnt = 0; |
6551 | u32 startp; |
6552 | u_char s_status = INB (SS_PRT); |
6553 | |
6554 | /* |
6555 | ** Let the SCRIPTS processor skip all not yet started CCBs, |
6556 | ** and count disconnected CCBs. Since the busy queue is in |
6557 | ** the same order as the chip start queue, disconnected CCBs |
6558 | ** are before cp and busy ones after. |
6559 | */ |
6560 | if (lp) { |
6561 | qp = lp->busy_ccbq.prev; |
6562 | while (qp != &lp->busy_ccbq) { |
6563 | cp2 = list_entry(qp, struct ccb, link_ccbq); |
6564 | qp = qp->prev; |
6565 | ++busy_cnt; |
6566 | if (cp2 == cp) |
6567 | break; |
6568 | cp2->start.schedule.l_paddr = |
6569 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); |
6570 | } |
6571 | lp->held_ccb = cp; /* Requeue when this one completes */ |
6572 | disc_cnt = lp->queuedccbs - busy_cnt; |
6573 | } |
6574 | |
6575 | switch(s_status) { |
6576 | default: /* Just for safety, should never happen */ |
6577 | case S_QUEUE_FULL: |
6578 | /* |
6579 | ** Decrease number of tags to the number of |
6580 | ** disconnected commands. |
6581 | */ |
6582 | if (!lp) |
6583 | goto out; |
6584 | if (bootverbose >= 1) { |
6585 | PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " |
6586 | "CCBs\n", busy_cnt, disc_cnt); |
6587 | } |
6588 | if (disc_cnt < lp->numtags) { |
6589 | lp->numtags = disc_cnt > 2 ? disc_cnt : 2; |
6590 | lp->num_good = 0; |
6591 | ncr_setup_tags (np, cmd->device); |
6592 | } |
6593 | /* |
6594 | ** Requeue the command to the start queue. |
6595 | ** If any disconnected commands, |
6596 | ** Clear SIGP. |
6597 | ** Jump to reselect. |
6598 | */ |
6599 | cp->phys.header.savep = cp->startp; |
6600 | cp->host_status = HS_BUSY; |
6601 | cp->scsi_status = S_ILLEGAL; |
6602 | |
6603 | ncr_put_start_queue(np, cp); |
6604 | if (disc_cnt) |
6605 | INB (nc_ctest2); /* Clear SIGP */ |
6606 | OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); |
6607 | return; |
6608 | case S_TERMINATED: |
6609 | case S_CHECK_COND: |
6610 | /* |
6611 | ** If we were requesting sense, give up. |
6612 | */ |
6613 | if (cp->auto_sense) |
6614 | goto out; |
6615 | |
6616 | /* |
6617 | ** Device returned CHECK CONDITION status. |
6618 | ** Prepare all needed data strutures for getting |
6619 | ** sense data. |
6620 | ** |
6621 | ** identify message |
6622 | */ |
6623 | cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); |
6624 | cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); |
6625 | cp->phys.smsg.size = cpu_to_scr(1); |
6626 | |
6627 | /* |
6628 | ** sense command |
6629 | */ |
6630 | cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); |
6631 | cp->phys.cmd.size = cpu_to_scr(6); |
6632 | |
6633 | /* |
6634 | ** patch requested size into sense command |
6635 | */ |
6636 | cp->sensecmd[0] = 0x03; |
6637 | cp->sensecmd[1] = cmd->device->lun << 5; |
6638 | cp->sensecmd[4] = sizeof(cp->sense_buf); |
6639 | |
6640 | /* |
6641 | ** sense data |
6642 | */ |
6643 | memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); |
6644 | cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); |
6645 | cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); |
6646 | |
6647 | /* |
6648 | ** requeue the command. |
6649 | */ |
6650 | startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); |
6651 | |
6652 | cp->phys.header.savep = startp; |
6653 | cp->phys.header.goalp = startp + 24; |
6654 | cp->phys.header.lastp = startp; |
6655 | cp->phys.header.wgoalp = startp + 24; |
6656 | cp->phys.header.wlastp = startp; |
6657 | |
6658 | cp->host_status = HS_BUSY; |
6659 | cp->scsi_status = S_ILLEGAL; |
6660 | cp->auto_sense = s_status; |
6661 | |
6662 | cp->start.schedule.l_paddr = |
6663 | cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); |
6664 | |
6665 | /* |
6666 | ** Select without ATN for quirky devices. |
6667 | */ |
6668 | if (cmd->device->select_no_atn) |
6669 | cp->start.schedule.l_paddr = |
6670 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); |
6671 | |
6672 | ncr_put_start_queue(np, cp); |
6673 | |
6674 | OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); |
6675 | return; |
6676 | } |
6677 | |
6678 | out: |
6679 | OUTONB_STD (); |
6680 | return; |
6681 | } |
6682 | |
6683 | |
6684 | /*========================================================== |
6685 | ** |
6686 | ** |
6687 | ** ncr chip exception handler for programmed interrupts. |
6688 | ** |
6689 | ** |
6690 | **========================================================== |
6691 | */ |
6692 | |
6693 | void ncr_int_sir (struct ncb *np) |
6694 | { |
6695 | u_char scntl3; |
6696 | u_char chg, ofs, per, fak, wide; |
6697 | u_char num = INB (nc_dsps); |
6698 | struct ccb *cp=NULL; |
6699 | u_long dsa = INL (nc_dsa); |
6700 | u_char target = INB (nc_sdid) & 0x0f; |
6701 | struct tcb *tp = &np->target[target]; |
6702 | struct scsi_target *starget = tp->starget; |
6703 | |
6704 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num); |
6705 | |
6706 | switch (num) { |
6707 | case SIR_INTFLY: |
6708 | /* |
6709 | ** This is used for HP Zalon/53c720 where INTFLY |
6710 | ** operation is currently broken. |
6711 | */ |
6712 | ncr_wakeup_done(np); |
6713 | #ifdef SCSI_NCR_CCB_DONE_SUPPORT |
6714 | OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); |
6715 | #else |
6716 | OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); |
6717 | #endif |
6718 | return; |
6719 | case SIR_RESEL_NO_MSG_IN: |
6720 | case SIR_RESEL_NO_IDENTIFY: |
6721 | /* |
6722 | ** If devices reselecting without sending an IDENTIFY |
6723 | ** message still exist, this should help. |
6724 | ** We just assume lun=0, 1 CCB, no tag. |
6725 | */ |
6726 | if (tp->lp[0]) { |
6727 | OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); |
6728 | return; |
6729 | } |
6730 | case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ |
6731 | case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ |
6732 | case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ |
6733 | case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ |
6734 | printk ("%s:%d: SIR %d, " |
6735 | "incorrect nexus identification on reselection\n", |
6736 | ncr_name (np), target, num); |
6737 | goto out; |
6738 | case SIR_DONE_OVERFLOW: |
6739 | printk ("%s:%d: SIR %d, " |
6740 | "CCB done queue overflow\n", |
6741 | ncr_name (np), target, num); |
6742 | goto out; |
6743 | case SIR_BAD_STATUS: |
6744 | cp = np->header.cp; |
6745 | if (!cp || CCB_PHYS (cp, phys) != dsa) |
6746 | goto out; |
6747 | ncr_sir_to_redo(np, num, cp); |
6748 | return; |
6749 | default: |
6750 | /* |
6751 | ** lookup the ccb |
6752 | */ |
6753 | cp = np->ccb; |
6754 | while (cp && (CCB_PHYS (cp, phys) != dsa)) |
6755 | cp = cp->link_ccb; |
6756 | |
6757 | BUG_ON(!cp); |
6758 | BUG_ON(cp != np->header.cp); |
6759 | |
6760 | if (!cp || cp != np->header.cp) |
6761 | goto out; |
6762 | } |
6763 | |
6764 | switch (num) { |
6765 | /*----------------------------------------------------------------------------- |
6766 | ** |
6767 | ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... |
6768 | ** ("Everything you've always wanted to know about transfer mode |
6769 | ** negotiation") |
6770 | ** |
6771 | ** We try to negotiate sync and wide transfer only after |
6772 | ** a successful inquire command. We look at byte 7 of the |
6773 | ** inquire data to determine the capabilities of the target. |
6774 | ** |
6775 | ** When we try to negotiate, we append the negotiation message |
6776 | ** to the identify and (maybe) simple tag message. |
6777 | ** The host status field is set to HS_NEGOTIATE to mark this |
6778 | ** situation. |
6779 | ** |
6780 | ** If the target doesn't answer this message immediately |
6781 | ** (as required by the standard), the SIR_NEGO_FAIL interrupt |
6782 | ** will be raised eventually. |
6783 | ** The handler removes the HS_NEGOTIATE status, and sets the |
6784 | ** negotiated value to the default (async / nowide). |
6785 | ** |
6786 | ** If we receive a matching answer immediately, we check it |
6787 | ** for validity, and set the values. |
6788 | ** |
6789 | ** If we receive a Reject message immediately, we assume the |
6790 | ** negotiation has failed, and fall back to standard values. |
6791 | ** |
6792 | ** If we receive a negotiation message while not in HS_NEGOTIATE |
6793 | ** state, it's a target initiated negotiation. We prepare a |
6794 | ** (hopefully) valid answer, set our parameters, and send back |
6795 | ** this answer to the target. |
6796 | ** |
6797 | ** If the target doesn't fetch the answer (no message out phase), |
6798 | ** we assume the negotiation has failed, and fall back to default |
6799 | ** settings. |
6800 | ** |
6801 | ** When we set the values, we adjust them in all ccbs belonging |
6802 | ** to this target, in the controller's register, and in the "phys" |
6803 | ** field of the controller's struct ncb. |
6804 | ** |
6805 | ** Possible cases: hs sir msg_in value send goto |
6806 | ** We try to negotiate: |
6807 | ** -> target doesn't msgin NEG FAIL noop defa. - dispatch |
6808 | ** -> target rejected our msg NEG FAIL reject defa. - dispatch |
6809 | ** -> target answered (ok) NEG SYNC sdtr set - clrack |
6810 | ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad |
6811 | ** -> target answered (ok) NEG WIDE wdtr set - clrack |
6812 | ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad |
6813 | ** -> any other msgin NEG FAIL noop defa. - dispatch |
6814 | ** |
6815 | ** Target tries to negotiate: |
6816 | ** -> incoming message --- SYNC sdtr set SDTR - |
6817 | ** -> incoming message --- WIDE wdtr set WDTR - |
6818 | ** We sent our answer: |
6819 | ** -> target doesn't msgout --- PROTO ? defa. - dispatch |
6820 | ** |
6821 | **----------------------------------------------------------------------------- |
6822 | */ |
6823 | |
6824 | case SIR_NEGO_FAILED: |
6825 | /*------------------------------------------------------- |
6826 | ** |
6827 | ** Negotiation failed. |
6828 | ** Target doesn't send an answer message, |
6829 | ** or target rejected our message. |
6830 | ** |
6831 | ** Remove negotiation request. |
6832 | ** |
6833 | **------------------------------------------------------- |
6834 | */ |
6835 | OUTB (HS_PRT, HS_BUSY); |
6836 | |
6837 | /* fall through */ |
6838 | |
6839 | case SIR_NEGO_PROTO: |
6840 | /*------------------------------------------------------- |
6841 | ** |
6842 | ** Negotiation failed. |
6843 | ** Target doesn't fetch the answer message. |
6844 | ** |
6845 | **------------------------------------------------------- |
6846 | */ |
6847 | |
6848 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6849 | PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " |
6850 | "status=%x.\n", num, cp->nego_status); |
6851 | } |
6852 | |
6853 | /* |
6854 | ** any error in negotiation: |
6855 | ** fall back to default mode. |
6856 | */ |
6857 | switch (cp->nego_status) { |
6858 | |
6859 | case NS_SYNC: |
6860 | spi_period(starget) = 0; |
6861 | spi_offset(starget) = 0; |
6862 | ncr_setsync (np, cp, 0, 0xe0); |
6863 | break; |
6864 | |
6865 | case NS_WIDE: |
6866 | spi_width(starget) = 0; |
6867 | ncr_setwide (np, cp, 0, 0); |
6868 | break; |
6869 | |
6870 | } |
6871 | np->msgin [0] = NOP; |
6872 | np->msgout[0] = NOP; |
6873 | cp->nego_status = 0; |
6874 | break; |
6875 | |
6876 | case SIR_NEGO_SYNC: |
6877 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6878 | ncr_print_msg(cp, "sync msgin", np->msgin); |
6879 | } |
6880 | |
6881 | chg = 0; |
6882 | per = np->msgin[3]; |
6883 | ofs = np->msgin[4]; |
6884 | if (ofs==0) per=255; |
6885 | |
6886 | /* |
6887 | ** if target sends SDTR message, |
6888 | ** it CAN transfer synch. |
6889 | */ |
6890 | |
6891 | if (ofs && starget) |
6892 | spi_support_sync(starget) = 1; |
6893 | |
6894 | /* |
6895 | ** check values against driver limits. |
6896 | */ |
6897 | |
6898 | if (per < np->minsync) |
6899 | {chg = 1; per = np->minsync;} |
6900 | if (per < tp->minsync) |
6901 | {chg = 1; per = tp->minsync;} |
6902 | if (ofs > tp->maxoffs) |
6903 | {chg = 1; ofs = tp->maxoffs;} |
6904 | |
6905 | /* |
6906 | ** Check against controller limits. |
6907 | */ |
6908 | fak = 7; |
6909 | scntl3 = 0; |
6910 | if (ofs != 0) { |
6911 | ncr_getsync(np, per, &fak, &scntl3); |
6912 | if (fak > 7) { |
6913 | chg = 1; |
6914 | ofs = 0; |
6915 | } |
6916 | } |
6917 | if (ofs == 0) { |
6918 | fak = 7; |
6919 | per = 0; |
6920 | scntl3 = 0; |
6921 | tp->minsync = 0; |
6922 | } |
6923 | |
6924 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6925 | PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " |
6926 | "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg); |
6927 | } |
6928 | |
6929 | if (INB (HS_PRT) == HS_NEGOTIATE) { |
6930 | OUTB (HS_PRT, HS_BUSY); |
6931 | switch (cp->nego_status) { |
6932 | |
6933 | case NS_SYNC: |
6934 | /* This was an answer message */ |
6935 | if (chg) { |
6936 | /* Answer wasn't acceptable. */ |
6937 | spi_period(starget) = 0; |
6938 | spi_offset(starget) = 0; |
6939 | ncr_setsync(np, cp, 0, 0xe0); |
6940 | OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); |
6941 | } else { |
6942 | /* Answer is ok. */ |
6943 | spi_period(starget) = per; |
6944 | spi_offset(starget) = ofs; |
6945 | ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); |
6946 | OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); |
6947 | } |
6948 | return; |
6949 | |
6950 | case NS_WIDE: |
6951 | spi_width(starget) = 0; |
6952 | ncr_setwide(np, cp, 0, 0); |
6953 | break; |
6954 | } |
6955 | } |
6956 | |
6957 | /* |
6958 | ** It was a request. Set value and |
6959 | ** prepare an answer message |
6960 | */ |
6961 | |
6962 | spi_period(starget) = per; |
6963 | spi_offset(starget) = ofs; |
6964 | ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); |
6965 | |
6966 | spi_populate_sync_msg(np->msgout, per, ofs); |
6967 | cp->nego_status = NS_SYNC; |
6968 | |
6969 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6970 | ncr_print_msg(cp, "sync msgout", np->msgout); |
6971 | } |
6972 | |
6973 | if (!ofs) { |
6974 | OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); |
6975 | return; |
6976 | } |
6977 | np->msgin [0] = NOP; |
6978 | |
6979 | break; |
6980 | |
6981 | case SIR_NEGO_WIDE: |
6982 | /* |
6983 | ** Wide request message received. |
6984 | */ |
6985 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
6986 | ncr_print_msg(cp, "wide msgin", np->msgin); |
6987 | } |
6988 | |
6989 | /* |
6990 | ** get requested values. |
6991 | */ |
6992 | |
6993 | chg = 0; |
6994 | wide = np->msgin[3]; |
6995 | |
6996 | /* |
6997 | ** if target sends WDTR message, |
6998 | ** it CAN transfer wide. |
6999 | */ |
7000 | |
7001 | if (wide && starget) |
7002 | spi_support_wide(starget) = 1; |
7003 | |
7004 | /* |
7005 | ** check values against driver limits. |
7006 | */ |
7007 | |
7008 | if (wide > tp->usrwide) |
7009 | {chg = 1; wide = tp->usrwide;} |
7010 | |
7011 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
7012 | PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide, |
7013 | chg); |
7014 | } |
7015 | |
7016 | if (INB (HS_PRT) == HS_NEGOTIATE) { |
7017 | OUTB (HS_PRT, HS_BUSY); |
7018 | switch (cp->nego_status) { |
7019 | |
7020 | case NS_WIDE: |
7021 | /* |
7022 | ** This was an answer message |
7023 | */ |
7024 | if (chg) { |
7025 | /* Answer wasn't acceptable. */ |
7026 | spi_width(starget) = 0; |
7027 | ncr_setwide(np, cp, 0, 1); |
7028 | OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); |
7029 | } else { |
7030 | /* Answer is ok. */ |
7031 | spi_width(starget) = wide; |
7032 | ncr_setwide(np, cp, wide, 1); |
7033 | OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); |
7034 | } |
7035 | return; |
7036 | |
7037 | case NS_SYNC: |
7038 | spi_period(starget) = 0; |
7039 | spi_offset(starget) = 0; |
7040 | ncr_setsync(np, cp, 0, 0xe0); |
7041 | break; |
7042 | } |
7043 | } |
7044 | |
7045 | /* |
7046 | ** It was a request, set value and |
7047 | ** prepare an answer message |
7048 | */ |
7049 | |
7050 | spi_width(starget) = wide; |
7051 | ncr_setwide(np, cp, wide, 1); |
7052 | spi_populate_width_msg(np->msgout, wide); |
7053 | |
7054 | np->msgin [0] = NOP; |
7055 | |
7056 | cp->nego_status = NS_WIDE; |
7057 | |
7058 | if (DEBUG_FLAGS & DEBUG_NEGO) { |
7059 | ncr_print_msg(cp, "wide msgout", np->msgin); |
7060 | } |
7061 | break; |
7062 | |
7063 | /*-------------------------------------------------------------------- |
7064 | ** |
7065 | ** Processing of special messages |
7066 | ** |
7067 | **-------------------------------------------------------------------- |
7068 | */ |
7069 | |
7070 | case SIR_REJECT_RECEIVED: |
7071 | /*----------------------------------------------- |
7072 | ** |
7073 | ** We received a MESSAGE_REJECT. |
7074 | ** |
7075 | **----------------------------------------------- |
7076 | */ |
7077 | |
7078 | PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n", |
7079 | (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); |
7080 | break; |
7081 | |
7082 | case SIR_REJECT_SENT: |
7083 | /*----------------------------------------------- |
7084 | ** |
7085 | ** We received an unknown message |
7086 | ** |
7087 | **----------------------------------------------- |
7088 | */ |
7089 | |
7090 | ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin); |
7091 | break; |
7092 | |
7093 | /*-------------------------------------------------------------------- |
7094 | ** |
7095 | ** Processing of special messages |
7096 | ** |
7097 | **-------------------------------------------------------------------- |
7098 | */ |
7099 | |
7100 | case SIR_IGN_RESIDUE: |
7101 | /*----------------------------------------------- |
7102 | ** |
7103 | ** We received an IGNORE RESIDUE message, |
7104 | ** which couldn't be handled by the script. |
7105 | ** |
7106 | **----------------------------------------------- |
7107 | */ |
7108 | |
7109 | PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " |
7110 | "implemented.\n"); |
7111 | break; |
7112 | #if 0 |
7113 | case SIR_MISSING_SAVE: |
7114 | /*----------------------------------------------- |
7115 | ** |
7116 | ** We received an DISCONNECT message, |
7117 | ** but the datapointer wasn't saved before. |
7118 | ** |
7119 | **----------------------------------------------- |
7120 | */ |
7121 | |
7122 | PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer " |
7123 | "not saved: data=%x save=%x goal=%x.\n", |
7124 | (unsigned) INL (nc_temp), |
7125 | (unsigned) scr_to_cpu(np->header.savep), |
7126 | (unsigned) scr_to_cpu(np->header.goalp)); |
7127 | break; |
7128 | #endif |
7129 | } |
7130 | |
7131 | out: |
7132 | OUTONB_STD (); |
7133 | } |
7134 | |
7135 | /*========================================================== |
7136 | ** |
7137 | ** |
7138 | ** Acquire a control block |
7139 | ** |
7140 | ** |
7141 | **========================================================== |
7142 | */ |
7143 | |
7144 | static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) |
7145 | { |
7146 | u_char tn = cmd->device->id; |
7147 | u_char ln = cmd->device->lun; |
7148 | struct tcb *tp = &np->target[tn]; |
7149 | struct lcb *lp = tp->lp[ln]; |
7150 | u_char tag = NO_TAG; |
7151 | struct ccb *cp = NULL; |
7152 | |
7153 | /* |
7154 | ** Lun structure available ? |
7155 | */ |
7156 | if (lp) { |
7157 | struct list_head *qp; |
7158 | /* |
7159 | ** Keep from using more tags than we can handle. |
7160 | */ |
7161 | if (lp->usetags && lp->busyccbs >= lp->maxnxs) |
7162 | return NULL; |
7163 | |
7164 | /* |
7165 | ** Allocate a new CCB if needed. |
7166 | */ |
7167 | if (list_empty(&lp->free_ccbq)) |
7168 | ncr_alloc_ccb(np, tn, ln); |
7169 | |
7170 | /* |
7171 | ** Look for free CCB |
7172 | */ |
7173 | qp = ncr_list_pop(&lp->free_ccbq); |
7174 | if (qp) { |
7175 | cp = list_entry(qp, struct ccb, link_ccbq); |
7176 | if (cp->magic) { |
7177 | PRINT_ADDR(cmd, "ccb free list corrupted " |
7178 | "(@%p)\n", cp); |
7179 | cp = NULL; |
7180 | } else { |
7181 | list_add_tail(qp, &lp->wait_ccbq); |
7182 | ++lp->busyccbs; |
7183 | } |
7184 | } |
7185 | |
7186 | /* |
7187 | ** If a CCB is available, |
7188 | ** Get a tag for this nexus if required. |
7189 | */ |
7190 | if (cp) { |
7191 | if (lp->usetags) |
7192 | tag = lp->cb_tags[lp->ia_tag]; |
7193 | } |
7194 | else if (lp->actccbs > 0) |
7195 | return NULL; |
7196 | } |
7197 | |
7198 | /* |
7199 | ** if nothing available, take the default. |
7200 | */ |
7201 | if (!cp) |
7202 | cp = np->ccb; |
7203 | |
7204 | /* |
7205 | ** Wait until available. |
7206 | */ |
7207 | #if 0 |
7208 | while (cp->magic) { |
7209 | if (flags & SCSI_NOSLEEP) break; |
7210 | if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0)) |
7211 | break; |
7212 | } |
7213 | #endif |
7214 | |
7215 | if (cp->magic) |
7216 | return NULL; |
7217 | |
7218 | cp->magic = 1; |
7219 | |
7220 | /* |
7221 | ** Move to next available tag if tag used. |
7222 | */ |
7223 | if (lp) { |
7224 | if (tag != NO_TAG) { |
7225 | ++lp->ia_tag; |
7226 | if (lp->ia_tag == MAX_TAGS) |
7227 | lp->ia_tag = 0; |
7228 | lp->tags_umap |= (((tagmap_t) 1) << tag); |
7229 | } |
7230 | } |
7231 | |
7232 | /* |
7233 | ** Remember all informations needed to free this CCB. |
7234 | */ |
7235 | cp->tag = tag; |
7236 | cp->target = tn; |
7237 | cp->lun = ln; |
7238 | |
7239 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
7240 | PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag); |
7241 | } |
7242 | |
7243 | return cp; |
7244 | } |
7245 | |
7246 | /*========================================================== |
7247 | ** |
7248 | ** |
7249 | ** Release one control block |
7250 | ** |
7251 | ** |
7252 | **========================================================== |
7253 | */ |
7254 | |
7255 | static void ncr_free_ccb (struct ncb *np, struct ccb *cp) |
7256 | { |
7257 | struct tcb *tp = &np->target[cp->target]; |
7258 | struct lcb *lp = tp->lp[cp->lun]; |
7259 | |
7260 | if (DEBUG_FLAGS & DEBUG_TAGS) { |
7261 | PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag); |
7262 | } |
7263 | |
7264 | /* |
7265 | ** If lun control block available, |
7266 | ** decrement active commands and increment credit, |
7267 | ** free the tag if any and remove the JUMP for reselect. |
7268 | */ |
7269 | if (lp) { |
7270 | if (cp->tag != NO_TAG) { |
7271 | lp->cb_tags[lp->if_tag++] = cp->tag; |
7272 | if (lp->if_tag == MAX_TAGS) |
7273 | lp->if_tag = 0; |
7274 | lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); |
7275 | lp->tags_smap &= lp->tags_umap; |
7276 | lp->jump_ccb[cp->tag] = |
7277 | cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); |
7278 | } else { |
7279 | lp->jump_ccb[0] = |
7280 | cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); |
7281 | } |
7282 | } |
7283 | |
7284 | /* |
7285 | ** Make this CCB available. |
7286 | */ |
7287 | |
7288 | if (lp) { |
7289 | if (cp != np->ccb) |
7290 | list_move(&cp->link_ccbq, &lp->free_ccbq); |
7291 | --lp->busyccbs; |
7292 | if (cp->queued) { |
7293 | --lp->queuedccbs; |
7294 | } |
7295 | } |
7296 | cp -> host_status = HS_IDLE; |
7297 | cp -> magic = 0; |
7298 | if (cp->queued) { |
7299 | --np->queuedccbs; |
7300 | cp->queued = 0; |
7301 | } |
7302 | |
7303 | #if 0 |
7304 | if (cp == np->ccb) |
7305 | wakeup ((caddr_t) cp); |
7306 | #endif |
7307 | } |
7308 | |
7309 | |
7310 | #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) |
7311 | |
7312 | /*------------------------------------------------------------------------ |
7313 | ** Initialize the fixed part of a CCB structure. |
7314 | **------------------------------------------------------------------------ |
7315 | **------------------------------------------------------------------------ |
7316 | */ |
7317 | static void ncr_init_ccb(struct ncb *np, struct ccb *cp) |
7318 | { |
7319 | ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); |
7320 | |
7321 | /* |
7322 | ** Remember virtual and bus address of this ccb. |
7323 | */ |
7324 | cp->p_ccb = vtobus(cp); |
7325 | cp->phys.header.cp = cp; |
7326 | |
7327 | /* |
7328 | ** This allows list_del to work for the default ccb. |
7329 | */ |
7330 | INIT_LIST_HEAD(&cp->link_ccbq); |
7331 | |
7332 | /* |
7333 | ** Initialyze the start and restart launch script. |
7334 | ** |
7335 | ** COPY(4) @(...p_phys), @(dsa) |
7336 | ** JUMP @(sched_point) |
7337 | */ |
7338 | cp->start.setup_dsa[0] = cpu_to_scr(copy_4); |
7339 | cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); |
7340 | cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); |
7341 | cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); |
7342 | cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); |
7343 | |
7344 | memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); |
7345 | |
7346 | cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); |
7347 | cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); |
7348 | } |
7349 | |
7350 | |
7351 | /*------------------------------------------------------------------------ |
7352 | ** Allocate a CCB and initialize its fixed part. |
7353 | **------------------------------------------------------------------------ |
7354 | **------------------------------------------------------------------------ |
7355 | */ |
7356 | static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) |
7357 | { |
7358 | struct tcb *tp = &np->target[tn]; |
7359 | struct lcb *lp = tp->lp[ln]; |
7360 | struct ccb *cp = NULL; |
7361 | |
7362 | /* |
7363 | ** Allocate memory for this CCB. |
7364 | */ |
7365 | cp = m_calloc_dma(sizeof(struct ccb), "CCB"); |
7366 | if (!cp) |
7367 | return; |
7368 | |
7369 | /* |
7370 | ** Count it and initialyze it. |
7371 | */ |
7372 | lp->actccbs++; |
7373 | np->actccbs++; |
7374 | memset(cp, 0, sizeof (*cp)); |
7375 | ncr_init_ccb(np, cp); |
7376 | |
7377 | /* |
7378 | ** Chain into wakeup list and free ccb queue and take it |
7379 | ** into account for tagged commands. |
7380 | */ |
7381 | cp->link_ccb = np->ccb->link_ccb; |
7382 | np->ccb->link_ccb = cp; |
7383 | |
7384 | list_add(&cp->link_ccbq, &lp->free_ccbq); |
7385 | } |
7386 | |
7387 | /*========================================================== |
7388 | ** |
7389 | ** |
7390 | ** Allocation of resources for Targets/Luns/Tags. |
7391 | ** |
7392 | ** |
7393 | **========================================================== |
7394 | */ |
7395 | |
7396 | |
7397 | /*------------------------------------------------------------------------ |
7398 | ** Target control block initialisation. |
7399 | **------------------------------------------------------------------------ |
7400 | ** This data structure is fully initialized after a SCSI command |
7401 | ** has been successfully completed for this target. |
7402 | ** It contains a SCRIPT that is called on target reselection. |
7403 | **------------------------------------------------------------------------ |
7404 | */ |
7405 | static void ncr_init_tcb (struct ncb *np, u_char tn) |
7406 | { |
7407 | struct tcb *tp = &np->target[tn]; |
7408 | ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); |
7409 | int th = tn & 3; |
7410 | int i; |
7411 | |
7412 | /* |
7413 | ** Jump to next tcb if SFBR does not match this target. |
7414 | ** JUMP IF (SFBR != #target#), @(next tcb) |
7415 | */ |
7416 | tp->jump_tcb.l_cmd = |
7417 | cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); |
7418 | tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; |
7419 | |
7420 | /* |
7421 | ** Load the synchronous transfer register. |
7422 | ** COPY @(tp->sval), @(sxfer) |
7423 | */ |
7424 | tp->getscr[0] = cpu_to_scr(copy_1); |
7425 | tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); |
7426 | #ifdef SCSI_NCR_BIG_ENDIAN |
7427 | tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); |
7428 | #else |
7429 | tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); |
7430 | #endif |
7431 | |
7432 | /* |
7433 | ** Load the timing register. |
7434 | ** COPY @(tp->wval), @(scntl3) |
7435 | */ |
7436 | tp->getscr[3] = cpu_to_scr(copy_1); |
7437 | tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); |
7438 | #ifdef SCSI_NCR_BIG_ENDIAN |
7439 | tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); |
7440 | #else |
7441 | tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); |
7442 | #endif |
7443 | |
7444 | /* |
7445 | ** Get the IDENTIFY message and the lun. |
7446 | ** CALL @script(resel_lun) |
7447 | */ |
7448 | tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); |
7449 | tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); |
7450 | |
7451 | /* |
7452 | ** Look for the lun control block of this nexus. |
7453 | ** For i = 0 to 3 |
7454 | ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) |
7455 | */ |
7456 | for (i = 0 ; i < 4 ; i++) { |
7457 | tp->jump_lcb[i].l_cmd = |
7458 | cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); |
7459 | tp->jump_lcb[i].l_paddr = |
7460 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); |
7461 | } |
7462 | |
7463 | /* |
7464 | ** Link this target control block to the JUMP chain. |
7465 | */ |
7466 | np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); |
7467 | |
7468 | /* |
7469 | ** These assert's should be moved at driver initialisations. |
7470 | */ |
7471 | #ifdef SCSI_NCR_BIG_ENDIAN |
7472 | BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ |
7473 | offsetof(struct tcb , sval )) &3) != 3); |
7474 | BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ |
7475 | offsetof(struct tcb , wval )) &3) != 3); |
7476 | #else |
7477 | BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ |
7478 | offsetof(struct tcb , sval )) &3) != 0); |
7479 | BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ |
7480 | offsetof(struct tcb , wval )) &3) != 0); |
7481 | #endif |
7482 | } |
7483 | |
7484 | |
7485 | /*------------------------------------------------------------------------ |
7486 | ** Lun control block allocation and initialization. |
7487 | **------------------------------------------------------------------------ |
7488 | ** This data structure is allocated and initialized after a SCSI |
7489 | ** command has been successfully completed for this target/lun. |
7490 | **------------------------------------------------------------------------ |
7491 | */ |
7492 | static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) |
7493 | { |
7494 | struct tcb *tp = &np->target[tn]; |
7495 | struct lcb *lp = tp->lp[ln]; |
7496 | ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); |
7497 | int lh = ln & 3; |
7498 | |
7499 | /* |
7500 | ** Already done, return. |
7501 | */ |
7502 | if (lp) |
7503 | return lp; |
7504 | |
7505 | /* |
7506 | ** Allocate the lcb. |
7507 | */ |
7508 | lp = m_calloc_dma(sizeof(struct lcb), "LCB"); |
7509 | if (!lp) |
7510 | goto fail; |
7511 | memset(lp, 0, sizeof(*lp)); |
7512 | tp->lp[ln] = lp; |
7513 | |
7514 | /* |
7515 | ** Initialize the target control block if not yet. |
7516 | */ |
7517 | if (!tp->jump_tcb.l_cmd) |
7518 | ncr_init_tcb(np, tn); |
7519 | |
7520 | /* |
7521 | ** Initialize the CCB queue headers. |
7522 | */ |
7523 | INIT_LIST_HEAD(&lp->free_ccbq); |
7524 | INIT_LIST_HEAD(&lp->busy_ccbq); |
7525 | INIT_LIST_HEAD(&lp->wait_ccbq); |
7526 | INIT_LIST_HEAD(&lp->skip_ccbq); |
7527 | |
7528 | /* |
7529 | ** Set max CCBs to 1 and use the default 1 entry |
7530 | ** jump table by default. |
7531 | */ |
7532 | lp->maxnxs = 1; |
7533 | lp->jump_ccb = &lp->jump_ccb_0; |
7534 | lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); |
7535 | |
7536 | /* |
7537 | ** Initilialyze the reselect script: |
7538 | ** |
7539 | ** Jump to next lcb if SFBR does not match this lun. |
7540 | ** Load TEMP with the CCB direct jump table bus address. |
7541 | ** Get the SIMPLE TAG message and the tag. |
7542 | ** |
7543 | ** JUMP IF (SFBR != #lun#), @(next lcb) |
7544 | ** COPY @(lp->p_jump_ccb), @(temp) |
7545 | ** JUMP @script(resel_notag) |
7546 | */ |
7547 | lp->jump_lcb.l_cmd = |
7548 | cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); |
7549 | lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; |
7550 | |
7551 | lp->load_jump_ccb[0] = cpu_to_scr(copy_4); |
7552 | lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); |
7553 | lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); |
7554 | |
7555 | lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); |
7556 | lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); |
7557 | |
7558 | /* |
7559 | ** Link this lun control block to the JUMP chain. |
7560 | */ |
7561 | tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); |
7562 | |
7563 | /* |
7564 | ** Initialize command queuing control. |
7565 | */ |
7566 | lp->busyccbs = 1; |
7567 | lp->queuedccbs = 1; |
7568 | lp->queuedepth = 1; |
7569 | fail: |
7570 | return lp; |
7571 | } |
7572 | |
7573 | |
7574 | /*------------------------------------------------------------------------ |
7575 | ** Lun control block setup on INQUIRY data received. |
7576 | **------------------------------------------------------------------------ |
7577 | ** We only support WIDE, SYNC for targets and CMDQ for logical units. |
7578 | ** This setup is done on each INQUIRY since we are expecting user |
7579 | ** will play with CHANGE DEFINITION commands. :-) |
7580 | **------------------------------------------------------------------------ |
7581 | */ |
7582 | static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) |
7583 | { |
7584 | unsigned char tn = sdev->id, ln = sdev->lun; |
7585 | struct tcb *tp = &np->target[tn]; |
7586 | struct lcb *lp = tp->lp[ln]; |
7587 | |
7588 | /* If no lcb, try to allocate it. */ |
7589 | if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) |
7590 | goto fail; |
7591 | |
7592 | /* |
7593 | ** If unit supports tagged commands, allocate the |
7594 | ** CCB JUMP table if not yet. |
7595 | */ |
7596 | if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { |
7597 | int i; |
7598 | lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB"); |
7599 | if (!lp->jump_ccb) { |
7600 | lp->jump_ccb = &lp->jump_ccb_0; |
7601 | goto fail; |
7602 | } |
7603 | lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); |
7604 | for (i = 0 ; i < 64 ; i++) |
7605 | lp->jump_ccb[i] = |
7606 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); |
7607 | for (i = 0 ; i < MAX_TAGS ; i++) |
7608 | lp->cb_tags[i] = i; |
7609 | lp->maxnxs = MAX_TAGS; |
7610 | lp->tags_stime = jiffies + 3*HZ; |
7611 | ncr_setup_tags (np, sdev); |
7612 | } |
7613 | |
7614 | |
7615 | fail: |
7616 | return lp; |
7617 | } |
7618 | |
7619 | /*========================================================== |
7620 | ** |
7621 | ** |
7622 | ** Build Scatter Gather Block |
7623 | ** |
7624 | ** |
7625 | **========================================================== |
7626 | ** |
7627 | ** The transfer area may be scattered among |
7628 | ** several non adjacent physical pages. |
7629 | ** |
7630 | ** We may use MAX_SCATTER blocks. |
7631 | ** |
7632 | **---------------------------------------------------------- |
7633 | */ |
7634 | |
7635 | /* |
7636 | ** We try to reduce the number of interrupts caused |
7637 | ** by unexpected phase changes due to disconnects. |
7638 | ** A typical harddisk may disconnect before ANY block. |
7639 | ** If we wanted to avoid unexpected phase changes at all |
7640 | ** we had to use a break point every 512 bytes. |
7641 | ** Of course the number of scatter/gather blocks is |
7642 | ** limited. |
7643 | ** Under Linux, the scatter/gatter blocks are provided by |
7644 | ** the generic driver. We just have to copy addresses and |
7645 | ** sizes to the data segment array. |
7646 | */ |
7647 | |
7648 | static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) |
7649 | { |
7650 | int segment = 0; |
7651 | int use_sg = scsi_sg_count(cmd); |
7652 | |
7653 | cp->data_len = 0; |
7654 | |
7655 | use_sg = map_scsi_sg_data(np, cmd); |
7656 | if (use_sg > 0) { |
7657 | struct scatterlist *sg; |
7658 | struct scr_tblmove *data; |
7659 | |
7660 | if (use_sg > MAX_SCATTER) { |
7661 | unmap_scsi_data(np, cmd); |
7662 | return -1; |
7663 | } |
7664 | |
7665 | data = &cp->phys.data[MAX_SCATTER - use_sg]; |
7666 | |
7667 | scsi_for_each_sg(cmd, sg, use_sg, segment) { |
7668 | dma_addr_t baddr = sg_dma_address(sg); |
7669 | unsigned int len = sg_dma_len(sg); |
7670 | |
7671 | ncr_build_sge(np, &data[segment], baddr, len); |
7672 | cp->data_len += len; |
7673 | } |
7674 | } else |
7675 | segment = -2; |
7676 | |
7677 | return segment; |
7678 | } |
7679 | |
7680 | /*========================================================== |
7681 | ** |
7682 | ** |
7683 | ** Test the bus snoop logic :-( |
7684 | ** |
7685 | ** Has to be called with interrupts disabled. |
7686 | ** |
7687 | ** |
7688 | **========================================================== |
7689 | */ |
7690 | |
7691 | static int __init ncr_regtest (struct ncb* np) |
7692 | { |
7693 | register volatile u32 data; |
7694 | /* |
7695 | ** ncr registers may NOT be cached. |
7696 | ** write 0xffffffff to a read only register area, |
7697 | ** and try to read it back. |
7698 | */ |
7699 | data = 0xffffffff; |
7700 | OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); |
7701 | data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); |
7702 | #if 1 |
7703 | if (data == 0xffffffff) { |
7704 | #else |
7705 | if ((data & 0xe2f0fffd) != 0x02000080) { |
7706 | #endif |
7707 | printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", |
7708 | (unsigned) data); |
7709 | return (0x10); |
7710 | } |
7711 | return (0); |
7712 | } |
7713 | |
7714 | static int __init ncr_snooptest (struct ncb* np) |
7715 | { |
7716 | u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; |
7717 | int i, err=0; |
7718 | if (np->reg) { |
7719 | err |= ncr_regtest (np); |
7720 | if (err) |
7721 | return (err); |
7722 | } |
7723 | |
7724 | /* init */ |
7725 | pc = NCB_SCRIPTH_PHYS (np, snooptest); |
7726 | host_wr = 1; |
7727 | ncr_wr = 2; |
7728 | /* |
7729 | ** Set memory and register. |
7730 | */ |
7731 | np->ncr_cache = cpu_to_scr(host_wr); |
7732 | OUTL (nc_temp, ncr_wr); |
7733 | /* |
7734 | ** Start script (exchange values) |
7735 | */ |
7736 | OUTL_DSP (pc); |
7737 | /* |
7738 | ** Wait 'til done (with timeout) |
7739 | */ |
7740 | for (i=0; i<NCR_SNOOP_TIMEOUT; i++) |
7741 | if (INB(nc_istat) & (INTF|SIP|DIP)) |
7742 | break; |
7743 | /* |
7744 | ** Save termination position. |
7745 | */ |
7746 | pc = INL (nc_dsp); |
7747 | /* |
7748 | ** Read memory and register. |
7749 | */ |
7750 | host_rd = scr_to_cpu(np->ncr_cache); |
7751 | ncr_rd = INL (nc_scratcha); |
7752 | ncr_bk = INL (nc_temp); |
7753 | /* |
7754 | ** Reset ncr chip |
7755 | */ |
7756 | ncr_chip_reset(np, 100); |
7757 | /* |
7758 | ** check for timeout |
7759 | */ |
7760 | if (i>=NCR_SNOOP_TIMEOUT) { |
7761 | printk ("CACHE TEST FAILED: timeout.\n"); |
7762 | return (0x20); |
7763 | } |
7764 | /* |
7765 | ** Check termination position. |
7766 | */ |
7767 | if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { |
7768 | printk ("CACHE TEST FAILED: script execution failed.\n"); |
7769 | printk ("start=%08lx, pc=%08lx, end=%08lx\n", |
7770 | (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, |
7771 | (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); |
7772 | return (0x40); |
7773 | } |
7774 | /* |
7775 | ** Show results. |
7776 | */ |
7777 | if (host_wr != ncr_rd) { |
7778 | printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", |
7779 | (int) host_wr, (int) ncr_rd); |
7780 | err |= 1; |
7781 | } |
7782 | if (host_rd != ncr_wr) { |
7783 | printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", |
7784 | (int) ncr_wr, (int) host_rd); |
7785 | err |= 2; |
7786 | } |
7787 | if (ncr_bk != ncr_wr) { |
7788 | printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", |
7789 | (int) ncr_wr, (int) ncr_bk); |
7790 | err |= 4; |
7791 | } |
7792 | return (err); |
7793 | } |
7794 | |
7795 | /*========================================================== |
7796 | ** |
7797 | ** Determine the ncr's clock frequency. |
7798 | ** This is essential for the negotiation |
7799 | ** of the synchronous transfer rate. |
7800 | ** |
7801 | **========================================================== |
7802 | ** |
7803 | ** Note: we have to return the correct value. |
7804 | ** THERE IS NO SAFE DEFAULT VALUE. |
7805 | ** |
7806 | ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. |
7807 | ** 53C860 and 53C875 rev. 1 support fast20 transfers but |
7808 | ** do not have a clock doubler and so are provided with a |
7809 | ** 80 MHz clock. All other fast20 boards incorporate a doubler |
7810 | ** and so should be delivered with a 40 MHz clock. |
7811 | ** The future fast40 chips (895/895) use a 40 Mhz base clock |
7812 | ** and provide a clock quadrupler (160 Mhz). The code below |
7813 | ** tries to deal as cleverly as possible with all this stuff. |
7814 | ** |
7815 | **---------------------------------------------------------- |
7816 | */ |
7817 | |
7818 | /* |
7819 | * Select NCR SCSI clock frequency |
7820 | */ |
7821 | static void ncr_selectclock(struct ncb *np, u_char scntl3) |
7822 | { |
7823 | if (np->multiplier < 2) { |
7824 | OUTB(nc_scntl3, scntl3); |
7825 | return; |
7826 | } |
7827 | |
7828 | if (bootverbose >= 2) |
7829 | printk ("%s: enabling clock multiplier\n", ncr_name(np)); |
7830 | |
7831 | OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ |
7832 | if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ |
7833 | int i = 20; |
7834 | while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) |
7835 | udelay(20); |
7836 | if (!i) |
7837 | printk("%s: the chip cannot lock the frequency\n", ncr_name(np)); |
7838 | } else /* Wait 20 micro-seconds for doubler */ |
7839 | udelay(20); |
7840 | OUTB(nc_stest3, HSC); /* Halt the scsi clock */ |
7841 | OUTB(nc_scntl3, scntl3); |
7842 | OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ |
7843 | OUTB(nc_stest3, 0x00); /* Restart scsi clock */ |
7844 | } |
7845 | |
7846 | |
7847 | /* |
7848 | * calculate NCR SCSI clock frequency (in KHz) |
7849 | */ |
7850 | static unsigned __init ncrgetfreq (struct ncb *np, int gen) |
7851 | { |
7852 | unsigned ms = 0; |
7853 | char count = 0; |
7854 | |
7855 | /* |
7856 | * Measure GEN timer delay in order |
7857 | * to calculate SCSI clock frequency |
7858 | * |
7859 | * This code will never execute too |
7860 | * many loop iterations (if DELAY is |
7861 | * reasonably correct). It could get |
7862 | * too low a delay (too high a freq.) |
7863 | * if the CPU is slow executing the |
7864 | * loop for some reason (an NMI, for |
7865 | * example). For this reason we will |
7866 | * if multiple measurements are to be |
7867 | * performed trust the higher delay |
7868 | * (lower frequency returned). |
7869 | */ |
7870 | OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ |
7871 | OUTW (nc_sien , 0); /* mask all scsi interrupts */ |
7872 | (void) INW (nc_sist); /* clear pending scsi interrupt */ |
7873 | OUTB (nc_dien , 0); /* mask all dma interrupts */ |
7874 | (void) INW (nc_sist); /* another one, just to be sure :) */ |
7875 | OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ |
7876 | OUTB (nc_stime1, 0); /* disable general purpose timer */ |
7877 | OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ |
7878 | while (!(INW(nc_sist) & GEN) && ms++ < 100000) { |
7879 | for (count = 0; count < 10; count ++) |
7880 | udelay(100); /* count ms */ |
7881 | } |
7882 | OUTB (nc_stime1, 0); /* disable general purpose timer */ |
7883 | /* |
7884 | * set prescaler to divide by whatever 0 means |
7885 | * 0 ought to choose divide by 2, but appears |
7886 | * to set divide by 3.5 mode in my 53c810 ... |
7887 | */ |
7888 | OUTB (nc_scntl3, 0); |
7889 | |
7890 | if (bootverbose >= 2) |
7891 | printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms); |
7892 | /* |
7893 | * adjust for prescaler, and convert into KHz |
7894 | */ |
7895 | return ms ? ((1 << gen) * 4340) / ms : 0; |
7896 | } |
7897 | |
7898 | /* |
7899 | * Get/probe NCR SCSI clock frequency |
7900 | */ |
7901 | static void __init ncr_getclock (struct ncb *np, int mult) |
7902 | { |
7903 | unsigned char scntl3 = INB(nc_scntl3); |
7904 | unsigned char stest1 = INB(nc_stest1); |
7905 | unsigned f1; |
7906 | |
7907 | np->multiplier = 1; |
7908 | f1 = 40000; |
7909 | |
7910 | /* |
7911 | ** True with 875 or 895 with clock multiplier selected |
7912 | */ |
7913 | if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { |
7914 | if (bootverbose >= 2) |
7915 | printk ("%s: clock multiplier found\n", ncr_name(np)); |
7916 | np->multiplier = mult; |
7917 | } |
7918 | |
7919 | /* |
7920 | ** If multiplier not found or scntl3 not 7,5,3, |
7921 | ** reset chip and get frequency from general purpose timer. |
7922 | ** Otherwise trust scntl3 BIOS setting. |
7923 | */ |
7924 | if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { |
7925 | unsigned f2; |
7926 | |
7927 | ncr_chip_reset(np, 5); |
7928 | |
7929 | (void) ncrgetfreq (np, 11); /* throw away first result */ |
7930 | f1 = ncrgetfreq (np, 11); |
7931 | f2 = ncrgetfreq (np, 11); |
7932 | |
7933 | if(bootverbose) |
7934 | printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2); |
7935 | |
7936 | if (f1 > f2) f1 = f2; /* trust lower result */ |
7937 | |
7938 | if (f1 < 45000) f1 = 40000; |
7939 | else if (f1 < 55000) f1 = 50000; |
7940 | else f1 = 80000; |
7941 | |
7942 | if (f1 < 80000 && mult > 1) { |
7943 | if (bootverbose >= 2) |
7944 | printk ("%s: clock multiplier assumed\n", ncr_name(np)); |
7945 | np->multiplier = mult; |
7946 | } |
7947 | } else { |
7948 | if ((scntl3 & 7) == 3) f1 = 40000; |
7949 | else if ((scntl3 & 7) == 5) f1 = 80000; |
7950 | else f1 = 160000; |
7951 | |
7952 | f1 /= np->multiplier; |
7953 | } |
7954 | |
7955 | /* |
7956 | ** Compute controller synchronous parameters. |
7957 | */ |
7958 | f1 *= np->multiplier; |
7959 | np->clock_khz = f1; |
7960 | } |
7961 | |
7962 | /*===================== LINUX ENTRY POINTS SECTION ==========================*/ |
7963 | |
7964 | static int ncr53c8xx_slave_alloc(struct scsi_device *device) |
7965 | { |
7966 | struct Scsi_Host *host = device->host; |
7967 | struct ncb *np = ((struct host_data *) host->hostdata)->ncb; |
7968 | struct tcb *tp = &np->target[device->id]; |
7969 | tp->starget = device->sdev_target; |
7970 | |
7971 | return 0; |
7972 | } |
7973 | |
7974 | static int ncr53c8xx_slave_configure(struct scsi_device *device) |
7975 | { |
7976 | struct Scsi_Host *host = device->host; |
7977 | struct ncb *np = ((struct host_data *) host->hostdata)->ncb; |
7978 | struct tcb *tp = &np->target[device->id]; |
7979 | struct lcb *lp = tp->lp[device->lun]; |
7980 | int numtags, depth_to_use; |
7981 | |
7982 | ncr_setup_lcb(np, device); |
7983 | |
7984 | /* |
7985 | ** Select queue depth from driver setup. |
7986 | ** Donnot use more than configured by user. |
7987 | ** Use at least 2. |
7988 | ** Donnot use more than our maximum. |
7989 | */ |
7990 | numtags = device_queue_depth(np->unit, device->id, device->lun); |
7991 | if (numtags > tp->usrtags) |
7992 | numtags = tp->usrtags; |
7993 | if (!device->tagged_supported) |
7994 | numtags = 1; |
7995 | depth_to_use = numtags; |
7996 | if (depth_to_use < 2) |
7997 | depth_to_use = 2; |
7998 | if (depth_to_use > MAX_TAGS) |
7999 | depth_to_use = MAX_TAGS; |
8000 | |
8001 | scsi_adjust_queue_depth(device, |
8002 | (device->tagged_supported ? |
8003 | MSG_SIMPLE_TAG : 0), |
8004 | depth_to_use); |
8005 | |
8006 | /* |
8007 | ** Since the queue depth is not tunable under Linux, |
8008 | ** we need to know this value in order not to |
8009 | ** announce stupid things to user. |
8010 | ** |
8011 | ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable.. |
8012 | ** In fact we just tuned it, or did I miss |
8013 | ** something important? :) |
8014 | */ |
8015 | if (lp) { |
8016 | lp->numtags = lp->maxtags = numtags; |
8017 | lp->scdev_depth = depth_to_use; |
8018 | } |
8019 | ncr_setup_tags (np, device); |
8020 | |
8021 | #ifdef DEBUG_NCR53C8XX |
8022 | printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n", |
8023 | np->unit, device->id, device->lun, depth_to_use); |
8024 | #endif |
8025 | |
8026 | if (spi_support_sync(device->sdev_target) && |
8027 | !spi_initial_dv(device->sdev_target)) |
8028 | spi_dv_device(device); |
8029 | return 0; |
8030 | } |
8031 | |
8032 | static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) |
8033 | { |
8034 | struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; |
8035 | unsigned long flags; |
8036 | int sts; |
8037 | |
8038 | #ifdef DEBUG_NCR53C8XX |
8039 | printk("ncr53c8xx_queue_command\n"); |
8040 | #endif |
8041 | |
8042 | cmd->scsi_done = done; |
8043 | cmd->host_scribble = NULL; |
8044 | cmd->__data_mapped = 0; |
8045 | cmd->__data_mapping = 0; |
8046 | |
8047 | spin_lock_irqsave(&np->smp_lock, flags); |
8048 | |
8049 | if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { |
8050 | cmd->result = ScsiResult(sts, 0); |
8051 | #ifdef DEBUG_NCR53C8XX |
8052 | printk("ncr53c8xx : command not queued - result=%d\n", sts); |
8053 | #endif |
8054 | } |
8055 | #ifdef DEBUG_NCR53C8XX |
8056 | else |
8057 | printk("ncr53c8xx : command successfully queued\n"); |
8058 | #endif |
8059 | |
8060 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8061 | |
8062 | if (sts != DID_OK) { |
8063 | unmap_scsi_data(np, cmd); |
8064 | done(cmd); |
8065 | sts = 0; |
8066 | } |
8067 | |
8068 | return sts; |
8069 | } |
8070 | |
8071 | irqreturn_t ncr53c8xx_intr(int irq, void *dev_id) |
8072 | { |
8073 | unsigned long flags; |
8074 | struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; |
8075 | struct host_data *host_data = (struct host_data *)shost->hostdata; |
8076 | struct ncb *np = host_data->ncb; |
8077 | struct scsi_cmnd *done_list; |
8078 | |
8079 | #ifdef DEBUG_NCR53C8XX |
8080 | printk("ncr53c8xx : interrupt received\n"); |
8081 | #endif |
8082 | |
8083 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("["); |
8084 | |
8085 | spin_lock_irqsave(&np->smp_lock, flags); |
8086 | ncr_exception(np); |
8087 | done_list = np->done_list; |
8088 | np->done_list = NULL; |
8089 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8090 | |
8091 | if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n"); |
8092 | |
8093 | if (done_list) |
8094 | ncr_flush_done_cmds(done_list); |
8095 | return IRQ_HANDLED; |
8096 | } |
8097 | |
8098 | static void ncr53c8xx_timeout(unsigned long npref) |
8099 | { |
8100 | struct ncb *np = (struct ncb *) npref; |
8101 | unsigned long flags; |
8102 | struct scsi_cmnd *done_list; |
8103 | |
8104 | spin_lock_irqsave(&np->smp_lock, flags); |
8105 | ncr_timeout(np); |
8106 | done_list = np->done_list; |
8107 | np->done_list = NULL; |
8108 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8109 | |
8110 | if (done_list) |
8111 | ncr_flush_done_cmds(done_list); |
8112 | } |
8113 | |
8114 | static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) |
8115 | { |
8116 | struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; |
8117 | int sts; |
8118 | unsigned long flags; |
8119 | struct scsi_cmnd *done_list; |
8120 | |
8121 | /* |
8122 | * If the mid-level driver told us reset is synchronous, it seems |
8123 | * that we must call the done() callback for the involved command, |
8124 | * even if this command was not queued to the low-level driver, |
8125 | * before returning SUCCESS. |
8126 | */ |
8127 | |
8128 | spin_lock_irqsave(&np->smp_lock, flags); |
8129 | sts = ncr_reset_bus(np, cmd, 1); |
8130 | |
8131 | done_list = np->done_list; |
8132 | np->done_list = NULL; |
8133 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8134 | |
8135 | ncr_flush_done_cmds(done_list); |
8136 | |
8137 | return sts; |
8138 | } |
8139 | |
8140 | #if 0 /* unused and broken */ |
8141 | static int ncr53c8xx_abort(struct scsi_cmnd *cmd) |
8142 | { |
8143 | struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; |
8144 | int sts; |
8145 | unsigned long flags; |
8146 | struct scsi_cmnd *done_list; |
8147 | |
8148 | printk("ncr53c8xx_abort: command pid %lu\n", cmd->serial_number); |
8149 | |
8150 | NCR_LOCK_NCB(np, flags); |
8151 | |
8152 | sts = ncr_abort_command(np, cmd); |
8153 | out: |
8154 | done_list = np->done_list; |
8155 | np->done_list = NULL; |
8156 | NCR_UNLOCK_NCB(np, flags); |
8157 | |
8158 | ncr_flush_done_cmds(done_list); |
8159 | |
8160 | return sts; |
8161 | } |
8162 | #endif |
8163 | |
8164 | |
8165 | /* |
8166 | ** Scsi command waiting list management. |
8167 | ** |
8168 | ** It may happen that we cannot insert a scsi command into the start queue, |
8169 | ** in the following circumstances. |
8170 | ** Too few preallocated ccb(s), |
8171 | ** maxtags < cmd_per_lun of the Linux host control block, |
8172 | ** etc... |
8173 | ** Such scsi commands are inserted into a waiting list. |
8174 | ** When a scsi command complete, we try to requeue the commands of the |
8175 | ** waiting list. |
8176 | */ |
8177 | |
8178 | #define next_wcmd host_scribble |
8179 | |
8180 | static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) |
8181 | { |
8182 | struct scsi_cmnd *wcmd; |
8183 | |
8184 | #ifdef DEBUG_WAITING_LIST |
8185 | printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd); |
8186 | #endif |
8187 | cmd->next_wcmd = NULL; |
8188 | if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; |
8189 | else { |
8190 | while (wcmd->next_wcmd) |
8191 | wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; |
8192 | wcmd->next_wcmd = (char *) cmd; |
8193 | } |
8194 | } |
8195 | |
8196 | static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd) |
8197 | { |
8198 | struct scsi_cmnd **pcmd = &np->waiting_list; |
8199 | |
8200 | while (*pcmd) { |
8201 | if (cmd == *pcmd) { |
8202 | if (to_remove) { |
8203 | *pcmd = (struct scsi_cmnd *) cmd->next_wcmd; |
8204 | cmd->next_wcmd = NULL; |
8205 | } |
8206 | #ifdef DEBUG_WAITING_LIST |
8207 | printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd); |
8208 | #endif |
8209 | return cmd; |
8210 | } |
8211 | pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd; |
8212 | } |
8213 | return NULL; |
8214 | } |
8215 | |
8216 | static void process_waiting_list(struct ncb *np, int sts) |
8217 | { |
8218 | struct scsi_cmnd *waiting_list, *wcmd; |
8219 | |
8220 | waiting_list = np->waiting_list; |
8221 | np->waiting_list = NULL; |
8222 | |
8223 | #ifdef DEBUG_WAITING_LIST |
8224 | if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts); |
8225 | #endif |
8226 | while ((wcmd = waiting_list) != NULL) { |
8227 | waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; |
8228 | wcmd->next_wcmd = NULL; |
8229 | if (sts == DID_OK) { |
8230 | #ifdef DEBUG_WAITING_LIST |
8231 | printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd); |
8232 | #endif |
8233 | sts = ncr_queue_command(np, wcmd); |
8234 | } |
8235 | if (sts != DID_OK) { |
8236 | #ifdef DEBUG_WAITING_LIST |
8237 | printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts); |
8238 | #endif |
8239 | wcmd->result = ScsiResult(sts, 0); |
8240 | ncr_queue_done_cmd(np, wcmd); |
8241 | } |
8242 | } |
8243 | } |
8244 | |
8245 | #undef next_wcmd |
8246 | |
8247 | static ssize_t show_ncr53c8xx_revision(struct device *dev, |
8248 | struct device_attribute *attr, char *buf) |
8249 | { |
8250 | struct Scsi_Host *host = class_to_shost(dev); |
8251 | struct host_data *host_data = (struct host_data *)host->hostdata; |
8252 | |
8253 | return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id); |
8254 | } |
8255 | |
8256 | static struct device_attribute ncr53c8xx_revision_attr = { |
8257 | .attr = { .name = "revision", .mode = S_IRUGO, }, |
8258 | .show = show_ncr53c8xx_revision, |
8259 | }; |
8260 | |
8261 | static struct device_attribute *ncr53c8xx_host_attrs[] = { |
8262 | &ncr53c8xx_revision_attr, |
8263 | NULL |
8264 | }; |
8265 | |
8266 | /*========================================================== |
8267 | ** |
8268 | ** Boot command line. |
8269 | ** |
8270 | **========================================================== |
8271 | */ |
8272 | #ifdef MODULE |
8273 | char *ncr53c8xx; /* command line passed by insmod */ |
8274 | module_param(ncr53c8xx, charp, 0); |
8275 | #endif |
8276 | |
8277 | #ifndef MODULE |
8278 | static int __init ncr53c8xx_setup(char *str) |
8279 | { |
8280 | return sym53c8xx__setup(str); |
8281 | } |
8282 | |
8283 | __setup("ncr53c8xx=", ncr53c8xx_setup); |
8284 | #endif |
8285 | |
8286 | |
8287 | /* |
8288 | * Host attach and initialisations. |
8289 | * |
8290 | * Allocate host data and ncb structure. |
8291 | * Request IO region and remap MMIO region. |
8292 | * Do chip initialization. |
8293 | * If all is OK, install interrupt handling and |
8294 | * start the timer daemon. |
8295 | */ |
8296 | struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, |
8297 | int unit, struct ncr_device *device) |
8298 | { |
8299 | struct host_data *host_data; |
8300 | struct ncb *np = NULL; |
8301 | struct Scsi_Host *instance = NULL; |
8302 | u_long flags = 0; |
8303 | int i; |
8304 | |
8305 | if (!tpnt->name) |
8306 | tpnt->name = SCSI_NCR_DRIVER_NAME; |
8307 | if (!tpnt->shost_attrs) |
8308 | tpnt->shost_attrs = ncr53c8xx_host_attrs; |
8309 | |
8310 | tpnt->queuecommand = ncr53c8xx_queue_command; |
8311 | tpnt->slave_configure = ncr53c8xx_slave_configure; |
8312 | tpnt->slave_alloc = ncr53c8xx_slave_alloc; |
8313 | tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; |
8314 | tpnt->can_queue = SCSI_NCR_CAN_QUEUE; |
8315 | tpnt->this_id = 7; |
8316 | tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; |
8317 | tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; |
8318 | tpnt->use_clustering = ENABLE_CLUSTERING; |
8319 | |
8320 | if (device->differential) |
8321 | driver_setup.diff_support = device->differential; |
8322 | |
8323 | printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n", |
8324 | unit, device->chip.revision_id, device->slot.irq); |
8325 | |
8326 | instance = scsi_host_alloc(tpnt, sizeof(*host_data)); |
8327 | if (!instance) |
8328 | goto attach_error; |
8329 | host_data = (struct host_data *) instance->hostdata; |
8330 | |
8331 | np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB"); |
8332 | if (!np) |
8333 | goto attach_error; |
8334 | spin_lock_init(&np->smp_lock); |
8335 | np->dev = device->dev; |
8336 | np->p_ncb = vtobus(np); |
8337 | host_data->ncb = np; |
8338 | |
8339 | np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB"); |
8340 | if (!np->ccb) |
8341 | goto attach_error; |
8342 | |
8343 | /* Store input information in the host data structure. */ |
8344 | np->unit = unit; |
8345 | np->verbose = driver_setup.verbose; |
8346 | sprintf(np->inst_name, "ncr53c720-%d", np->unit); |
8347 | np->revision_id = device->chip.revision_id; |
8348 | np->features = device->chip.features; |
8349 | np->clock_divn = device->chip.nr_divisor; |
8350 | np->maxoffs = device->chip.offset_max; |
8351 | np->maxburst = device->chip.burst_max; |
8352 | np->myaddr = device->host_id; |
8353 | |
8354 | /* Allocate SCRIPTS areas. */ |
8355 | np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT"); |
8356 | if (!np->script0) |
8357 | goto attach_error; |
8358 | np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH"); |
8359 | if (!np->scripth0) |
8360 | goto attach_error; |
8361 | |
8362 | init_timer(&np->timer); |
8363 | np->timer.data = (unsigned long) np; |
8364 | np->timer.function = ncr53c8xx_timeout; |
8365 | |
8366 | /* Try to map the controller chip to virtual and physical memory. */ |
8367 | |
8368 | np->paddr = device->slot.base; |
8369 | np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; |
8370 | |
8371 | if (device->slot.base_v) |
8372 | np->vaddr = device->slot.base_v; |
8373 | else |
8374 | np->vaddr = ioremap(device->slot.base_c, 128); |
8375 | |
8376 | if (!np->vaddr) { |
8377 | printk(KERN_ERR |
8378 | "%s: can't map memory mapped IO region\n",ncr_name(np)); |
8379 | goto attach_error; |
8380 | } else { |
8381 | if (bootverbose > 1) |
8382 | printk(KERN_INFO |
8383 | "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr); |
8384 | } |
8385 | |
8386 | /* Make the controller's registers available. Now the INB INW INL |
8387 | * OUTB OUTW OUTL macros can be used safely. |
8388 | */ |
8389 | |
8390 | np->reg = (struct ncr_reg __iomem *)np->vaddr; |
8391 | |
8392 | /* Do chip dependent initialization. */ |
8393 | ncr_prepare_setting(np); |
8394 | |
8395 | if (np->paddr2 && sizeof(struct script) > 4096) { |
8396 | np->paddr2 = 0; |
8397 | printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n", |
8398 | ncr_name(np)); |
8399 | } |
8400 | |
8401 | instance->max_channel = 0; |
8402 | instance->this_id = np->myaddr; |
8403 | instance->max_id = np->maxwide ? 16 : 8; |
8404 | instance->max_lun = SCSI_NCR_MAX_LUN; |
8405 | instance->base = (unsigned long) np->reg; |
8406 | instance->irq = device->slot.irq; |
8407 | instance->unique_id = device->slot.base; |
8408 | instance->dma_channel = 0; |
8409 | instance->cmd_per_lun = MAX_TAGS; |
8410 | instance->can_queue = (MAX_START-4); |
8411 | /* This can happen if you forget to call ncr53c8xx_init from |
8412 | * your module_init */ |
8413 | BUG_ON(!ncr53c8xx_transport_template); |
8414 | instance->transportt = ncr53c8xx_transport_template; |
8415 | |
8416 | /* Patch script to physical addresses */ |
8417 | ncr_script_fill(&script0, &scripth0); |
8418 | |
8419 | np->scripth = np->scripth0; |
8420 | np->p_scripth = vtobus(np->scripth); |
8421 | np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); |
8422 | |
8423 | ncr_script_copy_and_bind(np, (ncrcmd *) &script0, |
8424 | (ncrcmd *) np->script0, sizeof(struct script)); |
8425 | ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0, |
8426 | (ncrcmd *) np->scripth0, sizeof(struct scripth)); |
8427 | np->ccb->p_ccb = vtobus (np->ccb); |
8428 | |
8429 | /* Patch the script for LED support. */ |
8430 | |
8431 | if (np->features & FE_LED0) { |
8432 | np->script0->idle[0] = |
8433 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); |
8434 | np->script0->reselected[0] = |
8435 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); |
8436 | np->script0->start[0] = |
8437 | cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); |
8438 | } |
8439 | |
8440 | /* |
8441 | * Look for the target control block of this nexus. |
8442 | * For i = 0 to 3 |
8443 | * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) |
8444 | */ |
8445 | for (i = 0 ; i < 4 ; i++) { |
8446 | np->jump_tcb[i].l_cmd = |
8447 | cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); |
8448 | np->jump_tcb[i].l_paddr = |
8449 | cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); |
8450 | } |
8451 | |
8452 | ncr_chip_reset(np, 100); |
8453 | |
8454 | /* Now check the cache handling of the chipset. */ |
8455 | |
8456 | if (ncr_snooptest(np)) { |
8457 | printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n"); |
8458 | goto attach_error; |
8459 | } |
8460 | |
8461 | /* Install the interrupt handler. */ |
8462 | np->irq = device->slot.irq; |
8463 | |
8464 | /* Initialize the fixed part of the default ccb. */ |
8465 | ncr_init_ccb(np, np->ccb); |
8466 | |
8467 | /* |
8468 | * After SCSI devices have been opened, we cannot reset the bus |
8469 | * safely, so we do it here. Interrupt handler does the real work. |
8470 | * Process the reset exception if interrupts are not enabled yet. |
8471 | * Then enable disconnects. |
8472 | */ |
8473 | spin_lock_irqsave(&np->smp_lock, flags); |
8474 | if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) { |
8475 | printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np)); |
8476 | |
8477 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8478 | goto attach_error; |
8479 | } |
8480 | ncr_exception(np); |
8481 | |
8482 | np->disc = 1; |
8483 | |
8484 | /* |
8485 | * The middle-level SCSI driver does not wait for devices to settle. |
8486 | * Wait synchronously if more than 2 seconds. |
8487 | */ |
8488 | if (driver_setup.settle_delay > 2) { |
8489 | printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n", |
8490 | ncr_name(np), driver_setup.settle_delay); |
8491 | mdelay(1000 * driver_setup.settle_delay); |
8492 | } |
8493 | |
8494 | /* start the timeout daemon */ |
8495 | np->lasttime=0; |
8496 | ncr_timeout (np); |
8497 | |
8498 | /* use SIMPLE TAG messages by default */ |
8499 | #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG |
8500 | np->order = SIMPLE_QUEUE_TAG; |
8501 | #endif |
8502 | |
8503 | spin_unlock_irqrestore(&np->smp_lock, flags); |
8504 | |
8505 | return instance; |
8506 | |
8507 | attach_error: |
8508 | if (!instance) |
8509 | return NULL; |
8510 | printk(KERN_INFO "%s: detaching...\n", ncr_name(np)); |
8511 | if (!np) |
8512 | goto unregister; |
8513 | if (np->scripth0) |
8514 | m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); |
8515 | if (np->script0) |
8516 | m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); |
8517 | if (np->ccb) |
8518 | m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); |
8519 | m_free_dma(np, sizeof(struct ncb), "NCB"); |
8520 | host_data->ncb = NULL; |
8521 | |
8522 | unregister: |
8523 | scsi_host_put(instance); |
8524 | |
8525 | return NULL; |
8526 | } |
8527 | |
8528 | |
8529 | void ncr53c8xx_release(struct Scsi_Host *host) |
8530 | { |
8531 | struct host_data *host_data = shost_priv(host); |
8532 | #ifdef DEBUG_NCR53C8XX |
8533 | printk("ncr53c8xx: release\n"); |
8534 | #endif |
8535 | if (host_data->ncb) |
8536 | ncr_detach(host_data->ncb); |
8537 | scsi_host_put(host); |
8538 | } |
8539 | |
8540 | static void ncr53c8xx_set_period(struct scsi_target *starget, int period) |
8541 | { |
8542 | struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); |
8543 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8544 | struct tcb *tp = &np->target[starget->id]; |
8545 | |
8546 | if (period > np->maxsync) |
8547 | period = np->maxsync; |
8548 | else if (period < np->minsync) |
8549 | period = np->minsync; |
8550 | |
8551 | tp->usrsync = period; |
8552 | |
8553 | ncr_negotiate(np, tp); |
8554 | } |
8555 | |
8556 | static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) |
8557 | { |
8558 | struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); |
8559 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8560 | struct tcb *tp = &np->target[starget->id]; |
8561 | |
8562 | if (offset > np->maxoffs) |
8563 | offset = np->maxoffs; |
8564 | else if (offset < 0) |
8565 | offset = 0; |
8566 | |
8567 | tp->maxoffs = offset; |
8568 | |
8569 | ncr_negotiate(np, tp); |
8570 | } |
8571 | |
8572 | static void ncr53c8xx_set_width(struct scsi_target *starget, int width) |
8573 | { |
8574 | struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); |
8575 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8576 | struct tcb *tp = &np->target[starget->id]; |
8577 | |
8578 | if (width > np->maxwide) |
8579 | width = np->maxwide; |
8580 | else if (width < 0) |
8581 | width = 0; |
8582 | |
8583 | tp->usrwide = width; |
8584 | |
8585 | ncr_negotiate(np, tp); |
8586 | } |
8587 | |
8588 | static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) |
8589 | { |
8590 | struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; |
8591 | enum spi_signal_type type; |
8592 | |
8593 | switch (np->scsi_mode) { |
8594 | case SMODE_SE: |
8595 | type = SPI_SIGNAL_SE; |
8596 | break; |
8597 | case SMODE_HVD: |
8598 | type = SPI_SIGNAL_HVD; |
8599 | break; |
8600 | default: |
8601 | type = SPI_SIGNAL_UNKNOWN; |
8602 | break; |
8603 | } |
8604 | spi_signalling(shost) = type; |
8605 | } |
8606 | |
8607 | static struct spi_function_template ncr53c8xx_transport_functions = { |
8608 | .set_period = ncr53c8xx_set_period, |
8609 | .show_period = 1, |
8610 | .set_offset = ncr53c8xx_set_offset, |
8611 | .show_offset = 1, |
8612 | .set_width = ncr53c8xx_set_width, |
8613 | .show_width = 1, |
8614 | .get_signalling = ncr53c8xx_get_signalling, |
8615 | }; |
8616 | |
8617 | int __init ncr53c8xx_init(void) |
8618 | { |
8619 | ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); |
8620 | if (!ncr53c8xx_transport_template) |
8621 | return -ENODEV; |
8622 | return 0; |
8623 | } |
8624 | |
8625 | void ncr53c8xx_exit(void) |
8626 | { |
8627 | spi_release_transport(ncr53c8xx_transport_template); |
8628 | } |
8629 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9