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1 | /* |
2 | * mv64x60_wdt.c - MV64X60 (Marvell Discovery) watchdog userspace interface |
3 | * |
4 | * Author: James Chapman <jchapman@katalix.com> |
5 | * |
6 | * Platform-specific setup code should configure the dog to generate |
7 | * interrupt or reset as required. This code only enables/disables |
8 | * and services the watchdog. |
9 | * |
10 | * Derived from mpc8xx_wdt.c, with the following copyright. |
11 | * |
12 | * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under |
13 | * the terms of the GNU General Public License version 2. This program |
14 | * is licensed "as is" without any warranty of any kind, whether express |
15 | * or implied. |
16 | */ |
17 | |
18 | #include <linux/fs.h> |
19 | #include <linux/init.h> |
20 | #include <linux/kernel.h> |
21 | #include <linux/miscdevice.h> |
22 | #include <linux/module.h> |
23 | #include <linux/watchdog.h> |
24 | #include <linux/platform_device.h> |
25 | #include <linux/mv643xx.h> |
26 | #include <linux/uaccess.h> |
27 | #include <linux/io.h> |
28 | |
29 | #define MV64x60_WDT_WDC_OFFSET 0 |
30 | |
31 | /* |
32 | * The watchdog configuration register contains a pair of 2-bit fields, |
33 | * 1. a reload field, bits 27-26, which triggers a reload of |
34 | * the countdown register, and |
35 | * 2. an enable field, bits 25-24, which toggles between |
36 | * enabling and disabling the watchdog timer. |
37 | * Bit 31 is a read-only field which indicates whether the |
38 | * watchdog timer is currently enabled. |
39 | * |
40 | * The low 24 bits contain the timer reload value. |
41 | */ |
42 | #define MV64x60_WDC_ENABLE_SHIFT 24 |
43 | #define MV64x60_WDC_SERVICE_SHIFT 26 |
44 | #define MV64x60_WDC_ENABLED_SHIFT 31 |
45 | |
46 | #define MV64x60_WDC_ENABLED_TRUE 1 |
47 | #define MV64x60_WDC_ENABLED_FALSE 0 |
48 | |
49 | /* Flags bits */ |
50 | #define MV64x60_WDOG_FLAG_OPENED 0 |
51 | |
52 | static unsigned long wdt_flags; |
53 | static int wdt_status; |
54 | static void __iomem *mv64x60_wdt_regs; |
55 | static int mv64x60_wdt_timeout; |
56 | static int mv64x60_wdt_count; |
57 | static unsigned int bus_clk; |
58 | static char expect_close; |
59 | static DEFINE_SPINLOCK(mv64x60_wdt_spinlock); |
60 | |
61 | static int nowayout = WATCHDOG_NOWAYOUT; |
62 | module_param(nowayout, int, 0); |
63 | MODULE_PARM_DESC(nowayout, |
64 | "Watchdog cannot be stopped once started (default=" |
65 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
66 | |
67 | static int mv64x60_wdt_toggle_wdc(int enabled_predicate, int field_shift) |
68 | { |
69 | u32 data; |
70 | u32 enabled; |
71 | int ret = 0; |
72 | |
73 | spin_lock(&mv64x60_wdt_spinlock); |
74 | data = readl(mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); |
75 | enabled = (data >> MV64x60_WDC_ENABLED_SHIFT) & 1; |
76 | |
77 | /* only toggle the requested field if enabled state matches predicate */ |
78 | if ((enabled ^ enabled_predicate) == 0) { |
79 | /* We write a 1, then a 2 -- to the appropriate field */ |
80 | data = (1 << field_shift) | mv64x60_wdt_count; |
81 | writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); |
82 | |
83 | data = (2 << field_shift) | mv64x60_wdt_count; |
84 | writel(data, mv64x60_wdt_regs + MV64x60_WDT_WDC_OFFSET); |
85 | ret = 1; |
86 | } |
87 | spin_unlock(&mv64x60_wdt_spinlock); |
88 | |
89 | return ret; |
90 | } |
91 | |
92 | static void mv64x60_wdt_service(void) |
93 | { |
94 | mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE, |
95 | MV64x60_WDC_SERVICE_SHIFT); |
96 | } |
97 | |
98 | static void mv64x60_wdt_handler_enable(void) |
99 | { |
100 | if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_FALSE, |
101 | MV64x60_WDC_ENABLE_SHIFT)) { |
102 | mv64x60_wdt_service(); |
103 | printk(KERN_NOTICE "mv64x60_wdt: watchdog activated\n"); |
104 | } |
105 | } |
106 | |
107 | static void mv64x60_wdt_handler_disable(void) |
108 | { |
109 | if (mv64x60_wdt_toggle_wdc(MV64x60_WDC_ENABLED_TRUE, |
110 | MV64x60_WDC_ENABLE_SHIFT)) |
111 | printk(KERN_NOTICE "mv64x60_wdt: watchdog deactivated\n"); |
112 | } |
113 | |
114 | static void mv64x60_wdt_set_timeout(unsigned int timeout) |
115 | { |
116 | /* maximum bus cycle count is 0xFFFFFFFF */ |
117 | if (timeout > 0xFFFFFFFF / bus_clk) |
118 | timeout = 0xFFFFFFFF / bus_clk; |
119 | |
120 | mv64x60_wdt_count = timeout * bus_clk >> 8; |
121 | mv64x60_wdt_timeout = timeout; |
122 | } |
123 | |
124 | static int mv64x60_wdt_open(struct inode *inode, struct file *file) |
125 | { |
126 | if (test_and_set_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags)) |
127 | return -EBUSY; |
128 | |
129 | if (nowayout) |
130 | __module_get(THIS_MODULE); |
131 | |
132 | mv64x60_wdt_handler_enable(); |
133 | |
134 | return nonseekable_open(inode, file); |
135 | } |
136 | |
137 | static int mv64x60_wdt_release(struct inode *inode, struct file *file) |
138 | { |
139 | if (expect_close == 42) |
140 | mv64x60_wdt_handler_disable(); |
141 | else { |
142 | printk(KERN_CRIT |
143 | "mv64x60_wdt: unexpected close, not stopping timer!\n"); |
144 | mv64x60_wdt_service(); |
145 | } |
146 | expect_close = 0; |
147 | |
148 | clear_bit(MV64x60_WDOG_FLAG_OPENED, &wdt_flags); |
149 | |
150 | return 0; |
151 | } |
152 | |
153 | static ssize_t mv64x60_wdt_write(struct file *file, const char __user *data, |
154 | size_t len, loff_t *ppos) |
155 | { |
156 | if (len) { |
157 | if (!nowayout) { |
158 | size_t i; |
159 | |
160 | expect_close = 0; |
161 | |
162 | for (i = 0; i != len; i++) { |
163 | char c; |
164 | if (get_user(c, data + i)) |
165 | return -EFAULT; |
166 | if (c == 'V') |
167 | expect_close = 42; |
168 | } |
169 | } |
170 | mv64x60_wdt_service(); |
171 | } |
172 | |
173 | return len; |
174 | } |
175 | |
176 | static long mv64x60_wdt_ioctl(struct file *file, |
177 | unsigned int cmd, unsigned long arg) |
178 | { |
179 | int timeout; |
180 | int options; |
181 | void __user *argp = (void __user *)arg; |
182 | static const struct watchdog_info info = { |
183 | .options = WDIOF_SETTIMEOUT | |
184 | WDIOF_MAGICCLOSE | |
185 | WDIOF_KEEPALIVEPING, |
186 | .firmware_version = 0, |
187 | .identity = "MV64x60 watchdog", |
188 | }; |
189 | |
190 | switch (cmd) { |
191 | case WDIOC_GETSUPPORT: |
192 | if (copy_to_user(argp, &info, sizeof(info))) |
193 | return -EFAULT; |
194 | break; |
195 | |
196 | case WDIOC_GETSTATUS: |
197 | case WDIOC_GETBOOTSTATUS: |
198 | if (put_user(wdt_status, (int __user *)argp)) |
199 | return -EFAULT; |
200 | wdt_status &= ~WDIOF_KEEPALIVEPING; |
201 | break; |
202 | |
203 | case WDIOC_GETTEMP: |
204 | return -EOPNOTSUPP; |
205 | |
206 | case WDIOC_SETOPTIONS: |
207 | if (get_user(options, (int __user *)argp)) |
208 | return -EFAULT; |
209 | |
210 | if (options & WDIOS_DISABLECARD) |
211 | mv64x60_wdt_handler_disable(); |
212 | |
213 | if (options & WDIOS_ENABLECARD) |
214 | mv64x60_wdt_handler_enable(); |
215 | break; |
216 | |
217 | case WDIOC_KEEPALIVE: |
218 | mv64x60_wdt_service(); |
219 | wdt_status |= WDIOF_KEEPALIVEPING; |
220 | break; |
221 | |
222 | case WDIOC_SETTIMEOUT: |
223 | if (get_user(timeout, (int __user *)argp)) |
224 | return -EFAULT; |
225 | mv64x60_wdt_set_timeout(timeout); |
226 | /* Fall through */ |
227 | |
228 | case WDIOC_GETTIMEOUT: |
229 | if (put_user(mv64x60_wdt_timeout, (int __user *)argp)) |
230 | return -EFAULT; |
231 | break; |
232 | |
233 | default: |
234 | return -ENOTTY; |
235 | } |
236 | |
237 | return 0; |
238 | } |
239 | |
240 | static const struct file_operations mv64x60_wdt_fops = { |
241 | .owner = THIS_MODULE, |
242 | .llseek = no_llseek, |
243 | .write = mv64x60_wdt_write, |
244 | .unlocked_ioctl = mv64x60_wdt_ioctl, |
245 | .open = mv64x60_wdt_open, |
246 | .release = mv64x60_wdt_release, |
247 | }; |
248 | |
249 | static struct miscdevice mv64x60_wdt_miscdev = { |
250 | .minor = WATCHDOG_MINOR, |
251 | .name = "watchdog", |
252 | .fops = &mv64x60_wdt_fops, |
253 | }; |
254 | |
255 | static int __devinit mv64x60_wdt_probe(struct platform_device *dev) |
256 | { |
257 | struct mv64x60_wdt_pdata *pdata = dev->dev.platform_data; |
258 | struct resource *r; |
259 | int timeout = 10; |
260 | |
261 | bus_clk = 133; /* in MHz */ |
262 | if (pdata) { |
263 | timeout = pdata->timeout; |
264 | bus_clk = pdata->bus_clk; |
265 | } |
266 | |
267 | /* Since bus_clk is truncated MHz, actual frequency could be |
268 | * up to 1MHz higher. Round up, since it's better to time out |
269 | * too late than too soon. |
270 | */ |
271 | bus_clk++; |
272 | bus_clk *= 1000000; /* convert to Hz */ |
273 | |
274 | r = platform_get_resource(dev, IORESOURCE_MEM, 0); |
275 | if (!r) |
276 | return -ENODEV; |
277 | |
278 | mv64x60_wdt_regs = ioremap(r->start, resource_size(r)); |
279 | if (mv64x60_wdt_regs == NULL) |
280 | return -ENOMEM; |
281 | |
282 | mv64x60_wdt_set_timeout(timeout); |
283 | |
284 | mv64x60_wdt_handler_disable(); /* in case timer was already running */ |
285 | |
286 | return misc_register(&mv64x60_wdt_miscdev); |
287 | } |
288 | |
289 | static int __devexit mv64x60_wdt_remove(struct platform_device *dev) |
290 | { |
291 | misc_deregister(&mv64x60_wdt_miscdev); |
292 | |
293 | mv64x60_wdt_handler_disable(); |
294 | |
295 | iounmap(mv64x60_wdt_regs); |
296 | |
297 | return 0; |
298 | } |
299 | |
300 | static struct platform_driver mv64x60_wdt_driver = { |
301 | .probe = mv64x60_wdt_probe, |
302 | .remove = __devexit_p(mv64x60_wdt_remove), |
303 | .driver = { |
304 | .owner = THIS_MODULE, |
305 | .name = MV64x60_WDT_NAME, |
306 | }, |
307 | }; |
308 | |
309 | static int __init mv64x60_wdt_init(void) |
310 | { |
311 | printk(KERN_INFO "MV64x60 watchdog driver\n"); |
312 | |
313 | return platform_driver_register(&mv64x60_wdt_driver); |
314 | } |
315 | |
316 | static void __exit mv64x60_wdt_exit(void) |
317 | { |
318 | platform_driver_unregister(&mv64x60_wdt_driver); |
319 | } |
320 | |
321 | module_init(mv64x60_wdt_init); |
322 | module_exit(mv64x60_wdt_exit); |
323 | |
324 | MODULE_AUTHOR("James Chapman <jchapman@katalix.com>"); |
325 | MODULE_DESCRIPTION("MV64x60 watchdog driver"); |
326 | MODULE_LICENSE("GPL"); |
327 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |
328 | MODULE_ALIAS("platform:" MV64x60_WDT_NAME); |
329 |
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