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1 | /* NXP PCF50633 Power Management Unit (PMU) driver |
2 | * |
3 | * (C) 2006-2008 by Openmoko, Inc. |
4 | * Author: Harald Welte <laforge@openmoko.org> |
5 | * Balaji Rao <balajirrao@openmoko.org> |
6 | * All rights reserved. |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the |
10 | * Free Software Foundation; either version 2 of the License, or (at your |
11 | * option) any later version. |
12 | * |
13 | */ |
14 | |
15 | #include <linux/kernel.h> |
16 | #include <linux/device.h> |
17 | #include <linux/sysfs.h> |
18 | #include <linux/module.h> |
19 | #include <linux/types.h> |
20 | #include <linux/interrupt.h> |
21 | #include <linux/workqueue.h> |
22 | #include <linux/platform_device.h> |
23 | #include <linux/i2c.h> |
24 | #include <linux/irq.h> |
25 | #include <linux/slab.h> |
26 | |
27 | #include <linux/mfd/pcf50633/core.h> |
28 | |
29 | /* Two MBCS registers used during cold start */ |
30 | #define PCF50633_REG_MBCS1 0x4b |
31 | #define PCF50633_REG_MBCS2 0x4c |
32 | #define PCF50633_MBCS1_USBPRES 0x01 |
33 | #define PCF50633_MBCS1_ADAPTPRES 0x01 |
34 | |
35 | static int __pcf50633_read(struct pcf50633 *pcf, u8 reg, int num, u8 *data) |
36 | { |
37 | int ret; |
38 | |
39 | ret = i2c_smbus_read_i2c_block_data(pcf->i2c_client, reg, |
40 | num, data); |
41 | if (ret < 0) |
42 | dev_err(pcf->dev, "Error reading %d regs at %d\n", num, reg); |
43 | |
44 | return ret; |
45 | } |
46 | |
47 | static int __pcf50633_write(struct pcf50633 *pcf, u8 reg, int num, u8 *data) |
48 | { |
49 | int ret; |
50 | |
51 | ret = i2c_smbus_write_i2c_block_data(pcf->i2c_client, reg, |
52 | num, data); |
53 | if (ret < 0) |
54 | dev_err(pcf->dev, "Error writing %d regs at %d\n", num, reg); |
55 | |
56 | return ret; |
57 | |
58 | } |
59 | |
60 | /* Read a block of upto 32 regs */ |
61 | int pcf50633_read_block(struct pcf50633 *pcf, u8 reg, |
62 | int nr_regs, u8 *data) |
63 | { |
64 | int ret; |
65 | |
66 | mutex_lock(&pcf->lock); |
67 | ret = __pcf50633_read(pcf, reg, nr_regs, data); |
68 | mutex_unlock(&pcf->lock); |
69 | |
70 | return ret; |
71 | } |
72 | EXPORT_SYMBOL_GPL(pcf50633_read_block); |
73 | |
74 | /* Write a block of upto 32 regs */ |
75 | int pcf50633_write_block(struct pcf50633 *pcf , u8 reg, |
76 | int nr_regs, u8 *data) |
77 | { |
78 | int ret; |
79 | |
80 | mutex_lock(&pcf->lock); |
81 | ret = __pcf50633_write(pcf, reg, nr_regs, data); |
82 | mutex_unlock(&pcf->lock); |
83 | |
84 | return ret; |
85 | } |
86 | EXPORT_SYMBOL_GPL(pcf50633_write_block); |
87 | |
88 | u8 pcf50633_reg_read(struct pcf50633 *pcf, u8 reg) |
89 | { |
90 | u8 val; |
91 | |
92 | mutex_lock(&pcf->lock); |
93 | __pcf50633_read(pcf, reg, 1, &val); |
94 | mutex_unlock(&pcf->lock); |
95 | |
96 | return val; |
97 | } |
98 | EXPORT_SYMBOL_GPL(pcf50633_reg_read); |
99 | |
100 | int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val) |
101 | { |
102 | int ret; |
103 | |
104 | mutex_lock(&pcf->lock); |
105 | ret = __pcf50633_write(pcf, reg, 1, &val); |
106 | mutex_unlock(&pcf->lock); |
107 | |
108 | return ret; |
109 | } |
110 | EXPORT_SYMBOL_GPL(pcf50633_reg_write); |
111 | |
112 | int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val) |
113 | { |
114 | int ret; |
115 | u8 tmp; |
116 | |
117 | val &= mask; |
118 | |
119 | mutex_lock(&pcf->lock); |
120 | ret = __pcf50633_read(pcf, reg, 1, &tmp); |
121 | if (ret < 0) |
122 | goto out; |
123 | |
124 | tmp &= ~mask; |
125 | tmp |= val; |
126 | ret = __pcf50633_write(pcf, reg, 1, &tmp); |
127 | |
128 | out: |
129 | mutex_unlock(&pcf->lock); |
130 | |
131 | return ret; |
132 | } |
133 | EXPORT_SYMBOL_GPL(pcf50633_reg_set_bit_mask); |
134 | |
135 | int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 val) |
136 | { |
137 | int ret; |
138 | u8 tmp; |
139 | |
140 | mutex_lock(&pcf->lock); |
141 | ret = __pcf50633_read(pcf, reg, 1, &tmp); |
142 | if (ret < 0) |
143 | goto out; |
144 | |
145 | tmp &= ~val; |
146 | ret = __pcf50633_write(pcf, reg, 1, &tmp); |
147 | |
148 | out: |
149 | mutex_unlock(&pcf->lock); |
150 | |
151 | return ret; |
152 | } |
153 | EXPORT_SYMBOL_GPL(pcf50633_reg_clear_bits); |
154 | |
155 | /* sysfs attributes */ |
156 | static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr, |
157 | char *buf) |
158 | { |
159 | struct pcf50633 *pcf = dev_get_drvdata(dev); |
160 | u8 dump[16]; |
161 | int n, n1, idx = 0; |
162 | char *buf1 = buf; |
163 | static u8 address_no_read[] = { /* must be ascending */ |
164 | PCF50633_REG_INT1, |
165 | PCF50633_REG_INT2, |
166 | PCF50633_REG_INT3, |
167 | PCF50633_REG_INT4, |
168 | PCF50633_REG_INT5, |
169 | 0 /* terminator */ |
170 | }; |
171 | |
172 | for (n = 0; n < 256; n += sizeof(dump)) { |
173 | for (n1 = 0; n1 < sizeof(dump); n1++) |
174 | if (n == address_no_read[idx]) { |
175 | idx++; |
176 | dump[n1] = 0x00; |
177 | } else |
178 | dump[n1] = pcf50633_reg_read(pcf, n + n1); |
179 | |
180 | hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0); |
181 | buf1 += strlen(buf1); |
182 | *buf1++ = '\n'; |
183 | *buf1 = '\0'; |
184 | } |
185 | |
186 | return buf1 - buf; |
187 | } |
188 | static DEVICE_ATTR(dump_regs, 0400, show_dump_regs, NULL); |
189 | |
190 | static ssize_t show_resume_reason(struct device *dev, |
191 | struct device_attribute *attr, char *buf) |
192 | { |
193 | struct pcf50633 *pcf = dev_get_drvdata(dev); |
194 | int n; |
195 | |
196 | n = sprintf(buf, "%02x%02x%02x%02x%02x\n", |
197 | pcf->resume_reason[0], |
198 | pcf->resume_reason[1], |
199 | pcf->resume_reason[2], |
200 | pcf->resume_reason[3], |
201 | pcf->resume_reason[4]); |
202 | |
203 | return n; |
204 | } |
205 | static DEVICE_ATTR(resume_reason, 0400, show_resume_reason, NULL); |
206 | |
207 | static struct attribute *pcf_sysfs_entries[] = { |
208 | &dev_attr_dump_regs.attr, |
209 | &dev_attr_resume_reason.attr, |
210 | NULL, |
211 | }; |
212 | |
213 | static struct attribute_group pcf_attr_group = { |
214 | .name = NULL, /* put in device directory */ |
215 | .attrs = pcf_sysfs_entries, |
216 | }; |
217 | |
218 | int pcf50633_register_irq(struct pcf50633 *pcf, int irq, |
219 | void (*handler) (int, void *), void *data) |
220 | { |
221 | if (irq < 0 || irq > PCF50633_NUM_IRQ || !handler) |
222 | return -EINVAL; |
223 | |
224 | if (WARN_ON(pcf->irq_handler[irq].handler)) |
225 | return -EBUSY; |
226 | |
227 | mutex_lock(&pcf->lock); |
228 | pcf->irq_handler[irq].handler = handler; |
229 | pcf->irq_handler[irq].data = data; |
230 | mutex_unlock(&pcf->lock); |
231 | |
232 | return 0; |
233 | } |
234 | EXPORT_SYMBOL_GPL(pcf50633_register_irq); |
235 | |
236 | int pcf50633_free_irq(struct pcf50633 *pcf, int irq) |
237 | { |
238 | if (irq < 0 || irq > PCF50633_NUM_IRQ) |
239 | return -EINVAL; |
240 | |
241 | mutex_lock(&pcf->lock); |
242 | pcf->irq_handler[irq].handler = NULL; |
243 | mutex_unlock(&pcf->lock); |
244 | |
245 | return 0; |
246 | } |
247 | EXPORT_SYMBOL_GPL(pcf50633_free_irq); |
248 | |
249 | static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask) |
250 | { |
251 | u8 reg, bits, tmp; |
252 | int ret = 0, idx; |
253 | |
254 | idx = irq >> 3; |
255 | reg = PCF50633_REG_INT1M + idx; |
256 | bits = 1 << (irq & 0x07); |
257 | |
258 | mutex_lock(&pcf->lock); |
259 | |
260 | if (mask) { |
261 | ret = __pcf50633_read(pcf, reg, 1, &tmp); |
262 | if (ret < 0) |
263 | goto out; |
264 | |
265 | tmp |= bits; |
266 | |
267 | ret = __pcf50633_write(pcf, reg, 1, &tmp); |
268 | if (ret < 0) |
269 | goto out; |
270 | |
271 | pcf->mask_regs[idx] &= ~bits; |
272 | pcf->mask_regs[idx] |= bits; |
273 | } else { |
274 | ret = __pcf50633_read(pcf, reg, 1, &tmp); |
275 | if (ret < 0) |
276 | goto out; |
277 | |
278 | tmp &= ~bits; |
279 | |
280 | ret = __pcf50633_write(pcf, reg, 1, &tmp); |
281 | if (ret < 0) |
282 | goto out; |
283 | |
284 | pcf->mask_regs[idx] &= ~bits; |
285 | } |
286 | out: |
287 | mutex_unlock(&pcf->lock); |
288 | |
289 | return ret; |
290 | } |
291 | |
292 | int pcf50633_irq_mask(struct pcf50633 *pcf, int irq) |
293 | { |
294 | dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); |
295 | |
296 | return __pcf50633_irq_mask_set(pcf, irq, 1); |
297 | } |
298 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask); |
299 | |
300 | int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq) |
301 | { |
302 | dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); |
303 | |
304 | return __pcf50633_irq_mask_set(pcf, irq, 0); |
305 | } |
306 | EXPORT_SYMBOL_GPL(pcf50633_irq_unmask); |
307 | |
308 | int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq) |
309 | { |
310 | u8 reg, bits; |
311 | |
312 | reg = irq >> 3; |
313 | bits = 1 << (irq & 0x07); |
314 | |
315 | return pcf->mask_regs[reg] & bits; |
316 | } |
317 | EXPORT_SYMBOL_GPL(pcf50633_irq_mask_get); |
318 | |
319 | static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq) |
320 | { |
321 | if (pcf->irq_handler[irq].handler) |
322 | pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); |
323 | } |
324 | |
325 | /* Maximum amount of time ONKEY is held before emergency action is taken */ |
326 | #define PCF50633_ONKEY1S_TIMEOUT 8 |
327 | |
328 | static void pcf50633_irq_worker(struct work_struct *work) |
329 | { |
330 | struct pcf50633 *pcf; |
331 | int ret, i, j; |
332 | u8 pcf_int[5], chgstat; |
333 | |
334 | pcf = container_of(work, struct pcf50633, irq_work); |
335 | |
336 | /* Read the 5 INT regs in one transaction */ |
337 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1, |
338 | ARRAY_SIZE(pcf_int), pcf_int); |
339 | if (ret != ARRAY_SIZE(pcf_int)) { |
340 | dev_err(pcf->dev, "Error reading INT registers\n"); |
341 | |
342 | /* |
343 | * If this doesn't ACK the interrupt to the chip, we'll be |
344 | * called once again as we're level triggered. |
345 | */ |
346 | goto out; |
347 | } |
348 | |
349 | /* defeat 8s death from lowsys on A5 */ |
350 | pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04); |
351 | |
352 | /* We immediately read the usb and adapter status. We thus make sure |
353 | * only of USBINS/USBREM IRQ handlers are called */ |
354 | if (pcf_int[0] & (PCF50633_INT1_USBINS | PCF50633_INT1_USBREM)) { |
355 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); |
356 | if (chgstat & (0x3 << 4)) |
357 | pcf_int[0] &= ~(1 << PCF50633_INT1_USBREM); |
358 | else |
359 | pcf_int[0] &= ~(1 << PCF50633_INT1_USBINS); |
360 | } |
361 | |
362 | /* Make sure only one of ADPINS or ADPREM is set */ |
363 | if (pcf_int[0] & (PCF50633_INT1_ADPINS | PCF50633_INT1_ADPREM)) { |
364 | chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2); |
365 | if (chgstat & (0x3 << 4)) |
366 | pcf_int[0] &= ~(1 << PCF50633_INT1_ADPREM); |
367 | else |
368 | pcf_int[0] &= ~(1 << PCF50633_INT1_ADPINS); |
369 | } |
370 | |
371 | dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x " |
372 | "INT4=0x%02x INT5=0x%02x\n", pcf_int[0], |
373 | pcf_int[1], pcf_int[2], pcf_int[3], pcf_int[4]); |
374 | |
375 | /* Some revisions of the chip don't have a 8s standby mode on |
376 | * ONKEY1S press. We try to manually do it in such cases. */ |
377 | if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) { |
378 | dev_info(pcf->dev, "ONKEY1S held for %d secs\n", |
379 | pcf->onkey1s_held); |
380 | if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT) |
381 | if (pcf->pdata->force_shutdown) |
382 | pcf->pdata->force_shutdown(pcf); |
383 | } |
384 | |
385 | if (pcf_int[2] & PCF50633_INT3_ONKEY1S) { |
386 | dev_info(pcf->dev, "ONKEY1S held\n"); |
387 | pcf->onkey1s_held = 1 ; |
388 | |
389 | /* Unmask IRQ_SECOND */ |
390 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, |
391 | PCF50633_INT1_SECOND); |
392 | |
393 | /* Unmask IRQ_ONKEYR */ |
394 | pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M, |
395 | PCF50633_INT2_ONKEYR); |
396 | } |
397 | |
398 | if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) { |
399 | pcf->onkey1s_held = 0; |
400 | |
401 | /* Mask SECOND and ONKEYR interrupts */ |
402 | if (pcf->mask_regs[0] & PCF50633_INT1_SECOND) |
403 | pcf50633_reg_set_bit_mask(pcf, |
404 | PCF50633_REG_INT1M, |
405 | PCF50633_INT1_SECOND, |
406 | PCF50633_INT1_SECOND); |
407 | |
408 | if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR) |
409 | pcf50633_reg_set_bit_mask(pcf, |
410 | PCF50633_REG_INT2M, |
411 | PCF50633_INT2_ONKEYR, |
412 | PCF50633_INT2_ONKEYR); |
413 | } |
414 | |
415 | /* Have we just resumed ? */ |
416 | if (pcf->is_suspended) { |
417 | pcf->is_suspended = 0; |
418 | |
419 | /* Set the resume reason filtering out non resumers */ |
420 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) |
421 | pcf->resume_reason[i] = pcf_int[i] & |
422 | pcf->pdata->resumers[i]; |
423 | |
424 | /* Make sure we don't pass on any ONKEY events to |
425 | * userspace now */ |
426 | pcf_int[1] &= ~(PCF50633_INT2_ONKEYR | PCF50633_INT2_ONKEYF); |
427 | } |
428 | |
429 | for (i = 0; i < ARRAY_SIZE(pcf_int); i++) { |
430 | /* Unset masked interrupts */ |
431 | pcf_int[i] &= ~pcf->mask_regs[i]; |
432 | |
433 | for (j = 0; j < 8 ; j++) |
434 | if (pcf_int[i] & (1 << j)) |
435 | pcf50633_irq_call_handler(pcf, (i * 8) + j); |
436 | } |
437 | |
438 | out: |
439 | put_device(pcf->dev); |
440 | enable_irq(pcf->irq); |
441 | } |
442 | |
443 | static irqreturn_t pcf50633_irq(int irq, void *data) |
444 | { |
445 | struct pcf50633 *pcf = data; |
446 | |
447 | dev_dbg(pcf->dev, "pcf50633_irq\n"); |
448 | |
449 | get_device(pcf->dev); |
450 | disable_irq_nosync(pcf->irq); |
451 | queue_work(pcf->work_queue, &pcf->irq_work); |
452 | |
453 | return IRQ_HANDLED; |
454 | } |
455 | |
456 | static void |
457 | pcf50633_client_dev_register(struct pcf50633 *pcf, const char *name, |
458 | struct platform_device **pdev) |
459 | { |
460 | int ret; |
461 | |
462 | *pdev = platform_device_alloc(name, -1); |
463 | if (!*pdev) { |
464 | dev_err(pcf->dev, "Falied to allocate %s\n", name); |
465 | return; |
466 | } |
467 | |
468 | (*pdev)->dev.parent = pcf->dev; |
469 | |
470 | ret = platform_device_add(*pdev); |
471 | if (ret) { |
472 | dev_err(pcf->dev, "Failed to register %s: %d\n", name, ret); |
473 | platform_device_put(*pdev); |
474 | *pdev = NULL; |
475 | } |
476 | } |
477 | |
478 | #ifdef CONFIG_PM |
479 | static int pcf50633_suspend(struct i2c_client *client, pm_message_t state) |
480 | { |
481 | struct pcf50633 *pcf; |
482 | int ret = 0, i; |
483 | u8 res[5]; |
484 | |
485 | pcf = i2c_get_clientdata(client); |
486 | |
487 | /* Make sure our interrupt handlers are not called |
488 | * henceforth */ |
489 | disable_irq(pcf->irq); |
490 | |
491 | /* Make sure that any running IRQ worker has quit */ |
492 | cancel_work_sync(&pcf->irq_work); |
493 | |
494 | /* Save the masks */ |
495 | ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M, |
496 | ARRAY_SIZE(pcf->suspend_irq_masks), |
497 | pcf->suspend_irq_masks); |
498 | if (ret < 0) { |
499 | dev_err(pcf->dev, "error saving irq masks\n"); |
500 | goto out; |
501 | } |
502 | |
503 | /* Write wakeup irq masks */ |
504 | for (i = 0; i < ARRAY_SIZE(res); i++) |
505 | res[i] = ~pcf->pdata->resumers[i]; |
506 | |
507 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, |
508 | ARRAY_SIZE(res), &res[0]); |
509 | if (ret < 0) { |
510 | dev_err(pcf->dev, "error writing wakeup irq masks\n"); |
511 | goto out; |
512 | } |
513 | |
514 | pcf->is_suspended = 1; |
515 | |
516 | out: |
517 | return ret; |
518 | } |
519 | |
520 | static int pcf50633_resume(struct i2c_client *client) |
521 | { |
522 | struct pcf50633 *pcf; |
523 | int ret; |
524 | |
525 | pcf = i2c_get_clientdata(client); |
526 | |
527 | /* Write the saved mask registers */ |
528 | ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M, |
529 | ARRAY_SIZE(pcf->suspend_irq_masks), |
530 | pcf->suspend_irq_masks); |
531 | if (ret < 0) |
532 | dev_err(pcf->dev, "Error restoring saved suspend masks\n"); |
533 | |
534 | /* Restore regulators' state */ |
535 | |
536 | |
537 | get_device(pcf->dev); |
538 | |
539 | /* |
540 | * Clear any pending interrupts and set resume reason if any. |
541 | * This will leave with enable_irq() |
542 | */ |
543 | pcf50633_irq_worker(&pcf->irq_work); |
544 | |
545 | return 0; |
546 | } |
547 | #else |
548 | #define pcf50633_suspend NULL |
549 | #define pcf50633_resume NULL |
550 | #endif |
551 | |
552 | static int __devinit pcf50633_probe(struct i2c_client *client, |
553 | const struct i2c_device_id *ids) |
554 | { |
555 | struct pcf50633 *pcf; |
556 | struct pcf50633_platform_data *pdata = client->dev.platform_data; |
557 | int i, ret; |
558 | int version, variant; |
559 | |
560 | if (!client->irq) { |
561 | dev_err(&client->dev, "Missing IRQ\n"); |
562 | return -ENOENT; |
563 | } |
564 | |
565 | pcf = kzalloc(sizeof(*pcf), GFP_KERNEL); |
566 | if (!pcf) |
567 | return -ENOMEM; |
568 | |
569 | pcf->pdata = pdata; |
570 | |
571 | mutex_init(&pcf->lock); |
572 | |
573 | i2c_set_clientdata(client, pcf); |
574 | pcf->dev = &client->dev; |
575 | pcf->i2c_client = client; |
576 | pcf->irq = client->irq; |
577 | pcf->work_queue = create_singlethread_workqueue("pcf50633"); |
578 | |
579 | if (!pcf->work_queue) { |
580 | dev_err(&client->dev, "Failed to alloc workqueue\n"); |
581 | ret = -ENOMEM; |
582 | goto err_free; |
583 | } |
584 | |
585 | INIT_WORK(&pcf->irq_work, pcf50633_irq_worker); |
586 | |
587 | version = pcf50633_reg_read(pcf, 0); |
588 | variant = pcf50633_reg_read(pcf, 1); |
589 | if (version < 0 || variant < 0) { |
590 | dev_err(pcf->dev, "Unable to probe pcf50633\n"); |
591 | ret = -ENODEV; |
592 | goto err_destroy_workqueue; |
593 | } |
594 | |
595 | dev_info(pcf->dev, "Probed device version %d variant %d\n", |
596 | version, variant); |
597 | |
598 | /* Enable all interrupts except RTC SECOND */ |
599 | pcf->mask_regs[0] = 0x80; |
600 | pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]); |
601 | pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00); |
602 | pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00); |
603 | pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00); |
604 | pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00); |
605 | |
606 | ret = request_irq(client->irq, pcf50633_irq, |
607 | IRQF_TRIGGER_LOW, "pcf50633", pcf); |
608 | |
609 | if (ret) { |
610 | dev_err(pcf->dev, "Failed to request IRQ %d\n", ret); |
611 | goto err_destroy_workqueue; |
612 | } |
613 | |
614 | /* Create sub devices */ |
615 | pcf50633_client_dev_register(pcf, "pcf50633-input", |
616 | &pcf->input_pdev); |
617 | pcf50633_client_dev_register(pcf, "pcf50633-rtc", |
618 | &pcf->rtc_pdev); |
619 | pcf50633_client_dev_register(pcf, "pcf50633-mbc", |
620 | &pcf->mbc_pdev); |
621 | pcf50633_client_dev_register(pcf, "pcf50633-adc", |
622 | &pcf->adc_pdev); |
623 | |
624 | for (i = 0; i < PCF50633_NUM_REGULATORS; i++) { |
625 | struct platform_device *pdev; |
626 | |
627 | pdev = platform_device_alloc("pcf50633-regltr", i); |
628 | if (!pdev) { |
629 | dev_err(pcf->dev, "Cannot create regulator %d\n", i); |
630 | continue; |
631 | } |
632 | |
633 | pdev->dev.parent = pcf->dev; |
634 | platform_device_add_data(pdev, &pdata->reg_init_data[i], |
635 | sizeof(pdata->reg_init_data[i])); |
636 | pcf->regulator_pdev[i] = pdev; |
637 | |
638 | platform_device_add(pdev); |
639 | } |
640 | |
641 | if (enable_irq_wake(client->irq) < 0) |
642 | dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source" |
643 | "in this hardware revision", client->irq); |
644 | |
645 | ret = sysfs_create_group(&client->dev.kobj, &pcf_attr_group); |
646 | if (ret) |
647 | dev_err(pcf->dev, "error creating sysfs entries\n"); |
648 | |
649 | if (pdata->probe_done) |
650 | pdata->probe_done(pcf); |
651 | |
652 | return 0; |
653 | |
654 | err_destroy_workqueue: |
655 | destroy_workqueue(pcf->work_queue); |
656 | err_free: |
657 | i2c_set_clientdata(client, NULL); |
658 | kfree(pcf); |
659 | |
660 | return ret; |
661 | } |
662 | |
663 | static int __devexit pcf50633_remove(struct i2c_client *client) |
664 | { |
665 | struct pcf50633 *pcf = i2c_get_clientdata(client); |
666 | int i; |
667 | |
668 | free_irq(pcf->irq, pcf); |
669 | destroy_workqueue(pcf->work_queue); |
670 | |
671 | platform_device_unregister(pcf->input_pdev); |
672 | platform_device_unregister(pcf->rtc_pdev); |
673 | platform_device_unregister(pcf->mbc_pdev); |
674 | platform_device_unregister(pcf->adc_pdev); |
675 | |
676 | for (i = 0; i < PCF50633_NUM_REGULATORS; i++) |
677 | platform_device_unregister(pcf->regulator_pdev[i]); |
678 | |
679 | kfree(pcf); |
680 | |
681 | return 0; |
682 | } |
683 | |
684 | static struct i2c_device_id pcf50633_id_table[] = { |
685 | {"pcf50633", 0x73}, |
686 | {/* end of list */} |
687 | }; |
688 | |
689 | static struct i2c_driver pcf50633_driver = { |
690 | .driver = { |
691 | .name = "pcf50633", |
692 | }, |
693 | .id_table = pcf50633_id_table, |
694 | .probe = pcf50633_probe, |
695 | .remove = __devexit_p(pcf50633_remove), |
696 | .suspend = pcf50633_suspend, |
697 | .resume = pcf50633_resume, |
698 | }; |
699 | |
700 | static int __init pcf50633_init(void) |
701 | { |
702 | return i2c_add_driver(&pcf50633_driver); |
703 | } |
704 | |
705 | static void __exit pcf50633_exit(void) |
706 | { |
707 | i2c_del_driver(&pcf50633_driver); |
708 | } |
709 | |
710 | MODULE_DESCRIPTION("I2C chip driver for NXP PCF50633 PMU"); |
711 | MODULE_AUTHOR("Harald Welte <laforge@openmoko.org>"); |
712 | MODULE_LICENSE("GPL"); |
713 | |
714 | subsys_initcall(pcf50633_init); |
715 | module_exit(pcf50633_exit); |
716 |
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