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1 | |
2 | /* cnic.c: Broadcom CNIC core network driver. |
3 | * |
4 | * Copyright (c) 2006-2010 Broadcom Corporation |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by |
8 | * the Free Software Foundation. |
9 | * |
10 | */ |
11 | |
12 | #ifndef CNIC_DEFS_H |
13 | #define CNIC_DEFS_H |
14 | |
15 | /* KWQ (kernel work queue) request op codes */ |
16 | #define L2_KWQE_OPCODE_VALUE_FLUSH (4) |
17 | |
18 | #define L4_KWQE_OPCODE_VALUE_CONNECT1 (50) |
19 | #define L4_KWQE_OPCODE_VALUE_CONNECT2 (51) |
20 | #define L4_KWQE_OPCODE_VALUE_CONNECT3 (52) |
21 | #define L4_KWQE_OPCODE_VALUE_RESET (53) |
22 | #define L4_KWQE_OPCODE_VALUE_CLOSE (54) |
23 | #define L4_KWQE_OPCODE_VALUE_UPDATE_SECRET (60) |
24 | #define L4_KWQE_OPCODE_VALUE_INIT_ULP (61) |
25 | |
26 | #define L4_KWQE_OPCODE_VALUE_OFFLOAD_PG (1) |
27 | #define L4_KWQE_OPCODE_VALUE_UPDATE_PG (9) |
28 | #define L4_KWQE_OPCODE_VALUE_UPLOAD_PG (14) |
29 | |
30 | #define L5CM_RAMROD_CMD_ID_BASE (0x80) |
31 | #define L5CM_RAMROD_CMD_ID_TCP_CONNECT (L5CM_RAMROD_CMD_ID_BASE + 3) |
32 | #define L5CM_RAMROD_CMD_ID_CLOSE (L5CM_RAMROD_CMD_ID_BASE + 12) |
33 | #define L5CM_RAMROD_CMD_ID_ABORT (L5CM_RAMROD_CMD_ID_BASE + 13) |
34 | #define L5CM_RAMROD_CMD_ID_SEARCHER_DELETE (L5CM_RAMROD_CMD_ID_BASE + 14) |
35 | #define L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD (L5CM_RAMROD_CMD_ID_BASE + 15) |
36 | |
37 | /* KCQ (kernel completion queue) response op codes */ |
38 | #define L4_KCQE_OPCODE_VALUE_CLOSE_COMP (53) |
39 | #define L4_KCQE_OPCODE_VALUE_RESET_COMP (54) |
40 | #define L4_KCQE_OPCODE_VALUE_FW_TCP_UPDATE (55) |
41 | #define L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE (56) |
42 | #define L4_KCQE_OPCODE_VALUE_RESET_RECEIVED (57) |
43 | #define L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED (58) |
44 | #define L4_KCQE_OPCODE_VALUE_INIT_ULP (61) |
45 | |
46 | #define L4_KCQE_OPCODE_VALUE_OFFLOAD_PG (1) |
47 | #define L4_KCQE_OPCODE_VALUE_UPDATE_PG (9) |
48 | #define L4_KCQE_OPCODE_VALUE_UPLOAD_PG (14) |
49 | |
50 | /* KCQ (kernel completion queue) completion status */ |
51 | #define L4_KCQE_COMPLETION_STATUS_SUCCESS (0) |
52 | #define L4_KCQE_COMPLETION_STATUS_TIMEOUT (0x93) |
53 | |
54 | #define L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL (0x83) |
55 | #define L4_KCQE_COMPLETION_STATUS_OFFLOADED_PG (0x89) |
56 | |
57 | #define L4_LAYER_CODE (4) |
58 | #define L2_LAYER_CODE (2) |
59 | |
60 | /* |
61 | * L4 KCQ CQE |
62 | */ |
63 | struct l4_kcq { |
64 | u32 cid; |
65 | u32 pg_cid; |
66 | u32 conn_id; |
67 | u32 pg_host_opaque; |
68 | #if defined(__BIG_ENDIAN) |
69 | u16 status; |
70 | u16 reserved1; |
71 | #elif defined(__LITTLE_ENDIAN) |
72 | u16 reserved1; |
73 | u16 status; |
74 | #endif |
75 | u32 reserved2[2]; |
76 | #if defined(__BIG_ENDIAN) |
77 | u8 flags; |
78 | #define L4_KCQ_RESERVED3 (0x7<<0) |
79 | #define L4_KCQ_RESERVED3_SHIFT 0 |
80 | #define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */ |
81 | #define L4_KCQ_RAMROD_COMPLETION_SHIFT 3 |
82 | #define L4_KCQ_LAYER_CODE (0x7<<4) |
83 | #define L4_KCQ_LAYER_CODE_SHIFT 4 |
84 | #define L4_KCQ_RESERVED4 (0x1<<7) |
85 | #define L4_KCQ_RESERVED4_SHIFT 7 |
86 | u8 op_code; |
87 | u16 qe_self_seq; |
88 | #elif defined(__LITTLE_ENDIAN) |
89 | u16 qe_self_seq; |
90 | u8 op_code; |
91 | u8 flags; |
92 | #define L4_KCQ_RESERVED3 (0xF<<0) |
93 | #define L4_KCQ_RESERVED3_SHIFT 0 |
94 | #define L4_KCQ_RAMROD_COMPLETION (0x1<<3) /* Everest only */ |
95 | #define L4_KCQ_RAMROD_COMPLETION_SHIFT 3 |
96 | #define L4_KCQ_LAYER_CODE (0x7<<4) |
97 | #define L4_KCQ_LAYER_CODE_SHIFT 4 |
98 | #define L4_KCQ_RESERVED4 (0x1<<7) |
99 | #define L4_KCQ_RESERVED4_SHIFT 7 |
100 | #endif |
101 | }; |
102 | |
103 | |
104 | /* |
105 | * L4 KCQ CQE PG upload |
106 | */ |
107 | struct l4_kcq_upload_pg { |
108 | u32 pg_cid; |
109 | #if defined(__BIG_ENDIAN) |
110 | u16 pg_status; |
111 | u16 pg_ipid_count; |
112 | #elif defined(__LITTLE_ENDIAN) |
113 | u16 pg_ipid_count; |
114 | u16 pg_status; |
115 | #endif |
116 | u32 reserved1[5]; |
117 | #if defined(__BIG_ENDIAN) |
118 | u8 flags; |
119 | #define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0) |
120 | #define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0 |
121 | #define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4) |
122 | #define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4 |
123 | #define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7) |
124 | #define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7 |
125 | u8 op_code; |
126 | u16 qe_self_seq; |
127 | #elif defined(__LITTLE_ENDIAN) |
128 | u16 qe_self_seq; |
129 | u8 op_code; |
130 | u8 flags; |
131 | #define L4_KCQ_UPLOAD_PG_RESERVED3 (0xF<<0) |
132 | #define L4_KCQ_UPLOAD_PG_RESERVED3_SHIFT 0 |
133 | #define L4_KCQ_UPLOAD_PG_LAYER_CODE (0x7<<4) |
134 | #define L4_KCQ_UPLOAD_PG_LAYER_CODE_SHIFT 4 |
135 | #define L4_KCQ_UPLOAD_PG_RESERVED4 (0x1<<7) |
136 | #define L4_KCQ_UPLOAD_PG_RESERVED4_SHIFT 7 |
137 | #endif |
138 | }; |
139 | |
140 | |
141 | /* |
142 | * Gracefully close the connection request |
143 | */ |
144 | struct l4_kwq_close_req { |
145 | #if defined(__BIG_ENDIAN) |
146 | u8 flags; |
147 | #define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0) |
148 | #define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0 |
149 | #define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4) |
150 | #define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4 |
151 | #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7) |
152 | #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7 |
153 | u8 op_code; |
154 | u16 reserved0; |
155 | #elif defined(__LITTLE_ENDIAN) |
156 | u16 reserved0; |
157 | u8 op_code; |
158 | u8 flags; |
159 | #define L4_KWQ_CLOSE_REQ_RESERVED1 (0xF<<0) |
160 | #define L4_KWQ_CLOSE_REQ_RESERVED1_SHIFT 0 |
161 | #define L4_KWQ_CLOSE_REQ_LAYER_CODE (0x7<<4) |
162 | #define L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT 4 |
163 | #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT (0x1<<7) |
164 | #define L4_KWQ_CLOSE_REQ_LINKED_WITH_NEXT_SHIFT 7 |
165 | #endif |
166 | u32 cid; |
167 | u32 reserved2[6]; |
168 | }; |
169 | |
170 | |
171 | /* |
172 | * The first request to be passed in order to establish connection in option2 |
173 | */ |
174 | struct l4_kwq_connect_req1 { |
175 | #if defined(__BIG_ENDIAN) |
176 | u8 flags; |
177 | #define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0) |
178 | #define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0 |
179 | #define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4) |
180 | #define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4 |
181 | #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7) |
182 | #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7 |
183 | u8 op_code; |
184 | u8 reserved0; |
185 | u8 conn_flags; |
186 | #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0) |
187 | #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0 |
188 | #define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1) |
189 | #define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1 |
190 | #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2) |
191 | #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2 |
192 | #define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3) |
193 | #define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3 |
194 | #elif defined(__LITTLE_ENDIAN) |
195 | u8 conn_flags; |
196 | #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE (0x1<<0) |
197 | #define L4_KWQ_CONNECT_REQ1_IS_PG_HOST_OPAQUE_SHIFT 0 |
198 | #define L4_KWQ_CONNECT_REQ1_IP_V6 (0x1<<1) |
199 | #define L4_KWQ_CONNECT_REQ1_IP_V6_SHIFT 1 |
200 | #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG (0x1<<2) |
201 | #define L4_KWQ_CONNECT_REQ1_PASSIVE_FLAG_SHIFT 2 |
202 | #define L4_KWQ_CONNECT_REQ1_RSRV (0x1F<<3) |
203 | #define L4_KWQ_CONNECT_REQ1_RSRV_SHIFT 3 |
204 | u8 reserved0; |
205 | u8 op_code; |
206 | u8 flags; |
207 | #define L4_KWQ_CONNECT_REQ1_RESERVED1 (0xF<<0) |
208 | #define L4_KWQ_CONNECT_REQ1_RESERVED1_SHIFT 0 |
209 | #define L4_KWQ_CONNECT_REQ1_LAYER_CODE (0x7<<4) |
210 | #define L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT 4 |
211 | #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT (0x1<<7) |
212 | #define L4_KWQ_CONNECT_REQ1_LINKED_WITH_NEXT_SHIFT 7 |
213 | #endif |
214 | u32 cid; |
215 | u32 pg_cid; |
216 | u32 src_ip; |
217 | u32 dst_ip; |
218 | #if defined(__BIG_ENDIAN) |
219 | u16 dst_port; |
220 | u16 src_port; |
221 | #elif defined(__LITTLE_ENDIAN) |
222 | u16 src_port; |
223 | u16 dst_port; |
224 | #endif |
225 | #if defined(__BIG_ENDIAN) |
226 | u8 rsrv1[3]; |
227 | u8 tcp_flags; |
228 | #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0) |
229 | #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0 |
230 | #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1) |
231 | #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1 |
232 | #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2) |
233 | #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2 |
234 | #define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3) |
235 | #define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3 |
236 | #define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4) |
237 | #define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4 |
238 | #define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5) |
239 | #define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5 |
240 | #define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6) |
241 | #define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6 |
242 | #elif defined(__LITTLE_ENDIAN) |
243 | u8 tcp_flags; |
244 | #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK (0x1<<0) |
245 | #define L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK_SHIFT 0 |
246 | #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE (0x1<<1) |
247 | #define L4_KWQ_CONNECT_REQ1_KEEP_ALIVE_SHIFT 1 |
248 | #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE (0x1<<2) |
249 | #define L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE_SHIFT 2 |
250 | #define L4_KWQ_CONNECT_REQ1_TIME_STAMP (0x1<<3) |
251 | #define L4_KWQ_CONNECT_REQ1_TIME_STAMP_SHIFT 3 |
252 | #define L4_KWQ_CONNECT_REQ1_SACK (0x1<<4) |
253 | #define L4_KWQ_CONNECT_REQ1_SACK_SHIFT 4 |
254 | #define L4_KWQ_CONNECT_REQ1_SEG_SCALING (0x1<<5) |
255 | #define L4_KWQ_CONNECT_REQ1_SEG_SCALING_SHIFT 5 |
256 | #define L4_KWQ_CONNECT_REQ1_RESERVED2 (0x3<<6) |
257 | #define L4_KWQ_CONNECT_REQ1_RESERVED2_SHIFT 6 |
258 | u8 rsrv1[3]; |
259 | #endif |
260 | u32 rsrv2; |
261 | }; |
262 | |
263 | |
264 | /* |
265 | * The second ( optional )request to be passed in order to establish |
266 | * connection in option2 - for IPv6 only |
267 | */ |
268 | struct l4_kwq_connect_req2 { |
269 | #if defined(__BIG_ENDIAN) |
270 | u8 flags; |
271 | #define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0) |
272 | #define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0 |
273 | #define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4) |
274 | #define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4 |
275 | #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7) |
276 | #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7 |
277 | u8 op_code; |
278 | u8 reserved0; |
279 | u8 rsrv; |
280 | #elif defined(__LITTLE_ENDIAN) |
281 | u8 rsrv; |
282 | u8 reserved0; |
283 | u8 op_code; |
284 | u8 flags; |
285 | #define L4_KWQ_CONNECT_REQ2_RESERVED1 (0xF<<0) |
286 | #define L4_KWQ_CONNECT_REQ2_RESERVED1_SHIFT 0 |
287 | #define L4_KWQ_CONNECT_REQ2_LAYER_CODE (0x7<<4) |
288 | #define L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT 4 |
289 | #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT (0x1<<7) |
290 | #define L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT_SHIFT 7 |
291 | #endif |
292 | u32 reserved2; |
293 | u32 src_ip_v6_2; |
294 | u32 src_ip_v6_3; |
295 | u32 src_ip_v6_4; |
296 | u32 dst_ip_v6_2; |
297 | u32 dst_ip_v6_3; |
298 | u32 dst_ip_v6_4; |
299 | }; |
300 | |
301 | |
302 | /* |
303 | * The third ( and last )request to be passed in order to establish |
304 | * connection in option2 |
305 | */ |
306 | struct l4_kwq_connect_req3 { |
307 | #if defined(__BIG_ENDIAN) |
308 | u8 flags; |
309 | #define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0) |
310 | #define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0 |
311 | #define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4) |
312 | #define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4 |
313 | #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7) |
314 | #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7 |
315 | u8 op_code; |
316 | u16 reserved0; |
317 | #elif defined(__LITTLE_ENDIAN) |
318 | u16 reserved0; |
319 | u8 op_code; |
320 | u8 flags; |
321 | #define L4_KWQ_CONNECT_REQ3_RESERVED1 (0xF<<0) |
322 | #define L4_KWQ_CONNECT_REQ3_RESERVED1_SHIFT 0 |
323 | #define L4_KWQ_CONNECT_REQ3_LAYER_CODE (0x7<<4) |
324 | #define L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT 4 |
325 | #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT (0x1<<7) |
326 | #define L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT_SHIFT 7 |
327 | #endif |
328 | u32 ka_timeout; |
329 | u32 ka_interval ; |
330 | #if defined(__BIG_ENDIAN) |
331 | u8 snd_seq_scale; |
332 | u8 ttl; |
333 | u8 tos; |
334 | u8 ka_max_probe_count; |
335 | #elif defined(__LITTLE_ENDIAN) |
336 | u8 ka_max_probe_count; |
337 | u8 tos; |
338 | u8 ttl; |
339 | u8 snd_seq_scale; |
340 | #endif |
341 | #if defined(__BIG_ENDIAN) |
342 | u16 pmtu; |
343 | u16 mss; |
344 | #elif defined(__LITTLE_ENDIAN) |
345 | u16 mss; |
346 | u16 pmtu; |
347 | #endif |
348 | u32 rcv_buf; |
349 | u32 snd_buf; |
350 | u32 seed; |
351 | }; |
352 | |
353 | |
354 | /* |
355 | * a KWQE request to offload a PG connection |
356 | */ |
357 | struct l4_kwq_offload_pg { |
358 | #if defined(__BIG_ENDIAN) |
359 | u8 flags; |
360 | #define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0) |
361 | #define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0 |
362 | #define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4) |
363 | #define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4 |
364 | #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7) |
365 | #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7 |
366 | u8 op_code; |
367 | u16 reserved0; |
368 | #elif defined(__LITTLE_ENDIAN) |
369 | u16 reserved0; |
370 | u8 op_code; |
371 | u8 flags; |
372 | #define L4_KWQ_OFFLOAD_PG_RESERVED1 (0xF<<0) |
373 | #define L4_KWQ_OFFLOAD_PG_RESERVED1_SHIFT 0 |
374 | #define L4_KWQ_OFFLOAD_PG_LAYER_CODE (0x7<<4) |
375 | #define L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT 4 |
376 | #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT (0x1<<7) |
377 | #define L4_KWQ_OFFLOAD_PG_LINKED_WITH_NEXT_SHIFT 7 |
378 | #endif |
379 | #if defined(__BIG_ENDIAN) |
380 | u8 l2hdr_nbytes; |
381 | u8 pg_flags; |
382 | #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0) |
383 | #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0 |
384 | #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1) |
385 | #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1 |
386 | #define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2) |
387 | #define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2 |
388 | u8 da0; |
389 | u8 da1; |
390 | #elif defined(__LITTLE_ENDIAN) |
391 | u8 da1; |
392 | u8 da0; |
393 | u8 pg_flags; |
394 | #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP (0x1<<0) |
395 | #define L4_KWQ_OFFLOAD_PG_SNAP_ENCAP_SHIFT 0 |
396 | #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING (0x1<<1) |
397 | #define L4_KWQ_OFFLOAD_PG_VLAN_TAGGING_SHIFT 1 |
398 | #define L4_KWQ_OFFLOAD_PG_RESERVED2 (0x3F<<2) |
399 | #define L4_KWQ_OFFLOAD_PG_RESERVED2_SHIFT 2 |
400 | u8 l2hdr_nbytes; |
401 | #endif |
402 | #if defined(__BIG_ENDIAN) |
403 | u8 da2; |
404 | u8 da3; |
405 | u8 da4; |
406 | u8 da5; |
407 | #elif defined(__LITTLE_ENDIAN) |
408 | u8 da5; |
409 | u8 da4; |
410 | u8 da3; |
411 | u8 da2; |
412 | #endif |
413 | #if defined(__BIG_ENDIAN) |
414 | u8 sa0; |
415 | u8 sa1; |
416 | u8 sa2; |
417 | u8 sa3; |
418 | #elif defined(__LITTLE_ENDIAN) |
419 | u8 sa3; |
420 | u8 sa2; |
421 | u8 sa1; |
422 | u8 sa0; |
423 | #endif |
424 | #if defined(__BIG_ENDIAN) |
425 | u8 sa4; |
426 | u8 sa5; |
427 | u16 etype; |
428 | #elif defined(__LITTLE_ENDIAN) |
429 | u16 etype; |
430 | u8 sa5; |
431 | u8 sa4; |
432 | #endif |
433 | #if defined(__BIG_ENDIAN) |
434 | u16 vlan_tag; |
435 | u16 ipid_start; |
436 | #elif defined(__LITTLE_ENDIAN) |
437 | u16 ipid_start; |
438 | u16 vlan_tag; |
439 | #endif |
440 | #if defined(__BIG_ENDIAN) |
441 | u16 ipid_count; |
442 | u16 reserved3; |
443 | #elif defined(__LITTLE_ENDIAN) |
444 | u16 reserved3; |
445 | u16 ipid_count; |
446 | #endif |
447 | u32 host_opaque; |
448 | }; |
449 | |
450 | |
451 | /* |
452 | * Abortively close the connection request |
453 | */ |
454 | struct l4_kwq_reset_req { |
455 | #if defined(__BIG_ENDIAN) |
456 | u8 flags; |
457 | #define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0) |
458 | #define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0 |
459 | #define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4) |
460 | #define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4 |
461 | #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7) |
462 | #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7 |
463 | u8 op_code; |
464 | u16 reserved0; |
465 | #elif defined(__LITTLE_ENDIAN) |
466 | u16 reserved0; |
467 | u8 op_code; |
468 | u8 flags; |
469 | #define L4_KWQ_RESET_REQ_RESERVED1 (0xF<<0) |
470 | #define L4_KWQ_RESET_REQ_RESERVED1_SHIFT 0 |
471 | #define L4_KWQ_RESET_REQ_LAYER_CODE (0x7<<4) |
472 | #define L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT 4 |
473 | #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT (0x1<<7) |
474 | #define L4_KWQ_RESET_REQ_LINKED_WITH_NEXT_SHIFT 7 |
475 | #endif |
476 | u32 cid; |
477 | u32 reserved2[6]; |
478 | }; |
479 | |
480 | |
481 | /* |
482 | * a KWQE request to update a PG connection |
483 | */ |
484 | struct l4_kwq_update_pg { |
485 | #if defined(__BIG_ENDIAN) |
486 | u8 flags; |
487 | #define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0) |
488 | #define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0 |
489 | #define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4) |
490 | #define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4 |
491 | #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7) |
492 | #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7 |
493 | u8 opcode; |
494 | u16 oper16; |
495 | #elif defined(__LITTLE_ENDIAN) |
496 | u16 oper16; |
497 | u8 opcode; |
498 | u8 flags; |
499 | #define L4_KWQ_UPDATE_PG_RESERVED1 (0xF<<0) |
500 | #define L4_KWQ_UPDATE_PG_RESERVED1_SHIFT 0 |
501 | #define L4_KWQ_UPDATE_PG_LAYER_CODE (0x7<<4) |
502 | #define L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT 4 |
503 | #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT (0x1<<7) |
504 | #define L4_KWQ_UPDATE_PG_LINKED_WITH_NEXT_SHIFT 7 |
505 | #endif |
506 | u32 pg_cid; |
507 | u32 pg_host_opaque; |
508 | #if defined(__BIG_ENDIAN) |
509 | u8 pg_valids; |
510 | #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0) |
511 | #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0 |
512 | #define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1) |
513 | #define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1 |
514 | #define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2) |
515 | #define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2 |
516 | u8 pg_unused_a; |
517 | u16 pg_ipid_count; |
518 | #elif defined(__LITTLE_ENDIAN) |
519 | u16 pg_ipid_count; |
520 | u8 pg_unused_a; |
521 | u8 pg_valids; |
522 | #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT (0x1<<0) |
523 | #define L4_KWQ_UPDATE_PG_VALIDS_IPID_COUNT_SHIFT 0 |
524 | #define L4_KWQ_UPDATE_PG_VALIDS_DA (0x1<<1) |
525 | #define L4_KWQ_UPDATE_PG_VALIDS_DA_SHIFT 1 |
526 | #define L4_KWQ_UPDATE_PG_RESERVERD2 (0x3F<<2) |
527 | #define L4_KWQ_UPDATE_PG_RESERVERD2_SHIFT 2 |
528 | #endif |
529 | #if defined(__BIG_ENDIAN) |
530 | u16 reserverd3; |
531 | u8 da0; |
532 | u8 da1; |
533 | #elif defined(__LITTLE_ENDIAN) |
534 | u8 da1; |
535 | u8 da0; |
536 | u16 reserverd3; |
537 | #endif |
538 | #if defined(__BIG_ENDIAN) |
539 | u8 da2; |
540 | u8 da3; |
541 | u8 da4; |
542 | u8 da5; |
543 | #elif defined(__LITTLE_ENDIAN) |
544 | u8 da5; |
545 | u8 da4; |
546 | u8 da3; |
547 | u8 da2; |
548 | #endif |
549 | u32 reserved4; |
550 | u32 reserved5; |
551 | }; |
552 | |
553 | |
554 | /* |
555 | * a KWQE request to upload a PG or L4 context |
556 | */ |
557 | struct l4_kwq_upload { |
558 | #if defined(__BIG_ENDIAN) |
559 | u8 flags; |
560 | #define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0) |
561 | #define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0 |
562 | #define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4) |
563 | #define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4 |
564 | #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7) |
565 | #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7 |
566 | u8 opcode; |
567 | u16 oper16; |
568 | #elif defined(__LITTLE_ENDIAN) |
569 | u16 oper16; |
570 | u8 opcode; |
571 | u8 flags; |
572 | #define L4_KWQ_UPLOAD_RESERVED1 (0xF<<0) |
573 | #define L4_KWQ_UPLOAD_RESERVED1_SHIFT 0 |
574 | #define L4_KWQ_UPLOAD_LAYER_CODE (0x7<<4) |
575 | #define L4_KWQ_UPLOAD_LAYER_CODE_SHIFT 4 |
576 | #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT (0x1<<7) |
577 | #define L4_KWQ_UPLOAD_LINKED_WITH_NEXT_SHIFT 7 |
578 | #endif |
579 | u32 cid; |
580 | u32 reserved2[6]; |
581 | }; |
582 | |
583 | /* |
584 | * bnx2x structures |
585 | */ |
586 | |
587 | /* |
588 | * iSCSI context region, used only in iSCSI |
589 | */ |
590 | struct ustorm_iscsi_rq_db { |
591 | struct regpair pbl_base; |
592 | struct regpair curr_pbe; |
593 | }; |
594 | |
595 | /* |
596 | * iSCSI context region, used only in iSCSI |
597 | */ |
598 | struct ustorm_iscsi_r2tq_db { |
599 | struct regpair pbl_base; |
600 | struct regpair curr_pbe; |
601 | }; |
602 | |
603 | /* |
604 | * iSCSI context region, used only in iSCSI |
605 | */ |
606 | struct ustorm_iscsi_cq_db { |
607 | #if defined(__BIG_ENDIAN) |
608 | u16 cq_sn; |
609 | u16 prod; |
610 | #elif defined(__LITTLE_ENDIAN) |
611 | u16 prod; |
612 | u16 cq_sn; |
613 | #endif |
614 | struct regpair curr_pbe; |
615 | }; |
616 | |
617 | /* |
618 | * iSCSI context region, used only in iSCSI |
619 | */ |
620 | struct rings_db { |
621 | struct ustorm_iscsi_rq_db rq; |
622 | struct ustorm_iscsi_r2tq_db r2tq; |
623 | struct ustorm_iscsi_cq_db cq[8]; |
624 | #if defined(__BIG_ENDIAN) |
625 | u16 rq_prod; |
626 | u16 r2tq_prod; |
627 | #elif defined(__LITTLE_ENDIAN) |
628 | u16 r2tq_prod; |
629 | u16 rq_prod; |
630 | #endif |
631 | struct regpair cq_pbl_base; |
632 | }; |
633 | |
634 | /* |
635 | * iSCSI context region, used only in iSCSI |
636 | */ |
637 | struct ustorm_iscsi_placement_db { |
638 | u32 sgl_base_lo; |
639 | u32 sgl_base_hi; |
640 | u32 local_sge_0_address_hi; |
641 | u32 local_sge_0_address_lo; |
642 | #if defined(__BIG_ENDIAN) |
643 | u16 curr_sge_offset; |
644 | u16 local_sge_0_size; |
645 | #elif defined(__LITTLE_ENDIAN) |
646 | u16 local_sge_0_size; |
647 | u16 curr_sge_offset; |
648 | #endif |
649 | u32 local_sge_1_address_hi; |
650 | u32 local_sge_1_address_lo; |
651 | #if defined(__BIG_ENDIAN) |
652 | u16 reserved6; |
653 | u16 local_sge_1_size; |
654 | #elif defined(__LITTLE_ENDIAN) |
655 | u16 local_sge_1_size; |
656 | u16 reserved6; |
657 | #endif |
658 | #if defined(__BIG_ENDIAN) |
659 | u8 sgl_size; |
660 | u8 local_sge_index_2b; |
661 | u16 reserved7; |
662 | #elif defined(__LITTLE_ENDIAN) |
663 | u16 reserved7; |
664 | u8 local_sge_index_2b; |
665 | u8 sgl_size; |
666 | #endif |
667 | u32 rem_pdu; |
668 | u32 place_db_bitfield_1; |
669 | #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD (0xFFFFFF<<0) |
670 | #define USTORM_ISCSI_PLACEMENT_DB_REM_PDU_PAYLOAD_SHIFT 0 |
671 | #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID (0xFF<<24) |
672 | #define USTORM_ISCSI_PLACEMENT_DB_CQ_ID_SHIFT 24 |
673 | u32 place_db_bitfield_2; |
674 | #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE (0xFFFFFF<<0) |
675 | #define USTORM_ISCSI_PLACEMENT_DB_BYTES_2_TRUNCATE_SHIFT 0 |
676 | #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX (0xFF<<24) |
677 | #define USTORM_ISCSI_PLACEMENT_DB_HOST_SGE_INDEX_SHIFT 24 |
678 | u32 nal; |
679 | #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE (0xFFFFFF<<0) |
680 | #define USTORM_ISCSI_PLACEMENT_DB_REM_SGE_SIZE_SHIFT 0 |
681 | #define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B (0x3<<24) |
682 | #define USTORM_ISCSI_PLACEMENT_DB_EXP_PADDING_2B_SHIFT 24 |
683 | #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B (0x7<<26) |
684 | #define USTORM_ISCSI_PLACEMENT_DB_EXP_DIGEST_3B_SHIFT 26 |
685 | #define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B (0x7<<29) |
686 | #define USTORM_ISCSI_PLACEMENT_DB_NAL_LEN_3B_SHIFT 29 |
687 | }; |
688 | |
689 | /* |
690 | * Ustorm iSCSI Storm Context |
691 | */ |
692 | struct ustorm_iscsi_st_context { |
693 | u32 exp_stat_sn; |
694 | u32 exp_data_sn; |
695 | struct rings_db ring; |
696 | struct regpair task_pbl_base; |
697 | struct regpair tce_phy_addr; |
698 | struct ustorm_iscsi_placement_db place_db; |
699 | u32 data_rcv_seq; |
700 | u32 rem_rcv_len; |
701 | #if defined(__BIG_ENDIAN) |
702 | u16 hdr_itt; |
703 | u16 iscsi_conn_id; |
704 | #elif defined(__LITTLE_ENDIAN) |
705 | u16 iscsi_conn_id; |
706 | u16 hdr_itt; |
707 | #endif |
708 | u32 nal_bytes; |
709 | #if defined(__BIG_ENDIAN) |
710 | u8 hdr_second_byte_union; |
711 | u8 bitfield_0; |
712 | #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) |
713 | #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 |
714 | #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) |
715 | #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 |
716 | #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x3F<<2) |
717 | #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 2 |
718 | u8 task_pdu_cache_index; |
719 | u8 task_pbe_cache_index; |
720 | #elif defined(__LITTLE_ENDIAN) |
721 | u8 task_pbe_cache_index; |
722 | u8 task_pdu_cache_index; |
723 | u8 bitfield_0; |
724 | #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU (0x1<<0) |
725 | #define USTORM_ISCSI_ST_CONTEXT_BMIDDLEOFPDU_SHIFT 0 |
726 | #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE (0x1<<1) |
727 | #define USTORM_ISCSI_ST_CONTEXT_BFENCECQE_SHIFT 1 |
728 | #define USTORM_ISCSI_ST_CONTEXT_RESERVED1 (0x3F<<2) |
729 | #define USTORM_ISCSI_ST_CONTEXT_RESERVED1_SHIFT 2 |
730 | u8 hdr_second_byte_union; |
731 | #endif |
732 | #if defined(__BIG_ENDIAN) |
733 | u16 reserved3; |
734 | u8 reserved2; |
735 | u8 acDecrement; |
736 | #elif defined(__LITTLE_ENDIAN) |
737 | u8 acDecrement; |
738 | u8 reserved2; |
739 | u16 reserved3; |
740 | #endif |
741 | u32 task_stat; |
742 | #if defined(__BIG_ENDIAN) |
743 | u8 hdr_opcode; |
744 | u8 num_cqs; |
745 | u16 reserved5; |
746 | #elif defined(__LITTLE_ENDIAN) |
747 | u16 reserved5; |
748 | u8 num_cqs; |
749 | u8 hdr_opcode; |
750 | #endif |
751 | u32 negotiated_rx; |
752 | #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH (0xFFFFFF<<0) |
753 | #define USTORM_ISCSI_ST_CONTEXT_MAX_RECV_PDU_LENGTH_SHIFT 0 |
754 | #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS (0xFF<<24) |
755 | #define USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT 24 |
756 | u32 negotiated_rx_and_flags; |
757 | #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH (0xFFFFFF<<0) |
758 | #define USTORM_ISCSI_ST_CONTEXT_MAX_BURST_LENGTH_SHIFT 0 |
759 | #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED (0x1<<24) |
760 | #define USTORM_ISCSI_ST_CONTEXT_B_CQE_POSTED_OR_HEADER_CACHED_SHIFT 24 |
761 | #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN (0x1<<25) |
762 | #define USTORM_ISCSI_ST_CONTEXT_B_HDR_DIGEST_EN_SHIFT 25 |
763 | #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN (0x1<<26) |
764 | #define USTORM_ISCSI_ST_CONTEXT_B_DATA_DIGEST_EN_SHIFT 26 |
765 | #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR (0x1<<27) |
766 | #define USTORM_ISCSI_ST_CONTEXT_B_PROTOCOL_ERROR_SHIFT 27 |
767 | #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID (0x1<<28) |
768 | #define USTORM_ISCSI_ST_CONTEXT_B_TASK_VALID_SHIFT 28 |
769 | #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE (0x3<<29) |
770 | #define USTORM_ISCSI_ST_CONTEXT_TASK_TYPE_SHIFT 29 |
771 | #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED (0x1<<31) |
772 | #define USTORM_ISCSI_ST_CONTEXT_B_ALL_DATA_ACKED_SHIFT 31 |
773 | }; |
774 | |
775 | /* |
776 | * TCP context region, shared in TOE, RDMA and ISCSI |
777 | */ |
778 | struct tstorm_tcp_st_context_section { |
779 | u32 flags1; |
780 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_20B (0xFFFFFF<<0) |
781 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_SRTT_20B_SHIFT 0 |
782 | #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID (0x1<<24) |
783 | #define TSTORM_TCP_ST_CONTEXT_SECTION_PAWS_INVALID_SHIFT 24 |
784 | #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS (0x1<<25) |
785 | #define TSTORM_TCP_ST_CONTEXT_SECTION_TIMESTAMP_EXISTS_SHIFT 25 |
786 | #define TSTORM_TCP_ST_CONTEXT_SECTION_ISLE_EXISTS (0x1<<26) |
787 | #define TSTORM_TCP_ST_CONTEXT_SECTION_ISLE_EXISTS_SHIFT 26 |
788 | #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD (0x1<<27) |
789 | #define TSTORM_TCP_ST_CONTEXT_SECTION_STOP_RX_PAYLOAD_SHIFT 27 |
790 | #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED (0x1<<28) |
791 | #define TSTORM_TCP_ST_CONTEXT_SECTION_KA_ENABLED_SHIFT 28 |
792 | #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE (0x1<<29) |
793 | #define TSTORM_TCP_ST_CONTEXT_SECTION_FIRST_RTO_ESTIMATE_SHIFT 29 |
794 | #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN (0x1<<30) |
795 | #define TSTORM_TCP_ST_CONTEXT_SECTION_MAX_SEG_RETRANSMIT_EN_SHIFT 30 |
796 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED3 (0x1<<31) |
797 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RESERVED3_SHIFT 31 |
798 | u32 flags2; |
799 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_20B (0xFFFFFF<<0) |
800 | #define TSTORM_TCP_ST_CONTEXT_SECTION_RTT_VARIATION_20B_SHIFT 0 |
801 | #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN (0x1<<24) |
802 | #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN_SHIFT 24 |
803 | #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN (0x1<<25) |
804 | #define TSTORM_TCP_ST_CONTEXT_SECTION_DA_COUNTER_EN_SHIFT 25 |
805 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT (0x1<<26) |
806 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_KA_PROBE_SENT_SHIFT 26 |
807 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT (0x1<<27) |
808 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_PERSIST_PROBE_SENT_SHIFT 27 |
809 | #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<28) |
810 | #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 28 |
811 | #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<29) |
812 | #define TSTORM_TCP_ST_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 29 |
813 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_SECOND_ISLE_DROPPED (0x1<<30) |
814 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_SECOND_ISLE_DROPPED_SHIFT 30 |
815 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_DONT_SUPPORT_OOO (0x1<<31) |
816 | #define __TSTORM_TCP_ST_CONTEXT_SECTION_DONT_SUPPORT_OOO_SHIFT 31 |
817 | #if defined(__BIG_ENDIAN) |
818 | u16 reserved_slowpath; |
819 | u8 tcp_sm_state_3b; |
820 | u8 rto_exp_3b; |
821 | #elif defined(__LITTLE_ENDIAN) |
822 | u8 rto_exp_3b; |
823 | u8 tcp_sm_state_3b; |
824 | u16 reserved_slowpath; |
825 | #endif |
826 | u32 rcv_nxt; |
827 | u32 timestamp_recent; |
828 | u32 timestamp_recent_time; |
829 | u32 cwnd; |
830 | u32 ss_thresh; |
831 | u32 cwnd_accum; |
832 | u32 prev_seg_seq; |
833 | u32 expected_rel_seq; |
834 | u32 recover; |
835 | #if defined(__BIG_ENDIAN) |
836 | u8 retransmit_count; |
837 | u8 ka_max_probe_count; |
838 | u8 persist_probe_count; |
839 | u8 ka_probe_count; |
840 | #elif defined(__LITTLE_ENDIAN) |
841 | u8 ka_probe_count; |
842 | u8 persist_probe_count; |
843 | u8 ka_max_probe_count; |
844 | u8 retransmit_count; |
845 | #endif |
846 | #if defined(__BIG_ENDIAN) |
847 | u8 statistics_counter_id; |
848 | u8 ooo_support_mode; |
849 | u8 snd_wnd_scale_4b; |
850 | u8 dup_ack_count; |
851 | #elif defined(__LITTLE_ENDIAN) |
852 | u8 dup_ack_count; |
853 | u8 snd_wnd_scale_4b; |
854 | u8 ooo_support_mode; |
855 | u8 statistics_counter_id; |
856 | #endif |
857 | u32 retransmit_start_time; |
858 | u32 ka_timeout; |
859 | u32 ka_interval; |
860 | u32 isle_start_seq; |
861 | u32 isle_end_seq; |
862 | #if defined(__BIG_ENDIAN) |
863 | u16 mss; |
864 | u16 recent_seg_wnd; |
865 | #elif defined(__LITTLE_ENDIAN) |
866 | u16 recent_seg_wnd; |
867 | u16 mss; |
868 | #endif |
869 | u32 reserved4; |
870 | u32 max_rt_time; |
871 | #if defined(__BIG_ENDIAN) |
872 | u16 lsb_mac_address; |
873 | u16 vlan_id; |
874 | #elif defined(__LITTLE_ENDIAN) |
875 | u16 vlan_id; |
876 | u16 lsb_mac_address; |
877 | #endif |
878 | u32 msb_mac_address; |
879 | u32 reserved2; |
880 | }; |
881 | |
882 | /* |
883 | * Termination variables |
884 | */ |
885 | struct iscsi_term_vars { |
886 | u8 BitMap; |
887 | #define ISCSI_TERM_VARS_TCP_STATE (0xF<<0) |
888 | #define ISCSI_TERM_VARS_TCP_STATE_SHIFT 0 |
889 | #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT (0x1<<4) |
890 | #define ISCSI_TERM_VARS_FIN_RECEIVED_SBIT_SHIFT 4 |
891 | #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT (0x1<<5) |
892 | #define ISCSI_TERM_VARS_ACK_ON_FIN_RECEIVED_SBIT_SHIFT 5 |
893 | #define ISCSI_TERM_VARS_TERM_ON_CHIP (0x1<<6) |
894 | #define ISCSI_TERM_VARS_TERM_ON_CHIP_SHIFT 6 |
895 | #define ISCSI_TERM_VARS_RSRV (0x1<<7) |
896 | #define ISCSI_TERM_VARS_RSRV_SHIFT 7 |
897 | }; |
898 | |
899 | /* |
900 | * iSCSI context region, used only in iSCSI |
901 | */ |
902 | struct tstorm_iscsi_st_context_section { |
903 | #if defined(__BIG_ENDIAN) |
904 | u16 rem_tcp_data_len; |
905 | u16 brb_offset; |
906 | #elif defined(__LITTLE_ENDIAN) |
907 | u16 brb_offset; |
908 | u16 rem_tcp_data_len; |
909 | #endif |
910 | u32 b2nh; |
911 | #if defined(__BIG_ENDIAN) |
912 | u16 rq_cons; |
913 | u8 flags; |
914 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) |
915 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 |
916 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) |
917 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 |
918 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) |
919 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 |
920 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) |
921 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 |
922 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) |
923 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 |
924 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5) |
925 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5 |
926 | u8 hdr_bytes_2_fetch; |
927 | #elif defined(__LITTLE_ENDIAN) |
928 | u8 hdr_bytes_2_fetch; |
929 | u8 flags; |
930 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN (0x1<<0) |
931 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_HDR_DIGEST_EN_SHIFT 0 |
932 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN (0x1<<1) |
933 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DATA_DIGEST_EN_SHIFT 1 |
934 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER (0x1<<2) |
935 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_PARTIAL_HEADER_SHIFT 2 |
936 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE (0x1<<3) |
937 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_FULL_FEATURE_SHIFT 3 |
938 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS (0x1<<4) |
939 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_B_DROP_ALL_PDUS_SHIFT 4 |
940 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV (0x7<<5) |
941 | #define TSTORM_ISCSI_ST_CONTEXT_SECTION_FLAGS_RSRV_SHIFT 5 |
942 | u16 rq_cons; |
943 | #endif |
944 | struct regpair rq_db_phy_addr; |
945 | #if defined(__BIG_ENDIAN) |
946 | struct iscsi_term_vars term_vars; |
947 | u8 scratchpad_idx; |
948 | u16 iscsi_conn_id; |
949 | #elif defined(__LITTLE_ENDIAN) |
950 | u16 iscsi_conn_id; |
951 | u8 scratchpad_idx; |
952 | struct iscsi_term_vars term_vars; |
953 | #endif |
954 | u32 reserved2; |
955 | }; |
956 | |
957 | /* |
958 | * The iSCSI non-aggregative context of Tstorm |
959 | */ |
960 | struct tstorm_iscsi_st_context { |
961 | struct tstorm_tcp_st_context_section tcp; |
962 | struct tstorm_iscsi_st_context_section iscsi; |
963 | }; |
964 | |
965 | /* |
966 | * The tcp aggregative context section of Xstorm |
967 | */ |
968 | struct xstorm_tcp_tcp_ag_context_section { |
969 | #if defined(__BIG_ENDIAN) |
970 | u8 __tcp_agg_vars1; |
971 | u8 __da_cnt; |
972 | u16 mss; |
973 | #elif defined(__LITTLE_ENDIAN) |
974 | u16 mss; |
975 | u8 __da_cnt; |
976 | u8 __tcp_agg_vars1; |
977 | #endif |
978 | u32 snd_nxt; |
979 | u32 tx_wnd; |
980 | u32 snd_una; |
981 | u32 local_adv_wnd; |
982 | #if defined(__BIG_ENDIAN) |
983 | u8 __agg_val8_th; |
984 | u8 __agg_val8; |
985 | u16 tcp_agg_vars2; |
986 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) |
987 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 |
988 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) |
989 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 |
990 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) |
991 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 |
992 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) |
993 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 |
994 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) |
995 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 |
996 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) |
997 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 |
998 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) |
999 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 |
1000 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7) |
1001 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7 |
1002 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) |
1003 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 |
1004 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) |
1005 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 |
1006 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) |
1007 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 |
1008 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) |
1009 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 |
1010 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) |
1011 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 |
1012 | #elif defined(__LITTLE_ENDIAN) |
1013 | u16 tcp_agg_vars2; |
1014 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG (0x1<<0) |
1015 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_SHIFT 0 |
1016 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED (0x1<<1) |
1017 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_UNBLOCKED_SHIFT 1 |
1018 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE (0x1<<2) |
1019 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_TIMER_ACTIVE_SHIFT 2 |
1020 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG (0x1<<3) |
1021 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_FLAG_SHIFT 3 |
1022 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG (0x1<<4) |
1023 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX4_FLAG_SHIFT 4 |
1024 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE (0x1<<5) |
1025 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DA_ENABLE_SHIFT 5 |
1026 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN (0x1<<6) |
1027 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ACK_TO_FE_UPDATED_EN_SHIFT 6 |
1028 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN (0x1<<7) |
1029 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX3_CF_EN_SHIFT 7 |
1030 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN (0x1<<8) |
1031 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_FIN_FLAG_EN_SHIFT 8 |
1032 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<9) |
1033 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 9 |
1034 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF (0x3<<10) |
1035 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_SET_RTO_CF_SHIFT 10 |
1036 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF (0x3<<12) |
1037 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_UPDATED_CF_SHIFT 12 |
1038 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF (0x3<<14) |
1039 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_SHIFT 14 |
1040 | u8 __agg_val8; |
1041 | u8 __agg_val8_th; |
1042 | #endif |
1043 | u32 ack_to_far_end; |
1044 | u32 rto_timer; |
1045 | u32 ka_timer; |
1046 | u32 ts_to_echo; |
1047 | #if defined(__BIG_ENDIAN) |
1048 | u16 __agg_val7_th; |
1049 | u16 __agg_val7; |
1050 | #elif defined(__LITTLE_ENDIAN) |
1051 | u16 __agg_val7; |
1052 | u16 __agg_val7_th; |
1053 | #endif |
1054 | #if defined(__BIG_ENDIAN) |
1055 | u8 __tcp_agg_vars5; |
1056 | u8 __tcp_agg_vars4; |
1057 | u8 __tcp_agg_vars3; |
1058 | u8 __force_pure_ack_cnt; |
1059 | #elif defined(__LITTLE_ENDIAN) |
1060 | u8 __force_pure_ack_cnt; |
1061 | u8 __tcp_agg_vars3; |
1062 | u8 __tcp_agg_vars4; |
1063 | u8 __tcp_agg_vars5; |
1064 | #endif |
1065 | u32 tcp_agg_vars6; |
1066 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN (0x1<<0) |
1067 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TS_TO_ECHO_CF_EN_SHIFT 0 |
1068 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN (0x1<<1) |
1069 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX8_CF_EN_SHIFT 1 |
1070 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN (0x1<<2) |
1071 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_EN_SHIFT 2 |
1072 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<3) |
1073 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 3 |
1074 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG (0x1<<4) |
1075 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX6_FLAG_SHIFT 4 |
1076 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG (0x1<<5) |
1077 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX7_FLAG_SHIFT 5 |
1078 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF (0x3<<6) |
1079 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX5_CF_SHIFT 6 |
1080 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF (0x3<<8) |
1081 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX9_CF_SHIFT 8 |
1082 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF (0x3<<10) |
1083 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_SHIFT 10 |
1084 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF (0x3<<12) |
1085 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_SHIFT 12 |
1086 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF (0x3<<14) |
1087 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_SHIFT 14 |
1088 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF (0x3<<16) |
1089 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX13_CF_SHIFT 16 |
1090 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF (0x3<<18) |
1091 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX14_CF_SHIFT 18 |
1092 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF (0x3<<20) |
1093 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX15_CF_SHIFT 20 |
1094 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF (0x3<<22) |
1095 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX16_CF_SHIFT 22 |
1096 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF (0x3<<24) |
1097 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX17_CF_SHIFT 24 |
1098 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG (0x1<<26) |
1099 | #define XSTORM_TCP_TCP_AG_CONTEXT_SECTION_ECE_FLAG_SHIFT 26 |
1100 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71 (0x1<<27) |
1101 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED71_SHIFT 27 |
1102 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY (0x1<<28) |
1103 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_FORCE_PURE_ACK_CNT_DIRTY_SHIFT 28 |
1104 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG (0x1<<29) |
1105 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_TCP_AUTO_STOP_FLAG_SHIFT 29 |
1106 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG (0x1<<30) |
1107 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_DO_TS_UPDATE_FLAG_SHIFT 30 |
1108 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG (0x1<<31) |
1109 | #define __XSTORM_TCP_TCP_AG_CONTEXT_SECTION_CANCEL_RETRANSMIT_FLAG_SHIFT 31 |
1110 | #if defined(__BIG_ENDIAN) |
1111 | u16 __agg_misc6; |
1112 | u16 __tcp_agg_vars7; |
1113 | #elif defined(__LITTLE_ENDIAN) |
1114 | u16 __tcp_agg_vars7; |
1115 | u16 __agg_misc6; |
1116 | #endif |
1117 | u32 __agg_val10; |
1118 | u32 __agg_val10_th; |
1119 | #if defined(__BIG_ENDIAN) |
1120 | u16 __reserved3; |
1121 | u8 __reserved2; |
1122 | u8 __da_only_cnt; |
1123 | #elif defined(__LITTLE_ENDIAN) |
1124 | u8 __da_only_cnt; |
1125 | u8 __reserved2; |
1126 | u16 __reserved3; |
1127 | #endif |
1128 | }; |
1129 | |
1130 | /* |
1131 | * The iscsi aggregative context of Xstorm |
1132 | */ |
1133 | struct xstorm_iscsi_ag_context { |
1134 | #if defined(__BIG_ENDIAN) |
1135 | u16 agg_val1; |
1136 | u8 agg_vars1; |
1137 | #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1138 | #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1139 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1140 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1141 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1142 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1143 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1144 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1145 | #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) |
1146 | #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 |
1147 | #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5) |
1148 | #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5 |
1149 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) |
1150 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 |
1151 | #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) |
1152 | #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 |
1153 | u8 state; |
1154 | #elif defined(__LITTLE_ENDIAN) |
1155 | u8 state; |
1156 | u8 agg_vars1; |
1157 | #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1158 | #define __XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1159 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1160 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1161 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1162 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1163 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1164 | #define XSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1165 | #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN (0x1<<4) |
1166 | #define __XSTORM_ISCSI_AG_CONTEXT_MORE_TO_SEND_EN_SHIFT 4 |
1167 | #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN (0x1<<5) |
1168 | #define XSTORM_ISCSI_AG_CONTEXT_NAGLE_EN_SHIFT 5 |
1169 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG (0x1<<6) |
1170 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_SHIFT 6 |
1171 | #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN (0x1<<7) |
1172 | #define __XSTORM_ISCSI_AG_CONTEXT_UNA_GT_NXT_EN_SHIFT 7 |
1173 | u16 agg_val1; |
1174 | #endif |
1175 | #if defined(__BIG_ENDIAN) |
1176 | u8 cdu_reserved; |
1177 | u8 agg_vars4; |
1178 | #define XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF (0x3<<0) |
1179 | #define XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_SHIFT 0 |
1180 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF (0x3<<2) |
1181 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_SHIFT 2 |
1182 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_EN (0x1<<4) |
1183 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_EN_SHIFT 4 |
1184 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_EN (0x1<<5) |
1185 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_EN_SHIFT 5 |
1186 | #define __XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_EN (0x1<<6) |
1187 | #define __XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_EN_SHIFT 6 |
1188 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_EN (0x1<<7) |
1189 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_EN_SHIFT 7 |
1190 | u8 agg_vars3; |
1191 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) |
1192 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 |
1193 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF (0x3<<6) |
1194 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_SHIFT 6 |
1195 | u8 agg_vars2; |
1196 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0) |
1197 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0 |
1198 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) |
1199 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 |
1200 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3) |
1201 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3 |
1202 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4) |
1203 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4 |
1204 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5) |
1205 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5 |
1206 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) |
1207 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 |
1208 | #elif defined(__LITTLE_ENDIAN) |
1209 | u8 agg_vars2; |
1210 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF (0x3<<0) |
1211 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_SHIFT 0 |
1212 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN (0x1<<2) |
1213 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_SPARE_FLAG_EN_SHIFT 2 |
1214 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG (0x1<<3) |
1215 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX8_FLAG_SHIFT 3 |
1216 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG (0x1<<4) |
1217 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX9_FLAG_SHIFT 4 |
1218 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1 (0x3<<5) |
1219 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE1_SHIFT 5 |
1220 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) |
1221 | #define __XSTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 |
1222 | u8 agg_vars3; |
1223 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2 (0x3F<<0) |
1224 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM2_SHIFT 0 |
1225 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF (0x3<<6) |
1226 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_SHIFT 6 |
1227 | u8 agg_vars4; |
1228 | #define XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF (0x3<<0) |
1229 | #define XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_SHIFT 0 |
1230 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF (0x3<<2) |
1231 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_SHIFT 2 |
1232 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_EN (0x1<<4) |
1233 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_EN_SHIFT 4 |
1234 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_EN (0x1<<5) |
1235 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX19_CF_EN_SHIFT 5 |
1236 | #define __XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_EN (0x1<<6) |
1237 | #define __XSTORM_ISCSI_AG_CONTEXT_R2TQ_PROD_CF_EN_SHIFT 6 |
1238 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_EN (0x1<<7) |
1239 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX21_CF_EN_SHIFT 7 |
1240 | u8 cdu_reserved; |
1241 | #endif |
1242 | u32 more_to_send; |
1243 | #if defined(__BIG_ENDIAN) |
1244 | u16 agg_vars5; |
1245 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0) |
1246 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0 |
1247 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) |
1248 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 |
1249 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) |
1250 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 |
1251 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14) |
1252 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14 |
1253 | u16 sq_cons; |
1254 | #elif defined(__LITTLE_ENDIAN) |
1255 | u16 sq_cons; |
1256 | u16 agg_vars5; |
1257 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5 (0x3<<0) |
1258 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE5_SHIFT 0 |
1259 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0 (0x3F<<2) |
1260 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM0_SHIFT 2 |
1261 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1 (0x3F<<8) |
1262 | #define XSTORM_ISCSI_AG_CONTEXT_PHYSICAL_QUEUE_NUM1_SHIFT 8 |
1263 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2 (0x3<<14) |
1264 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE2_SHIFT 14 |
1265 | #endif |
1266 | struct xstorm_tcp_tcp_ag_context_section tcp; |
1267 | #if defined(__BIG_ENDIAN) |
1268 | u16 agg_vars7; |
1269 | #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) |
1270 | #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 |
1271 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3) |
1272 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3 |
1273 | #define XSTORM_ISCSI_AG_CONTEXT_AUX18_CF (0x3<<4) |
1274 | #define XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_SHIFT 4 |
1275 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6) |
1276 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6 |
1277 | #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8) |
1278 | #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8 |
1279 | #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) |
1280 | #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 |
1281 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11) |
1282 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 |
1283 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12) |
1284 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12 |
1285 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13) |
1286 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13 |
1287 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14) |
1288 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14 |
1289 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX2_FLAG (0x1<<15) |
1290 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX2_FLAG_SHIFT 15 |
1291 | u8 agg_val3_th; |
1292 | u8 agg_vars6; |
1293 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0) |
1294 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0 |
1295 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3) |
1296 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3 |
1297 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6) |
1298 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6 |
1299 | #elif defined(__LITTLE_ENDIAN) |
1300 | u8 agg_vars6; |
1301 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6 (0x7<<0) |
1302 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE6_SHIFT 0 |
1303 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7 (0x7<<3) |
1304 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE7_SHIFT 3 |
1305 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4 (0x3<<6) |
1306 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE4_SHIFT 6 |
1307 | u8 agg_val3_th; |
1308 | u16 agg_vars7; |
1309 | #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE (0x7<<0) |
1310 | #define __XSTORM_ISCSI_AG_CONTEXT_AGG_VAL11_DECISION_RULE_SHIFT 0 |
1311 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG (0x1<<3) |
1312 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX13_FLAG_SHIFT 3 |
1313 | #define XSTORM_ISCSI_AG_CONTEXT_AUX18_CF (0x3<<4) |
1314 | #define XSTORM_ISCSI_AG_CONTEXT_AUX18_CF_SHIFT 4 |
1315 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3 (0x3<<6) |
1316 | #define XSTORM_ISCSI_AG_CONTEXT_DECISION_RULE3_SHIFT 6 |
1317 | #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF (0x3<<8) |
1318 | #define XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_SHIFT 8 |
1319 | #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK (0x1<<10) |
1320 | #define __XSTORM_ISCSI_AG_CONTEXT_COMPLETION_SEQ_DECISION_MASK_SHIFT 10 |
1321 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN (0x1<<11) |
1322 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX1_CF_EN_SHIFT 11 |
1323 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG (0x1<<12) |
1324 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX10_FLAG_SHIFT 12 |
1325 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG (0x1<<13) |
1326 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX11_FLAG_SHIFT 13 |
1327 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG (0x1<<14) |
1328 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX12_FLAG_SHIFT 14 |
1329 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX2_FLAG (0x1<<15) |
1330 | #define __XSTORM_ISCSI_AG_CONTEXT_AUX2_FLAG_SHIFT 15 |
1331 | #endif |
1332 | #if defined(__BIG_ENDIAN) |
1333 | u16 __agg_val11_th; |
1334 | u16 __agg_val11; |
1335 | #elif defined(__LITTLE_ENDIAN) |
1336 | u16 __agg_val11; |
1337 | u16 __agg_val11_th; |
1338 | #endif |
1339 | #if defined(__BIG_ENDIAN) |
1340 | u8 __reserved1; |
1341 | u8 __agg_val6_th; |
1342 | u16 __agg_val9; |
1343 | #elif defined(__LITTLE_ENDIAN) |
1344 | u16 __agg_val9; |
1345 | u8 __agg_val6_th; |
1346 | u8 __reserved1; |
1347 | #endif |
1348 | #if defined(__BIG_ENDIAN) |
1349 | u16 hq_prod; |
1350 | u16 hq_cons; |
1351 | #elif defined(__LITTLE_ENDIAN) |
1352 | u16 hq_cons; |
1353 | u16 hq_prod; |
1354 | #endif |
1355 | u32 agg_vars8; |
1356 | #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2 (0xFFFFFF<<0) |
1357 | #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC2_SHIFT 0 |
1358 | #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3 (0xFF<<24) |
1359 | #define XSTORM_ISCSI_AG_CONTEXT_AGG_MISC3_SHIFT 24 |
1360 | #if defined(__BIG_ENDIAN) |
1361 | u16 r2tq_prod; |
1362 | u16 sq_prod; |
1363 | #elif defined(__LITTLE_ENDIAN) |
1364 | u16 sq_prod; |
1365 | u16 r2tq_prod; |
1366 | #endif |
1367 | #if defined(__BIG_ENDIAN) |
1368 | u8 agg_val3; |
1369 | u8 agg_val6; |
1370 | u8 agg_val5_th; |
1371 | u8 agg_val5; |
1372 | #elif defined(__LITTLE_ENDIAN) |
1373 | u8 agg_val5; |
1374 | u8 agg_val5_th; |
1375 | u8 agg_val6; |
1376 | u8 agg_val3; |
1377 | #endif |
1378 | #if defined(__BIG_ENDIAN) |
1379 | u16 __agg_misc1; |
1380 | u16 agg_limit1; |
1381 | #elif defined(__LITTLE_ENDIAN) |
1382 | u16 agg_limit1; |
1383 | u16 __agg_misc1; |
1384 | #endif |
1385 | u32 hq_cons_tcp_seq; |
1386 | u32 exp_stat_sn; |
1387 | u32 agg_misc5; |
1388 | }; |
1389 | |
1390 | /* |
1391 | * The tcp aggregative context section of Tstorm |
1392 | */ |
1393 | struct tstorm_tcp_tcp_ag_context_section { |
1394 | u32 __agg_val1; |
1395 | #if defined(__BIG_ENDIAN) |
1396 | u8 __tcp_agg_vars2; |
1397 | u8 __agg_val3; |
1398 | u16 __agg_val2; |
1399 | #elif defined(__LITTLE_ENDIAN) |
1400 | u16 __agg_val2; |
1401 | u8 __agg_val3; |
1402 | u8 __tcp_agg_vars2; |
1403 | #endif |
1404 | #if defined(__BIG_ENDIAN) |
1405 | u16 __agg_val5; |
1406 | u8 __agg_val6; |
1407 | u8 __tcp_agg_vars3; |
1408 | #elif defined(__LITTLE_ENDIAN) |
1409 | u8 __tcp_agg_vars3; |
1410 | u8 __agg_val6; |
1411 | u16 __agg_val5; |
1412 | #endif |
1413 | u32 snd_nxt; |
1414 | u32 rtt_seq; |
1415 | u32 rtt_time; |
1416 | u32 __reserved66; |
1417 | u32 wnd_right_edge; |
1418 | u32 tcp_agg_vars1; |
1419 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<0) |
1420 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 0 |
1421 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG (0x1<<1) |
1422 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_LAST_PACKET_FIN_FLAG_SHIFT 1 |
1423 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF (0x3<<2) |
1424 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_SHIFT 2 |
1425 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF (0x3<<4) |
1426 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_SHIFT 4 |
1427 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN (0x1<<6) |
1428 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_WND_UPD_CF_EN_SHIFT 6 |
1429 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN (0x1<<7) |
1430 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TIMEOUT_CF_EN_SHIFT 7 |
1431 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN (0x1<<8) |
1432 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_SEQ_EN_SHIFT 8 |
1433 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN (0x1<<9) |
1434 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_SND_NXT_EN_SHIFT 9 |
1435 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG (0x1<<10) |
1436 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_FLAG_SHIFT 10 |
1437 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG (0x1<<11) |
1438 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_FLAG_SHIFT 11 |
1439 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN (0x1<<12) |
1440 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_EN_SHIFT 12 |
1441 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN (0x1<<13) |
1442 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_EN_SHIFT 13 |
1443 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF (0x3<<14) |
1444 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX1_CF_SHIFT 14 |
1445 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF (0x3<<16) |
1446 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX2_CF_SHIFT 16 |
1447 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED (0x1<<18) |
1448 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_TX_BLOCKED_SHIFT 18 |
1449 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN (0x1<<19) |
1450 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX10_CF_EN_SHIFT 19 |
1451 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN (0x1<<20) |
1452 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX11_CF_EN_SHIFT 20 |
1453 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN (0x1<<21) |
1454 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_AUX12_CF_EN_SHIFT 21 |
1455 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1 (0x3<<22) |
1456 | #define __TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RESERVED1_SHIFT 22 |
1457 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ (0xF<<24) |
1458 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_PEND_SEQ_SHIFT 24 |
1459 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ (0xF<<28) |
1460 | #define TSTORM_TCP_TCP_AG_CONTEXT_SECTION_RETRANSMIT_DONE_SEQ_SHIFT 28 |
1461 | u32 snd_max; |
1462 | u32 snd_una; |
1463 | u32 __reserved2; |
1464 | }; |
1465 | |
1466 | /* |
1467 | * The iscsi aggregative context of Tstorm |
1468 | */ |
1469 | struct tstorm_iscsi_ag_context { |
1470 | #if defined(__BIG_ENDIAN) |
1471 | u16 ulp_credit; |
1472 | u8 agg_vars1; |
1473 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1474 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1475 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1476 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1477 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1478 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1479 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1480 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1481 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_CF (0x3<<4) |
1482 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_SHIFT 4 |
1483 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) |
1484 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 |
1485 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_FLAG (0x1<<7) |
1486 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_FLAG_SHIFT 7 |
1487 | u8 state; |
1488 | #elif defined(__LITTLE_ENDIAN) |
1489 | u8 state; |
1490 | u8 agg_vars1; |
1491 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1492 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1493 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1494 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1495 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1496 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1497 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1498 | #define TSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1499 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_CF (0x3<<4) |
1500 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_SHIFT 4 |
1501 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG (0x1<<6) |
1502 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX3_FLAG_SHIFT 6 |
1503 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_FLAG (0x1<<7) |
1504 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_FLAG_SHIFT 7 |
1505 | u16 ulp_credit; |
1506 | #endif |
1507 | #if defined(__BIG_ENDIAN) |
1508 | u16 __agg_val4; |
1509 | u16 agg_vars2; |
1510 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_FLAG (0x1<<0) |
1511 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_FLAG_SHIFT 0 |
1512 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_FLAG (0x1<<1) |
1513 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_FLAG_SHIFT 1 |
1514 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<2) |
1515 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 2 |
1516 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_CF (0x3<<4) |
1517 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_SHIFT 4 |
1518 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) |
1519 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 |
1520 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) |
1521 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 |
1522 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) |
1523 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 |
1524 | #define TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<11) |
1525 | #define TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 11 |
1526 | #define TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<12) |
1527 | #define TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 |
1528 | #define TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_EN (0x1<<13) |
1529 | #define TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 |
1530 | #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) |
1531 | #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 |
1532 | #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) |
1533 | #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 |
1534 | #elif defined(__LITTLE_ENDIAN) |
1535 | u16 agg_vars2; |
1536 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_FLAG (0x1<<0) |
1537 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_FLAG_SHIFT 0 |
1538 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_FLAG (0x1<<1) |
1539 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_FLAG_SHIFT 1 |
1540 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_CF (0x3<<2) |
1541 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_SHIFT 2 |
1542 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_CF (0x3<<4) |
1543 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_SHIFT 4 |
1544 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF (0x3<<6) |
1545 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_SHIFT 6 |
1546 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF (0x3<<8) |
1547 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_SHIFT 8 |
1548 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG (0x1<<10) |
1549 | #define __TSTORM_ISCSI_AG_CONTEXT_AUX7_FLAG_SHIFT 10 |
1550 | #define TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<11) |
1551 | #define TSTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 11 |
1552 | #define TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN (0x1<<12) |
1553 | #define TSTORM_ISCSI_AG_CONTEXT_AUX4_CF_EN_SHIFT 12 |
1554 | #define TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_EN (0x1<<13) |
1555 | #define TSTORM_ISCSI_AG_CONTEXT_AUX5_CF_EN_SHIFT 13 |
1556 | #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN (0x1<<14) |
1557 | #define TSTORM_ISCSI_AG_CONTEXT_AUX6_CF_EN_SHIFT 14 |
1558 | #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN (0x1<<15) |
1559 | #define TSTORM_ISCSI_AG_CONTEXT_AUX7_CF_EN_SHIFT 15 |
1560 | u16 __agg_val4; |
1561 | #endif |
1562 | struct tstorm_tcp_tcp_ag_context_section tcp; |
1563 | }; |
1564 | |
1565 | /* |
1566 | * The iscsi aggregative context of Cstorm |
1567 | */ |
1568 | struct cstorm_iscsi_ag_context { |
1569 | u32 agg_vars1; |
1570 | #define CSTORM_ISCSI_AG_CONTEXT_STATE (0xFF<<0) |
1571 | #define CSTORM_ISCSI_AG_CONTEXT_STATE_SHIFT 0 |
1572 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<8) |
1573 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 8 |
1574 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<9) |
1575 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 9 |
1576 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<10) |
1577 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 10 |
1578 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<11) |
1579 | #define __CSTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 11 |
1580 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN (0x1<<12) |
1581 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_SE_CF_EN_SHIFT 12 |
1582 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN (0x1<<13) |
1583 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED_ULP_RX_INV_CF_EN_SHIFT 13 |
1584 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF (0x3<<14) |
1585 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_SHIFT 14 |
1586 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66 (0x3<<16) |
1587 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED66_SHIFT 16 |
1588 | #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN (0x1<<18) |
1589 | #define __CSTORM_ISCSI_AG_CONTEXT_FIN_RECEIVED_CF_EN_SHIFT 18 |
1590 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN (0x1<<19) |
1591 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION0_CF_EN_SHIFT 19 |
1592 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN (0x1<<20) |
1593 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION1_CF_EN_SHIFT 20 |
1594 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN (0x1<<21) |
1595 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION2_CF_EN_SHIFT 21 |
1596 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN (0x1<<22) |
1597 | #define __CSTORM_ISCSI_AG_CONTEXT_PENDING_COMPLETION3_CF_EN_SHIFT 22 |
1598 | #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE (0x7<<23) |
1599 | #define __CSTORM_ISCSI_AG_CONTEXT_REL_SEQ_RULE_SHIFT 23 |
1600 | #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE (0x3<<26) |
1601 | #define CSTORM_ISCSI_AG_CONTEXT_HQ_PROD_RULE_SHIFT 26 |
1602 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52 (0x3<<28) |
1603 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED52_SHIFT 28 |
1604 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53 (0x3<<30) |
1605 | #define __CSTORM_ISCSI_AG_CONTEXT_RESERVED53_SHIFT 30 |
1606 | #if defined(__BIG_ENDIAN) |
1607 | u8 __aux1_th; |
1608 | u8 __aux1_val; |
1609 | u16 __agg_vars2; |
1610 | #elif defined(__LITTLE_ENDIAN) |
1611 | u16 __agg_vars2; |
1612 | u8 __aux1_val; |
1613 | u8 __aux1_th; |
1614 | #endif |
1615 | u32 rel_seq; |
1616 | u32 rel_seq_th; |
1617 | #if defined(__BIG_ENDIAN) |
1618 | u16 hq_cons; |
1619 | u16 hq_prod; |
1620 | #elif defined(__LITTLE_ENDIAN) |
1621 | u16 hq_prod; |
1622 | u16 hq_cons; |
1623 | #endif |
1624 | #if defined(__BIG_ENDIAN) |
1625 | u8 __reserved62; |
1626 | u8 __reserved61; |
1627 | u8 __reserved60; |
1628 | u8 __reserved59; |
1629 | #elif defined(__LITTLE_ENDIAN) |
1630 | u8 __reserved59; |
1631 | u8 __reserved60; |
1632 | u8 __reserved61; |
1633 | u8 __reserved62; |
1634 | #endif |
1635 | #if defined(__BIG_ENDIAN) |
1636 | u16 __reserved64; |
1637 | u16 __cq_u_prod0; |
1638 | #elif defined(__LITTLE_ENDIAN) |
1639 | u16 __cq_u_prod0; |
1640 | u16 __reserved64; |
1641 | #endif |
1642 | u32 __cq_u_prod1; |
1643 | #if defined(__BIG_ENDIAN) |
1644 | u16 __agg_vars3; |
1645 | u16 __cq_u_prod2; |
1646 | #elif defined(__LITTLE_ENDIAN) |
1647 | u16 __cq_u_prod2; |
1648 | u16 __agg_vars3; |
1649 | #endif |
1650 | #if defined(__BIG_ENDIAN) |
1651 | u16 __aux2_th; |
1652 | u16 __cq_u_prod3; |
1653 | #elif defined(__LITTLE_ENDIAN) |
1654 | u16 __cq_u_prod3; |
1655 | u16 __aux2_th; |
1656 | #endif |
1657 | }; |
1658 | |
1659 | /* |
1660 | * The iscsi aggregative context of Ustorm |
1661 | */ |
1662 | struct ustorm_iscsi_ag_context { |
1663 | #if defined(__BIG_ENDIAN) |
1664 | u8 __aux_counter_flags; |
1665 | u8 agg_vars2; |
1666 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) |
1667 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 |
1668 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) |
1669 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 |
1670 | #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) |
1671 | #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 |
1672 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) |
1673 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 |
1674 | u8 agg_vars1; |
1675 | #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1676 | #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1677 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1678 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1679 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1680 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1681 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1682 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1683 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) |
1684 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 |
1685 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) |
1686 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 |
1687 | u8 state; |
1688 | #elif defined(__LITTLE_ENDIAN) |
1689 | u8 state; |
1690 | u8 agg_vars1; |
1691 | #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0 (0x1<<0) |
1692 | #define __USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM0_SHIFT 0 |
1693 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1 (0x1<<1) |
1694 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM1_SHIFT 1 |
1695 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2 (0x1<<2) |
1696 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM2_SHIFT 2 |
1697 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3 (0x1<<3) |
1698 | #define USTORM_ISCSI_AG_CONTEXT_EXISTS_IN_QM3_SHIFT 3 |
1699 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF (0x3<<4) |
1700 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_SHIFT 4 |
1701 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF (0x3<<6) |
1702 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_SHIFT 6 |
1703 | u8 agg_vars2; |
1704 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF (0x3<<0) |
1705 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_SHIFT 0 |
1706 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF (0x3<<2) |
1707 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_SHIFT 2 |
1708 | #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE (0x7<<4) |
1709 | #define USTORM_ISCSI_AG_CONTEXT_AGG_MISC4_RULE_SHIFT 4 |
1710 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK (0x1<<7) |
1711 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_MASK_SHIFT 7 |
1712 | u8 __aux_counter_flags; |
1713 | #endif |
1714 | #if defined(__BIG_ENDIAN) |
1715 | u8 cdu_usage; |
1716 | u8 agg_misc2; |
1717 | u16 __cq_local_comp_itt_val; |
1718 | #elif defined(__LITTLE_ENDIAN) |
1719 | u16 __cq_local_comp_itt_val; |
1720 | u8 agg_misc2; |
1721 | u8 cdu_usage; |
1722 | #endif |
1723 | u32 agg_misc4; |
1724 | #if defined(__BIG_ENDIAN) |
1725 | u8 agg_val3_th; |
1726 | u8 agg_val3; |
1727 | u16 agg_misc3; |
1728 | #elif defined(__LITTLE_ENDIAN) |
1729 | u16 agg_misc3; |
1730 | u8 agg_val3; |
1731 | u8 agg_val3_th; |
1732 | #endif |
1733 | u32 agg_val1; |
1734 | u32 agg_misc4_th; |
1735 | #if defined(__BIG_ENDIAN) |
1736 | u16 agg_val2_th; |
1737 | u16 agg_val2; |
1738 | #elif defined(__LITTLE_ENDIAN) |
1739 | u16 agg_val2; |
1740 | u16 agg_val2_th; |
1741 | #endif |
1742 | #if defined(__BIG_ENDIAN) |
1743 | u16 __reserved2; |
1744 | u8 decision_rules; |
1745 | #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) |
1746 | #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 |
1747 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) |
1748 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 |
1749 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) |
1750 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 |
1751 | #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) |
1752 | #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 |
1753 | u8 decision_rule_enable_bits; |
1754 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) |
1755 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 |
1756 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) |
1757 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 |
1758 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) |
1759 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 |
1760 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) |
1761 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 |
1762 | #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) |
1763 | #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 |
1764 | #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) |
1765 | #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 |
1766 | #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) |
1767 | #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 |
1768 | #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) |
1769 | #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 |
1770 | #elif defined(__LITTLE_ENDIAN) |
1771 | u8 decision_rule_enable_bits; |
1772 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN (0x1<<0) |
1773 | #define USTORM_ISCSI_AG_CONTEXT_INV_CF_EN_SHIFT 0 |
1774 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN (0x1<<1) |
1775 | #define USTORM_ISCSI_AG_CONTEXT_COMPLETION_CF_EN_SHIFT 1 |
1776 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN (0x1<<2) |
1777 | #define USTORM_ISCSI_AG_CONTEXT_TX_CF_EN_SHIFT 2 |
1778 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN (0x1<<3) |
1779 | #define __USTORM_ISCSI_AG_CONTEXT_TIMER_CF_EN_SHIFT 3 |
1780 | #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN (0x1<<4) |
1781 | #define __USTORM_ISCSI_AG_CONTEXT_CQ_LOCAL_COMP_CF_EN_SHIFT 4 |
1782 | #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN (0x1<<5) |
1783 | #define __USTORM_ISCSI_AG_CONTEXT_QUEUES_FLUSH_Q0_CF_EN_SHIFT 5 |
1784 | #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN (0x1<<6) |
1785 | #define __USTORM_ISCSI_AG_CONTEXT_AUX3_CF_EN_SHIFT 6 |
1786 | #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN (0x1<<7) |
1787 | #define __USTORM_ISCSI_AG_CONTEXT_DQ_CF_EN_SHIFT 7 |
1788 | u8 decision_rules; |
1789 | #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE (0x7<<0) |
1790 | #define USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_RULE_SHIFT 0 |
1791 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE (0x7<<3) |
1792 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL3_RULE_SHIFT 3 |
1793 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG (0x1<<6) |
1794 | #define __USTORM_ISCSI_AG_CONTEXT_AGG_VAL2_ARM_N_FLAG_SHIFT 6 |
1795 | #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1 (0x1<<7) |
1796 | #define __USTORM_ISCSI_AG_CONTEXT_RESERVED1_SHIFT 7 |
1797 | u16 __reserved2; |
1798 | #endif |
1799 | }; |
1800 | |
1801 | /* |
1802 | * Timers connection context |
1803 | */ |
1804 | struct iscsi_timers_block_context { |
1805 | u32 __reserved_0; |
1806 | u32 __reserved_1; |
1807 | u32 __reserved_2; |
1808 | u32 flags; |
1809 | #define __ISCSI_TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS (0x3<<0) |
1810 | #define __ISCSI_TIMERS_BLOCK_CONTEXT_NUM_OF_ACTIVE_TIMERS_SHIFT 0 |
1811 | #define ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG (0x1<<2) |
1812 | #define ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG_SHIFT 2 |
1813 | #define __ISCSI_TIMERS_BLOCK_CONTEXT_RESERVED0 (0x1FFFFFFF<<3) |
1814 | #define __ISCSI_TIMERS_BLOCK_CONTEXT_RESERVED0_SHIFT 3 |
1815 | }; |
1816 | |
1817 | /* |
1818 | * Ethernet context section, shared in TOE, RDMA and ISCSI |
1819 | */ |
1820 | struct xstorm_eth_context_section { |
1821 | #if defined(__BIG_ENDIAN) |
1822 | u8 remote_addr_4; |
1823 | u8 remote_addr_5; |
1824 | u8 local_addr_0; |
1825 | u8 local_addr_1; |
1826 | #elif defined(__LITTLE_ENDIAN) |
1827 | u8 local_addr_1; |
1828 | u8 local_addr_0; |
1829 | u8 remote_addr_5; |
1830 | u8 remote_addr_4; |
1831 | #endif |
1832 | #if defined(__BIG_ENDIAN) |
1833 | u8 remote_addr_0; |
1834 | u8 remote_addr_1; |
1835 | u8 remote_addr_2; |
1836 | u8 remote_addr_3; |
1837 | #elif defined(__LITTLE_ENDIAN) |
1838 | u8 remote_addr_3; |
1839 | u8 remote_addr_2; |
1840 | u8 remote_addr_1; |
1841 | u8 remote_addr_0; |
1842 | #endif |
1843 | #if defined(__BIG_ENDIAN) |
1844 | u16 reserved_vlan_type; |
1845 | u16 params; |
1846 | #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) |
1847 | #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 |
1848 | #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12) |
1849 | #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12 |
1850 | #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) |
1851 | #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 |
1852 | #elif defined(__LITTLE_ENDIAN) |
1853 | u16 params; |
1854 | #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID (0xFFF<<0) |
1855 | #define XSTORM_ETH_CONTEXT_SECTION_VLAN_ID_SHIFT 0 |
1856 | #define XSTORM_ETH_CONTEXT_SECTION_CFI (0x1<<12) |
1857 | #define XSTORM_ETH_CONTEXT_SECTION_CFI_SHIFT 12 |
1858 | #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY (0x7<<13) |
1859 | #define XSTORM_ETH_CONTEXT_SECTION_PRIORITY_SHIFT 13 |
1860 | u16 reserved_vlan_type; |
1861 | #endif |
1862 | #if defined(__BIG_ENDIAN) |
1863 | u8 local_addr_2; |
1864 | u8 local_addr_3; |
1865 | u8 local_addr_4; |
1866 | u8 local_addr_5; |
1867 | #elif defined(__LITTLE_ENDIAN) |
1868 | u8 local_addr_5; |
1869 | u8 local_addr_4; |
1870 | u8 local_addr_3; |
1871 | u8 local_addr_2; |
1872 | #endif |
1873 | }; |
1874 | |
1875 | /* |
1876 | * IpV4 context section, shared in TOE, RDMA and ISCSI |
1877 | */ |
1878 | struct xstorm_ip_v4_context_section { |
1879 | #if defined(__BIG_ENDIAN) |
1880 | u16 __pbf_hdr_cmd_rsvd_id; |
1881 | u16 __pbf_hdr_cmd_rsvd_flags_offset; |
1882 | #elif defined(__LITTLE_ENDIAN) |
1883 | u16 __pbf_hdr_cmd_rsvd_flags_offset; |
1884 | u16 __pbf_hdr_cmd_rsvd_id; |
1885 | #endif |
1886 | #if defined(__BIG_ENDIAN) |
1887 | u8 __pbf_hdr_cmd_rsvd_ver_ihl; |
1888 | u8 tos; |
1889 | u16 __pbf_hdr_cmd_rsvd_length; |
1890 | #elif defined(__LITTLE_ENDIAN) |
1891 | u16 __pbf_hdr_cmd_rsvd_length; |
1892 | u8 tos; |
1893 | u8 __pbf_hdr_cmd_rsvd_ver_ihl; |
1894 | #endif |
1895 | u32 ip_local_addr; |
1896 | #if defined(__BIG_ENDIAN) |
1897 | u8 ttl; |
1898 | u8 __pbf_hdr_cmd_rsvd_protocol; |
1899 | u16 __pbf_hdr_cmd_rsvd_csum; |
1900 | #elif defined(__LITTLE_ENDIAN) |
1901 | u16 __pbf_hdr_cmd_rsvd_csum; |
1902 | u8 __pbf_hdr_cmd_rsvd_protocol; |
1903 | u8 ttl; |
1904 | #endif |
1905 | u32 __pbf_hdr_cmd_rsvd_1; |
1906 | u32 ip_remote_addr; |
1907 | }; |
1908 | |
1909 | /* |
1910 | * context section, shared in TOE, RDMA and ISCSI |
1911 | */ |
1912 | struct xstorm_padded_ip_v4_context_section { |
1913 | struct xstorm_ip_v4_context_section ip_v4; |
1914 | u32 reserved1[4]; |
1915 | }; |
1916 | |
1917 | /* |
1918 | * IpV6 context section, shared in TOE, RDMA and ISCSI |
1919 | */ |
1920 | struct xstorm_ip_v6_context_section { |
1921 | #if defined(__BIG_ENDIAN) |
1922 | u16 pbf_hdr_cmd_rsvd_payload_len; |
1923 | u8 pbf_hdr_cmd_rsvd_nxt_hdr; |
1924 | u8 hop_limit; |
1925 | #elif defined(__LITTLE_ENDIAN) |
1926 | u8 hop_limit; |
1927 | u8 pbf_hdr_cmd_rsvd_nxt_hdr; |
1928 | u16 pbf_hdr_cmd_rsvd_payload_len; |
1929 | #endif |
1930 | u32 priority_flow_label; |
1931 | #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL (0xFFFFF<<0) |
1932 | #define XSTORM_IP_V6_CONTEXT_SECTION_FLOW_LABEL_SHIFT 0 |
1933 | #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS (0xFF<<20) |
1934 | #define XSTORM_IP_V6_CONTEXT_SECTION_TRAFFIC_CLASS_SHIFT 20 |
1935 | #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER (0xF<<28) |
1936 | #define XSTORM_IP_V6_CONTEXT_SECTION_PBF_HDR_CMD_RSVD_VER_SHIFT 28 |
1937 | u32 ip_local_addr_lo_hi; |
1938 | u32 ip_local_addr_lo_lo; |
1939 | u32 ip_local_addr_hi_hi; |
1940 | u32 ip_local_addr_hi_lo; |
1941 | u32 ip_remote_addr_lo_hi; |
1942 | u32 ip_remote_addr_lo_lo; |
1943 | u32 ip_remote_addr_hi_hi; |
1944 | u32 ip_remote_addr_hi_lo; |
1945 | }; |
1946 | |
1947 | union xstorm_ip_context_section_types { |
1948 | struct xstorm_padded_ip_v4_context_section padded_ip_v4; |
1949 | struct xstorm_ip_v6_context_section ip_v6; |
1950 | }; |
1951 | |
1952 | /* |
1953 | * TCP context section, shared in TOE, RDMA and ISCSI |
1954 | */ |
1955 | struct xstorm_tcp_context_section { |
1956 | u32 snd_max; |
1957 | #if defined(__BIG_ENDIAN) |
1958 | u16 remote_port; |
1959 | u16 local_port; |
1960 | #elif defined(__LITTLE_ENDIAN) |
1961 | u16 local_port; |
1962 | u16 remote_port; |
1963 | #endif |
1964 | #if defined(__BIG_ENDIAN) |
1965 | u8 original_nagle_1b; |
1966 | u8 ts_enabled_1b; |
1967 | u16 tcp_params; |
1968 | #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0) |
1969 | #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0 |
1970 | #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8) |
1971 | #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8 |
1972 | #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9) |
1973 | #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9 |
1974 | #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10) |
1975 | #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10 |
1976 | #define XSTORM_TCP_CONTEXT_SECTION_KA_STATE (0x1<<11) |
1977 | #define XSTORM_TCP_CONTEXT_SECTION_KA_STATE_SHIFT 11 |
1978 | #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12) |
1979 | #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12 |
1980 | #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13) |
1981 | #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13 |
1982 | #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14) |
1983 | #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14 |
1984 | #elif defined(__LITTLE_ENDIAN) |
1985 | u16 tcp_params; |
1986 | #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE (0xFF<<0) |
1987 | #define XSTORM_TCP_CONTEXT_SECTION_TOTAL_HEADER_SIZE_SHIFT 0 |
1988 | #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT (0x1<<8) |
1989 | #define __XSTORM_TCP_CONTEXT_SECTION_ECT_BIT_SHIFT 8 |
1990 | #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED (0x1<<9) |
1991 | #define __XSTORM_TCP_CONTEXT_SECTION_ECN_ENABLED_SHIFT 9 |
1992 | #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED (0x1<<10) |
1993 | #define XSTORM_TCP_CONTEXT_SECTION_SACK_ENABLED_SHIFT 10 |
1994 | #define XSTORM_TCP_CONTEXT_SECTION_KA_STATE (0x1<<11) |
1995 | #define XSTORM_TCP_CONTEXT_SECTION_KA_STATE_SHIFT 11 |
1996 | #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG (0x1<<12) |
1997 | #define XSTORM_TCP_CONTEXT_SECTION_FIN_SENT_FLAG_SHIFT 12 |
1998 | #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED (0x1<<13) |
1999 | #define XSTORM_TCP_CONTEXT_SECTION_WINDOW_SATURATED_SHIFT 13 |
2000 | #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER (0x3<<14) |
2001 | #define XSTORM_TCP_CONTEXT_SECTION_SLOWPATH_QUEUES_FLUSH_COUNTER_SHIFT 14 |
2002 | u8 ts_enabled_1b; |
2003 | u8 original_nagle_1b; |
2004 | #endif |
2005 | #if defined(__BIG_ENDIAN) |
2006 | u16 pseudo_csum; |
2007 | u16 window_scaling_factor; |
2008 | #elif defined(__LITTLE_ENDIAN) |
2009 | u16 window_scaling_factor; |
2010 | u16 pseudo_csum; |
2011 | #endif |
2012 | u32 reserved2; |
2013 | u32 ts_time_diff; |
2014 | u32 __next_timer_expir; |
2015 | }; |
2016 | |
2017 | /* |
2018 | * Common context section, shared in TOE, RDMA and ISCSI |
2019 | */ |
2020 | struct xstorm_common_context_section { |
2021 | struct xstorm_eth_context_section ethernet; |
2022 | union xstorm_ip_context_section_types ip_union; |
2023 | struct xstorm_tcp_context_section tcp; |
2024 | #if defined(__BIG_ENDIAN) |
2025 | u16 reserved; |
2026 | u8 statistics_params; |
2027 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) |
2028 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 |
2029 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) |
2030 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 |
2031 | #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2) |
2032 | #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2 |
2033 | #define XSTORM_COMMON_CONTEXT_SECTION_RESERVED0 (0x1<<7) |
2034 | #define XSTORM_COMMON_CONTEXT_SECTION_RESERVED0_SHIFT 7 |
2035 | u8 ip_version_1b; |
2036 | #elif defined(__LITTLE_ENDIAN) |
2037 | u8 ip_version_1b; |
2038 | u8 statistics_params; |
2039 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS (0x1<<0) |
2040 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L2_STATSTICS_SHIFT 0 |
2041 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS (0x1<<1) |
2042 | #define XSTORM_COMMON_CONTEXT_SECTION_UPDATE_L4_STATSTICS_SHIFT 1 |
2043 | #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID (0x1F<<2) |
2044 | #define XSTORM_COMMON_CONTEXT_SECTION_STATISTICS_COUNTER_ID_SHIFT 2 |
2045 | #define XSTORM_COMMON_CONTEXT_SECTION_RESERVED0 (0x1<<7) |
2046 | #define XSTORM_COMMON_CONTEXT_SECTION_RESERVED0_SHIFT 7 |
2047 | u16 reserved; |
2048 | #endif |
2049 | }; |
2050 | |
2051 | /* |
2052 | * Flags used in ISCSI context section |
2053 | */ |
2054 | struct xstorm_iscsi_context_flags { |
2055 | u8 flags; |
2056 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA (0x1<<0) |
2057 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA_SHIFT 0 |
2058 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T (0x1<<1) |
2059 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T_SHIFT 1 |
2060 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST (0x1<<2) |
2061 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_HEADER_DIGEST_SHIFT 2 |
2062 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST (0x1<<3) |
2063 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_EN_DATA_DIGEST_SHIFT 3 |
2064 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN (0x1<<4) |
2065 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_HQ_BD_WRITTEN_SHIFT 4 |
2066 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ (0x1<<5) |
2067 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_LAST_OP_SQ_SHIFT 5 |
2068 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT (0x1<<6) |
2069 | #define XSTORM_ISCSI_CONTEXT_FLAGS_B_UPDATE_SND_NXT_SHIFT 6 |
2070 | #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4 (0x1<<7) |
2071 | #define XSTORM_ISCSI_CONTEXT_FLAGS_RESERVED4_SHIFT 7 |
2072 | }; |
2073 | |
2074 | struct iscsi_task_context_entry_x { |
2075 | u32 data_out_buffer_offset; |
2076 | u32 itt; |
2077 | u32 data_sn; |
2078 | }; |
2079 | |
2080 | struct iscsi_task_context_entry_xuc_x_write_only { |
2081 | u32 tx_r2t_sn; |
2082 | }; |
2083 | |
2084 | struct iscsi_task_context_entry_xuc_xu_write_both { |
2085 | u32 sgl_base_lo; |
2086 | u32 sgl_base_hi; |
2087 | #if defined(__BIG_ENDIAN) |
2088 | u8 sgl_size; |
2089 | u8 sge_index; |
2090 | u16 sge_offset; |
2091 | #elif defined(__LITTLE_ENDIAN) |
2092 | u16 sge_offset; |
2093 | u8 sge_index; |
2094 | u8 sgl_size; |
2095 | #endif |
2096 | }; |
2097 | |
2098 | /* |
2099 | * iSCSI context section |
2100 | */ |
2101 | struct xstorm_iscsi_context_section { |
2102 | u32 first_burst_length; |
2103 | u32 max_send_pdu_length; |
2104 | struct regpair sq_pbl_base; |
2105 | struct regpair sq_curr_pbe; |
2106 | struct regpair hq_pbl_base; |
2107 | struct regpair hq_curr_pbe_base; |
2108 | struct regpair r2tq_pbl_base; |
2109 | struct regpair r2tq_curr_pbe_base; |
2110 | struct regpair task_pbl_base; |
2111 | #if defined(__BIG_ENDIAN) |
2112 | u16 data_out_count; |
2113 | struct xstorm_iscsi_context_flags flags; |
2114 | u8 task_pbl_cache_idx; |
2115 | #elif defined(__LITTLE_ENDIAN) |
2116 | u8 task_pbl_cache_idx; |
2117 | struct xstorm_iscsi_context_flags flags; |
2118 | u16 data_out_count; |
2119 | #endif |
2120 | u32 seq_more_2_send; |
2121 | u32 pdu_more_2_send; |
2122 | struct iscsi_task_context_entry_x temp_tce_x; |
2123 | struct iscsi_task_context_entry_xuc_x_write_only temp_tce_x_wr; |
2124 | struct iscsi_task_context_entry_xuc_xu_write_both temp_tce_xu_wr; |
2125 | struct regpair lun; |
2126 | u32 exp_data_transfer_len_ttt; |
2127 | u32 pdu_data_2_rxmit; |
2128 | u32 rxmit_bytes_2_dr; |
2129 | #if defined(__BIG_ENDIAN) |
2130 | u16 rxmit_sge_offset; |
2131 | u16 hq_rxmit_cons; |
2132 | #elif defined(__LITTLE_ENDIAN) |
2133 | u16 hq_rxmit_cons; |
2134 | u16 rxmit_sge_offset; |
2135 | #endif |
2136 | #if defined(__BIG_ENDIAN) |
2137 | u16 r2tq_cons; |
2138 | u8 rxmit_flags; |
2139 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0) |
2140 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0 |
2141 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1) |
2142 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1 |
2143 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2) |
2144 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2 |
2145 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3) |
2146 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3 |
2147 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4) |
2148 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4 |
2149 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5) |
2150 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5 |
2151 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7) |
2152 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7 |
2153 | u8 rxmit_sge_idx; |
2154 | #elif defined(__LITTLE_ENDIAN) |
2155 | u8 rxmit_sge_idx; |
2156 | u8 rxmit_flags; |
2157 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD (0x1<<0) |
2158 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_NEW_HQ_BD_SHIFT 0 |
2159 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR (0x1<<1) |
2160 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PDU_HDR_SHIFT 1 |
2161 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU (0x1<<2) |
2162 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_END_PDU_SHIFT 2 |
2163 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR (0x1<<3) |
2164 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_DR_SHIFT 3 |
2165 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR (0x1<<4) |
2166 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_START_DR_SHIFT 4 |
2167 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING (0x3<<5) |
2168 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_RXMIT_PADDING_SHIFT 5 |
2169 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT (0x1<<7) |
2170 | #define XSTORM_ISCSI_CONTEXT_SECTION_B_ISCSI_CONT_FAST_RXMIT_SHIFT 7 |
2171 | u16 r2tq_cons; |
2172 | #endif |
2173 | u32 hq_rxmit_tcp_seq; |
2174 | }; |
2175 | |
2176 | /* |
2177 | * Xstorm iSCSI Storm Context |
2178 | */ |
2179 | struct xstorm_iscsi_st_context { |
2180 | struct xstorm_common_context_section common; |
2181 | struct xstorm_iscsi_context_section iscsi; |
2182 | }; |
2183 | |
2184 | /* |
2185 | * CQ DB CQ producer and pending completion counter |
2186 | */ |
2187 | struct iscsi_cq_db_prod_pnd_cmpltn_cnt { |
2188 | #if defined(__BIG_ENDIAN) |
2189 | u16 cntr; |
2190 | u16 prod; |
2191 | #elif defined(__LITTLE_ENDIAN) |
2192 | u16 prod; |
2193 | u16 cntr; |
2194 | #endif |
2195 | }; |
2196 | |
2197 | /* |
2198 | * CQ DB pending completion ITT array |
2199 | */ |
2200 | struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr { |
2201 | struct iscsi_cq_db_prod_pnd_cmpltn_cnt prod_pend_comp[8]; |
2202 | }; |
2203 | |
2204 | /* |
2205 | * Cstorm CQ sequence to notify array, updated by driver |
2206 | */ |
2207 | struct iscsi_cq_db_sqn_2_notify_arr { |
2208 | u16 sqn[8]; |
2209 | }; |
2210 | |
2211 | /* |
2212 | * Cstorm iSCSI Storm Context |
2213 | */ |
2214 | struct cstorm_iscsi_st_context { |
2215 | struct iscsi_cq_db_prod_pnd_cmpltn_cnt_arr cq_c_prod_pend_comp_ctr_arr; |
2216 | struct iscsi_cq_db_sqn_2_notify_arr cq_c_prod_sqn_arr; |
2217 | struct iscsi_cq_db_sqn_2_notify_arr cq_c_sqn_2_notify_arr; |
2218 | struct regpair hq_pbl_base; |
2219 | struct regpair hq_curr_pbe; |
2220 | struct regpair task_pbl_base; |
2221 | struct regpair cq_db_base; |
2222 | #if defined(__BIG_ENDIAN) |
2223 | u16 hq_bd_itt; |
2224 | u16 iscsi_conn_id; |
2225 | #elif defined(__LITTLE_ENDIAN) |
2226 | u16 iscsi_conn_id; |
2227 | u16 hq_bd_itt; |
2228 | #endif |
2229 | u32 hq_bd_data_segment_len; |
2230 | u32 hq_bd_buffer_offset; |
2231 | #if defined(__BIG_ENDIAN) |
2232 | u8 timer_entry_idx; |
2233 | u8 cq_proc_en_bit_map; |
2234 | u8 cq_pend_comp_itt_valid_bit_map; |
2235 | u8 hq_bd_opcode; |
2236 | #elif defined(__LITTLE_ENDIAN) |
2237 | u8 hq_bd_opcode; |
2238 | u8 cq_pend_comp_itt_valid_bit_map; |
2239 | u8 cq_proc_en_bit_map; |
2240 | u8 timer_entry_idx; |
2241 | #endif |
2242 | u32 hq_tcp_seq; |
2243 | #if defined(__BIG_ENDIAN) |
2244 | u16 flags; |
2245 | #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) |
2246 | #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 |
2247 | #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) |
2248 | #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 |
2249 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) |
2250 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 |
2251 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) |
2252 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 |
2253 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) |
2254 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 |
2255 | #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) |
2256 | #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 |
2257 | u16 hq_cons; |
2258 | #elif defined(__LITTLE_ENDIAN) |
2259 | u16 hq_cons; |
2260 | u16 flags; |
2261 | #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN (0x1<<0) |
2262 | #define CSTORM_ISCSI_ST_CONTEXT_DATA_DIGEST_EN_SHIFT 0 |
2263 | #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN (0x1<<1) |
2264 | #define CSTORM_ISCSI_ST_CONTEXT_HDR_DIGEST_EN_SHIFT 1 |
2265 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID (0x1<<2) |
2266 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_CTXT_VALID_SHIFT 2 |
2267 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG (0x1<<3) |
2268 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_LCL_CMPLN_FLG_SHIFT 3 |
2269 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK (0x1<<4) |
2270 | #define CSTORM_ISCSI_ST_CONTEXT_HQ_BD_WRITE_TASK_SHIFT 4 |
2271 | #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV (0x7FF<<5) |
2272 | #define CSTORM_ISCSI_ST_CONTEXT_CTRL_FLAGS_RSRV_SHIFT 5 |
2273 | #endif |
2274 | struct regpair rsrv1; |
2275 | }; |
2276 | |
2277 | /* |
2278 | * Iscsi connection context |
2279 | */ |
2280 | struct iscsi_context { |
2281 | struct ustorm_iscsi_st_context ustorm_st_context; |
2282 | struct tstorm_iscsi_st_context tstorm_st_context; |
2283 | struct xstorm_iscsi_ag_context xstorm_ag_context; |
2284 | struct tstorm_iscsi_ag_context tstorm_ag_context; |
2285 | struct cstorm_iscsi_ag_context cstorm_ag_context; |
2286 | struct ustorm_iscsi_ag_context ustorm_ag_context; |
2287 | struct iscsi_timers_block_context timers_context; |
2288 | struct regpair upb_context; |
2289 | struct xstorm_iscsi_st_context xstorm_st_context; |
2290 | struct regpair xpb_context; |
2291 | struct cstorm_iscsi_st_context cstorm_st_context; |
2292 | }; |
2293 | |
2294 | /* |
2295 | * Buffer per connection, used in Tstorm |
2296 | */ |
2297 | struct iscsi_conn_buf { |
2298 | struct regpair reserved[8]; |
2299 | }; |
2300 | |
2301 | /* |
2302 | * ipv6 structure |
2303 | */ |
2304 | struct ip_v6_addr { |
2305 | u32 ip_addr_lo_lo; |
2306 | u32 ip_addr_lo_hi; |
2307 | u32 ip_addr_hi_lo; |
2308 | u32 ip_addr_hi_hi; |
2309 | }; |
2310 | |
2311 | /* |
2312 | * l5cm- connection identification params |
2313 | */ |
2314 | struct l5cm_conn_addr_params { |
2315 | u32 pmtu; |
2316 | #if defined(__BIG_ENDIAN) |
2317 | u8 remote_addr_3; |
2318 | u8 remote_addr_2; |
2319 | u8 remote_addr_1; |
2320 | u8 remote_addr_0; |
2321 | #elif defined(__LITTLE_ENDIAN) |
2322 | u8 remote_addr_0; |
2323 | u8 remote_addr_1; |
2324 | u8 remote_addr_2; |
2325 | u8 remote_addr_3; |
2326 | #endif |
2327 | #if defined(__BIG_ENDIAN) |
2328 | u16 params; |
2329 | #define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0) |
2330 | #define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 0 |
2331 | #define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1) |
2332 | #define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 1 |
2333 | u8 remote_addr_5; |
2334 | u8 remote_addr_4; |
2335 | #elif defined(__LITTLE_ENDIAN) |
2336 | u8 remote_addr_4; |
2337 | u8 remote_addr_5; |
2338 | u16 params; |
2339 | #define L5CM_CONN_ADDR_PARAMS_IP_VERSION (0x1<<0) |
2340 | #define L5CM_CONN_ADDR_PARAMS_IP_VERSION_SHIFT 0 |
2341 | #define L5CM_CONN_ADDR_PARAMS_RSRV (0x7FFF<<1) |
2342 | #define L5CM_CONN_ADDR_PARAMS_RSRV_SHIFT 1 |
2343 | #endif |
2344 | struct ip_v6_addr local_ip_addr; |
2345 | struct ip_v6_addr remote_ip_addr; |
2346 | u32 ipv6_flow_label_20b; |
2347 | u32 reserved1; |
2348 | #if defined(__BIG_ENDIAN) |
2349 | u16 remote_tcp_port; |
2350 | u16 local_tcp_port; |
2351 | #elif defined(__LITTLE_ENDIAN) |
2352 | u16 local_tcp_port; |
2353 | u16 remote_tcp_port; |
2354 | #endif |
2355 | }; |
2356 | |
2357 | /* |
2358 | * l5cm-xstorm connection buffer |
2359 | */ |
2360 | struct l5cm_xstorm_conn_buffer { |
2361 | #if defined(__BIG_ENDIAN) |
2362 | u16 rsrv1; |
2363 | u16 params; |
2364 | #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0) |
2365 | #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 0 |
2366 | #define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1) |
2367 | #define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 1 |
2368 | #elif defined(__LITTLE_ENDIAN) |
2369 | u16 params; |
2370 | #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE (0x1<<0) |
2371 | #define L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE_SHIFT 0 |
2372 | #define L5CM_XSTORM_CONN_BUFFER_RSRV (0x7FFF<<1) |
2373 | #define L5CM_XSTORM_CONN_BUFFER_RSRV_SHIFT 1 |
2374 | u16 rsrv1; |
2375 | #endif |
2376 | #if defined(__BIG_ENDIAN) |
2377 | u16 mss; |
2378 | u16 pseudo_header_checksum; |
2379 | #elif defined(__LITTLE_ENDIAN) |
2380 | u16 pseudo_header_checksum; |
2381 | u16 mss; |
2382 | #endif |
2383 | u32 rcv_buf; |
2384 | u32 rsrv2; |
2385 | struct regpair context_addr; |
2386 | }; |
2387 | |
2388 | /* |
2389 | * l5cm-tstorm connection buffer |
2390 | */ |
2391 | struct l5cm_tstorm_conn_buffer { |
2392 | u32 snd_buf; |
2393 | u32 rcv_buf; |
2394 | #if defined(__BIG_ENDIAN) |
2395 | u16 params; |
2396 | #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0) |
2397 | #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 0 |
2398 | #define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1) |
2399 | #define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 1 |
2400 | u8 ka_max_probe_count; |
2401 | u8 ka_enable; |
2402 | #elif defined(__LITTLE_ENDIAN) |
2403 | u8 ka_enable; |
2404 | u8 ka_max_probe_count; |
2405 | u16 params; |
2406 | #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE (0x1<<0) |
2407 | #define L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE_SHIFT 0 |
2408 | #define L5CM_TSTORM_CONN_BUFFER_RSRV (0x7FFF<<1) |
2409 | #define L5CM_TSTORM_CONN_BUFFER_RSRV_SHIFT 1 |
2410 | #endif |
2411 | u32 ka_timeout; |
2412 | u32 ka_interval; |
2413 | u32 max_rt_time; |
2414 | }; |
2415 | |
2416 | /* |
2417 | * l5cm connection buffer for active side |
2418 | */ |
2419 | struct l5cm_active_conn_buffer { |
2420 | struct l5cm_conn_addr_params conn_addr_buf; |
2421 | struct l5cm_xstorm_conn_buffer xstorm_conn_buffer; |
2422 | struct l5cm_tstorm_conn_buffer tstorm_conn_buffer; |
2423 | }; |
2424 | |
2425 | /* |
2426 | * l5cm slow path element |
2427 | */ |
2428 | struct l5cm_packet_size { |
2429 | u32 size; |
2430 | u32 rsrv; |
2431 | }; |
2432 | |
2433 | /* |
2434 | * l5cm connection parameters |
2435 | */ |
2436 | union l5cm_reduce_param_union { |
2437 | u32 passive_side_scramble_key; |
2438 | u32 pcs_id; |
2439 | }; |
2440 | |
2441 | /* |
2442 | * l5cm connection parameters |
2443 | */ |
2444 | struct l5cm_reduce_conn { |
2445 | union l5cm_reduce_param_union param; |
2446 | u32 isn; |
2447 | }; |
2448 | |
2449 | /* |
2450 | * l5cm slow path element |
2451 | */ |
2452 | union l5cm_specific_data { |
2453 | u8 protocol_data[8]; |
2454 | struct regpair phy_address; |
2455 | struct l5cm_packet_size packet_size; |
2456 | struct l5cm_reduce_conn reduced_conn; |
2457 | }; |
2458 | |
2459 | /* |
2460 | * l5 slow path element |
2461 | */ |
2462 | struct l5cm_spe { |
2463 | struct spe_hdr hdr; |
2464 | union l5cm_specific_data data; |
2465 | }; |
2466 | |
2467 | /* |
2468 | * Tstorm Tcp flags |
2469 | */ |
2470 | struct tstorm_l5cm_tcp_flags { |
2471 | u16 flags; |
2472 | #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID (0xFFF<<0) |
2473 | #define TSTORM_L5CM_TCP_FLAGS_VLAN_ID_SHIFT 0 |
2474 | #define TSTORM_L5CM_TCP_FLAGS_RSRV0 (0x1<<12) |
2475 | #define TSTORM_L5CM_TCP_FLAGS_RSRV0_SHIFT 12 |
2476 | #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<13) |
2477 | #define TSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 13 |
2478 | #define TSTORM_L5CM_TCP_FLAGS_RSRV1 (0x3<<14) |
2479 | #define TSTORM_L5CM_TCP_FLAGS_RSRV1_SHIFT 14 |
2480 | }; |
2481 | |
2482 | /* |
2483 | * Xstorm Tcp flags |
2484 | */ |
2485 | struct xstorm_l5cm_tcp_flags { |
2486 | u8 flags; |
2487 | #define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED (0x1<<0) |
2488 | #define XSTORM_L5CM_TCP_FLAGS_ENC_ENABLED_SHIFT 0 |
2489 | #define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED (0x1<<1) |
2490 | #define XSTORM_L5CM_TCP_FLAGS_TS_ENABLED_SHIFT 1 |
2491 | #define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN (0x1<<2) |
2492 | #define XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN_SHIFT 2 |
2493 | #define XSTORM_L5CM_TCP_FLAGS_RSRV (0x1F<<3) |
2494 | #define XSTORM_L5CM_TCP_FLAGS_RSRV_SHIFT 3 |
2495 | }; |
2496 | |
2497 | #endif /* CNIC_DEFS_H */ |
2498 |
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9