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1 | /* |
2 | * Header file for sonic.c |
3 | * |
4 | * (C) Waldorf Electronics, Germany |
5 | * Written by Andreas Busse |
6 | * |
7 | * NOTE: most of the structure definitions here are endian dependent. |
8 | * If you want to use this driver on big endian machines, the data |
9 | * and pad structure members must be exchanged. Also, the structures |
10 | * need to be changed accordingly to the bus size. |
11 | * |
12 | * 981229 MSch: did just that for the 68k Mac port (32 bit, big endian) |
13 | * |
14 | * 990611 David Huggins-Daines <dhd@debian.org>: This machine abstraction |
15 | * does not cope with 16-bit bus sizes very well. Therefore I have |
16 | * rewritten it with ugly macros and evil inlines. |
17 | * |
18 | * 050625 Finn Thain: introduced more 32-bit cards and dhd's support |
19 | * for 16-bit cards (from the mac68k project). |
20 | */ |
21 | |
22 | #ifndef SONIC_H |
23 | #define SONIC_H |
24 | |
25 | |
26 | /* |
27 | * SONIC register offsets |
28 | */ |
29 | |
30 | #define SONIC_CMD 0x00 |
31 | #define SONIC_DCR 0x01 |
32 | #define SONIC_RCR 0x02 |
33 | #define SONIC_TCR 0x03 |
34 | #define SONIC_IMR 0x04 |
35 | #define SONIC_ISR 0x05 |
36 | |
37 | #define SONIC_UTDA 0x06 |
38 | #define SONIC_CTDA 0x07 |
39 | |
40 | #define SONIC_URDA 0x0d |
41 | #define SONIC_CRDA 0x0e |
42 | #define SONIC_EOBC 0x13 |
43 | #define SONIC_URRA 0x14 |
44 | #define SONIC_RSA 0x15 |
45 | #define SONIC_REA 0x16 |
46 | #define SONIC_RRP 0x17 |
47 | #define SONIC_RWP 0x18 |
48 | #define SONIC_RSC 0x2b |
49 | |
50 | #define SONIC_CEP 0x21 |
51 | #define SONIC_CAP2 0x22 |
52 | #define SONIC_CAP1 0x23 |
53 | #define SONIC_CAP0 0x24 |
54 | #define SONIC_CE 0x25 |
55 | #define SONIC_CDP 0x26 |
56 | #define SONIC_CDC 0x27 |
57 | |
58 | #define SONIC_WT0 0x29 |
59 | #define SONIC_WT1 0x2a |
60 | |
61 | #define SONIC_SR 0x28 |
62 | |
63 | |
64 | /* test-only registers */ |
65 | |
66 | #define SONIC_TPS 0x08 |
67 | #define SONIC_TFC 0x09 |
68 | #define SONIC_TSA0 0x0a |
69 | #define SONIC_TSA1 0x0b |
70 | #define SONIC_TFS 0x0c |
71 | |
72 | #define SONIC_CRBA0 0x0f |
73 | #define SONIC_CRBA1 0x10 |
74 | #define SONIC_RBWC0 0x11 |
75 | #define SONIC_RBWC1 0x12 |
76 | #define SONIC_TTDA 0x20 |
77 | #define SONIC_MDT 0x2f |
78 | |
79 | #define SONIC_TRBA0 0x19 |
80 | #define SONIC_TRBA1 0x1a |
81 | #define SONIC_TBWC0 0x1b |
82 | #define SONIC_TBWC1 0x1c |
83 | #define SONIC_LLFA 0x1f |
84 | |
85 | #define SONIC_ADDR0 0x1d |
86 | #define SONIC_ADDR1 0x1e |
87 | |
88 | /* |
89 | * Error counters |
90 | */ |
91 | |
92 | #define SONIC_CRCT 0x2c |
93 | #define SONIC_FAET 0x2d |
94 | #define SONIC_MPT 0x2e |
95 | |
96 | #define SONIC_DCR2 0x3f |
97 | |
98 | /* |
99 | * SONIC command bits |
100 | */ |
101 | |
102 | #define SONIC_CR_LCAM 0x0200 |
103 | #define SONIC_CR_RRRA 0x0100 |
104 | #define SONIC_CR_RST 0x0080 |
105 | #define SONIC_CR_ST 0x0020 |
106 | #define SONIC_CR_STP 0x0010 |
107 | #define SONIC_CR_RXEN 0x0008 |
108 | #define SONIC_CR_RXDIS 0x0004 |
109 | #define SONIC_CR_TXP 0x0002 |
110 | #define SONIC_CR_HTX 0x0001 |
111 | |
112 | /* |
113 | * SONIC data configuration bits |
114 | */ |
115 | |
116 | #define SONIC_DCR_EXBUS 0x8000 |
117 | #define SONIC_DCR_LBR 0x2000 |
118 | #define SONIC_DCR_PO1 0x1000 |
119 | #define SONIC_DCR_PO0 0x0800 |
120 | #define SONIC_DCR_SBUS 0x0400 |
121 | #define SONIC_DCR_USR1 0x0200 |
122 | #define SONIC_DCR_USR0 0x0100 |
123 | #define SONIC_DCR_WC1 0x0080 |
124 | #define SONIC_DCR_WC0 0x0040 |
125 | #define SONIC_DCR_DW 0x0020 |
126 | #define SONIC_DCR_BMS 0x0010 |
127 | #define SONIC_DCR_RFT1 0x0008 |
128 | #define SONIC_DCR_RFT0 0x0004 |
129 | #define SONIC_DCR_TFT1 0x0002 |
130 | #define SONIC_DCR_TFT0 0x0001 |
131 | |
132 | /* |
133 | * Constants for the SONIC receive control register. |
134 | */ |
135 | |
136 | #define SONIC_RCR_ERR 0x8000 |
137 | #define SONIC_RCR_RNT 0x4000 |
138 | #define SONIC_RCR_BRD 0x2000 |
139 | #define SONIC_RCR_PRO 0x1000 |
140 | #define SONIC_RCR_AMC 0x0800 |
141 | #define SONIC_RCR_LB1 0x0400 |
142 | #define SONIC_RCR_LB0 0x0200 |
143 | |
144 | #define SONIC_RCR_MC 0x0100 |
145 | #define SONIC_RCR_BC 0x0080 |
146 | #define SONIC_RCR_LPKT 0x0040 |
147 | #define SONIC_RCR_CRS 0x0020 |
148 | #define SONIC_RCR_COL 0x0010 |
149 | #define SONIC_RCR_CRCR 0x0008 |
150 | #define SONIC_RCR_FAER 0x0004 |
151 | #define SONIC_RCR_LBK 0x0002 |
152 | #define SONIC_RCR_PRX 0x0001 |
153 | |
154 | #define SONIC_RCR_LB_OFF 0 |
155 | #define SONIC_RCR_LB_MAC SONIC_RCR_LB0 |
156 | #define SONIC_RCR_LB_ENDEC SONIC_RCR_LB1 |
157 | #define SONIC_RCR_LB_TRANS (SONIC_RCR_LB0 | SONIC_RCR_LB1) |
158 | |
159 | /* default RCR setup */ |
160 | |
161 | #define SONIC_RCR_DEFAULT (SONIC_RCR_BRD) |
162 | |
163 | |
164 | /* |
165 | * SONIC Transmit Control register bits |
166 | */ |
167 | |
168 | #define SONIC_TCR_PINTR 0x8000 |
169 | #define SONIC_TCR_POWC 0x4000 |
170 | #define SONIC_TCR_CRCI 0x2000 |
171 | #define SONIC_TCR_EXDIS 0x1000 |
172 | #define SONIC_TCR_EXD 0x0400 |
173 | #define SONIC_TCR_DEF 0x0200 |
174 | #define SONIC_TCR_NCRS 0x0100 |
175 | #define SONIC_TCR_CRLS 0x0080 |
176 | #define SONIC_TCR_EXC 0x0040 |
177 | #define SONIC_TCR_PMB 0x0008 |
178 | #define SONIC_TCR_FU 0x0004 |
179 | #define SONIC_TCR_BCM 0x0002 |
180 | #define SONIC_TCR_PTX 0x0001 |
181 | |
182 | #define SONIC_TCR_DEFAULT 0x0000 |
183 | |
184 | /* |
185 | * Constants for the SONIC_INTERRUPT_MASK and |
186 | * SONIC_INTERRUPT_STATUS registers. |
187 | */ |
188 | |
189 | #define SONIC_INT_BR 0x4000 |
190 | #define SONIC_INT_HBL 0x2000 |
191 | #define SONIC_INT_LCD 0x1000 |
192 | #define SONIC_INT_PINT 0x0800 |
193 | #define SONIC_INT_PKTRX 0x0400 |
194 | #define SONIC_INT_TXDN 0x0200 |
195 | #define SONIC_INT_TXER 0x0100 |
196 | #define SONIC_INT_TC 0x0080 |
197 | #define SONIC_INT_RDE 0x0040 |
198 | #define SONIC_INT_RBE 0x0020 |
199 | #define SONIC_INT_RBAE 0x0010 |
200 | #define SONIC_INT_CRC 0x0008 |
201 | #define SONIC_INT_FAE 0x0004 |
202 | #define SONIC_INT_MP 0x0002 |
203 | #define SONIC_INT_RFO 0x0001 |
204 | |
205 | |
206 | /* |
207 | * The interrupts we allow. |
208 | */ |
209 | |
210 | #define SONIC_IMR_DEFAULT ( SONIC_INT_BR | \ |
211 | SONIC_INT_LCD | \ |
212 | SONIC_INT_RFO | \ |
213 | SONIC_INT_PKTRX | \ |
214 | SONIC_INT_TXDN | \ |
215 | SONIC_INT_TXER | \ |
216 | SONIC_INT_RDE | \ |
217 | SONIC_INT_RBAE | \ |
218 | SONIC_INT_CRC | \ |
219 | SONIC_INT_FAE | \ |
220 | SONIC_INT_MP) |
221 | |
222 | |
223 | #define SONIC_EOL 0x0001 |
224 | #define CAM_DESCRIPTORS 16 |
225 | |
226 | /* Offsets in the various DMA buffers accessed by the SONIC */ |
227 | |
228 | #define SONIC_BITMODE16 0 |
229 | #define SONIC_BITMODE32 1 |
230 | #define SONIC_BUS_SCALE(bitmode) ((bitmode) ? 4 : 2) |
231 | /* Note! These are all measured in bus-size units, so use SONIC_BUS_SCALE */ |
232 | #define SIZEOF_SONIC_RR 4 |
233 | #define SONIC_RR_BUFADR_L 0 |
234 | #define SONIC_RR_BUFADR_H 1 |
235 | #define SONIC_RR_BUFSIZE_L 2 |
236 | #define SONIC_RR_BUFSIZE_H 3 |
237 | |
238 | #define SIZEOF_SONIC_RD 7 |
239 | #define SONIC_RD_STATUS 0 |
240 | #define SONIC_RD_PKTLEN 1 |
241 | #define SONIC_RD_PKTPTR_L 2 |
242 | #define SONIC_RD_PKTPTR_H 3 |
243 | #define SONIC_RD_SEQNO 4 |
244 | #define SONIC_RD_LINK 5 |
245 | #define SONIC_RD_IN_USE 6 |
246 | |
247 | #define SIZEOF_SONIC_TD 8 |
248 | #define SONIC_TD_STATUS 0 |
249 | #define SONIC_TD_CONFIG 1 |
250 | #define SONIC_TD_PKTSIZE 2 |
251 | #define SONIC_TD_FRAG_COUNT 3 |
252 | #define SONIC_TD_FRAG_PTR_L 4 |
253 | #define SONIC_TD_FRAG_PTR_H 5 |
254 | #define SONIC_TD_FRAG_SIZE 6 |
255 | #define SONIC_TD_LINK 7 |
256 | |
257 | #define SIZEOF_SONIC_CD 4 |
258 | #define SONIC_CD_ENTRY_POINTER 0 |
259 | #define SONIC_CD_CAP0 1 |
260 | #define SONIC_CD_CAP1 2 |
261 | #define SONIC_CD_CAP2 3 |
262 | |
263 | #define SIZEOF_SONIC_CDA ((CAM_DESCRIPTORS * SIZEOF_SONIC_CD) + 1) |
264 | #define SONIC_CDA_CAM_ENABLE (CAM_DESCRIPTORS * SIZEOF_SONIC_CD) |
265 | |
266 | /* |
267 | * Some tunables for the buffer areas. Power of 2 is required |
268 | * the current driver uses one receive buffer for each descriptor. |
269 | * |
270 | * MSch: use more buffer space for the slow m68k Macs! |
271 | */ |
272 | #define SONIC_NUM_RRS 16 /* number of receive resources */ |
273 | #define SONIC_NUM_RDS SONIC_NUM_RRS /* number of receive descriptors */ |
274 | #define SONIC_NUM_TDS 16 /* number of transmit descriptors */ |
275 | |
276 | #define SONIC_RDS_MASK (SONIC_NUM_RDS-1) |
277 | #define SONIC_TDS_MASK (SONIC_NUM_TDS-1) |
278 | |
279 | #define SONIC_RBSIZE 1520 /* size of one resource buffer */ |
280 | |
281 | /* Again, measured in bus size units! */ |
282 | #define SIZEOF_SONIC_DESC (SIZEOF_SONIC_CDA \ |
283 | + (SIZEOF_SONIC_TD * SONIC_NUM_TDS) \ |
284 | + (SIZEOF_SONIC_RD * SONIC_NUM_RDS) \ |
285 | + (SIZEOF_SONIC_RR * SONIC_NUM_RRS)) |
286 | |
287 | /* Information that need to be kept for each board. */ |
288 | struct sonic_local { |
289 | /* Bus size. 0 == 16 bits, 1 == 32 bits. */ |
290 | int dma_bitmode; |
291 | /* Register offset within the longword (independent of endianness, |
292 | and varies from one type of Macintosh SONIC to another |
293 | (Aarrgh)) */ |
294 | int reg_offset; |
295 | void *descriptors; |
296 | /* Crud. These areas have to be within the same 64K. Therefore |
297 | we allocate a desriptors page, and point these to places within it. */ |
298 | void *cda; /* CAM descriptor area */ |
299 | void *tda; /* Transmit descriptor area */ |
300 | void *rra; /* Receive resource area */ |
301 | void *rda; /* Receive descriptor area */ |
302 | struct sk_buff* volatile rx_skb[SONIC_NUM_RRS]; /* packets to be received */ |
303 | struct sk_buff* volatile tx_skb[SONIC_NUM_TDS]; /* packets to be transmitted */ |
304 | unsigned int tx_len[SONIC_NUM_TDS]; /* lengths of tx DMA mappings */ |
305 | /* Logical DMA addresses on MIPS, bus addresses on m68k |
306 | * (so "laddr" is a bit misleading) */ |
307 | dma_addr_t descriptors_laddr; |
308 | u32 cda_laddr; /* logical DMA address of CDA */ |
309 | u32 tda_laddr; /* logical DMA address of TDA */ |
310 | u32 rra_laddr; /* logical DMA address of RRA */ |
311 | u32 rda_laddr; /* logical DMA address of RDA */ |
312 | dma_addr_t rx_laddr[SONIC_NUM_RRS]; /* logical DMA addresses of rx skbuffs */ |
313 | dma_addr_t tx_laddr[SONIC_NUM_TDS]; /* logical DMA addresses of tx skbuffs */ |
314 | unsigned int rra_end; |
315 | unsigned int cur_rwp; |
316 | unsigned int cur_rx; |
317 | unsigned int cur_tx; /* first unacked transmit packet */ |
318 | unsigned int eol_rx; |
319 | unsigned int eol_tx; /* last unacked transmit packet */ |
320 | unsigned int next_tx; /* next free TD */ |
321 | struct device *device; /* generic device */ |
322 | struct net_device_stats stats; |
323 | }; |
324 | |
325 | #define TX_TIMEOUT (3 * HZ) |
326 | |
327 | /* Index to functions, as function prototypes. */ |
328 | |
329 | static int sonic_open(struct net_device *dev); |
330 | static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev); |
331 | static irqreturn_t sonic_interrupt(int irq, void *dev_id); |
332 | static void sonic_rx(struct net_device *dev); |
333 | static int sonic_close(struct net_device *dev); |
334 | static struct net_device_stats *sonic_get_stats(struct net_device *dev); |
335 | static void sonic_multicast_list(struct net_device *dev); |
336 | static int sonic_init(struct net_device *dev); |
337 | static void sonic_tx_timeout(struct net_device *dev); |
338 | |
339 | /* Internal inlines for reading/writing DMA buffers. Note that bus |
340 | size and endianness matter here, whereas they don't for registers, |
341 | as far as we can tell. */ |
342 | /* OpenBSD calls this "SWO". I'd like to think that sonic_buf_put() |
343 | is a much better name. */ |
344 | static inline void sonic_buf_put(void* base, int bitmode, |
345 | int offset, __u16 val) |
346 | { |
347 | if (bitmode) |
348 | #ifdef __BIG_ENDIAN |
349 | ((__u16 *) base + (offset*2))[1] = val; |
350 | #else |
351 | ((__u16 *) base + (offset*2))[0] = val; |
352 | #endif |
353 | else |
354 | ((__u16 *) base)[offset] = val; |
355 | } |
356 | |
357 | static inline __u16 sonic_buf_get(void* base, int bitmode, |
358 | int offset) |
359 | { |
360 | if (bitmode) |
361 | #ifdef __BIG_ENDIAN |
362 | return ((volatile __u16 *) base + (offset*2))[1]; |
363 | #else |
364 | return ((volatile __u16 *) base + (offset*2))[0]; |
365 | #endif |
366 | else |
367 | return ((volatile __u16 *) base)[offset]; |
368 | } |
369 | |
370 | /* Inlines that you should actually use for reading/writing DMA buffers */ |
371 | static inline void sonic_cda_put(struct net_device* dev, int entry, |
372 | int offset, __u16 val) |
373 | { |
374 | struct sonic_local *lp = netdev_priv(dev); |
375 | sonic_buf_put(lp->cda, lp->dma_bitmode, |
376 | (entry * SIZEOF_SONIC_CD) + offset, val); |
377 | } |
378 | |
379 | static inline __u16 sonic_cda_get(struct net_device* dev, int entry, |
380 | int offset) |
381 | { |
382 | struct sonic_local *lp = netdev_priv(dev); |
383 | return sonic_buf_get(lp->cda, lp->dma_bitmode, |
384 | (entry * SIZEOF_SONIC_CD) + offset); |
385 | } |
386 | |
387 | static inline void sonic_set_cam_enable(struct net_device* dev, __u16 val) |
388 | { |
389 | struct sonic_local *lp = netdev_priv(dev); |
390 | sonic_buf_put(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE, val); |
391 | } |
392 | |
393 | static inline __u16 sonic_get_cam_enable(struct net_device* dev) |
394 | { |
395 | struct sonic_local *lp = netdev_priv(dev); |
396 | return sonic_buf_get(lp->cda, lp->dma_bitmode, SONIC_CDA_CAM_ENABLE); |
397 | } |
398 | |
399 | static inline void sonic_tda_put(struct net_device* dev, int entry, |
400 | int offset, __u16 val) |
401 | { |
402 | struct sonic_local *lp = netdev_priv(dev); |
403 | sonic_buf_put(lp->tda, lp->dma_bitmode, |
404 | (entry * SIZEOF_SONIC_TD) + offset, val); |
405 | } |
406 | |
407 | static inline __u16 sonic_tda_get(struct net_device* dev, int entry, |
408 | int offset) |
409 | { |
410 | struct sonic_local *lp = netdev_priv(dev); |
411 | return sonic_buf_get(lp->tda, lp->dma_bitmode, |
412 | (entry * SIZEOF_SONIC_TD) + offset); |
413 | } |
414 | |
415 | static inline void sonic_rda_put(struct net_device* dev, int entry, |
416 | int offset, __u16 val) |
417 | { |
418 | struct sonic_local *lp = netdev_priv(dev); |
419 | sonic_buf_put(lp->rda, lp->dma_bitmode, |
420 | (entry * SIZEOF_SONIC_RD) + offset, val); |
421 | } |
422 | |
423 | static inline __u16 sonic_rda_get(struct net_device* dev, int entry, |
424 | int offset) |
425 | { |
426 | struct sonic_local *lp = netdev_priv(dev); |
427 | return sonic_buf_get(lp->rda, lp->dma_bitmode, |
428 | (entry * SIZEOF_SONIC_RD) + offset); |
429 | } |
430 | |
431 | static inline void sonic_rra_put(struct net_device* dev, int entry, |
432 | int offset, __u16 val) |
433 | { |
434 | struct sonic_local *lp = netdev_priv(dev); |
435 | sonic_buf_put(lp->rra, lp->dma_bitmode, |
436 | (entry * SIZEOF_SONIC_RR) + offset, val); |
437 | } |
438 | |
439 | static inline __u16 sonic_rra_get(struct net_device* dev, int entry, |
440 | int offset) |
441 | { |
442 | struct sonic_local *lp = netdev_priv(dev); |
443 | return sonic_buf_get(lp->rra, lp->dma_bitmode, |
444 | (entry * SIZEOF_SONIC_RR) + offset); |
445 | } |
446 | |
447 | static const char *version = |
448 | "sonic.c:v0.92 20.9.98 tsbogend@alpha.franken.de\n"; |
449 | |
450 | #endif /* SONIC_H */ |
451 |
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