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1 | /* |
2 | * uartlite.c: Serial driver for Xilinx uartlite serial controller |
3 | * |
4 | * Copyright (C) 2006 Peter Korsgaard <jacmet@sunsite.dk> |
5 | * Copyright (C) 2007 Secret Lab Technologies Ltd. |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public License |
8 | * version 2. This program is licensed "as is" without any warranty of any |
9 | * kind, whether express or implied. |
10 | */ |
11 | |
12 | #include <linux/platform_device.h> |
13 | #include <linux/module.h> |
14 | #include <linux/console.h> |
15 | #include <linux/serial.h> |
16 | #include <linux/serial_core.h> |
17 | #include <linux/tty.h> |
18 | #include <linux/delay.h> |
19 | #include <linux/interrupt.h> |
20 | #include <linux/init.h> |
21 | #include <asm/io.h> |
22 | #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) |
23 | #include <linux/of.h> |
24 | #include <linux/of_device.h> |
25 | #include <linux/of_platform.h> |
26 | |
27 | /* Match table for of_platform binding */ |
28 | static struct of_device_id ulite_of_match[] __devinitdata = { |
29 | { .compatible = "xlnx,opb-uartlite-1.00.b", }, |
30 | { .compatible = "xlnx,xps-uartlite-1.00.a", }, |
31 | {} |
32 | }; |
33 | MODULE_DEVICE_TABLE(of, ulite_of_match); |
34 | |
35 | #endif |
36 | |
37 | #define ULITE_NAME "ttyUL" |
38 | #define ULITE_MAJOR 204 |
39 | #define ULITE_MINOR 187 |
40 | #define ULITE_NR_UARTS 4 |
41 | |
42 | /* --------------------------------------------------------------------- |
43 | * Register definitions |
44 | * |
45 | * For register details see datasheet: |
46 | * http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf |
47 | */ |
48 | |
49 | #define ULITE_RX 0x00 |
50 | #define ULITE_TX 0x04 |
51 | #define ULITE_STATUS 0x08 |
52 | #define ULITE_CONTROL 0x0c |
53 | |
54 | #define ULITE_REGION 16 |
55 | |
56 | #define ULITE_STATUS_RXVALID 0x01 |
57 | #define ULITE_STATUS_RXFULL 0x02 |
58 | #define ULITE_STATUS_TXEMPTY 0x04 |
59 | #define ULITE_STATUS_TXFULL 0x08 |
60 | #define ULITE_STATUS_IE 0x10 |
61 | #define ULITE_STATUS_OVERRUN 0x20 |
62 | #define ULITE_STATUS_FRAME 0x40 |
63 | #define ULITE_STATUS_PARITY 0x80 |
64 | |
65 | #define ULITE_CONTROL_RST_TX 0x01 |
66 | #define ULITE_CONTROL_RST_RX 0x02 |
67 | #define ULITE_CONTROL_IE 0x10 |
68 | |
69 | |
70 | static struct uart_port ulite_ports[ULITE_NR_UARTS]; |
71 | |
72 | /* --------------------------------------------------------------------- |
73 | * Core UART driver operations |
74 | */ |
75 | |
76 | static int ulite_receive(struct uart_port *port, int stat) |
77 | { |
78 | struct tty_struct *tty = port->state->port.tty; |
79 | unsigned char ch = 0; |
80 | char flag = TTY_NORMAL; |
81 | |
82 | if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN |
83 | | ULITE_STATUS_FRAME)) == 0) |
84 | return 0; |
85 | |
86 | /* stats */ |
87 | if (stat & ULITE_STATUS_RXVALID) { |
88 | port->icount.rx++; |
89 | ch = readb(port->membase + ULITE_RX); |
90 | |
91 | if (stat & ULITE_STATUS_PARITY) |
92 | port->icount.parity++; |
93 | } |
94 | |
95 | if (stat & ULITE_STATUS_OVERRUN) |
96 | port->icount.overrun++; |
97 | |
98 | if (stat & ULITE_STATUS_FRAME) |
99 | port->icount.frame++; |
100 | |
101 | |
102 | /* drop byte with parity error if IGNPAR specificed */ |
103 | if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY) |
104 | stat &= ~ULITE_STATUS_RXVALID; |
105 | |
106 | stat &= port->read_status_mask; |
107 | |
108 | if (stat & ULITE_STATUS_PARITY) |
109 | flag = TTY_PARITY; |
110 | |
111 | |
112 | stat &= ~port->ignore_status_mask; |
113 | |
114 | if (stat & ULITE_STATUS_RXVALID) |
115 | tty_insert_flip_char(tty, ch, flag); |
116 | |
117 | if (stat & ULITE_STATUS_FRAME) |
118 | tty_insert_flip_char(tty, 0, TTY_FRAME); |
119 | |
120 | if (stat & ULITE_STATUS_OVERRUN) |
121 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
122 | |
123 | return 1; |
124 | } |
125 | |
126 | static int ulite_transmit(struct uart_port *port, int stat) |
127 | { |
128 | struct circ_buf *xmit = &port->state->xmit; |
129 | |
130 | if (stat & ULITE_STATUS_TXFULL) |
131 | return 0; |
132 | |
133 | if (port->x_char) { |
134 | writeb(port->x_char, port->membase + ULITE_TX); |
135 | port->x_char = 0; |
136 | port->icount.tx++; |
137 | return 1; |
138 | } |
139 | |
140 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) |
141 | return 0; |
142 | |
143 | writeb(xmit->buf[xmit->tail], port->membase + ULITE_TX); |
144 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1); |
145 | port->icount.tx++; |
146 | |
147 | /* wake up */ |
148 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
149 | uart_write_wakeup(port); |
150 | |
151 | return 1; |
152 | } |
153 | |
154 | static irqreturn_t ulite_isr(int irq, void *dev_id) |
155 | { |
156 | struct uart_port *port = dev_id; |
157 | int busy, n = 0; |
158 | |
159 | do { |
160 | int stat = readb(port->membase + ULITE_STATUS); |
161 | busy = ulite_receive(port, stat); |
162 | busy |= ulite_transmit(port, stat); |
163 | n++; |
164 | } while (busy); |
165 | |
166 | /* work done? */ |
167 | if (n > 1) { |
168 | tty_flip_buffer_push(port->state->port.tty); |
169 | return IRQ_HANDLED; |
170 | } else { |
171 | return IRQ_NONE; |
172 | } |
173 | } |
174 | |
175 | static unsigned int ulite_tx_empty(struct uart_port *port) |
176 | { |
177 | unsigned long flags; |
178 | unsigned int ret; |
179 | |
180 | spin_lock_irqsave(&port->lock, flags); |
181 | ret = readb(port->membase + ULITE_STATUS); |
182 | spin_unlock_irqrestore(&port->lock, flags); |
183 | |
184 | return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0; |
185 | } |
186 | |
187 | static unsigned int ulite_get_mctrl(struct uart_port *port) |
188 | { |
189 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
190 | } |
191 | |
192 | static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl) |
193 | { |
194 | /* N/A */ |
195 | } |
196 | |
197 | static void ulite_stop_tx(struct uart_port *port) |
198 | { |
199 | /* N/A */ |
200 | } |
201 | |
202 | static void ulite_start_tx(struct uart_port *port) |
203 | { |
204 | ulite_transmit(port, readb(port->membase + ULITE_STATUS)); |
205 | } |
206 | |
207 | static void ulite_stop_rx(struct uart_port *port) |
208 | { |
209 | /* don't forward any more data (like !CREAD) */ |
210 | port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY |
211 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
212 | } |
213 | |
214 | static void ulite_enable_ms(struct uart_port *port) |
215 | { |
216 | /* N/A */ |
217 | } |
218 | |
219 | static void ulite_break_ctl(struct uart_port *port, int ctl) |
220 | { |
221 | /* N/A */ |
222 | } |
223 | |
224 | static int ulite_startup(struct uart_port *port) |
225 | { |
226 | int ret; |
227 | |
228 | ret = request_irq(port->irq, ulite_isr, |
229 | IRQF_SHARED | IRQF_SAMPLE_RANDOM, "uartlite", port); |
230 | if (ret) |
231 | return ret; |
232 | |
233 | writeb(ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX, |
234 | port->membase + ULITE_CONTROL); |
235 | writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL); |
236 | |
237 | return 0; |
238 | } |
239 | |
240 | static void ulite_shutdown(struct uart_port *port) |
241 | { |
242 | writeb(0, port->membase + ULITE_CONTROL); |
243 | readb(port->membase + ULITE_CONTROL); /* dummy */ |
244 | free_irq(port->irq, port); |
245 | } |
246 | |
247 | static void ulite_set_termios(struct uart_port *port, struct ktermios *termios, |
248 | struct ktermios *old) |
249 | { |
250 | unsigned long flags; |
251 | unsigned int baud; |
252 | |
253 | spin_lock_irqsave(&port->lock, flags); |
254 | |
255 | port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN |
256 | | ULITE_STATUS_TXFULL; |
257 | |
258 | if (termios->c_iflag & INPCK) |
259 | port->read_status_mask |= |
260 | ULITE_STATUS_PARITY | ULITE_STATUS_FRAME; |
261 | |
262 | port->ignore_status_mask = 0; |
263 | if (termios->c_iflag & IGNPAR) |
264 | port->ignore_status_mask |= ULITE_STATUS_PARITY |
265 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
266 | |
267 | /* ignore all characters if CREAD is not set */ |
268 | if ((termios->c_cflag & CREAD) == 0) |
269 | port->ignore_status_mask |= |
270 | ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY |
271 | | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN; |
272 | |
273 | /* update timeout */ |
274 | baud = uart_get_baud_rate(port, termios, old, 0, 460800); |
275 | uart_update_timeout(port, termios->c_cflag, baud); |
276 | |
277 | spin_unlock_irqrestore(&port->lock, flags); |
278 | } |
279 | |
280 | static const char *ulite_type(struct uart_port *port) |
281 | { |
282 | return port->type == PORT_UARTLITE ? "uartlite" : NULL; |
283 | } |
284 | |
285 | static void ulite_release_port(struct uart_port *port) |
286 | { |
287 | release_mem_region(port->mapbase, ULITE_REGION); |
288 | iounmap(port->membase); |
289 | port->membase = NULL; |
290 | } |
291 | |
292 | static int ulite_request_port(struct uart_port *port) |
293 | { |
294 | pr_debug("ulite console: port=%p; port->mapbase=%llx\n", |
295 | port, (unsigned long long) port->mapbase); |
296 | |
297 | if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) { |
298 | dev_err(port->dev, "Memory region busy\n"); |
299 | return -EBUSY; |
300 | } |
301 | |
302 | port->membase = ioremap(port->mapbase, ULITE_REGION); |
303 | if (!port->membase) { |
304 | dev_err(port->dev, "Unable to map registers\n"); |
305 | release_mem_region(port->mapbase, ULITE_REGION); |
306 | return -EBUSY; |
307 | } |
308 | |
309 | return 0; |
310 | } |
311 | |
312 | static void ulite_config_port(struct uart_port *port, int flags) |
313 | { |
314 | if (!ulite_request_port(port)) |
315 | port->type = PORT_UARTLITE; |
316 | } |
317 | |
318 | static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser) |
319 | { |
320 | /* we don't want the core code to modify any port params */ |
321 | return -EINVAL; |
322 | } |
323 | |
324 | static struct uart_ops ulite_ops = { |
325 | .tx_empty = ulite_tx_empty, |
326 | .set_mctrl = ulite_set_mctrl, |
327 | .get_mctrl = ulite_get_mctrl, |
328 | .stop_tx = ulite_stop_tx, |
329 | .start_tx = ulite_start_tx, |
330 | .stop_rx = ulite_stop_rx, |
331 | .enable_ms = ulite_enable_ms, |
332 | .break_ctl = ulite_break_ctl, |
333 | .startup = ulite_startup, |
334 | .shutdown = ulite_shutdown, |
335 | .set_termios = ulite_set_termios, |
336 | .type = ulite_type, |
337 | .release_port = ulite_release_port, |
338 | .request_port = ulite_request_port, |
339 | .config_port = ulite_config_port, |
340 | .verify_port = ulite_verify_port |
341 | }; |
342 | |
343 | /* --------------------------------------------------------------------- |
344 | * Console driver operations |
345 | */ |
346 | |
347 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
348 | static void ulite_console_wait_tx(struct uart_port *port) |
349 | { |
350 | int i; |
351 | u8 val; |
352 | |
353 | /* Spin waiting for TX fifo to have space available */ |
354 | for (i = 0; i < 100000; i++) { |
355 | val = readb(port->membase + ULITE_STATUS); |
356 | if ((val & ULITE_STATUS_TXFULL) == 0) |
357 | break; |
358 | cpu_relax(); |
359 | } |
360 | } |
361 | |
362 | static void ulite_console_putchar(struct uart_port *port, int ch) |
363 | { |
364 | ulite_console_wait_tx(port); |
365 | writeb(ch, port->membase + ULITE_TX); |
366 | } |
367 | |
368 | static void ulite_console_write(struct console *co, const char *s, |
369 | unsigned int count) |
370 | { |
371 | struct uart_port *port = &ulite_ports[co->index]; |
372 | unsigned long flags; |
373 | unsigned int ier; |
374 | int locked = 1; |
375 | |
376 | if (oops_in_progress) { |
377 | locked = spin_trylock_irqsave(&port->lock, flags); |
378 | } else |
379 | spin_lock_irqsave(&port->lock, flags); |
380 | |
381 | /* save and disable interrupt */ |
382 | ier = readb(port->membase + ULITE_STATUS) & ULITE_STATUS_IE; |
383 | writeb(0, port->membase + ULITE_CONTROL); |
384 | |
385 | uart_console_write(port, s, count, ulite_console_putchar); |
386 | |
387 | ulite_console_wait_tx(port); |
388 | |
389 | /* restore interrupt state */ |
390 | if (ier) |
391 | writeb(ULITE_CONTROL_IE, port->membase + ULITE_CONTROL); |
392 | |
393 | if (locked) |
394 | spin_unlock_irqrestore(&port->lock, flags); |
395 | } |
396 | |
397 | static int __devinit ulite_console_setup(struct console *co, char *options) |
398 | { |
399 | struct uart_port *port; |
400 | int baud = 9600; |
401 | int bits = 8; |
402 | int parity = 'n'; |
403 | int flow = 'n'; |
404 | |
405 | if (co->index < 0 || co->index >= ULITE_NR_UARTS) |
406 | return -EINVAL; |
407 | |
408 | port = &ulite_ports[co->index]; |
409 | |
410 | /* Has the device been initialized yet? */ |
411 | if (!port->mapbase) { |
412 | pr_debug("console on ttyUL%i not present\n", co->index); |
413 | return -ENODEV; |
414 | } |
415 | |
416 | /* not initialized yet? */ |
417 | if (!port->membase) { |
418 | if (ulite_request_port(port)) |
419 | return -ENODEV; |
420 | } |
421 | |
422 | if (options) |
423 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
424 | |
425 | return uart_set_options(port, co, baud, parity, bits, flow); |
426 | } |
427 | |
428 | static struct uart_driver ulite_uart_driver; |
429 | |
430 | static struct console ulite_console = { |
431 | .name = ULITE_NAME, |
432 | .write = ulite_console_write, |
433 | .device = uart_console_device, |
434 | .setup = ulite_console_setup, |
435 | .flags = CON_PRINTBUFFER, |
436 | .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */ |
437 | .data = &ulite_uart_driver, |
438 | }; |
439 | |
440 | static int __init ulite_console_init(void) |
441 | { |
442 | register_console(&ulite_console); |
443 | return 0; |
444 | } |
445 | |
446 | console_initcall(ulite_console_init); |
447 | |
448 | #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */ |
449 | |
450 | static struct uart_driver ulite_uart_driver = { |
451 | .owner = THIS_MODULE, |
452 | .driver_name = "uartlite", |
453 | .dev_name = ULITE_NAME, |
454 | .major = ULITE_MAJOR, |
455 | .minor = ULITE_MINOR, |
456 | .nr = ULITE_NR_UARTS, |
457 | #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE |
458 | .cons = &ulite_console, |
459 | #endif |
460 | }; |
461 | |
462 | /* --------------------------------------------------------------------- |
463 | * Port assignment functions (mapping devices to uart_port structures) |
464 | */ |
465 | |
466 | /** ulite_assign: register a uartlite device with the driver |
467 | * |
468 | * @dev: pointer to device structure |
469 | * @id: requested id number. Pass -1 for automatic port assignment |
470 | * @base: base address of uartlite registers |
471 | * @irq: irq number for uartlite |
472 | * |
473 | * Returns: 0 on success, <0 otherwise |
474 | */ |
475 | static int __devinit ulite_assign(struct device *dev, int id, u32 base, int irq) |
476 | { |
477 | struct uart_port *port; |
478 | int rc; |
479 | |
480 | /* if id = -1; then scan for a free id and use that */ |
481 | if (id < 0) { |
482 | for (id = 0; id < ULITE_NR_UARTS; id++) |
483 | if (ulite_ports[id].mapbase == 0) |
484 | break; |
485 | } |
486 | if (id < 0 || id >= ULITE_NR_UARTS) { |
487 | dev_err(dev, "%s%i too large\n", ULITE_NAME, id); |
488 | return -EINVAL; |
489 | } |
490 | |
491 | if ((ulite_ports[id].mapbase) && (ulite_ports[id].mapbase != base)) { |
492 | dev_err(dev, "cannot assign to %s%i; it is already in use\n", |
493 | ULITE_NAME, id); |
494 | return -EBUSY; |
495 | } |
496 | |
497 | port = &ulite_ports[id]; |
498 | |
499 | spin_lock_init(&port->lock); |
500 | port->fifosize = 16; |
501 | port->regshift = 2; |
502 | port->iotype = UPIO_MEM; |
503 | port->iobase = 1; /* mark port in use */ |
504 | port->mapbase = base; |
505 | port->membase = NULL; |
506 | port->ops = &ulite_ops; |
507 | port->irq = irq; |
508 | port->flags = UPF_BOOT_AUTOCONF; |
509 | port->dev = dev; |
510 | port->type = PORT_UNKNOWN; |
511 | port->line = id; |
512 | |
513 | dev_set_drvdata(dev, port); |
514 | |
515 | /* Register the port */ |
516 | rc = uart_add_one_port(&ulite_uart_driver, port); |
517 | if (rc) { |
518 | dev_err(dev, "uart_add_one_port() failed; err=%i\n", rc); |
519 | port->mapbase = 0; |
520 | dev_set_drvdata(dev, NULL); |
521 | return rc; |
522 | } |
523 | |
524 | return 0; |
525 | } |
526 | |
527 | /** ulite_release: register a uartlite device with the driver |
528 | * |
529 | * @dev: pointer to device structure |
530 | */ |
531 | static int __devexit ulite_release(struct device *dev) |
532 | { |
533 | struct uart_port *port = dev_get_drvdata(dev); |
534 | int rc = 0; |
535 | |
536 | if (port) { |
537 | rc = uart_remove_one_port(&ulite_uart_driver, port); |
538 | dev_set_drvdata(dev, NULL); |
539 | port->mapbase = 0; |
540 | } |
541 | |
542 | return rc; |
543 | } |
544 | |
545 | /* --------------------------------------------------------------------- |
546 | * Platform bus binding |
547 | */ |
548 | |
549 | static int __devinit ulite_probe(struct platform_device *pdev) |
550 | { |
551 | struct resource *res, *res2; |
552 | |
553 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
554 | if (!res) |
555 | return -ENODEV; |
556 | |
557 | res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
558 | if (!res2) |
559 | return -ENODEV; |
560 | |
561 | return ulite_assign(&pdev->dev, pdev->id, res->start, res2->start); |
562 | } |
563 | |
564 | static int __devexit ulite_remove(struct platform_device *pdev) |
565 | { |
566 | return ulite_release(&pdev->dev); |
567 | } |
568 | |
569 | /* work with hotplug and coldplug */ |
570 | MODULE_ALIAS("platform:uartlite"); |
571 | |
572 | static struct platform_driver ulite_platform_driver = { |
573 | .probe = ulite_probe, |
574 | .remove = __devexit_p(ulite_remove), |
575 | .driver = { |
576 | .owner = THIS_MODULE, |
577 | .name = "uartlite", |
578 | }, |
579 | }; |
580 | |
581 | /* --------------------------------------------------------------------- |
582 | * OF bus bindings |
583 | */ |
584 | #if defined(CONFIG_OF) && (defined(CONFIG_PPC32) || defined(CONFIG_MICROBLAZE)) |
585 | static int __devinit |
586 | ulite_of_probe(struct of_device *op, const struct of_device_id *match) |
587 | { |
588 | struct resource res; |
589 | const unsigned int *id; |
590 | int irq, rc; |
591 | |
592 | dev_dbg(&op->dev, "%s(%p, %p)\n", __func__, op, match); |
593 | |
594 | rc = of_address_to_resource(op->node, 0, &res); |
595 | if (rc) { |
596 | dev_err(&op->dev, "invalid address\n"); |
597 | return rc; |
598 | } |
599 | |
600 | irq = irq_of_parse_and_map(op->node, 0); |
601 | |
602 | id = of_get_property(op->node, "port-number", NULL); |
603 | |
604 | return ulite_assign(&op->dev, id ? *id : -1, res.start+3, irq); |
605 | } |
606 | |
607 | static int __devexit ulite_of_remove(struct of_device *op) |
608 | { |
609 | return ulite_release(&op->dev); |
610 | } |
611 | |
612 | static struct of_platform_driver ulite_of_driver = { |
613 | .owner = THIS_MODULE, |
614 | .name = "uartlite", |
615 | .match_table = ulite_of_match, |
616 | .probe = ulite_of_probe, |
617 | .remove = __devexit_p(ulite_of_remove), |
618 | .driver = { |
619 | .name = "uartlite", |
620 | }, |
621 | }; |
622 | |
623 | /* Registration helpers to keep the number of #ifdefs to a minimum */ |
624 | static inline int __init ulite_of_register(void) |
625 | { |
626 | pr_debug("uartlite: calling of_register_platform_driver()\n"); |
627 | return of_register_platform_driver(&ulite_of_driver); |
628 | } |
629 | |
630 | static inline void __exit ulite_of_unregister(void) |
631 | { |
632 | of_unregister_platform_driver(&ulite_of_driver); |
633 | } |
634 | #else /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */ |
635 | /* Appropriate config not enabled; do nothing helpers */ |
636 | static inline int __init ulite_of_register(void) { return 0; } |
637 | static inline void __exit ulite_of_unregister(void) { } |
638 | #endif /* CONFIG_OF && (CONFIG_PPC32 || CONFIG_MICROBLAZE) */ |
639 | |
640 | /* --------------------------------------------------------------------- |
641 | * Module setup/teardown |
642 | */ |
643 | |
644 | int __init ulite_init(void) |
645 | { |
646 | int ret; |
647 | |
648 | pr_debug("uartlite: calling uart_register_driver()\n"); |
649 | ret = uart_register_driver(&ulite_uart_driver); |
650 | if (ret) |
651 | goto err_uart; |
652 | |
653 | ret = ulite_of_register(); |
654 | if (ret) |
655 | goto err_of; |
656 | |
657 | pr_debug("uartlite: calling platform_driver_register()\n"); |
658 | ret = platform_driver_register(&ulite_platform_driver); |
659 | if (ret) |
660 | goto err_plat; |
661 | |
662 | return 0; |
663 | |
664 | err_plat: |
665 | ulite_of_unregister(); |
666 | err_of: |
667 | uart_unregister_driver(&ulite_uart_driver); |
668 | err_uart: |
669 | printk(KERN_ERR "registering uartlite driver failed: err=%i", ret); |
670 | return ret; |
671 | } |
672 | |
673 | void __exit ulite_exit(void) |
674 | { |
675 | platform_driver_unregister(&ulite_platform_driver); |
676 | ulite_of_unregister(); |
677 | uart_unregister_driver(&ulite_uart_driver); |
678 | } |
679 | |
680 | module_init(ulite_init); |
681 | module_exit(ulite_exit); |
682 | |
683 | MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>"); |
684 | MODULE_DESCRIPTION("Xilinx uartlite serial driver"); |
685 | MODULE_LICENSE("GPL"); |
686 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
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jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9