Root/
1 | # Put here option for CPU selection and depending optimization |
2 | if !X86_ELAN |
3 | |
4 | choice |
5 | prompt "Processor family" |
6 | default M686 if X86_32 |
7 | default GENERIC_CPU if X86_64 |
8 | |
9 | config M386 |
10 | bool "386" |
11 | depends on X86_32 && !UML |
12 | ---help--- |
13 | This is the processor type of your CPU. This information is used for |
14 | optimizing purposes. In order to compile a kernel that can run on |
15 | all x86 CPU types (albeit not optimally fast), you can specify |
16 | "386" here. |
17 | |
18 | The kernel will not necessarily run on earlier architectures than |
19 | the one you have chosen, e.g. a Pentium optimized kernel will run on |
20 | a PPro, but not necessarily on a i486. |
21 | |
22 | Here are the settings recommended for greatest speed: |
23 | - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI |
24 | 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386 |
25 | class machine. |
26 | - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or |
27 | SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. |
28 | - "586" for generic Pentium CPUs lacking the TSC |
29 | (time stamp counter) register. |
30 | - "Pentium-Classic" for the Intel Pentium. |
31 | - "Pentium-MMX" for the Intel Pentium MMX. |
32 | - "Pentium-Pro" for the Intel Pentium Pro. |
33 | - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron. |
34 | - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. |
35 | - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron. |
36 | - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). |
37 | - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). |
38 | - "Crusoe" for the Transmeta Crusoe series. |
39 | - "Efficeon" for the Transmeta Efficeon series. |
40 | - "Winchip-C6" for original IDT Winchip. |
41 | - "Winchip-2" for IDT Winchips with 3dNow! capabilities. |
42 | - "GeodeGX1" for Geode GX1 (Cyrix MediaGX). |
43 | - "Geode GX/LX" For AMD Geode GX and LX processors. |
44 | - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. |
45 | - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above). |
46 | - "VIA C7" for VIA C7. |
47 | |
48 | If you don't know what to do, choose "386". |
49 | |
50 | config M486 |
51 | bool "486" |
52 | depends on X86_32 |
53 | ---help--- |
54 | Select this for a 486 series processor, either Intel or one of the |
55 | compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, |
56 | DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or |
57 | U5S. |
58 | |
59 | config M586 |
60 | bool "586/K5/5x86/6x86/6x86MX" |
61 | depends on X86_32 |
62 | ---help--- |
63 | Select this for an 586 or 686 series processor such as the AMD K5, |
64 | the Cyrix 5x86, 6x86 and 6x86MX. This choice does not |
65 | assume the RDTSC (Read Time Stamp Counter) instruction. |
66 | |
67 | config M586TSC |
68 | bool "Pentium-Classic" |
69 | depends on X86_32 |
70 | ---help--- |
71 | Select this for a Pentium Classic processor with the RDTSC (Read |
72 | Time Stamp Counter) instruction for benchmarking. |
73 | |
74 | config M586MMX |
75 | bool "Pentium-MMX" |
76 | depends on X86_32 |
77 | ---help--- |
78 | Select this for a Pentium with the MMX graphics/multimedia |
79 | extended instructions. |
80 | |
81 | config M686 |
82 | bool "Pentium-Pro" |
83 | depends on X86_32 |
84 | ---help--- |
85 | Select this for Intel Pentium Pro chips. This enables the use of |
86 | Pentium Pro extended instructions, and disables the init-time guard |
87 | against the f00f bug found in earlier Pentiums. |
88 | |
89 | config MPENTIUMII |
90 | bool "Pentium-II/Celeron(pre-Coppermine)" |
91 | depends on X86_32 |
92 | ---help--- |
93 | Select this for Intel chips based on the Pentium-II and |
94 | pre-Coppermine Celeron core. This option enables an unaligned |
95 | copy optimization, compiles the kernel with optimization flags |
96 | tailored for the chip, and applies any applicable Pentium Pro |
97 | optimizations. |
98 | |
99 | config MPENTIUMIII |
100 | bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" |
101 | depends on X86_32 |
102 | ---help--- |
103 | Select this for Intel chips based on the Pentium-III and |
104 | Celeron-Coppermine core. This option enables use of some |
105 | extended prefetch instructions in addition to the Pentium II |
106 | extensions. |
107 | |
108 | config MPENTIUMM |
109 | bool "Pentium M" |
110 | depends on X86_32 |
111 | ---help--- |
112 | Select this for Intel Pentium M (not Pentium-4 M) |
113 | notebook chips. |
114 | |
115 | config MPENTIUM4 |
116 | bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" |
117 | depends on X86_32 |
118 | ---help--- |
119 | Select this for Intel Pentium 4 chips. This includes the |
120 | Pentium 4, Pentium D, P4-based Celeron and Xeon, and |
121 | Pentium-4 M (not Pentium M) chips. This option enables compile |
122 | flags optimized for the chip, uses the correct cache line size, and |
123 | applies any applicable optimizations. |
124 | |
125 | CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 ) |
126 | |
127 | Select this for: |
128 | Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename: |
129 | -Willamette |
130 | -Northwood |
131 | -Mobile Pentium 4 |
132 | -Mobile Pentium 4 M |
133 | -Extreme Edition (Gallatin) |
134 | -Prescott |
135 | -Prescott 2M |
136 | -Cedar Mill |
137 | -Presler |
138 | -Smithfiled |
139 | Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename: |
140 | -Foster |
141 | -Prestonia |
142 | -Gallatin |
143 | -Nocona |
144 | -Irwindale |
145 | -Cranford |
146 | -Potomac |
147 | -Paxville |
148 | -Dempsey |
149 | |
150 | |
151 | config MK6 |
152 | bool "K6/K6-II/K6-III" |
153 | depends on X86_32 |
154 | ---help--- |
155 | Select this for an AMD K6-family processor. Enables use of |
156 | some extended instructions, and passes appropriate optimization |
157 | flags to GCC. |
158 | |
159 | config MK7 |
160 | bool "Athlon/Duron/K7" |
161 | depends on X86_32 |
162 | ---help--- |
163 | Select this for an AMD Athlon K7-family processor. Enables use of |
164 | some extended instructions, and passes appropriate optimization |
165 | flags to GCC. |
166 | |
167 | config MK8 |
168 | bool "Opteron/Athlon64/Hammer/K8" |
169 | ---help--- |
170 | Select this for an AMD Opteron or Athlon64 Hammer-family processor. |
171 | Enables use of some extended instructions, and passes appropriate |
172 | optimization flags to GCC. |
173 | |
174 | config MCRUSOE |
175 | bool "Crusoe" |
176 | depends on X86_32 |
177 | ---help--- |
178 | Select this for a Transmeta Crusoe processor. Treats the processor |
179 | like a 586 with TSC, and sets some GCC optimization flags (like a |
180 | Pentium Pro with no alignment requirements). |
181 | |
182 | config MEFFICEON |
183 | bool "Efficeon" |
184 | depends on X86_32 |
185 | ---help--- |
186 | Select this for a Transmeta Efficeon processor. |
187 | |
188 | config MWINCHIPC6 |
189 | bool "Winchip-C6" |
190 | depends on X86_32 |
191 | ---help--- |
192 | Select this for an IDT Winchip C6 chip. Linux and GCC |
193 | treat this chip as a 586TSC with some extended instructions |
194 | and alignment requirements. |
195 | |
196 | config MWINCHIP3D |
197 | bool "Winchip-2/Winchip-2A/Winchip-3" |
198 | depends on X86_32 |
199 | ---help--- |
200 | Select this for an IDT Winchip-2, 2A or 3. Linux and GCC |
201 | treat this chip as a 586TSC with some extended instructions |
202 | and alignment requirements. Also enable out of order memory |
203 | stores for this CPU, which can increase performance of some |
204 | operations. |
205 | |
206 | config MGEODEGX1 |
207 | bool "GeodeGX1" |
208 | depends on X86_32 |
209 | ---help--- |
210 | Select this for a Geode GX1 (Cyrix MediaGX) chip. |
211 | |
212 | config MGEODE_LX |
213 | bool "Geode GX/LX" |
214 | depends on X86_32 |
215 | ---help--- |
216 | Select this for AMD Geode GX and LX processors. |
217 | |
218 | config MCYRIXIII |
219 | bool "CyrixIII/VIA-C3" |
220 | depends on X86_32 |
221 | ---help--- |
222 | Select this for a Cyrix III or C3 chip. Presently Linux and GCC |
223 | treat this chip as a generic 586. Whilst the CPU is 686 class, |
224 | it lacks the cmov extension which gcc assumes is present when |
225 | generating 686 code. |
226 | Note that Nehemiah (Model 9) and above will not boot with this |
227 | kernel due to them lacking the 3DNow! instructions used in earlier |
228 | incarnations of the CPU. |
229 | |
230 | config MVIAC3_2 |
231 | bool "VIA C3-2 (Nehemiah)" |
232 | depends on X86_32 |
233 | ---help--- |
234 | Select this for a VIA C3 "Nehemiah". Selecting this enables usage |
235 | of SSE and tells gcc to treat the CPU as a 686. |
236 | Note, this kernel will not boot on older (pre model 9) C3s. |
237 | |
238 | config MVIAC7 |
239 | bool "VIA C7" |
240 | depends on X86_32 |
241 | ---help--- |
242 | Select this for a VIA C7. Selecting this uses the correct cache |
243 | shift and tells gcc to treat the CPU as a 686. |
244 | |
245 | config MPSC |
246 | bool "Intel P4 / older Netburst based Xeon" |
247 | depends on X86_64 |
248 | ---help--- |
249 | Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey |
250 | Xeon CPUs with Intel 64bit which is compatible with x86-64. |
251 | Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the |
252 | Netburst core and shouldn't use this option. You can distinguish them |
253 | using the cpu family field |
254 | in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. |
255 | |
256 | config MCORE2 |
257 | bool "Core 2/newer Xeon" |
258 | ---help--- |
259 | |
260 | Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and |
261 | 53xx) CPUs. You can distinguish newer from older Xeons by the CPU |
262 | family in /proc/cpuinfo. Newer ones have 6 and older ones 15 |
263 | (not a typo) |
264 | |
265 | config MATOM |
266 | bool "Intel Atom" |
267 | ---help--- |
268 | |
269 | Select this for the Intel Atom platform. Intel Atom CPUs have an |
270 | in-order pipelining architecture and thus can benefit from |
271 | accordingly optimized code. Use a recent GCC with specific Atom |
272 | support in order to fully benefit from selecting this option. |
273 | |
274 | config GENERIC_CPU |
275 | bool "Generic-x86-64" |
276 | depends on X86_64 |
277 | ---help--- |
278 | Generic x86-64 CPU. |
279 | Run equally well on all x86-64 CPUs. |
280 | |
281 | endchoice |
282 | |
283 | config X86_GENERIC |
284 | bool "Generic x86 support" |
285 | depends on X86_32 |
286 | ---help--- |
287 | Instead of just including optimizations for the selected |
288 | x86 variant (e.g. PII, Crusoe or Athlon), include some more |
289 | generic optimizations as well. This will make the kernel |
290 | perform better on x86 CPUs other than that selected. |
291 | |
292 | This is really intended for distributors who need more |
293 | generic optimizations. |
294 | |
295 | endif |
296 | |
297 | config X86_CPU |
298 | def_bool y |
299 | select GENERIC_FIND_FIRST_BIT |
300 | select GENERIC_FIND_NEXT_BIT |
301 | |
302 | # |
303 | # Define implied options from the CPU selection here |
304 | config X86_INTERNODE_CACHE_SHIFT |
305 | int |
306 | default "12" if X86_VSMP |
307 | default "7" if NUMA |
308 | default X86_L1_CACHE_SHIFT |
309 | |
310 | config X86_CMPXCHG |
311 | def_bool X86_64 || (X86_32 && !M386) |
312 | |
313 | config X86_L1_CACHE_SHIFT |
314 | int |
315 | default "7" if MPENTIUM4 || MPSC |
316 | default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU |
317 | default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 |
318 | default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX |
319 | |
320 | config X86_XADD |
321 | def_bool y |
322 | depends on X86_64 || !M386 |
323 | |
324 | config X86_PPRO_FENCE |
325 | bool "PentiumPro memory ordering errata workaround" |
326 | depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 |
327 | ---help--- |
328 | Old PentiumPro multiprocessor systems had errata that could cause |
329 | memory operations to violate the x86 ordering standard in rare cases. |
330 | Enabling this option will attempt to work around some (but not all) |
331 | occurances of this problem, at the cost of much heavier spinlock and |
332 | memory barrier operations. |
333 | |
334 | If unsure, say n here. Even distro kernels should think twice before |
335 | enabling this: there are few systems, and an unlikely bug. |
336 | |
337 | config X86_F00F_BUG |
338 | def_bool y |
339 | depends on M586MMX || M586TSC || M586 || M486 || M386 |
340 | |
341 | config X86_INVD_BUG |
342 | def_bool y |
343 | depends on M486 || M386 |
344 | |
345 | config X86_WP_WORKS_OK |
346 | def_bool y |
347 | depends on !M386 |
348 | |
349 | config X86_INVLPG |
350 | def_bool y |
351 | depends on X86_32 && !M386 |
352 | |
353 | config X86_BSWAP |
354 | def_bool y |
355 | depends on X86_32 && !M386 |
356 | |
357 | config X86_POPAD_OK |
358 | def_bool y |
359 | depends on X86_32 && !M386 |
360 | |
361 | config X86_ALIGNMENT_16 |
362 | def_bool y |
363 | depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1 |
364 | |
365 | config X86_INTEL_USERCOPY |
366 | def_bool y |
367 | depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 |
368 | |
369 | config X86_USE_PPRO_CHECKSUM |
370 | def_bool y |
371 | depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM |
372 | |
373 | config X86_USE_3DNOW |
374 | def_bool y |
375 | depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML |
376 | |
377 | config X86_OOSTORE |
378 | def_bool y |
379 | depends on (MWINCHIP3D || MWINCHIPC6) && MTRR |
380 | |
381 | # |
382 | # P6_NOPs are a relatively minor optimization that require a family >= |
383 | # 6 processor, except that it is broken on certain VIA chips. |
384 | # Furthermore, AMD chips prefer a totally different sequence of NOPs |
385 | # (which work on all CPUs). In addition, it looks like Virtual PC |
386 | # does not understand them. |
387 | # |
388 | # As a result, disallow these if we're not compiling for X86_64 (these |
389 | # NOPs do work on all x86-64 capable chips); the list of processors in |
390 | # the right-hand clause are the cores that benefit from this optimization. |
391 | # |
392 | config X86_P6_NOP |
393 | def_bool y |
394 | depends on X86_64 |
395 | depends on (MCORE2 || MPENTIUM4 || MPSC) |
396 | |
397 | config X86_TSC |
398 | def_bool y |
399 | depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64 |
400 | |
401 | config X86_CMPXCHG64 |
402 | def_bool y |
403 | depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM |
404 | |
405 | # this should be set for all -march=.. options where the compiler |
406 | # generates cmov. |
407 | config X86_CMOV |
408 | def_bool y |
409 | depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX) |
410 | |
411 | config X86_MINIMUM_CPU_FAMILY |
412 | int |
413 | default "64" if X86_64 |
414 | default "6" if X86_32 && X86_P6_NOP |
415 | default "5" if X86_32 && X86_CMPXCHG64 |
416 | default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK) |
417 | default "3" |
418 | |
419 | config X86_DEBUGCTLMSR |
420 | def_bool y |
421 | depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML |
422 | |
423 | menuconfig PROCESSOR_SELECT |
424 | bool "Supported processor vendors" if EMBEDDED |
425 | ---help--- |
426 | This lets you choose what x86 vendor support code your kernel |
427 | will include. |
428 | |
429 | config CPU_SUP_INTEL |
430 | default y |
431 | bool "Support Intel processors" if PROCESSOR_SELECT |
432 | ---help--- |
433 | This enables detection, tunings and quirks for Intel processors |
434 | |
435 | You need this enabled if you want your kernel to run on an |
436 | Intel CPU. Disabling this option on other types of CPUs |
437 | makes the kernel a tiny bit smaller. Disabling it on an Intel |
438 | CPU might render the kernel unbootable. |
439 | |
440 | If unsure, say N. |
441 | |
442 | config CPU_SUP_CYRIX_32 |
443 | default y |
444 | bool "Support Cyrix processors" if PROCESSOR_SELECT |
445 | depends on !64BIT |
446 | ---help--- |
447 | This enables detection, tunings and quirks for Cyrix processors |
448 | |
449 | You need this enabled if you want your kernel to run on a |
450 | Cyrix CPU. Disabling this option on other types of CPUs |
451 | makes the kernel a tiny bit smaller. Disabling it on a Cyrix |
452 | CPU might render the kernel unbootable. |
453 | |
454 | If unsure, say N. |
455 | |
456 | config CPU_SUP_AMD |
457 | default y |
458 | bool "Support AMD processors" if PROCESSOR_SELECT |
459 | ---help--- |
460 | This enables detection, tunings and quirks for AMD processors |
461 | |
462 | You need this enabled if you want your kernel to run on an |
463 | AMD CPU. Disabling this option on other types of CPUs |
464 | makes the kernel a tiny bit smaller. Disabling it on an AMD |
465 | CPU might render the kernel unbootable. |
466 | |
467 | If unsure, say N. |
468 | |
469 | config CPU_SUP_CENTAUR |
470 | default y |
471 | bool "Support Centaur processors" if PROCESSOR_SELECT |
472 | ---help--- |
473 | This enables detection, tunings and quirks for Centaur processors |
474 | |
475 | You need this enabled if you want your kernel to run on a |
476 | Centaur CPU. Disabling this option on other types of CPUs |
477 | makes the kernel a tiny bit smaller. Disabling it on a Centaur |
478 | CPU might render the kernel unbootable. |
479 | |
480 | If unsure, say N. |
481 | |
482 | config CPU_SUP_TRANSMETA_32 |
483 | default y |
484 | bool "Support Transmeta processors" if PROCESSOR_SELECT |
485 | depends on !64BIT |
486 | ---help--- |
487 | This enables detection, tunings and quirks for Transmeta processors |
488 | |
489 | You need this enabled if you want your kernel to run on a |
490 | Transmeta CPU. Disabling this option on other types of CPUs |
491 | makes the kernel a tiny bit smaller. Disabling it on a Transmeta |
492 | CPU might render the kernel unbootable. |
493 | |
494 | If unsure, say N. |
495 | |
496 | config CPU_SUP_UMC_32 |
497 | default y |
498 | bool "Support UMC processors" if PROCESSOR_SELECT |
499 | depends on !64BIT |
500 | ---help--- |
501 | This enables detection, tunings and quirks for UMC processors |
502 | |
503 | You need this enabled if you want your kernel to run on a |
504 | UMC CPU. Disabling this option on other types of CPUs |
505 | makes the kernel a tiny bit smaller. Disabling it on a UMC |
506 | CPU might render the kernel unbootable. |
507 | |
508 | If unsure, say N. |
509 |
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