Root/lib/swiotlb.c

1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define OFFSET(val,align) ((unsigned long) \
42                       ( (val) & ( (align) - 1)))
43
44#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
45
46/*
47 * Minimum IO TLB size to bother booting with. Systems with mainly
48 * 64bit capable cards will only lightly use the swiotlb. If we can't
49 * allocate a contiguous 1MB, we're probably in trouble anyway.
50 */
51#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
52
53int swiotlb_force;
54
55/*
56 * Used to do a quick range check in swiotlb_tbl_unmap_single and
57 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
58 * API.
59 */
60static char *io_tlb_start, *io_tlb_end;
61
62/*
63 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
64 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
65 */
66static unsigned long io_tlb_nslabs;
67
68/*
69 * When the IOMMU overflows we return a fallback buffer. This sets the size.
70 */
71static unsigned long io_tlb_overflow = 32*1024;
72
73void *io_tlb_overflow_buffer;
74
75/*
76 * This is a free list describing the number of free entries available from
77 * each index
78 */
79static unsigned int *io_tlb_list;
80static unsigned int io_tlb_index;
81
82/*
83 * We need to save away the original address corresponding to a mapped entry
84 * for the sync operations.
85 */
86static phys_addr_t *io_tlb_orig_addr;
87
88/*
89 * Protect the above data structures in the map and unmap calls
90 */
91static DEFINE_SPINLOCK(io_tlb_lock);
92
93static int late_alloc;
94
95static int __init
96setup_io_tlb_npages(char *str)
97{
98    if (isdigit(*str)) {
99        io_tlb_nslabs = simple_strtoul(str, &str, 0);
100        /* avoid tail segment of size < IO_TLB_SEGSIZE */
101        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
102    }
103    if (*str == ',')
104        ++str;
105    if (!strcmp(str, "force"))
106        swiotlb_force = 1;
107
108    return 1;
109}
110__setup("swiotlb=", setup_io_tlb_npages);
111/* make io_tlb_overflow tunable too? */
112
113/* Note that this doesn't work with highmem page */
114static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
115                      volatile void *address)
116{
117    return phys_to_dma(hwdev, virt_to_phys(address));
118}
119
120void swiotlb_print_info(void)
121{
122    unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
123    phys_addr_t pstart, pend;
124
125    pstart = virt_to_phys(io_tlb_start);
126    pend = virt_to_phys(io_tlb_end);
127
128    printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
129           bytes >> 20, io_tlb_start, io_tlb_end);
130    printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
131           (unsigned long long)pstart,
132           (unsigned long long)pend);
133}
134
135void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
136{
137    unsigned long i, bytes;
138
139    bytes = nslabs << IO_TLB_SHIFT;
140
141    io_tlb_nslabs = nslabs;
142    io_tlb_start = tlb;
143    io_tlb_end = io_tlb_start + bytes;
144
145    /*
146     * Allocate and initialize the free list array. This array is used
147     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
148     * between io_tlb_start and io_tlb_end.
149     */
150    io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
151    for (i = 0; i < io_tlb_nslabs; i++)
152         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
153    io_tlb_index = 0;
154    io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
155
156    /*
157     * Get the overflow emergency buffer
158     */
159    io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
160    if (!io_tlb_overflow_buffer)
161        panic("Cannot allocate SWIOTLB overflow buffer!\n");
162    if (verbose)
163        swiotlb_print_info();
164}
165
166/*
167 * Statically reserve bounce buffer space and initialize bounce buffer data
168 * structures for the software IO TLB used to implement the DMA API.
169 */
170void __init
171swiotlb_init_with_default_size(size_t default_size, int verbose)
172{
173    unsigned long bytes;
174
175    if (!io_tlb_nslabs) {
176        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
177        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
178    }
179
180    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
181
182    /*
183     * Get IO TLB memory from the low pages
184     */
185    io_tlb_start = alloc_bootmem_low_pages(bytes);
186    if (!io_tlb_start)
187        panic("Cannot allocate SWIOTLB buffer");
188
189    swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
190}
191
192void __init
193swiotlb_init(int verbose)
194{
195    swiotlb_init_with_default_size(64 * (1<<20), verbose); /* default to 64MB */
196}
197
198/*
199 * Systems with larger DMA zones (those that don't support ISA) can
200 * initialize the swiotlb later using the slab allocator if needed.
201 * This should be just like above, but with some error catching.
202 */
203int
204swiotlb_late_init_with_default_size(size_t default_size)
205{
206    unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
207    unsigned int order;
208
209    if (!io_tlb_nslabs) {
210        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
211        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
212    }
213
214    /*
215     * Get IO TLB memory from the low pages
216     */
217    order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
218    io_tlb_nslabs = SLABS_PER_PAGE << order;
219    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
220
221    while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
222        io_tlb_start = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
223                            order);
224        if (io_tlb_start)
225            break;
226        order--;
227    }
228
229    if (!io_tlb_start)
230        goto cleanup1;
231
232    if (order != get_order(bytes)) {
233        printk(KERN_WARNING "Warning: only able to allocate %ld MB "
234               "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
235        io_tlb_nslabs = SLABS_PER_PAGE << order;
236        bytes = io_tlb_nslabs << IO_TLB_SHIFT;
237    }
238    io_tlb_end = io_tlb_start + bytes;
239    memset(io_tlb_start, 0, bytes);
240
241    /*
242     * Allocate and initialize the free list array. This array is used
243     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
244     * between io_tlb_start and io_tlb_end.
245     */
246    io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
247                                  get_order(io_tlb_nslabs * sizeof(int)));
248    if (!io_tlb_list)
249        goto cleanup2;
250
251    for (i = 0; i < io_tlb_nslabs; i++)
252         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
253    io_tlb_index = 0;
254
255    io_tlb_orig_addr = (phys_addr_t *)
256        __get_free_pages(GFP_KERNEL,
257                 get_order(io_tlb_nslabs *
258                       sizeof(phys_addr_t)));
259    if (!io_tlb_orig_addr)
260        goto cleanup3;
261
262    memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
263
264    /*
265     * Get the overflow emergency buffer
266     */
267    io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
268                                              get_order(io_tlb_overflow));
269    if (!io_tlb_overflow_buffer)
270        goto cleanup4;
271
272    swiotlb_print_info();
273
274    late_alloc = 1;
275
276    return 0;
277
278cleanup4:
279    free_pages((unsigned long)io_tlb_orig_addr,
280           get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
281    io_tlb_orig_addr = NULL;
282cleanup3:
283    free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
284                                                     sizeof(int)));
285    io_tlb_list = NULL;
286cleanup2:
287    io_tlb_end = NULL;
288    free_pages((unsigned long)io_tlb_start, order);
289    io_tlb_start = NULL;
290cleanup1:
291    io_tlb_nslabs = req_nslabs;
292    return -ENOMEM;
293}
294
295void __init swiotlb_free(void)
296{
297    if (!io_tlb_overflow_buffer)
298        return;
299
300    if (late_alloc) {
301        free_pages((unsigned long)io_tlb_overflow_buffer,
302               get_order(io_tlb_overflow));
303        free_pages((unsigned long)io_tlb_orig_addr,
304               get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
305        free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
306                                 sizeof(int)));
307        free_pages((unsigned long)io_tlb_start,
308               get_order(io_tlb_nslabs << IO_TLB_SHIFT));
309    } else {
310        free_bootmem_late(__pa(io_tlb_overflow_buffer),
311                  io_tlb_overflow);
312        free_bootmem_late(__pa(io_tlb_orig_addr),
313                  io_tlb_nslabs * sizeof(phys_addr_t));
314        free_bootmem_late(__pa(io_tlb_list),
315                  io_tlb_nslabs * sizeof(int));
316        free_bootmem_late(__pa(io_tlb_start),
317                  io_tlb_nslabs << IO_TLB_SHIFT);
318    }
319}
320
321static int is_swiotlb_buffer(phys_addr_t paddr)
322{
323    return paddr >= virt_to_phys(io_tlb_start) &&
324        paddr < virt_to_phys(io_tlb_end);
325}
326
327/*
328 * Bounce: copy the swiotlb buffer back to the original dma location
329 */
330void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
331            enum dma_data_direction dir)
332{
333    unsigned long pfn = PFN_DOWN(phys);
334
335    if (PageHighMem(pfn_to_page(pfn))) {
336        /* The buffer does not have a mapping. Map it in and copy */
337        unsigned int offset = phys & ~PAGE_MASK;
338        char *buffer;
339        unsigned int sz = 0;
340        unsigned long flags;
341
342        while (size) {
343            sz = min_t(size_t, PAGE_SIZE - offset, size);
344
345            local_irq_save(flags);
346            buffer = kmap_atomic(pfn_to_page(pfn),
347                         KM_BOUNCE_READ);
348            if (dir == DMA_TO_DEVICE)
349                memcpy(dma_addr, buffer + offset, sz);
350            else
351                memcpy(buffer + offset, dma_addr, sz);
352            kunmap_atomic(buffer, KM_BOUNCE_READ);
353            local_irq_restore(flags);
354
355            size -= sz;
356            pfn++;
357            dma_addr += sz;
358            offset = 0;
359        }
360    } else {
361        if (dir == DMA_TO_DEVICE)
362            memcpy(dma_addr, phys_to_virt(phys), size);
363        else
364            memcpy(phys_to_virt(phys), dma_addr, size);
365    }
366}
367EXPORT_SYMBOL_GPL(swiotlb_bounce);
368
369void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
370                 phys_addr_t phys, size_t size,
371                 enum dma_data_direction dir)
372{
373    unsigned long flags;
374    char *dma_addr;
375    unsigned int nslots, stride, index, wrap;
376    int i;
377    unsigned long mask;
378    unsigned long offset_slots;
379    unsigned long max_slots;
380
381    mask = dma_get_seg_boundary(hwdev);
382
383    tbl_dma_addr &= mask;
384
385    offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
386
387    /*
388      * Carefully handle integer overflow which can occur when mask == ~0UL.
389      */
390    max_slots = mask + 1
391            ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
392            : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
393
394    /*
395     * For mappings greater than a page, we limit the stride (and
396     * hence alignment) to a page size.
397     */
398    nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
399    if (size > PAGE_SIZE)
400        stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
401    else
402        stride = 1;
403
404    BUG_ON(!nslots);
405
406    /*
407     * Find suitable number of IO TLB entries size that will fit this
408     * request and allocate a buffer from that IO TLB pool.
409     */
410    spin_lock_irqsave(&io_tlb_lock, flags);
411    index = ALIGN(io_tlb_index, stride);
412    if (index >= io_tlb_nslabs)
413        index = 0;
414    wrap = index;
415
416    do {
417        while (iommu_is_span_boundary(index, nslots, offset_slots,
418                          max_slots)) {
419            index += stride;
420            if (index >= io_tlb_nslabs)
421                index = 0;
422            if (index == wrap)
423                goto not_found;
424        }
425
426        /*
427         * If we find a slot that indicates we have 'nslots' number of
428         * contiguous buffers, we allocate the buffers from that slot
429         * and mark the entries as '0' indicating unavailable.
430         */
431        if (io_tlb_list[index] >= nslots) {
432            int count = 0;
433
434            for (i = index; i < (int) (index + nslots); i++)
435                io_tlb_list[i] = 0;
436            for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
437                io_tlb_list[i] = ++count;
438            dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
439
440            /*
441             * Update the indices to avoid searching in the next
442             * round.
443             */
444            io_tlb_index = ((index + nslots) < io_tlb_nslabs
445                    ? (index + nslots) : 0);
446
447            goto found;
448        }
449        index += stride;
450        if (index >= io_tlb_nslabs)
451            index = 0;
452    } while (index != wrap);
453
454not_found:
455    spin_unlock_irqrestore(&io_tlb_lock, flags);
456    return NULL;
457found:
458    spin_unlock_irqrestore(&io_tlb_lock, flags);
459
460    /*
461     * Save away the mapping from the original address to the DMA address.
462     * This is needed when we sync the memory. Then we sync the buffer if
463     * needed.
464     */
465    for (i = 0; i < nslots; i++)
466        io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
467    if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
468        swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
469
470    return dma_addr;
471}
472EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
473
474/*
475 * Allocates bounce buffer and returns its kernel virtual address.
476 */
477
478static void *
479map_single(struct device *hwdev, phys_addr_t phys, size_t size,
480       enum dma_data_direction dir)
481{
482    dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
483
484    return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
485}
486
487/*
488 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
489 */
490void
491swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
492            enum dma_data_direction dir)
493{
494    unsigned long flags;
495    int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
496    int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
497    phys_addr_t phys = io_tlb_orig_addr[index];
498
499    /*
500     * First, sync the memory before unmapping the entry
501     */
502    if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
503        swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
504
505    /*
506     * Return the buffer to the free list by setting the corresponding
507     * entries to indicate the number of contiguous entries available.
508     * While returning the entries to the free list, we merge the entries
509     * with slots below and above the pool being returned.
510     */
511    spin_lock_irqsave(&io_tlb_lock, flags);
512    {
513        count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
514             io_tlb_list[index + nslots] : 0);
515        /*
516         * Step 1: return the slots to the free list, merging the
517         * slots with superceeding slots
518         */
519        for (i = index + nslots - 1; i >= index; i--)
520            io_tlb_list[i] = ++count;
521        /*
522         * Step 2: merge the returned slots with the preceding slots,
523         * if available (non zero)
524         */
525        for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
526            io_tlb_list[i] = ++count;
527    }
528    spin_unlock_irqrestore(&io_tlb_lock, flags);
529}
530EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
531
532void
533swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
534            enum dma_data_direction dir,
535            enum dma_sync_target target)
536{
537    int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
538    phys_addr_t phys = io_tlb_orig_addr[index];
539
540    phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
541
542    switch (target) {
543    case SYNC_FOR_CPU:
544        if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
545            swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
546        else
547            BUG_ON(dir != DMA_TO_DEVICE);
548        break;
549    case SYNC_FOR_DEVICE:
550        if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
551            swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
552        else
553            BUG_ON(dir != DMA_FROM_DEVICE);
554        break;
555    default:
556        BUG();
557    }
558}
559EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
560
561void *
562swiotlb_alloc_coherent(struct device *hwdev, size_t size,
563               dma_addr_t *dma_handle, gfp_t flags)
564{
565    dma_addr_t dev_addr;
566    void *ret;
567    int order = get_order(size);
568    u64 dma_mask = DMA_BIT_MASK(32);
569
570    if (hwdev && hwdev->coherent_dma_mask)
571        dma_mask = hwdev->coherent_dma_mask;
572
573    ret = (void *)__get_free_pages(flags, order);
574    if (ret && swiotlb_virt_to_bus(hwdev, ret) + size - 1 > dma_mask) {
575        /*
576         * The allocated memory isn't reachable by the device.
577         */
578        free_pages((unsigned long) ret, order);
579        ret = NULL;
580    }
581    if (!ret) {
582        /*
583         * We are either out of memory or the device can't DMA to
584         * GFP_DMA memory; fall back on map_single(), which
585         * will grab memory from the lowest available address range.
586         */
587        ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
588        if (!ret)
589            return NULL;
590    }
591
592    memset(ret, 0, size);
593    dev_addr = swiotlb_virt_to_bus(hwdev, ret);
594
595    /* Confirm address can be DMA'd by device */
596    if (dev_addr + size - 1 > dma_mask) {
597        printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
598               (unsigned long long)dma_mask,
599               (unsigned long long)dev_addr);
600
601        /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
602        swiotlb_tbl_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
603        return NULL;
604    }
605    *dma_handle = dev_addr;
606    return ret;
607}
608EXPORT_SYMBOL(swiotlb_alloc_coherent);
609
610void
611swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
612              dma_addr_t dev_addr)
613{
614    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
615
616    WARN_ON(irqs_disabled());
617    if (!is_swiotlb_buffer(paddr))
618        free_pages((unsigned long)vaddr, get_order(size));
619    else
620        /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
621        swiotlb_tbl_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
622}
623EXPORT_SYMBOL(swiotlb_free_coherent);
624
625static void
626swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
627         int do_panic)
628{
629    /*
630     * Ran out of IOMMU space for this operation. This is very bad.
631     * Unfortunately the drivers cannot handle this operation properly.
632     * unless they check for dma_mapping_error (most don't)
633     * When the mapping is small enough return a static buffer to limit
634     * the damage, or panic when the transfer is too big.
635     */
636    printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
637           "device %s\n", size, dev ? dev_name(dev) : "?");
638
639    if (size <= io_tlb_overflow || !do_panic)
640        return;
641
642    if (dir == DMA_BIDIRECTIONAL)
643        panic("DMA: Random memory could be DMA accessed\n");
644    if (dir == DMA_FROM_DEVICE)
645        panic("DMA: Random memory could be DMA written\n");
646    if (dir == DMA_TO_DEVICE)
647        panic("DMA: Random memory could be DMA read\n");
648}
649
650/*
651 * Map a single buffer of the indicated size for DMA in streaming mode. The
652 * physical address to use is returned.
653 *
654 * Once the device is given the dma address, the device owns this memory until
655 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
656 */
657dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
658                unsigned long offset, size_t size,
659                enum dma_data_direction dir,
660                struct dma_attrs *attrs)
661{
662    phys_addr_t phys = page_to_phys(page) + offset;
663    dma_addr_t dev_addr = phys_to_dma(dev, phys);
664    void *map;
665
666    BUG_ON(dir == DMA_NONE);
667    /*
668     * If the address happens to be in the device's DMA window,
669     * we can safely return the device addr and not worry about bounce
670     * buffering it.
671     */
672    if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
673        return dev_addr;
674
675    /*
676     * Oh well, have to allocate and map a bounce buffer.
677     */
678    map = map_single(dev, phys, size, dir);
679    if (!map) {
680        swiotlb_full(dev, size, dir, 1);
681        map = io_tlb_overflow_buffer;
682    }
683
684    dev_addr = swiotlb_virt_to_bus(dev, map);
685
686    /*
687     * Ensure that the address returned is DMA'ble
688     */
689    if (!dma_capable(dev, dev_addr, size))
690        panic("map_single: bounce buffer is not DMA'ble");
691
692    return dev_addr;
693}
694EXPORT_SYMBOL_GPL(swiotlb_map_page);
695
696/*
697 * Unmap a single streaming mode DMA translation. The dma_addr and size must
698 * match what was provided for in a previous swiotlb_map_page call. All
699 * other usages are undefined.
700 *
701 * After this call, reads by the cpu to the buffer are guaranteed to see
702 * whatever the device wrote there.
703 */
704static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
705             size_t size, enum dma_data_direction dir)
706{
707    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
708
709    BUG_ON(dir == DMA_NONE);
710
711    if (is_swiotlb_buffer(paddr)) {
712        swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
713        return;
714    }
715
716    if (dir != DMA_FROM_DEVICE)
717        return;
718
719    /*
720     * phys_to_virt doesn't work with hihgmem page but we could
721     * call dma_mark_clean() with hihgmem page here. However, we
722     * are fine since dma_mark_clean() is null on POWERPC. We can
723     * make dma_mark_clean() take a physical address if necessary.
724     */
725    dma_mark_clean(phys_to_virt(paddr), size);
726}
727
728void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
729            size_t size, enum dma_data_direction dir,
730            struct dma_attrs *attrs)
731{
732    unmap_single(hwdev, dev_addr, size, dir);
733}
734EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
735
736/*
737 * Make physical memory consistent for a single streaming mode DMA translation
738 * after a transfer.
739 *
740 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
741 * using the cpu, yet do not wish to teardown the dma mapping, you must
742 * call this function before doing so. At the next point you give the dma
743 * address back to the card, you must first perform a
744 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
745 */
746static void
747swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
748            size_t size, enum dma_data_direction dir,
749            enum dma_sync_target target)
750{
751    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
752
753    BUG_ON(dir == DMA_NONE);
754
755    if (is_swiotlb_buffer(paddr)) {
756        swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
757                       target);
758        return;
759    }
760
761    if (dir != DMA_FROM_DEVICE)
762        return;
763
764    dma_mark_clean(phys_to_virt(paddr), size);
765}
766
767void
768swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
769                size_t size, enum dma_data_direction dir)
770{
771    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
772}
773EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
774
775void
776swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
777                   size_t size, enum dma_data_direction dir)
778{
779    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
780}
781EXPORT_SYMBOL(swiotlb_sync_single_for_device);
782
783/*
784 * Map a set of buffers described by scatterlist in streaming mode for DMA.
785 * This is the scatter-gather version of the above swiotlb_map_page
786 * interface. Here the scatter gather list elements are each tagged with the
787 * appropriate dma address and length. They are obtained via
788 * sg_dma_{address,length}(SG).
789 *
790 * NOTE: An implementation may be able to use a smaller number of
791 * DMA address/length pairs than there are SG table elements.
792 * (for example via virtual mapping capabilities)
793 * The routine returns the number of addr/length pairs actually
794 * used, at most nents.
795 *
796 * Device ownership issues as mentioned above for swiotlb_map_page are the
797 * same here.
798 */
799int
800swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
801             enum dma_data_direction dir, struct dma_attrs *attrs)
802{
803    struct scatterlist *sg;
804    int i;
805
806    BUG_ON(dir == DMA_NONE);
807
808    for_each_sg(sgl, sg, nelems, i) {
809        phys_addr_t paddr = sg_phys(sg);
810        dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
811
812        if (swiotlb_force ||
813            !dma_capable(hwdev, dev_addr, sg->length)) {
814            void *map = map_single(hwdev, sg_phys(sg),
815                           sg->length, dir);
816            if (!map) {
817                /* Don't panic here, we expect map_sg users
818                   to do proper error handling. */
819                swiotlb_full(hwdev, sg->length, dir, 0);
820                swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
821                               attrs);
822                sgl[0].dma_length = 0;
823                return 0;
824            }
825            sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
826        } else
827            sg->dma_address = dev_addr;
828        sg->dma_length = sg->length;
829    }
830    return nelems;
831}
832EXPORT_SYMBOL(swiotlb_map_sg_attrs);
833
834int
835swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
836           enum dma_data_direction dir)
837{
838    return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
839}
840EXPORT_SYMBOL(swiotlb_map_sg);
841
842/*
843 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
844 * concerning calls here are the same as for swiotlb_unmap_page() above.
845 */
846void
847swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
848               int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
849{
850    struct scatterlist *sg;
851    int i;
852
853    BUG_ON(dir == DMA_NONE);
854
855    for_each_sg(sgl, sg, nelems, i)
856        unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
857
858}
859EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
860
861void
862swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
863         enum dma_data_direction dir)
864{
865    return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
866}
867EXPORT_SYMBOL(swiotlb_unmap_sg);
868
869/*
870 * Make physical memory consistent for a set of streaming mode DMA translations
871 * after a transfer.
872 *
873 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
874 * and usage.
875 */
876static void
877swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
878        int nelems, enum dma_data_direction dir,
879        enum dma_sync_target target)
880{
881    struct scatterlist *sg;
882    int i;
883
884    for_each_sg(sgl, sg, nelems, i)
885        swiotlb_sync_single(hwdev, sg->dma_address,
886                    sg->dma_length, dir, target);
887}
888
889void
890swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
891            int nelems, enum dma_data_direction dir)
892{
893    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
894}
895EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
896
897void
898swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
899               int nelems, enum dma_data_direction dir)
900{
901    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
902}
903EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
904
905int
906swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
907{
908    return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
909}
910EXPORT_SYMBOL(swiotlb_dma_mapping_error);
911
912/*
913 * Return whether the given device DMA address mask can be supported
914 * properly. For example, if your device can only drive the low 24-bits
915 * during bus mastering, then you would pass 0x00ffffff as the mask to
916 * this function.
917 */
918int
919swiotlb_dma_supported(struct device *hwdev, u64 mask)
920{
921    return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
922}
923EXPORT_SYMBOL(swiotlb_dma_supported);
924

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