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1 | /* |
2 | * OMAP44xx PRM instance offset macros |
3 | * |
4 | * Copyright (C) 2009-2010 Texas Instruments, Inc. |
5 | * Copyright (C) 2009-2010 Nokia Corporation |
6 | * |
7 | * Paul Walmsley (paul@pwsan.com) |
8 | * Rajendra Nayak (rnayak@ti.com) |
9 | * Benoit Cousson (b-cousson@ti.com) |
10 | * |
11 | * This file is automatically generated from the OMAP hardware databases. |
12 | * We respectfully ask that any modifications to this file be coordinated |
13 | * with the public linux-omap@vger.kernel.org mailing list and the |
14 | * authors above to ensure that the autogeneration scripts are kept |
15 | * up-to-date with the file contents. |
16 | * |
17 | * This program is free software; you can redistribute it and/or modify |
18 | * it under the terms of the GNU General Public License version 2 as |
19 | * published by the Free Software Foundation. |
20 | */ |
21 | |
22 | #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H |
23 | #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H |
24 | |
25 | |
26 | /* PRM */ |
27 | |
28 | /* PRM.OCP_SOCKET_PRM register offsets */ |
29 | #define OMAP4_REVISION_PRM_OFFSET 0x0000 |
30 | #define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0000) |
31 | #define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010 |
32 | #define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0010) |
33 | #define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014 |
34 | #define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0014) |
35 | #define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018 |
36 | #define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0018) |
37 | #define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c |
38 | #define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x001c) |
39 | #define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020 |
40 | #define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0020) |
41 | #define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028 |
42 | #define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0028) |
43 | #define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030 |
44 | #define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0030) |
45 | #define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038 |
46 | #define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0038) |
47 | #define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040 |
48 | #define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_MOD, 0x0040) |
49 | |
50 | /* PRM.CKGEN_PRM register offsets */ |
51 | #define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000 |
52 | #define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0000) |
53 | #define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008 |
54 | #define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0008) |
55 | #define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c |
56 | #define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x000c) |
57 | #define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010 |
58 | #define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_MOD, 0x0010) |
59 | |
60 | /* PRM.MPU_PRM register offsets */ |
61 | #define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000 |
62 | #define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0000) |
63 | #define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004 |
64 | #define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0004) |
65 | #define OMAP4_RM_MPU_RSTST_OFFSET 0x0014 |
66 | #define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0014) |
67 | #define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024 |
68 | #define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_MOD, 0x0024) |
69 | |
70 | /* PRM.TESLA_PRM register offsets */ |
71 | #define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000 |
72 | #define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0000) |
73 | #define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004 |
74 | #define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0004) |
75 | #define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010 |
76 | #define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0010) |
77 | #define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014 |
78 | #define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0014) |
79 | #define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024 |
80 | #define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_MOD, 0x0024) |
81 | |
82 | /* PRM.ABE_PRM register offsets */ |
83 | #define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000 |
84 | #define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0000) |
85 | #define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004 |
86 | #define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0004) |
87 | #define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c |
88 | #define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x002c) |
89 | #define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030 |
90 | #define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0030) |
91 | #define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034 |
92 | #define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0034) |
93 | #define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038 |
94 | #define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0038) |
95 | #define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c |
96 | #define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x003c) |
97 | #define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040 |
98 | #define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0040) |
99 | #define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044 |
100 | #define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0044) |
101 | #define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048 |
102 | #define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0048) |
103 | #define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c |
104 | #define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x004c) |
105 | #define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050 |
106 | #define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0050) |
107 | #define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054 |
108 | #define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0054) |
109 | #define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058 |
110 | #define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0058) |
111 | #define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c |
112 | #define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x005c) |
113 | #define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060 |
114 | #define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0060) |
115 | #define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064 |
116 | #define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0064) |
117 | #define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068 |
118 | #define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0068) |
119 | #define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c |
120 | #define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x006c) |
121 | #define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070 |
122 | #define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0070) |
123 | #define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074 |
124 | #define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0074) |
125 | #define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078 |
126 | #define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0078) |
127 | #define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c |
128 | #define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x007c) |
129 | #define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080 |
130 | #define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0080) |
131 | #define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084 |
132 | #define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0084) |
133 | #define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088 |
134 | #define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x0088) |
135 | #define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c |
136 | #define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_MOD, 0x008c) |
137 | |
138 | /* PRM.ALWAYS_ON_PRM register offsets */ |
139 | #define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024 |
140 | #define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0024) |
141 | #define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028 |
142 | #define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0028) |
143 | #define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c |
144 | #define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x002c) |
145 | #define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030 |
146 | #define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0030) |
147 | #define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034 |
148 | #define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0034) |
149 | #define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038 |
150 | #define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x0038) |
151 | #define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c |
152 | #define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_MOD, 0x003c) |
153 | |
154 | /* PRM.CORE_PRM register offsets */ |
155 | #define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000 |
156 | #define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0000) |
157 | #define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004 |
158 | #define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0004) |
159 | #define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024 |
160 | #define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0024) |
161 | #define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124 |
162 | #define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0124) |
163 | #define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c |
164 | #define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x012c) |
165 | #define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134 |
166 | #define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0134) |
167 | #define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210 |
168 | #define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0210) |
169 | #define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214 |
170 | #define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0214) |
171 | #define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224 |
172 | #define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0224) |
173 | #define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324 |
174 | #define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0324) |
175 | #define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424 |
176 | #define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0424) |
177 | #define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c |
178 | #define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x042c) |
179 | #define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434 |
180 | #define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0434) |
181 | #define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c |
182 | #define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x043c) |
183 | #define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444 |
184 | #define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0444) |
185 | #define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454 |
186 | #define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0454) |
187 | #define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c |
188 | #define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x045c) |
189 | #define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464 |
190 | #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0464) |
191 | #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 |
192 | #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0524) |
193 | #define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c |
194 | #define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x052c) |
195 | #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 |
196 | #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0534) |
197 | #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 |
198 | #define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0624) |
199 | #define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c |
200 | #define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x062c) |
201 | #define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634 |
202 | #define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0634) |
203 | #define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c |
204 | #define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x063c) |
205 | #define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724 |
206 | #define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0724) |
207 | #define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c |
208 | #define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x072c) |
209 | #define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744 |
210 | #define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_MOD, 0x0744) |
211 | |
212 | /* PRM.IVAHD_PRM register offsets */ |
213 | #define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000 |
214 | #define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0000) |
215 | #define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004 |
216 | #define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0004) |
217 | #define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010 |
218 | #define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0010) |
219 | #define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014 |
220 | #define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0014) |
221 | #define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024 |
222 | #define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x0024) |
223 | #define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c |
224 | #define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_MOD, 0x002c) |
225 | |
226 | /* PRM.CAM_PRM register offsets */ |
227 | #define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000 |
228 | #define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0000) |
229 | #define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004 |
230 | #define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0004) |
231 | #define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024 |
232 | #define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x0024) |
233 | #define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c |
234 | #define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_MOD, 0x002c) |
235 | |
236 | /* PRM.DSS_PRM register offsets */ |
237 | #define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000 |
238 | #define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0000) |
239 | #define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004 |
240 | #define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0004) |
241 | #define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020 |
242 | #define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0020) |
243 | #define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024 |
244 | #define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x0024) |
245 | #define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c |
246 | #define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_MOD, 0x002c) |
247 | |
248 | /* PRM.GFX_PRM register offsets */ |
249 | #define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000 |
250 | #define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0000) |
251 | #define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004 |
252 | #define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0004) |
253 | #define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024 |
254 | #define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_MOD, 0x0024) |
255 | |
256 | /* PRM.L3INIT_PRM register offsets */ |
257 | #define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000 |
258 | #define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0000) |
259 | #define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004 |
260 | #define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0004) |
261 | #define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028 |
262 | #define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0028) |
263 | #define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c |
264 | #define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x002c) |
265 | #define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030 |
266 | #define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0030) |
267 | #define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034 |
268 | #define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0034) |
269 | #define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038 |
270 | #define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0038) |
271 | #define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c |
272 | #define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x003c) |
273 | #define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040 |
274 | #define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0040) |
275 | #define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044 |
276 | #define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0044) |
277 | #define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058 |
278 | #define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0058) |
279 | #define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c |
280 | #define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x005c) |
281 | #define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060 |
282 | #define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0060) |
283 | #define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064 |
284 | #define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0064) |
285 | #define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068 |
286 | #define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0068) |
287 | #define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c |
288 | #define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x006c) |
289 | #define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c |
290 | #define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x007c) |
291 | #define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084 |
292 | #define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0084) |
293 | #define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 |
294 | #define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0088) |
295 | #define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c |
296 | #define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x008c) |
297 | #define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094 |
298 | #define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0094) |
299 | #define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098 |
300 | #define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x0098) |
301 | #define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c |
302 | #define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x009c) |
303 | #define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac |
304 | #define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00ac) |
305 | #define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0 |
306 | #define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c0) |
307 | #define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4 |
308 | #define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c4) |
309 | #define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8 |
310 | #define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00c8) |
311 | #define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc |
312 | #define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00cc) |
313 | #define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0 |
314 | #define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00d0) |
315 | #define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4 |
316 | #define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00d4) |
317 | #define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4 |
318 | #define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_MOD, 0x00e4) |
319 | |
320 | /* PRM.L4PER_PRM register offsets */ |
321 | #define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000 |
322 | #define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0000) |
323 | #define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004 |
324 | #define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0004) |
325 | #define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024 |
326 | #define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0024) |
327 | #define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028 |
328 | #define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0028) |
329 | #define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c |
330 | #define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x002c) |
331 | #define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030 |
332 | #define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0030) |
333 | #define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034 |
334 | #define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0034) |
335 | #define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038 |
336 | #define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0038) |
337 | #define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c |
338 | #define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x003c) |
339 | #define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040 |
340 | #define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0040) |
341 | #define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044 |
342 | #define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0044) |
343 | #define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048 |
344 | #define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0048) |
345 | #define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c |
346 | #define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x004c) |
347 | #define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050 |
348 | #define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0050) |
349 | #define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054 |
350 | #define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0054) |
351 | #define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c |
352 | #define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x005c) |
353 | #define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060 |
354 | #define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0060) |
355 | #define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064 |
356 | #define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0064) |
357 | #define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068 |
358 | #define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0068) |
359 | #define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c |
360 | #define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x006c) |
361 | #define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070 |
362 | #define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0070) |
363 | #define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074 |
364 | #define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0074) |
365 | #define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078 |
366 | #define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0078) |
367 | #define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c |
368 | #define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x007c) |
369 | #define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080 |
370 | #define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0080) |
371 | #define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084 |
372 | #define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0084) |
373 | #define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c |
374 | #define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x008c) |
375 | #define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090 |
376 | #define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0090) |
377 | #define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094 |
378 | #define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0094) |
379 | #define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098 |
380 | #define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0098) |
381 | #define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c |
382 | #define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x009c) |
383 | #define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0 |
384 | #define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a0) |
385 | #define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4 |
386 | #define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a4) |
387 | #define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8 |
388 | #define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00a8) |
389 | #define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac |
390 | #define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00ac) |
391 | #define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0 |
392 | #define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b0) |
393 | #define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4 |
394 | #define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b4) |
395 | #define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8 |
396 | #define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00b8) |
397 | #define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc |
398 | #define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00bc) |
399 | #define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0 |
400 | #define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00c0) |
401 | #define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0 |
402 | #define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d0) |
403 | #define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4 |
404 | #define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d4) |
405 | #define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8 |
406 | #define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00d8) |
407 | #define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc |
408 | #define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00dc) |
409 | #define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0 |
410 | #define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00e0) |
411 | #define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4 |
412 | #define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00e4) |
413 | #define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec |
414 | #define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00ec) |
415 | #define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0 |
416 | #define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f0) |
417 | #define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4 |
418 | #define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f4) |
419 | #define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8 |
420 | #define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00f8) |
421 | #define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc |
422 | #define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x00fc) |
423 | #define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100 |
424 | #define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0100) |
425 | #define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104 |
426 | #define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0104) |
427 | #define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108 |
428 | #define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0108) |
429 | #define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c |
430 | #define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x010c) |
431 | #define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120 |
432 | #define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0120) |
433 | #define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124 |
434 | #define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0124) |
435 | #define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128 |
436 | #define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0128) |
437 | #define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c |
438 | #define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x012c) |
439 | #define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134 |
440 | #define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0134) |
441 | #define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138 |
442 | #define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0138) |
443 | #define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c |
444 | #define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x013c) |
445 | #define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140 |
446 | #define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0140) |
447 | #define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144 |
448 | #define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0144) |
449 | #define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148 |
450 | #define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0148) |
451 | #define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c |
452 | #define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x014c) |
453 | #define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150 |
454 | #define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0150) |
455 | #define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154 |
456 | #define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0154) |
457 | #define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158 |
458 | #define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0158) |
459 | #define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c |
460 | #define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x015c) |
461 | #define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160 |
462 | #define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0160) |
463 | #define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164 |
464 | #define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0164) |
465 | #define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168 |
466 | #define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x0168) |
467 | #define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c |
468 | #define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x016c) |
469 | #define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4 |
470 | #define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01a4) |
471 | #define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac |
472 | #define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01ac) |
473 | #define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4 |
474 | #define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01b4) |
475 | #define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc |
476 | #define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01bc) |
477 | #define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4 |
478 | #define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01c4) |
479 | #define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc |
480 | #define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01cc) |
481 | #define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc |
482 | #define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_MOD, 0x01dc) |
483 | |
484 | /* PRM.CEFUSE_PRM register offsets */ |
485 | #define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 |
486 | #define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0000) |
487 | #define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004 |
488 | #define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0004) |
489 | #define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024 |
490 | #define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_MOD, 0x0024) |
491 | |
492 | /* PRM.WKUP_PRM register offsets */ |
493 | #define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024 |
494 | #define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0024) |
495 | #define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c |
496 | #define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x002c) |
497 | #define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030 |
498 | #define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0030) |
499 | #define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034 |
500 | #define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0034) |
501 | #define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038 |
502 | #define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0038) |
503 | #define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c |
504 | #define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x003c) |
505 | #define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040 |
506 | #define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0040) |
507 | #define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044 |
508 | #define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0044) |
509 | #define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048 |
510 | #define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0048) |
511 | #define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c |
512 | #define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x004c) |
513 | #define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054 |
514 | #define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0054) |
515 | #define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058 |
516 | #define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0058) |
517 | #define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c |
518 | #define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x005c) |
519 | #define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064 |
520 | #define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0064) |
521 | #define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078 |
522 | #define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0078) |
523 | #define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c |
524 | #define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x007c) |
525 | #define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080 |
526 | #define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0080) |
527 | #define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084 |
528 | #define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_MOD, 0x0084) |
529 | |
530 | /* PRM.WKUP_CM register offsets */ |
531 | #define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 |
532 | #define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0000) |
533 | #define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020 |
534 | #define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0020) |
535 | #define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028 |
536 | #define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0028) |
537 | #define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030 |
538 | #define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0030) |
539 | #define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038 |
540 | #define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0038) |
541 | #define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040 |
542 | #define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0040) |
543 | #define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048 |
544 | #define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0048) |
545 | #define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050 |
546 | #define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0050) |
547 | #define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058 |
548 | #define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0058) |
549 | #define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060 |
550 | #define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0060) |
551 | #define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078 |
552 | #define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0078) |
553 | #define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080 |
554 | #define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0080) |
555 | #define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088 |
556 | #define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_MOD, 0x0088) |
557 | |
558 | /* PRM.EMU_PRM register offsets */ |
559 | #define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000 |
560 | #define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0000) |
561 | #define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004 |
562 | #define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0004) |
563 | #define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024 |
564 | #define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_MOD, 0x0024) |
565 | |
566 | /* PRM.EMU_CM register offsets */ |
567 | #define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000 |
568 | #define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0000) |
569 | #define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008 |
570 | #define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0008) |
571 | #define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020 |
572 | #define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_MOD, 0x0020) |
573 | |
574 | /* PRM.DEVICE_PRM register offsets */ |
575 | #define OMAP4_PRM_RSTCTRL_OFFSET 0x0000 |
576 | #define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0000) |
577 | #define OMAP4_PRM_RSTST_OFFSET 0x0004 |
578 | #define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0004) |
579 | #define OMAP4_PRM_RSTTIME_OFFSET 0x0008 |
580 | #define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0008) |
581 | #define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c |
582 | #define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x000c) |
583 | #define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010 |
584 | #define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0010) |
585 | #define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014 |
586 | #define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0014) |
587 | #define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018 |
588 | #define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0018) |
589 | #define OMAP4_PRM_IO_COUNT_OFFSET 0x001c |
590 | #define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x001c) |
591 | #define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020 |
592 | #define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0020) |
593 | #define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024 |
594 | #define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0024) |
595 | #define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028 |
596 | #define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0028) |
597 | #define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c |
598 | #define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x002c) |
599 | #define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030 |
600 | #define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0030) |
601 | #define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 |
602 | #define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0034) |
603 | #define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 |
604 | #define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0038) |
605 | #define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c |
606 | #define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x003c) |
607 | #define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040 |
608 | #define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0040) |
609 | #define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044 |
610 | #define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0044) |
611 | #define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048 |
612 | #define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0048) |
613 | #define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c |
614 | #define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x004c) |
615 | #define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050 |
616 | #define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0050) |
617 | #define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054 |
618 | #define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0054) |
619 | #define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058 |
620 | #define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0058) |
621 | #define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c |
622 | #define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x005c) |
623 | #define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060 |
624 | #define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0060) |
625 | #define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064 |
626 | #define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0064) |
627 | #define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068 |
628 | #define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0068) |
629 | #define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c |
630 | #define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x006c) |
631 | #define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070 |
632 | #define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0070) |
633 | #define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074 |
634 | #define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0074) |
635 | #define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078 |
636 | #define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0078) |
637 | #define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c |
638 | #define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x007c) |
639 | #define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080 |
640 | #define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0080) |
641 | #define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084 |
642 | #define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0084) |
643 | #define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088 |
644 | #define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0088) |
645 | #define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c |
646 | #define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x008c) |
647 | #define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090 |
648 | #define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0090) |
649 | #define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094 |
650 | #define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0094) |
651 | #define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098 |
652 | #define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x0098) |
653 | #define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c |
654 | #define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x009c) |
655 | #define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0 |
656 | #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a0) |
657 | #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 |
658 | #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a4) |
659 | #define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 |
660 | #define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00a8) |
661 | #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac |
662 | #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00ac) |
663 | #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 |
664 | #define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b0) |
665 | #define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4 |
666 | #define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b4) |
667 | #define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8 |
668 | #define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00b8) |
669 | #define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc |
670 | #define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00bc) |
671 | #define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0 |
672 | #define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c0) |
673 | #define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4 |
674 | #define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c4) |
675 | #define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8 |
676 | #define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00c8) |
677 | #define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc |
678 | #define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00cc) |
679 | #define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0 |
680 | #define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d0) |
681 | #define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4 |
682 | #define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d4) |
683 | #define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8 |
684 | #define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00d8) |
685 | #define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc |
686 | #define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00dc) |
687 | #define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0 |
688 | #define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e0) |
689 | #define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4 |
690 | #define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e4) |
691 | #define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8 |
692 | #define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00e8) |
693 | #define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec |
694 | #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00ec) |
695 | #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 |
696 | #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00f0) |
697 | #define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 |
698 | #define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00f4) |
699 | #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 |
700 | #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_MOD, 0x00f8) |
701 | |
702 | /* |
703 | * PRCM_MPU |
704 | * |
705 | * The PRCM_MPU is a local PRCM inside the MPU subsystem. For the PRCM (global) |
706 | * point of view the PRCM_MPU is a single entity. It shares the same |
707 | * programming model as the global PRCM and thus can be assimilate as two new |
708 | * MOD inside the PRCM |
709 | */ |
710 | |
711 | /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ |
712 | #define OMAP4_REVISION_PRCM_OFFSET 0x0000 |
713 | #define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_MOD, 0x0000) |
714 | |
715 | /* PRCM_MPU.DEVICE_PRM register offsets */ |
716 | #define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 |
717 | #define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_MOD, 0x0000) |
718 | #define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 |
719 | #define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_MOD, 0x0004) |
720 | |
721 | /* PRCM_MPU.CPU0 register offsets */ |
722 | #define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 |
723 | #define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0000) |
724 | #define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 |
725 | #define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0004) |
726 | #define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 |
727 | #define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0008) |
728 | #define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c |
729 | #define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x000c) |
730 | #define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 |
731 | #define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0010) |
732 | #define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 |
733 | #define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0014) |
734 | #define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 |
735 | #define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_MOD, 0x0018) |
736 | |
737 | /* PRCM_MPU.CPU1 register offsets */ |
738 | #define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 |
739 | #define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0000) |
740 | #define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 |
741 | #define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0004) |
742 | #define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 |
743 | #define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0008) |
744 | #define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c |
745 | #define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x000c) |
746 | #define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 |
747 | #define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0010) |
748 | #define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 |
749 | #define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0014) |
750 | #define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 |
751 | #define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_MOD, 0x0018) |
752 | #endif |
753 |
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