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1 | /* linux/arch/arm/mach-s5pc100/cpu.c |
2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com |
5 | * |
6 | * Copyright 2009 Samsung Electronics Co. |
7 | * Byungho Min <bhmin@samsung.com> |
8 | * |
9 | * Based on mach-s3c6410/cpu.c |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License version 2 as |
13 | * published by the Free Software Foundation. |
14 | */ |
15 | |
16 | #include <linux/kernel.h> |
17 | #include <linux/types.h> |
18 | #include <linux/interrupt.h> |
19 | #include <linux/list.h> |
20 | #include <linux/timer.h> |
21 | #include <linux/init.h> |
22 | #include <linux/clk.h> |
23 | #include <linux/io.h> |
24 | #include <linux/sysdev.h> |
25 | #include <linux/serial_core.h> |
26 | #include <linux/platform_device.h> |
27 | #include <linux/sched.h> |
28 | |
29 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> |
31 | #include <asm/mach/irq.h> |
32 | |
33 | #include <asm/proc-fns.h> |
34 | |
35 | #include <mach/hardware.h> |
36 | #include <mach/map.h> |
37 | #include <asm/irq.h> |
38 | |
39 | #include <plat/regs-serial.h> |
40 | #include <mach/regs-clock.h> |
41 | |
42 | #include <plat/cpu.h> |
43 | #include <plat/devs.h> |
44 | #include <plat/clock.h> |
45 | #include <plat/ata-core.h> |
46 | #include <plat/iic-core.h> |
47 | #include <plat/sdhci.h> |
48 | #include <plat/adc-core.h> |
49 | #include <plat/onenand-core.h> |
50 | #include <plat/fb-core.h> |
51 | |
52 | #include <plat/s5pc100.h> |
53 | |
54 | /* Initial IO mappings */ |
55 | |
56 | static struct map_desc s5pc100_iodesc[] __initdata = { |
57 | { |
58 | .virtual = (unsigned long)S5P_VA_SYSTIMER, |
59 | .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), |
60 | .length = SZ_16K, |
61 | .type = MT_DEVICE, |
62 | }, { |
63 | .virtual = (unsigned long)S5P_VA_GPIO, |
64 | .pfn = __phys_to_pfn(S5PC100_PA_GPIO), |
65 | .length = SZ_4K, |
66 | .type = MT_DEVICE, |
67 | }, { |
68 | .virtual = (unsigned long)VA_VIC0, |
69 | .pfn = __phys_to_pfn(S5PC100_PA_VIC0), |
70 | .length = SZ_16K, |
71 | .type = MT_DEVICE, |
72 | }, { |
73 | .virtual = (unsigned long)VA_VIC1, |
74 | .pfn = __phys_to_pfn(S5PC100_PA_VIC1), |
75 | .length = SZ_16K, |
76 | .type = MT_DEVICE, |
77 | }, { |
78 | .virtual = (unsigned long)VA_VIC2, |
79 | .pfn = __phys_to_pfn(S5PC100_PA_VIC2), |
80 | .length = SZ_16K, |
81 | .type = MT_DEVICE, |
82 | }, { |
83 | .virtual = (unsigned long)S3C_VA_UART, |
84 | .pfn = __phys_to_pfn(S3C_PA_UART), |
85 | .length = SZ_512K, |
86 | .type = MT_DEVICE, |
87 | }, { |
88 | .virtual = (unsigned long)S5PC100_VA_OTHERS, |
89 | .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), |
90 | .length = SZ_4K, |
91 | .type = MT_DEVICE, |
92 | } |
93 | }; |
94 | |
95 | static void s5pc100_idle(void) |
96 | { |
97 | if (!need_resched()) |
98 | cpu_do_idle(); |
99 | |
100 | local_irq_enable(); |
101 | } |
102 | |
103 | /* s5pc100_map_io |
104 | * |
105 | * register the standard cpu IO areas |
106 | */ |
107 | |
108 | void __init s5pc100_map_io(void) |
109 | { |
110 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); |
111 | |
112 | /* initialise device information early */ |
113 | s5pc100_default_sdhci0(); |
114 | s5pc100_default_sdhci1(); |
115 | s5pc100_default_sdhci2(); |
116 | |
117 | s3c_adc_setname("s3c64xx-adc"); |
118 | |
119 | /* the i2c devices are directly compatible with s3c2440 */ |
120 | s3c_i2c0_setname("s3c2440-i2c"); |
121 | s3c_i2c1_setname("s3c2440-i2c"); |
122 | |
123 | s3c_onenand_setname("s5pc100-onenand"); |
124 | s3c_fb_setname("s5pc100-fb"); |
125 | s3c_cfcon_setname("s5pc100-pata"); |
126 | } |
127 | |
128 | void __init s5pc100_init_clocks(int xtal) |
129 | { |
130 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
131 | |
132 | s3c24xx_register_baseclocks(xtal); |
133 | s5p_register_clocks(xtal); |
134 | s5pc100_register_clocks(); |
135 | s5pc100_setup_clocks(); |
136 | } |
137 | |
138 | void __init s5pc100_init_irq(void) |
139 | { |
140 | u32 vic[] = {~0, ~0, ~0}; |
141 | |
142 | /* VIC0, VIC1, and VIC2 are fully populated. */ |
143 | s5p_init_irq(vic, ARRAY_SIZE(vic)); |
144 | } |
145 | |
146 | static struct sysdev_class s5pc100_sysclass = { |
147 | .name = "s5pc100-core", |
148 | }; |
149 | |
150 | static struct sys_device s5pc100_sysdev = { |
151 | .cls = &s5pc100_sysclass, |
152 | }; |
153 | |
154 | static int __init s5pc100_core_init(void) |
155 | { |
156 | return sysdev_class_register(&s5pc100_sysclass); |
157 | } |
158 | |
159 | core_initcall(s5pc100_core_init); |
160 | |
161 | int __init s5pc100_init(void) |
162 | { |
163 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
164 | |
165 | /* set idle function */ |
166 | pm_idle = s5pc100_idle; |
167 | |
168 | return sysdev_register(&s5pc100_sysdev); |
169 | } |
170 |
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