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1 | /* linux/arch/arm/mach-s5pv310/cpu.c |
2 | * |
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. |
4 | * http://www.samsung.com/ |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. |
9 | */ |
10 | |
11 | #include <linux/sched.h> |
12 | #include <linux/sysdev.h> |
13 | |
14 | #include <asm/mach/map.h> |
15 | #include <asm/mach/irq.h> |
16 | |
17 | #include <asm/proc-fns.h> |
18 | #include <asm/hardware/cache-l2x0.h> |
19 | |
20 | #include <plat/cpu.h> |
21 | #include <plat/clock.h> |
22 | #include <plat/s5pv310.h> |
23 | #include <plat/sdhci.h> |
24 | |
25 | #include <mach/regs-irq.h> |
26 | |
27 | void __iomem *gic_cpu_base_addr; |
28 | |
29 | extern int combiner_init(unsigned int combiner_nr, void __iomem *base, |
30 | unsigned int irq_start); |
31 | extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq); |
32 | |
33 | /* Initial IO mappings */ |
34 | static struct map_desc s5pv310_iodesc[] __initdata = { |
35 | { |
36 | .virtual = (unsigned long)S5P_VA_SYSRAM, |
37 | .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), |
38 | .length = SZ_4K, |
39 | .type = MT_DEVICE, |
40 | }, { |
41 | .virtual = (unsigned long)S5P_VA_CMU, |
42 | .pfn = __phys_to_pfn(S5PV310_PA_CMU), |
43 | .length = SZ_128K, |
44 | .type = MT_DEVICE, |
45 | }, { |
46 | .virtual = (unsigned long)S5P_VA_COMBINER_BASE, |
47 | .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), |
48 | .length = SZ_4K, |
49 | .type = MT_DEVICE, |
50 | }, { |
51 | .virtual = (unsigned long)S5P_VA_COREPERI_BASE, |
52 | .pfn = __phys_to_pfn(S5PV310_PA_COREPERI), |
53 | .length = SZ_8K, |
54 | .type = MT_DEVICE, |
55 | }, { |
56 | .virtual = (unsigned long)S5P_VA_L2CC, |
57 | .pfn = __phys_to_pfn(S5PV310_PA_L2CC), |
58 | .length = SZ_4K, |
59 | .type = MT_DEVICE, |
60 | }, { |
61 | .virtual = (unsigned long)S5P_VA_GPIO1, |
62 | .pfn = __phys_to_pfn(S5PV310_PA_GPIO1), |
63 | .length = SZ_4K, |
64 | .type = MT_DEVICE, |
65 | }, { |
66 | .virtual = (unsigned long)S5P_VA_GPIO2, |
67 | .pfn = __phys_to_pfn(S5PV310_PA_GPIO2), |
68 | .length = SZ_4K, |
69 | .type = MT_DEVICE, |
70 | }, { |
71 | .virtual = (unsigned long)S5P_VA_GPIO3, |
72 | .pfn = __phys_to_pfn(S5PV310_PA_GPIO3), |
73 | .length = SZ_256, |
74 | .type = MT_DEVICE, |
75 | }, { |
76 | .virtual = (unsigned long)S3C_VA_UART, |
77 | .pfn = __phys_to_pfn(S3C_PA_UART), |
78 | .length = SZ_512K, |
79 | .type = MT_DEVICE, |
80 | }, { |
81 | .virtual = (unsigned long)S5P_VA_SROMC, |
82 | .pfn = __phys_to_pfn(S5PV310_PA_SROMC), |
83 | .length = SZ_4K, |
84 | .type = MT_DEVICE, |
85 | }, |
86 | }; |
87 | |
88 | static void s5pv310_idle(void) |
89 | { |
90 | if (!need_resched()) |
91 | cpu_do_idle(); |
92 | |
93 | local_irq_enable(); |
94 | } |
95 | |
96 | /* s5pv310_map_io |
97 | * |
98 | * register the standard cpu IO areas |
99 | */ |
100 | void __init s5pv310_map_io(void) |
101 | { |
102 | iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc)); |
103 | |
104 | /* initialize device information early */ |
105 | s5pv310_default_sdhci0(); |
106 | s5pv310_default_sdhci1(); |
107 | s5pv310_default_sdhci2(); |
108 | s5pv310_default_sdhci3(); |
109 | } |
110 | |
111 | void __init s5pv310_init_clocks(int xtal) |
112 | { |
113 | printk(KERN_DEBUG "%s: initializing clocks\n", __func__); |
114 | |
115 | s3c24xx_register_baseclocks(xtal); |
116 | s5p_register_clocks(xtal); |
117 | s5pv310_register_clocks(); |
118 | s5pv310_setup_clocks(); |
119 | } |
120 | |
121 | void __init s5pv310_init_irq(void) |
122 | { |
123 | int irq; |
124 | |
125 | gic_cpu_base_addr = S5P_VA_GIC_CPU; |
126 | gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER); |
127 | gic_cpu_init(0, S5P_VA_GIC_CPU); |
128 | |
129 | for (irq = 0; irq < MAX_COMBINER_NR; irq++) { |
130 | combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq), |
131 | COMBINER_IRQ(irq, 0)); |
132 | combiner_cascade_irq(irq, IRQ_SPI(irq)); |
133 | } |
134 | |
135 | /* The parameters of s5p_init_irq() are for VIC init. |
136 | * Theses parameters should be NULL and 0 because S5PV310 |
137 | * uses GIC instead of VIC. |
138 | */ |
139 | s5p_init_irq(NULL, 0); |
140 | } |
141 | |
142 | struct sysdev_class s5pv310_sysclass = { |
143 | .name = "s5pv310-core", |
144 | }; |
145 | |
146 | static struct sys_device s5pv310_sysdev = { |
147 | .cls = &s5pv310_sysclass, |
148 | }; |
149 | |
150 | static int __init s5pv310_core_init(void) |
151 | { |
152 | return sysdev_class_register(&s5pv310_sysclass); |
153 | } |
154 | |
155 | core_initcall(s5pv310_core_init); |
156 | |
157 | #ifdef CONFIG_CACHE_L2X0 |
158 | static int __init s5pv310_l2x0_cache_init(void) |
159 | { |
160 | /* TAG, Data Latency Control: 2cycle */ |
161 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL); |
162 | __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL); |
163 | |
164 | /* L2X0 Prefetch Control */ |
165 | __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL); |
166 | |
167 | /* L2X0 Power Control */ |
168 | __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, |
169 | S5P_VA_L2CC + L2X0_POWER_CTRL); |
170 | |
171 | l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff); |
172 | |
173 | return 0; |
174 | } |
175 | |
176 | early_initcall(s5pv310_l2x0_cache_init); |
177 | #endif |
178 | |
179 | int __init s5pv310_init(void) |
180 | { |
181 | printk(KERN_INFO "S5PV310: Initializing architecture\n"); |
182 | |
183 | /* set idle function */ |
184 | pm_idle = s5pv310_idle; |
185 | |
186 | return sysdev_register(&s5pv310_sysdev); |
187 | } |
188 |
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