Root/arch/arm/plat-samsung/time.c

1/* linux/arch/arm/plat-samsung/time.c
2 *
3 * Copyright (C) 2003-2005 Simtec Electronics
4 * Ben Dooks, <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/sched.h>
23#include <linux/init.h>
24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/err.h>
27#include <linux/clk.h>
28#include <linux/io.h>
29#include <linux/platform_device.h>
30
31#include <asm/system.h>
32#include <asm/leds.h>
33#include <asm/mach-types.h>
34
35#include <asm/irq.h>
36#include <mach/map.h>
37#include <plat/regs-timer.h>
38#include <mach/regs-irq.h>
39#include <asm/mach/time.h>
40#include <mach/tick.h>
41
42#include <plat/clock.h>
43#include <plat/cpu.h>
44
45static unsigned long timer_startval;
46static unsigned long timer_usec_ticks;
47
48#ifndef TICK_MAX
49#define TICK_MAX (0xffff)
50#endif
51
52#define TIMER_USEC_SHIFT 16
53
54/* we use the shifted arithmetic to work out the ratio of timer ticks
55 * to usecs, as often the peripheral clock is not a nice even multiple
56 * of 1MHz.
57 *
58 * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok
59 * for the current HZ value of 200 without producing overflows.
60 *
61 * Original patch by Dimitry Andric, updated by Ben Dooks
62*/
63
64
65/* timer_mask_usec_ticks
66 *
67 * given a clock and divisor, make the value to pass into timer_ticks_to_usec
68 * to scale the ticks into usecs
69*/
70
71static inline unsigned long
72timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk)
73{
74    unsigned long den = pclk / 1000;
75
76    return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den;
77}
78
79/* timer_ticks_to_usec
80 *
81 * convert timer ticks to usec.
82*/
83
84static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
85{
86    unsigned long res;
87
88    res = ticks * timer_usec_ticks;
89    res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */
90
91    return res >> TIMER_USEC_SHIFT;
92}
93
94/***
95 * Returns microsecond since last clock interrupt. Note that interrupts
96 * will have been disabled by do_gettimeoffset()
97 * IRQs are disabled before entering here from do_gettimeofday()
98 */
99
100static unsigned long s3c2410_gettimeoffset (void)
101{
102    unsigned long tdone;
103    unsigned long tval;
104
105    /* work out how many ticks have gone since last timer interrupt */
106
107    tval = __raw_readl(S3C2410_TCNTO(4));
108    tdone = timer_startval - tval;
109
110    /* check to see if there is an interrupt pending */
111
112    if (s3c24xx_ostimer_pending()) {
113        /* re-read the timer, and try and fix up for the missed
114         * interrupt. Note, the interrupt may go off before the
115         * timer has re-loaded from wrapping.
116         */
117
118        tval = __raw_readl(S3C2410_TCNTO(4));
119        tdone = timer_startval - tval;
120
121        if (tval != 0)
122            tdone += timer_startval;
123    }
124
125    return timer_ticks_to_usec(tdone);
126}
127
128
129/*
130 * IRQ handler for the timer
131 */
132static irqreturn_t
133s3c2410_timer_interrupt(int irq, void *dev_id)
134{
135    timer_tick();
136    return IRQ_HANDLED;
137}
138
139static struct irqaction s3c2410_timer_irq = {
140    .name = "S3C2410 Timer Tick",
141    .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
142    .handler = s3c2410_timer_interrupt,
143};
144
145#define use_tclk1_12() ( \
146    machine_is_bast() || \
147    machine_is_vr1000() || \
148    machine_is_anubis() || \
149    machine_is_osiris())
150
151static struct clk *tin;
152static struct clk *tdiv;
153static struct clk *timerclk;
154
155/*
156 * Set up timer interrupt, and return the current time in seconds.
157 *
158 * Currently we only use timer4, as it is the only timer which has no
159 * other function that can be exploited externally
160 */
161static void s3c2410_timer_setup (void)
162{
163    unsigned long tcon;
164    unsigned long tcnt;
165    unsigned long tcfg1;
166    unsigned long tcfg0;
167
168    tcnt = TICK_MAX; /* default value for tcnt */
169
170    /* configure the system for whichever machine is in use */
171
172    if (use_tclk1_12()) {
173        /* timer is at 12MHz, scaler is 1 */
174        timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
175        tcnt = 12000000 / HZ;
176
177        tcfg1 = __raw_readl(S3C2410_TCFG1);
178        tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
179        tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
180        __raw_writel(tcfg1, S3C2410_TCFG1);
181    } else {
182        unsigned long pclk;
183        struct clk *tscaler;
184
185        /* for the h1940 (and others), we use the pclk from the core
186         * to generate the timer values. since values around 50 to
187         * 70MHz are not values we can directly generate the timer
188         * value from, we need to pre-scale and divide before using it.
189         *
190         * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz
191         * (8.45 ticks per usec)
192         */
193
194        pclk = clk_get_rate(timerclk);
195
196        /* configure clock tick */
197
198        timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
199
200        tscaler = clk_get_parent(tdiv);
201
202        clk_set_rate(tscaler, pclk / 3);
203        clk_set_rate(tdiv, pclk / 6);
204        clk_set_parent(tin, tdiv);
205
206        tcnt = clk_get_rate(tin) / HZ;
207    }
208
209    tcon = __raw_readl(S3C2410_TCON);
210    tcfg0 = __raw_readl(S3C2410_TCFG0);
211    tcfg1 = __raw_readl(S3C2410_TCFG1);
212
213    /* timers reload after counting zero, so reduce the count by 1 */
214
215    tcnt--;
216
217    printk(KERN_DEBUG "timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
218           tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
219
220    /* check to see if timer is within 16bit range... */
221    if (tcnt > TICK_MAX) {
222        panic("setup_timer: HZ is too small, cannot configure timer!");
223        return;
224    }
225
226    __raw_writel(tcfg1, S3C2410_TCFG1);
227    __raw_writel(tcfg0, S3C2410_TCFG0);
228
229    timer_startval = tcnt;
230    __raw_writel(tcnt, S3C2410_TCNTB(4));
231
232    /* ensure timer is stopped... */
233
234    tcon &= ~(7<<20);
235    tcon |= S3C2410_TCON_T4RELOAD;
236    tcon |= S3C2410_TCON_T4MANUALUPD;
237
238    __raw_writel(tcon, S3C2410_TCON);
239    __raw_writel(tcnt, S3C2410_TCNTB(4));
240    __raw_writel(tcnt, S3C2410_TCMPB(4));
241
242    /* start the timer running */
243    tcon |= S3C2410_TCON_T4START;
244    tcon &= ~S3C2410_TCON_T4MANUALUPD;
245    __raw_writel(tcon, S3C2410_TCON);
246}
247
248static void __init s3c2410_timer_resources(void)
249{
250    struct platform_device tmpdev;
251
252    tmpdev.dev.bus = &platform_bus_type;
253    tmpdev.id = 4;
254
255    timerclk = clk_get(NULL, "timers");
256    if (IS_ERR(timerclk))
257        panic("failed to get clock for system timer");
258
259    clk_enable(timerclk);
260
261    if (!use_tclk1_12()) {
262        tin = clk_get(&tmpdev.dev, "pwm-tin");
263        if (IS_ERR(tin))
264            panic("failed to get pwm-tin clock for system timer");
265
266        tdiv = clk_get(&tmpdev.dev, "pwm-tdiv");
267        if (IS_ERR(tdiv))
268            panic("failed to get pwm-tdiv clock for system timer");
269    }
270
271    clk_enable(tin);
272}
273
274static void __init s3c2410_timer_init(void)
275{
276    s3c2410_timer_resources();
277    s3c2410_timer_setup();
278    setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
279}
280
281struct sys_timer s3c24xx_timer = {
282    .init = s3c2410_timer_init,
283    .offset = s3c2410_gettimeoffset,
284    .resume = s3c2410_timer_setup
285};
286

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