Root/arch/s390/kernel/head64.S

1/*
2 * arch/s390/kernel/head64.S
3 *
4 * Copyright (C) IBM Corp. 1999,2010
5 *
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 *
11 */
12
13#include <linux/init.h>
14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h>
16#include <asm/page.h>
17
18__HEAD
19    .globl startup_continue
20startup_continue:
21    larl %r1,sched_clock_base_cc
22    mvc 0(8,%r1),__LC_LAST_UPDATE_CLOCK
23    larl %r13,.LPG1 # get base
24    lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
25    lg %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
26                    # move IPL device to lowcore
27    lghi %r0,__LC_PASTE
28    stg %r0,__LC_VDSO_PER_CPU
29#
30# Setup stack
31#
32    larl %r15,init_thread_union
33    stg %r15,__LC_THREAD_INFO # cache thread info in lowcore
34    lg %r14,__TI_task(%r15) # cache current in lowcore
35    stg %r14,__LC_CURRENT
36    aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
37    stg %r15,__LC_KERNEL_STACK # set end of kernel stack
38    aghi %r15,-160
39#
40# Save ipl parameters, clear bss memory, initialize storage key for kernel pages,
41# and create a kernel NSS if the SAVESYS= parm is defined
42#
43    brasl %r14,startup_init
44    lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
45                    # virtual and never return ...
46    .align 16
47.LPG1:
48.Lentry:.quad 0x0000000180000000,_stext
49.Lctl: .quad 0x04350002 # cr0: various things
50    .quad 0 # cr1: primary space segment table
51    .quad .Lduct # cr2: dispatchable unit control table
52    .quad 0 # cr3: instruction authorization
53    .quad 0 # cr4: instruction authorization
54    .quad .Lduct # cr5: primary-aste origin
55    .quad 0 # cr6: I/O interrupts
56    .quad 0 # cr7: secondary space segment table
57    .quad 0 # cr8: access registers translation
58    .quad 0 # cr9: tracing off
59    .quad 0 # cr10: tracing off
60    .quad 0 # cr11: tracing off
61    .quad 0 # cr12: tracing off
62    .quad 0 # cr13: home space segment table
63    .quad 0xc0000000 # cr14: machine check handling off
64    .quad 0 # cr15: linkage stack operations
65.Lpcmsk:.quad 0x0000000180000000
66.L4malign:.quad 0xffffffffffc00000
67.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
68.Lnop: .long 0x07000700
69.Lparmaddr:
70    .quad PARMAREA
71    .align 64
72.Lduct: .long 0,0,0,0,.Lduald,0,0,0
73    .long 0,0,0,0,0,0,0,0
74    .align 128
75.Lduald:.rept 8
76    .long 0x80000000,0,0,0 # invalid access-list entries
77    .endr
78
79    .globl _ehead
80_ehead:
81
82#ifdef CONFIG_SHARED_KERNEL
83    .org 0x100000 - 0x11000 # head.o ends at 0x11000
84#endif
85
86#
87# startup-code, running in absolute addressing mode
88#
89    .globl _stext
90_stext: basr %r13,0 # get base
91.LPG3:
92# check control registers
93    stctg %c0,%c15,0(%r15)
94    oi 6(%r15),0x40 # enable sigp emergency signal
95    oi 4(%r15),0x10 # switch on low address proctection
96    lctlg %c0,%c15,0(%r15)
97
98    lam 0,15,.Laregs-.LPG3(%r13) # load acrs needed by uaccess
99    brasl %r14,start_kernel # go to C code
100#
101# We returned from start_kernel ?!? PANIK
102#
103    basr %r13,0
104    lpswe .Ldw-.(%r13) # load disabled wait psw
105
106    .align 8
107.Ldw: .quad 0x0002000180000000,0x0000000000000000
108.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
109

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