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1 | /* |
2 | * coretemp.c - Linux kernel module for hardware monitoring |
3 | * |
4 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> |
5 | * |
6 | * Inspired from many hwmon drivers |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by |
10 | * the Free Software Foundation; version 2 of the License. |
11 | * |
12 | * This program is distributed in the hope that it will be useful, |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
15 | * GNU General Public License for more details. |
16 | * |
17 | * You should have received a copy of the GNU General Public License |
18 | * along with this program; if not, write to the Free Software |
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
20 | * 02110-1301 USA. |
21 | */ |
22 | |
23 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
24 | |
25 | #include <linux/module.h> |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> |
28 | #include <linux/jiffies.h> |
29 | #include <linux/hwmon.h> |
30 | #include <linux/sysfs.h> |
31 | #include <linux/hwmon-sysfs.h> |
32 | #include <linux/err.h> |
33 | #include <linux/mutex.h> |
34 | #include <linux/list.h> |
35 | #include <linux/platform_device.h> |
36 | #include <linux/cpu.h> |
37 | #include <linux/smp.h> |
38 | #include <linux/moduleparam.h> |
39 | #include <asm/msr.h> |
40 | #include <asm/processor.h> |
41 | #include <asm/cpu_device_id.h> |
42 | |
43 | #define DRVNAME "coretemp" |
44 | |
45 | /* |
46 | * force_tjmax only matters when TjMax can't be read from the CPU itself. |
47 | * When set, it replaces the driver's suboptimal heuristic. |
48 | */ |
49 | static int force_tjmax; |
50 | module_param_named(tjmax, force_tjmax, int, 0444); |
51 | MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); |
52 | |
53 | #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ |
54 | #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */ |
55 | #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */ |
56 | #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ |
57 | #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) |
58 | #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) |
59 | |
60 | #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id) |
61 | #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id) |
62 | #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO) |
63 | |
64 | #ifdef CONFIG_SMP |
65 | #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu)) |
66 | #else |
67 | #define for_each_sibling(i, cpu) for (i = 0; false; ) |
68 | #endif |
69 | |
70 | /* |
71 | * Per-Core Temperature Data |
72 | * @last_updated: The time when the current temperature value was updated |
73 | * earlier (in jiffies). |
74 | * @cpu_core_id: The CPU Core from which temperature values should be read |
75 | * This value is passed as "id" field to rdmsr/wrmsr functions. |
76 | * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, |
77 | * from where the temperature values should be read. |
78 | * @attr_size: Total number of pre-core attrs displayed in the sysfs. |
79 | * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. |
80 | * Otherwise, temp_data holds coretemp data. |
81 | * @valid: If this is 1, the current temperature is valid. |
82 | */ |
83 | struct temp_data { |
84 | int temp; |
85 | int ttarget; |
86 | int tjmax; |
87 | unsigned long last_updated; |
88 | unsigned int cpu; |
89 | u32 cpu_core_id; |
90 | u32 status_reg; |
91 | int attr_size; |
92 | bool is_pkg_data; |
93 | bool valid; |
94 | struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; |
95 | char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; |
96 | struct mutex update_lock; |
97 | }; |
98 | |
99 | /* Platform Data per Physical CPU */ |
100 | struct platform_data { |
101 | struct device *hwmon_dev; |
102 | u16 phys_proc_id; |
103 | struct temp_data *core_data[MAX_CORE_DATA]; |
104 | struct device_attribute name_attr; |
105 | }; |
106 | |
107 | struct pdev_entry { |
108 | struct list_head list; |
109 | struct platform_device *pdev; |
110 | u16 phys_proc_id; |
111 | }; |
112 | |
113 | static LIST_HEAD(pdev_list); |
114 | static DEFINE_MUTEX(pdev_list_mutex); |
115 | |
116 | static ssize_t show_name(struct device *dev, |
117 | struct device_attribute *devattr, char *buf) |
118 | { |
119 | return sprintf(buf, "%s\n", DRVNAME); |
120 | } |
121 | |
122 | static ssize_t show_label(struct device *dev, |
123 | struct device_attribute *devattr, char *buf) |
124 | { |
125 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
126 | struct platform_data *pdata = dev_get_drvdata(dev); |
127 | struct temp_data *tdata = pdata->core_data[attr->index]; |
128 | |
129 | if (tdata->is_pkg_data) |
130 | return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id); |
131 | |
132 | return sprintf(buf, "Core %u\n", tdata->cpu_core_id); |
133 | } |
134 | |
135 | static ssize_t show_crit_alarm(struct device *dev, |
136 | struct device_attribute *devattr, char *buf) |
137 | { |
138 | u32 eax, edx; |
139 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
140 | struct platform_data *pdata = dev_get_drvdata(dev); |
141 | struct temp_data *tdata = pdata->core_data[attr->index]; |
142 | |
143 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); |
144 | |
145 | return sprintf(buf, "%d\n", (eax >> 5) & 1); |
146 | } |
147 | |
148 | static ssize_t show_tjmax(struct device *dev, |
149 | struct device_attribute *devattr, char *buf) |
150 | { |
151 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
152 | struct platform_data *pdata = dev_get_drvdata(dev); |
153 | |
154 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); |
155 | } |
156 | |
157 | static ssize_t show_ttarget(struct device *dev, |
158 | struct device_attribute *devattr, char *buf) |
159 | { |
160 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
161 | struct platform_data *pdata = dev_get_drvdata(dev); |
162 | |
163 | return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); |
164 | } |
165 | |
166 | static ssize_t show_temp(struct device *dev, |
167 | struct device_attribute *devattr, char *buf) |
168 | { |
169 | u32 eax, edx; |
170 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
171 | struct platform_data *pdata = dev_get_drvdata(dev); |
172 | struct temp_data *tdata = pdata->core_data[attr->index]; |
173 | |
174 | mutex_lock(&tdata->update_lock); |
175 | |
176 | /* Check whether the time interval has elapsed */ |
177 | if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { |
178 | rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); |
179 | tdata->valid = 0; |
180 | /* Check whether the data is valid */ |
181 | if (eax & 0x80000000) { |
182 | tdata->temp = tdata->tjmax - |
183 | ((eax >> 16) & 0x7f) * 1000; |
184 | tdata->valid = 1; |
185 | } |
186 | tdata->last_updated = jiffies; |
187 | } |
188 | |
189 | mutex_unlock(&tdata->update_lock); |
190 | return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN; |
191 | } |
192 | |
193 | struct tjmax { |
194 | char const *id; |
195 | int tjmax; |
196 | }; |
197 | |
198 | static const struct tjmax tjmax_table[] = { |
199 | { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */ |
200 | { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */ |
201 | { "CPU CE4110", 110000 }, /* Model 0x1c, stepping 10 Sodaville */ |
202 | { "CPU CE4150", 110000 }, /* Model 0x1c, stepping 10 */ |
203 | { "CPU CE4170", 110000 }, /* Model 0x1c, stepping 10 */ |
204 | }; |
205 | |
206 | struct tjmax_model { |
207 | u8 model; |
208 | u8 mask; |
209 | int tjmax; |
210 | }; |
211 | |
212 | #define ANY 0xff |
213 | |
214 | static const struct tjmax_model tjmax_model_table[] = { |
215 | { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */ |
216 | { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others |
217 | * Note: Also matches 230 and 330, |
218 | * which are covered by tjmax_table |
219 | */ |
220 | { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx) |
221 | * Note: TjMax for E6xxT is 110C, but CPU type |
222 | * is undetectable by software |
223 | */ |
224 | { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */ |
225 | { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z2760) */ |
226 | { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) */ |
227 | }; |
228 | |
229 | static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
230 | { |
231 | /* The 100C is default for both mobile and non mobile CPUs */ |
232 | |
233 | int tjmax = 100000; |
234 | int tjmax_ee = 85000; |
235 | int usemsr_ee = 1; |
236 | int err; |
237 | u32 eax, edx; |
238 | int i; |
239 | |
240 | /* explicit tjmax table entries override heuristics */ |
241 | for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) { |
242 | if (strstr(c->x86_model_id, tjmax_table[i].id)) |
243 | return tjmax_table[i].tjmax; |
244 | } |
245 | |
246 | for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { |
247 | const struct tjmax_model *tm = &tjmax_model_table[i]; |
248 | if (c->x86_model == tm->model && |
249 | (tm->mask == ANY || c->x86_mask == tm->mask)) |
250 | return tm->tjmax; |
251 | } |
252 | |
253 | /* Early chips have no MSR for TjMax */ |
254 | |
255 | if (c->x86_model == 0xf && c->x86_mask < 4) |
256 | usemsr_ee = 0; |
257 | |
258 | if (c->x86_model > 0xe && usemsr_ee) { |
259 | u8 platform_id; |
260 | |
261 | /* |
262 | * Now we can detect the mobile CPU using Intel provided table |
263 | * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm |
264 | * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU |
265 | */ |
266 | err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); |
267 | if (err) { |
268 | dev_warn(dev, |
269 | "Unable to access MSR 0x17, assuming desktop" |
270 | " CPU\n"); |
271 | usemsr_ee = 0; |
272 | } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { |
273 | /* |
274 | * Trust bit 28 up to Penryn, I could not find any |
275 | * documentation on that; if you happen to know |
276 | * someone at Intel please ask |
277 | */ |
278 | usemsr_ee = 0; |
279 | } else { |
280 | /* Platform ID bits 52:50 (EDX starts at bit 32) */ |
281 | platform_id = (edx >> 18) & 0x7; |
282 | |
283 | /* |
284 | * Mobile Penryn CPU seems to be platform ID 7 or 5 |
285 | * (guesswork) |
286 | */ |
287 | if (c->x86_model == 0x17 && |
288 | (platform_id == 5 || platform_id == 7)) { |
289 | /* |
290 | * If MSR EE bit is set, set it to 90 degrees C, |
291 | * otherwise 105 degrees C |
292 | */ |
293 | tjmax_ee = 90000; |
294 | tjmax = 105000; |
295 | } |
296 | } |
297 | } |
298 | |
299 | if (usemsr_ee) { |
300 | err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); |
301 | if (err) { |
302 | dev_warn(dev, |
303 | "Unable to access MSR 0xEE, for Tjmax, left" |
304 | " at default\n"); |
305 | } else if (eax & 0x40000000) { |
306 | tjmax = tjmax_ee; |
307 | } |
308 | } else if (tjmax == 100000) { |
309 | /* |
310 | * If we don't use msr EE it means we are desktop CPU |
311 | * (with exeception of Atom) |
312 | */ |
313 | dev_warn(dev, "Using relative temperature scale!\n"); |
314 | } |
315 | |
316 | return tjmax; |
317 | } |
318 | |
319 | static bool cpu_has_tjmax(struct cpuinfo_x86 *c) |
320 | { |
321 | u8 model = c->x86_model; |
322 | |
323 | return model > 0xe && |
324 | model != 0x1c && |
325 | model != 0x26 && |
326 | model != 0x27 && |
327 | model != 0x35 && |
328 | model != 0x36; |
329 | } |
330 | |
331 | static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) |
332 | { |
333 | int err; |
334 | u32 eax, edx; |
335 | u32 val; |
336 | |
337 | /* |
338 | * A new feature of current Intel(R) processors, the |
339 | * IA32_TEMPERATURE_TARGET contains the TjMax value |
340 | */ |
341 | err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); |
342 | if (err) { |
343 | if (cpu_has_tjmax(c)) |
344 | dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); |
345 | } else { |
346 | val = (eax >> 16) & 0xff; |
347 | /* |
348 | * If the TjMax is not plausible, an assumption |
349 | * will be used |
350 | */ |
351 | if (val) { |
352 | dev_dbg(dev, "TjMax is %d degrees C\n", val); |
353 | return val * 1000; |
354 | } |
355 | } |
356 | |
357 | if (force_tjmax) { |
358 | dev_notice(dev, "TjMax forced to %d degrees C by user\n", |
359 | force_tjmax); |
360 | return force_tjmax * 1000; |
361 | } |
362 | |
363 | /* |
364 | * An assumption is made for early CPUs and unreadable MSR. |
365 | * NOTE: the calculated value may not be correct. |
366 | */ |
367 | return adjust_tjmax(c, id, dev); |
368 | } |
369 | |
370 | static int create_name_attr(struct platform_data *pdata, |
371 | struct device *dev) |
372 | { |
373 | sysfs_attr_init(&pdata->name_attr.attr); |
374 | pdata->name_attr.attr.name = "name"; |
375 | pdata->name_attr.attr.mode = S_IRUGO; |
376 | pdata->name_attr.show = show_name; |
377 | return device_create_file(dev, &pdata->name_attr); |
378 | } |
379 | |
380 | static int create_core_attrs(struct temp_data *tdata, struct device *dev, |
381 | int attr_no) |
382 | { |
383 | int err, i; |
384 | static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, |
385 | struct device_attribute *devattr, char *buf) = { |
386 | show_label, show_crit_alarm, show_temp, show_tjmax, |
387 | show_ttarget }; |
388 | static const char *const names[TOTAL_ATTRS] = { |
389 | "temp%d_label", "temp%d_crit_alarm", |
390 | "temp%d_input", "temp%d_crit", |
391 | "temp%d_max" }; |
392 | |
393 | for (i = 0; i < tdata->attr_size; i++) { |
394 | snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i], |
395 | attr_no); |
396 | sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); |
397 | tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; |
398 | tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO; |
399 | tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; |
400 | tdata->sd_attrs[i].index = attr_no; |
401 | err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr); |
402 | if (err) |
403 | goto exit_free; |
404 | } |
405 | return 0; |
406 | |
407 | exit_free: |
408 | while (--i >= 0) |
409 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
410 | return err; |
411 | } |
412 | |
413 | |
414 | static int chk_ucode_version(unsigned int cpu) |
415 | { |
416 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
417 | |
418 | /* |
419 | * Check if we have problem with errata AE18 of Core processors: |
420 | * Readings might stop update when processor visited too deep sleep, |
421 | * fixed for stepping D0 (6EC). |
422 | */ |
423 | if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) { |
424 | pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); |
425 | return -ENODEV; |
426 | } |
427 | return 0; |
428 | } |
429 | |
430 | static struct platform_device *coretemp_get_pdev(unsigned int cpu) |
431 | { |
432 | u16 phys_proc_id = TO_PHYS_ID(cpu); |
433 | struct pdev_entry *p; |
434 | |
435 | mutex_lock(&pdev_list_mutex); |
436 | |
437 | list_for_each_entry(p, &pdev_list, list) |
438 | if (p->phys_proc_id == phys_proc_id) { |
439 | mutex_unlock(&pdev_list_mutex); |
440 | return p->pdev; |
441 | } |
442 | |
443 | mutex_unlock(&pdev_list_mutex); |
444 | return NULL; |
445 | } |
446 | |
447 | static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) |
448 | { |
449 | struct temp_data *tdata; |
450 | |
451 | tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); |
452 | if (!tdata) |
453 | return NULL; |
454 | |
455 | tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : |
456 | MSR_IA32_THERM_STATUS; |
457 | tdata->is_pkg_data = pkg_flag; |
458 | tdata->cpu = cpu; |
459 | tdata->cpu_core_id = TO_CORE_ID(cpu); |
460 | tdata->attr_size = MAX_CORE_ATTRS; |
461 | mutex_init(&tdata->update_lock); |
462 | return tdata; |
463 | } |
464 | |
465 | static int create_core_data(struct platform_device *pdev, unsigned int cpu, |
466 | int pkg_flag) |
467 | { |
468 | struct temp_data *tdata; |
469 | struct platform_data *pdata = platform_get_drvdata(pdev); |
470 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
471 | u32 eax, edx; |
472 | int err, attr_no; |
473 | |
474 | /* |
475 | * Find attr number for sysfs: |
476 | * We map the attr number to core id of the CPU |
477 | * The attr number is always core id + 2 |
478 | * The Pkgtemp will always show up as temp1_*, if available |
479 | */ |
480 | attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu); |
481 | |
482 | if (attr_no > MAX_CORE_DATA - 1) |
483 | return -ERANGE; |
484 | |
485 | /* |
486 | * Provide a single set of attributes for all HT siblings of a core |
487 | * to avoid duplicate sensors (the processor ID and core ID of all |
488 | * HT siblings of a core are the same). |
489 | * Skip if a HT sibling of this core is already registered. |
490 | * This is not an error. |
491 | */ |
492 | if (pdata->core_data[attr_no] != NULL) |
493 | return 0; |
494 | |
495 | tdata = init_temp_data(cpu, pkg_flag); |
496 | if (!tdata) |
497 | return -ENOMEM; |
498 | |
499 | /* Test if we can access the status register */ |
500 | err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); |
501 | if (err) |
502 | goto exit_free; |
503 | |
504 | /* We can access status register. Get Critical Temperature */ |
505 | tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); |
506 | |
507 | /* |
508 | * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. |
509 | * The target temperature is available on older CPUs but not in this |
510 | * register. Atoms don't have the register at all. |
511 | */ |
512 | if (c->x86_model > 0xe && c->x86_model != 0x1c) { |
513 | err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, |
514 | &eax, &edx); |
515 | if (!err) { |
516 | tdata->ttarget |
517 | = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; |
518 | tdata->attr_size++; |
519 | } |
520 | } |
521 | |
522 | pdata->core_data[attr_no] = tdata; |
523 | |
524 | /* Create sysfs interfaces */ |
525 | err = create_core_attrs(tdata, &pdev->dev, attr_no); |
526 | if (err) |
527 | goto exit_free; |
528 | |
529 | return 0; |
530 | exit_free: |
531 | pdata->core_data[attr_no] = NULL; |
532 | kfree(tdata); |
533 | return err; |
534 | } |
535 | |
536 | static void coretemp_add_core(unsigned int cpu, int pkg_flag) |
537 | { |
538 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
539 | int err; |
540 | |
541 | if (!pdev) |
542 | return; |
543 | |
544 | err = create_core_data(pdev, cpu, pkg_flag); |
545 | if (err) |
546 | dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); |
547 | } |
548 | |
549 | static void coretemp_remove_core(struct platform_data *pdata, |
550 | struct device *dev, int indx) |
551 | { |
552 | int i; |
553 | struct temp_data *tdata = pdata->core_data[indx]; |
554 | |
555 | /* Remove the sysfs attributes */ |
556 | for (i = 0; i < tdata->attr_size; i++) |
557 | device_remove_file(dev, &tdata->sd_attrs[i].dev_attr); |
558 | |
559 | kfree(pdata->core_data[indx]); |
560 | pdata->core_data[indx] = NULL; |
561 | } |
562 | |
563 | static int coretemp_probe(struct platform_device *pdev) |
564 | { |
565 | struct platform_data *pdata; |
566 | int err; |
567 | |
568 | /* Initialize the per-package data structures */ |
569 | pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL); |
570 | if (!pdata) |
571 | return -ENOMEM; |
572 | |
573 | err = create_name_attr(pdata, &pdev->dev); |
574 | if (err) |
575 | goto exit_free; |
576 | |
577 | pdata->phys_proc_id = pdev->id; |
578 | platform_set_drvdata(pdev, pdata); |
579 | |
580 | pdata->hwmon_dev = hwmon_device_register(&pdev->dev); |
581 | if (IS_ERR(pdata->hwmon_dev)) { |
582 | err = PTR_ERR(pdata->hwmon_dev); |
583 | dev_err(&pdev->dev, "Class registration failed (%d)\n", err); |
584 | goto exit_name; |
585 | } |
586 | return 0; |
587 | |
588 | exit_name: |
589 | device_remove_file(&pdev->dev, &pdata->name_attr); |
590 | exit_free: |
591 | kfree(pdata); |
592 | return err; |
593 | } |
594 | |
595 | static int coretemp_remove(struct platform_device *pdev) |
596 | { |
597 | struct platform_data *pdata = platform_get_drvdata(pdev); |
598 | int i; |
599 | |
600 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) |
601 | if (pdata->core_data[i]) |
602 | coretemp_remove_core(pdata, &pdev->dev, i); |
603 | |
604 | device_remove_file(&pdev->dev, &pdata->name_attr); |
605 | hwmon_device_unregister(pdata->hwmon_dev); |
606 | kfree(pdata); |
607 | return 0; |
608 | } |
609 | |
610 | static struct platform_driver coretemp_driver = { |
611 | .driver = { |
612 | .owner = THIS_MODULE, |
613 | .name = DRVNAME, |
614 | }, |
615 | .probe = coretemp_probe, |
616 | .remove = coretemp_remove, |
617 | }; |
618 | |
619 | static int coretemp_device_add(unsigned int cpu) |
620 | { |
621 | int err; |
622 | struct platform_device *pdev; |
623 | struct pdev_entry *pdev_entry; |
624 | |
625 | mutex_lock(&pdev_list_mutex); |
626 | |
627 | pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu)); |
628 | if (!pdev) { |
629 | err = -ENOMEM; |
630 | pr_err("Device allocation failed\n"); |
631 | goto exit; |
632 | } |
633 | |
634 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); |
635 | if (!pdev_entry) { |
636 | err = -ENOMEM; |
637 | goto exit_device_put; |
638 | } |
639 | |
640 | err = platform_device_add(pdev); |
641 | if (err) { |
642 | pr_err("Device addition failed (%d)\n", err); |
643 | goto exit_device_free; |
644 | } |
645 | |
646 | pdev_entry->pdev = pdev; |
647 | pdev_entry->phys_proc_id = pdev->id; |
648 | |
649 | list_add_tail(&pdev_entry->list, &pdev_list); |
650 | mutex_unlock(&pdev_list_mutex); |
651 | |
652 | return 0; |
653 | |
654 | exit_device_free: |
655 | kfree(pdev_entry); |
656 | exit_device_put: |
657 | platform_device_put(pdev); |
658 | exit: |
659 | mutex_unlock(&pdev_list_mutex); |
660 | return err; |
661 | } |
662 | |
663 | static void coretemp_device_remove(unsigned int cpu) |
664 | { |
665 | struct pdev_entry *p, *n; |
666 | u16 phys_proc_id = TO_PHYS_ID(cpu); |
667 | |
668 | mutex_lock(&pdev_list_mutex); |
669 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
670 | if (p->phys_proc_id != phys_proc_id) |
671 | continue; |
672 | platform_device_unregister(p->pdev); |
673 | list_del(&p->list); |
674 | kfree(p); |
675 | } |
676 | mutex_unlock(&pdev_list_mutex); |
677 | } |
678 | |
679 | static bool is_any_core_online(struct platform_data *pdata) |
680 | { |
681 | int i; |
682 | |
683 | /* Find online cores, except pkgtemp data */ |
684 | for (i = MAX_CORE_DATA - 1; i >= 0; --i) { |
685 | if (pdata->core_data[i] && |
686 | !pdata->core_data[i]->is_pkg_data) { |
687 | return true; |
688 | } |
689 | } |
690 | return false; |
691 | } |
692 | |
693 | static void get_core_online(unsigned int cpu) |
694 | { |
695 | struct cpuinfo_x86 *c = &cpu_data(cpu); |
696 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
697 | int err; |
698 | |
699 | /* |
700 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal |
701 | * sensors. We check this bit only, all the early CPUs |
702 | * without thermal sensors will be filtered out. |
703 | */ |
704 | if (!cpu_has(c, X86_FEATURE_DTHERM)) |
705 | return; |
706 | |
707 | if (!pdev) { |
708 | /* Check the microcode version of the CPU */ |
709 | if (chk_ucode_version(cpu)) |
710 | return; |
711 | |
712 | /* |
713 | * Alright, we have DTS support. |
714 | * We are bringing the _first_ core in this pkg |
715 | * online. So, initialize per-pkg data structures and |
716 | * then bring this core online. |
717 | */ |
718 | err = coretemp_device_add(cpu); |
719 | if (err) |
720 | return; |
721 | /* |
722 | * Check whether pkgtemp support is available. |
723 | * If so, add interfaces for pkgtemp. |
724 | */ |
725 | if (cpu_has(c, X86_FEATURE_PTS)) |
726 | coretemp_add_core(cpu, 1); |
727 | } |
728 | /* |
729 | * Physical CPU device already exists. |
730 | * So, just add interfaces for this core. |
731 | */ |
732 | coretemp_add_core(cpu, 0); |
733 | } |
734 | |
735 | static void put_core_offline(unsigned int cpu) |
736 | { |
737 | int i, indx; |
738 | struct platform_data *pdata; |
739 | struct platform_device *pdev = coretemp_get_pdev(cpu); |
740 | |
741 | /* If the physical CPU device does not exist, just return */ |
742 | if (!pdev) |
743 | return; |
744 | |
745 | pdata = platform_get_drvdata(pdev); |
746 | |
747 | indx = TO_ATTR_NO(cpu); |
748 | |
749 | /* The core id is too big, just return */ |
750 | if (indx > MAX_CORE_DATA - 1) |
751 | return; |
752 | |
753 | if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu) |
754 | coretemp_remove_core(pdata, &pdev->dev, indx); |
755 | |
756 | /* |
757 | * If a HT sibling of a core is taken offline, but another HT sibling |
758 | * of the same core is still online, register the alternate sibling. |
759 | * This ensures that exactly one set of attributes is provided as long |
760 | * as at least one HT sibling of a core is online. |
761 | */ |
762 | for_each_sibling(i, cpu) { |
763 | if (i != cpu) { |
764 | get_core_online(i); |
765 | /* |
766 | * Display temperature sensor data for one HT sibling |
767 | * per core only, so abort the loop after one such |
768 | * sibling has been found. |
769 | */ |
770 | break; |
771 | } |
772 | } |
773 | /* |
774 | * If all cores in this pkg are offline, remove the device. |
775 | * coretemp_device_remove calls unregister_platform_device, |
776 | * which in turn calls coretemp_remove. This removes the |
777 | * pkgtemp entry and does other clean ups. |
778 | */ |
779 | if (!is_any_core_online(pdata)) |
780 | coretemp_device_remove(cpu); |
781 | } |
782 | |
783 | static int coretemp_cpu_callback(struct notifier_block *nfb, |
784 | unsigned long action, void *hcpu) |
785 | { |
786 | unsigned int cpu = (unsigned long) hcpu; |
787 | |
788 | switch (action) { |
789 | case CPU_ONLINE: |
790 | case CPU_DOWN_FAILED: |
791 | get_core_online(cpu); |
792 | break; |
793 | case CPU_DOWN_PREPARE: |
794 | put_core_offline(cpu); |
795 | break; |
796 | } |
797 | return NOTIFY_OK; |
798 | } |
799 | |
800 | static struct notifier_block coretemp_cpu_notifier __refdata = { |
801 | .notifier_call = coretemp_cpu_callback, |
802 | }; |
803 | |
804 | static const struct x86_cpu_id __initconst coretemp_ids[] = { |
805 | { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM }, |
806 | {} |
807 | }; |
808 | MODULE_DEVICE_TABLE(x86cpu, coretemp_ids); |
809 | |
810 | static int __init coretemp_init(void) |
811 | { |
812 | int i, err; |
813 | |
814 | /* |
815 | * CPUID.06H.EAX[0] indicates whether the CPU has thermal |
816 | * sensors. We check this bit only, all the early CPUs |
817 | * without thermal sensors will be filtered out. |
818 | */ |
819 | if (!x86_match_cpu(coretemp_ids)) |
820 | return -ENODEV; |
821 | |
822 | err = platform_driver_register(&coretemp_driver); |
823 | if (err) |
824 | goto exit; |
825 | |
826 | get_online_cpus(); |
827 | for_each_online_cpu(i) |
828 | get_core_online(i); |
829 | |
830 | #ifndef CONFIG_HOTPLUG_CPU |
831 | if (list_empty(&pdev_list)) { |
832 | put_online_cpus(); |
833 | err = -ENODEV; |
834 | goto exit_driver_unreg; |
835 | } |
836 | #endif |
837 | |
838 | register_hotcpu_notifier(&coretemp_cpu_notifier); |
839 | put_online_cpus(); |
840 | return 0; |
841 | |
842 | #ifndef CONFIG_HOTPLUG_CPU |
843 | exit_driver_unreg: |
844 | platform_driver_unregister(&coretemp_driver); |
845 | #endif |
846 | exit: |
847 | return err; |
848 | } |
849 | |
850 | static void __exit coretemp_exit(void) |
851 | { |
852 | struct pdev_entry *p, *n; |
853 | |
854 | get_online_cpus(); |
855 | unregister_hotcpu_notifier(&coretemp_cpu_notifier); |
856 | mutex_lock(&pdev_list_mutex); |
857 | list_for_each_entry_safe(p, n, &pdev_list, list) { |
858 | platform_device_unregister(p->pdev); |
859 | list_del(&p->list); |
860 | kfree(p); |
861 | } |
862 | mutex_unlock(&pdev_list_mutex); |
863 | put_online_cpus(); |
864 | platform_driver_unregister(&coretemp_driver); |
865 | } |
866 | |
867 | MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); |
868 | MODULE_DESCRIPTION("Intel Core temperature monitor"); |
869 | MODULE_LICENSE("GPL"); |
870 | |
871 | module_init(coretemp_init) |
872 | module_exit(coretemp_exit) |
873 |
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