Root/lib/swiotlb.c

1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/export.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define CREATE_TRACE_POINTS
42#include <trace/events/swiotlb.h>
43
44#define OFFSET(val,align) ((unsigned long) \
45                       ( (val) & ( (align) - 1)))
46
47#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
48
49/*
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
53 */
54#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
55
56int swiotlb_force;
57
58/*
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
62 */
63static phys_addr_t io_tlb_start, io_tlb_end;
64
65/*
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
68 */
69static unsigned long io_tlb_nslabs;
70
71/*
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
73 */
74static unsigned long io_tlb_overflow = 32*1024;
75
76static phys_addr_t io_tlb_overflow_buffer;
77
78/*
79 * This is a free list describing the number of free entries available from
80 * each index
81 */
82static unsigned int *io_tlb_list;
83static unsigned int io_tlb_index;
84
85/*
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
88 */
89static phys_addr_t *io_tlb_orig_addr;
90
91/*
92 * Protect the above data structures in the map and unmap calls
93 */
94static DEFINE_SPINLOCK(io_tlb_lock);
95
96static int late_alloc;
97
98static int __init
99setup_io_tlb_npages(char *str)
100{
101    if (isdigit(*str)) {
102        io_tlb_nslabs = simple_strtoul(str, &str, 0);
103        /* avoid tail segment of size < IO_TLB_SEGSIZE */
104        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
105    }
106    if (*str == ',')
107        ++str;
108    if (!strcmp(str, "force"))
109        swiotlb_force = 1;
110
111    return 0;
112}
113early_param("swiotlb", setup_io_tlb_npages);
114/* make io_tlb_overflow tunable too? */
115
116unsigned long swiotlb_nr_tbl(void)
117{
118    return io_tlb_nslabs;
119}
120EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
121
122/* default to 64MB */
123#define IO_TLB_DEFAULT_SIZE (64UL<<20)
124unsigned long swiotlb_size_or_default(void)
125{
126    unsigned long size;
127
128    size = io_tlb_nslabs << IO_TLB_SHIFT;
129
130    return size ? size : (IO_TLB_DEFAULT_SIZE);
131}
132
133/* Note that this doesn't work with highmem page */
134static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
135                      volatile void *address)
136{
137    return phys_to_dma(hwdev, virt_to_phys(address));
138}
139
140static bool no_iotlb_memory;
141
142void swiotlb_print_info(void)
143{
144    unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
145    unsigned char *vstart, *vend;
146
147    if (no_iotlb_memory) {
148        pr_warn("software IO TLB: No low mem\n");
149        return;
150    }
151
152    vstart = phys_to_virt(io_tlb_start);
153    vend = phys_to_virt(io_tlb_end);
154
155    printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
156           (unsigned long long)io_tlb_start,
157           (unsigned long long)io_tlb_end,
158           bytes >> 20, vstart, vend - 1);
159}
160
161int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
162{
163    void *v_overflow_buffer;
164    unsigned long i, bytes;
165
166    bytes = nslabs << IO_TLB_SHIFT;
167
168    io_tlb_nslabs = nslabs;
169    io_tlb_start = __pa(tlb);
170    io_tlb_end = io_tlb_start + bytes;
171
172    /*
173     * Get the overflow emergency buffer
174     */
175    v_overflow_buffer = alloc_bootmem_low_pages_nopanic(
176                        PAGE_ALIGN(io_tlb_overflow));
177    if (!v_overflow_buffer)
178        return -ENOMEM;
179
180    io_tlb_overflow_buffer = __pa(v_overflow_buffer);
181
182    /*
183     * Allocate and initialize the free list array. This array is used
184     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
185     * between io_tlb_start and io_tlb_end.
186     */
187    io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
188    for (i = 0; i < io_tlb_nslabs; i++)
189         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
190    io_tlb_index = 0;
191    io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
192
193    if (verbose)
194        swiotlb_print_info();
195
196    return 0;
197}
198
199/*
200 * Statically reserve bounce buffer space and initialize bounce buffer data
201 * structures for the software IO TLB used to implement the DMA API.
202 */
203void __init
204swiotlb_init(int verbose)
205{
206    size_t default_size = IO_TLB_DEFAULT_SIZE;
207    unsigned char *vstart;
208    unsigned long bytes;
209
210    if (!io_tlb_nslabs) {
211        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
212        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
213    }
214
215    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
216
217    /* Get IO TLB memory from the low pages */
218    vstart = alloc_bootmem_low_pages_nopanic(PAGE_ALIGN(bytes));
219    if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
220        return;
221
222    if (io_tlb_start)
223        free_bootmem(io_tlb_start,
224                 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
225    pr_warn("Cannot allocate SWIOTLB buffer");
226    no_iotlb_memory = true;
227}
228
229/*
230 * Systems with larger DMA zones (those that don't support ISA) can
231 * initialize the swiotlb later using the slab allocator if needed.
232 * This should be just like above, but with some error catching.
233 */
234int
235swiotlb_late_init_with_default_size(size_t default_size)
236{
237    unsigned long bytes, req_nslabs = io_tlb_nslabs;
238    unsigned char *vstart = NULL;
239    unsigned int order;
240    int rc = 0;
241
242    if (!io_tlb_nslabs) {
243        io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
244        io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
245    }
246
247    /*
248     * Get IO TLB memory from the low pages
249     */
250    order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
251    io_tlb_nslabs = SLABS_PER_PAGE << order;
252    bytes = io_tlb_nslabs << IO_TLB_SHIFT;
253
254    while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
255        vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
256                          order);
257        if (vstart)
258            break;
259        order--;
260    }
261
262    if (!vstart) {
263        io_tlb_nslabs = req_nslabs;
264        return -ENOMEM;
265    }
266    if (order != get_order(bytes)) {
267        printk(KERN_WARNING "Warning: only able to allocate %ld MB "
268               "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
269        io_tlb_nslabs = SLABS_PER_PAGE << order;
270    }
271    rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
272    if (rc)
273        free_pages((unsigned long)vstart, order);
274    return rc;
275}
276
277int
278swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
279{
280    unsigned long i, bytes;
281    unsigned char *v_overflow_buffer;
282
283    bytes = nslabs << IO_TLB_SHIFT;
284
285    io_tlb_nslabs = nslabs;
286    io_tlb_start = virt_to_phys(tlb);
287    io_tlb_end = io_tlb_start + bytes;
288
289    memset(tlb, 0, bytes);
290
291    /*
292     * Get the overflow emergency buffer
293     */
294    v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
295                             get_order(io_tlb_overflow));
296    if (!v_overflow_buffer)
297        goto cleanup2;
298
299    io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
300
301    /*
302     * Allocate and initialize the free list array. This array is used
303     * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
304     * between io_tlb_start and io_tlb_end.
305     */
306    io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
307                                  get_order(io_tlb_nslabs * sizeof(int)));
308    if (!io_tlb_list)
309        goto cleanup3;
310
311    for (i = 0; i < io_tlb_nslabs; i++)
312         io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
313    io_tlb_index = 0;
314
315    io_tlb_orig_addr = (phys_addr_t *)
316        __get_free_pages(GFP_KERNEL,
317                 get_order(io_tlb_nslabs *
318                       sizeof(phys_addr_t)));
319    if (!io_tlb_orig_addr)
320        goto cleanup4;
321
322    memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
323
324    swiotlb_print_info();
325
326    late_alloc = 1;
327
328    return 0;
329
330cleanup4:
331    free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
332                                                     sizeof(int)));
333    io_tlb_list = NULL;
334cleanup3:
335    free_pages((unsigned long)v_overflow_buffer,
336           get_order(io_tlb_overflow));
337    io_tlb_overflow_buffer = 0;
338cleanup2:
339    io_tlb_end = 0;
340    io_tlb_start = 0;
341    io_tlb_nslabs = 0;
342    return -ENOMEM;
343}
344
345void __init swiotlb_free(void)
346{
347    if (!io_tlb_orig_addr)
348        return;
349
350    if (late_alloc) {
351        free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
352               get_order(io_tlb_overflow));
353        free_pages((unsigned long)io_tlb_orig_addr,
354               get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
355        free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
356                                 sizeof(int)));
357        free_pages((unsigned long)phys_to_virt(io_tlb_start),
358               get_order(io_tlb_nslabs << IO_TLB_SHIFT));
359    } else {
360        free_bootmem_late(io_tlb_overflow_buffer,
361                  PAGE_ALIGN(io_tlb_overflow));
362        free_bootmem_late(__pa(io_tlb_orig_addr),
363                  PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
364        free_bootmem_late(__pa(io_tlb_list),
365                  PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
366        free_bootmem_late(io_tlb_start,
367                  PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
368    }
369    io_tlb_nslabs = 0;
370}
371
372static int is_swiotlb_buffer(phys_addr_t paddr)
373{
374    return paddr >= io_tlb_start && paddr < io_tlb_end;
375}
376
377/*
378 * Bounce: copy the swiotlb buffer back to the original dma location
379 */
380static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
381               size_t size, enum dma_data_direction dir)
382{
383    unsigned long pfn = PFN_DOWN(orig_addr);
384    unsigned char *vaddr = phys_to_virt(tlb_addr);
385
386    if (PageHighMem(pfn_to_page(pfn))) {
387        /* The buffer does not have a mapping. Map it in and copy */
388        unsigned int offset = orig_addr & ~PAGE_MASK;
389        char *buffer;
390        unsigned int sz = 0;
391        unsigned long flags;
392
393        while (size) {
394            sz = min_t(size_t, PAGE_SIZE - offset, size);
395
396            local_irq_save(flags);
397            buffer = kmap_atomic(pfn_to_page(pfn));
398            if (dir == DMA_TO_DEVICE)
399                memcpy(vaddr, buffer + offset, sz);
400            else
401                memcpy(buffer + offset, vaddr, sz);
402            kunmap_atomic(buffer);
403            local_irq_restore(flags);
404
405            size -= sz;
406            pfn++;
407            vaddr += sz;
408            offset = 0;
409        }
410    } else if (dir == DMA_TO_DEVICE) {
411        memcpy(vaddr, phys_to_virt(orig_addr), size);
412    } else {
413        memcpy(phys_to_virt(orig_addr), vaddr, size);
414    }
415}
416
417phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
418                   dma_addr_t tbl_dma_addr,
419                   phys_addr_t orig_addr, size_t size,
420                   enum dma_data_direction dir)
421{
422    unsigned long flags;
423    phys_addr_t tlb_addr;
424    unsigned int nslots, stride, index, wrap;
425    int i;
426    unsigned long mask;
427    unsigned long offset_slots;
428    unsigned long max_slots;
429
430    if (no_iotlb_memory)
431        panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
432
433    mask = dma_get_seg_boundary(hwdev);
434
435    tbl_dma_addr &= mask;
436
437    offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
438
439    /*
440      * Carefully handle integer overflow which can occur when mask == ~0UL.
441      */
442    max_slots = mask + 1
443            ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
444            : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
445
446    /*
447     * For mappings greater than a page, we limit the stride (and
448     * hence alignment) to a page size.
449     */
450    nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
451    if (size > PAGE_SIZE)
452        stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
453    else
454        stride = 1;
455
456    BUG_ON(!nslots);
457
458    /*
459     * Find suitable number of IO TLB entries size that will fit this
460     * request and allocate a buffer from that IO TLB pool.
461     */
462    spin_lock_irqsave(&io_tlb_lock, flags);
463    index = ALIGN(io_tlb_index, stride);
464    if (index >= io_tlb_nslabs)
465        index = 0;
466    wrap = index;
467
468    do {
469        while (iommu_is_span_boundary(index, nslots, offset_slots,
470                          max_slots)) {
471            index += stride;
472            if (index >= io_tlb_nslabs)
473                index = 0;
474            if (index == wrap)
475                goto not_found;
476        }
477
478        /*
479         * If we find a slot that indicates we have 'nslots' number of
480         * contiguous buffers, we allocate the buffers from that slot
481         * and mark the entries as '0' indicating unavailable.
482         */
483        if (io_tlb_list[index] >= nslots) {
484            int count = 0;
485
486            for (i = index; i < (int) (index + nslots); i++)
487                io_tlb_list[i] = 0;
488            for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
489                io_tlb_list[i] = ++count;
490            tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
491
492            /*
493             * Update the indices to avoid searching in the next
494             * round.
495             */
496            io_tlb_index = ((index + nslots) < io_tlb_nslabs
497                    ? (index + nslots) : 0);
498
499            goto found;
500        }
501        index += stride;
502        if (index >= io_tlb_nslabs)
503            index = 0;
504    } while (index != wrap);
505
506not_found:
507    spin_unlock_irqrestore(&io_tlb_lock, flags);
508    dev_warn(hwdev, "swiotlb buffer is full\n");
509    return SWIOTLB_MAP_ERROR;
510found:
511    spin_unlock_irqrestore(&io_tlb_lock, flags);
512
513    /*
514     * Save away the mapping from the original address to the DMA address.
515     * This is needed when we sync the memory. Then we sync the buffer if
516     * needed.
517     */
518    for (i = 0; i < nslots; i++)
519        io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
520    if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
521        swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
522
523    return tlb_addr;
524}
525EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
526
527/*
528 * Allocates bounce buffer and returns its kernel virtual address.
529 */
530
531phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size,
532               enum dma_data_direction dir)
533{
534    dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
535
536    return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
537}
538
539/*
540 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
541 */
542void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
543                  size_t size, enum dma_data_direction dir)
544{
545    unsigned long flags;
546    int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
547    int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
548    phys_addr_t orig_addr = io_tlb_orig_addr[index];
549
550    /*
551     * First, sync the memory before unmapping the entry
552     */
553    if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
554        swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
555
556    /*
557     * Return the buffer to the free list by setting the corresponding
558     * entries to indicate the number of contiguous entries available.
559     * While returning the entries to the free list, we merge the entries
560     * with slots below and above the pool being returned.
561     */
562    spin_lock_irqsave(&io_tlb_lock, flags);
563    {
564        count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
565             io_tlb_list[index + nslots] : 0);
566        /*
567         * Step 1: return the slots to the free list, merging the
568         * slots with superceeding slots
569         */
570        for (i = index + nslots - 1; i >= index; i--)
571            io_tlb_list[i] = ++count;
572        /*
573         * Step 2: merge the returned slots with the preceding slots,
574         * if available (non zero)
575         */
576        for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
577            io_tlb_list[i] = ++count;
578    }
579    spin_unlock_irqrestore(&io_tlb_lock, flags);
580}
581EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
582
583void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
584                 size_t size, enum dma_data_direction dir,
585                 enum dma_sync_target target)
586{
587    int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
588    phys_addr_t orig_addr = io_tlb_orig_addr[index];
589
590    orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
591
592    switch (target) {
593    case SYNC_FOR_CPU:
594        if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
595            swiotlb_bounce(orig_addr, tlb_addr,
596                       size, DMA_FROM_DEVICE);
597        else
598            BUG_ON(dir != DMA_TO_DEVICE);
599        break;
600    case SYNC_FOR_DEVICE:
601        if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
602            swiotlb_bounce(orig_addr, tlb_addr,
603                       size, DMA_TO_DEVICE);
604        else
605            BUG_ON(dir != DMA_FROM_DEVICE);
606        break;
607    default:
608        BUG();
609    }
610}
611EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
612
613void *
614swiotlb_alloc_coherent(struct device *hwdev, size_t size,
615               dma_addr_t *dma_handle, gfp_t flags)
616{
617    dma_addr_t dev_addr;
618    void *ret;
619    int order = get_order(size);
620    u64 dma_mask = DMA_BIT_MASK(32);
621
622    if (hwdev && hwdev->coherent_dma_mask)
623        dma_mask = hwdev->coherent_dma_mask;
624
625    ret = (void *)__get_free_pages(flags, order);
626    if (ret) {
627        dev_addr = swiotlb_virt_to_bus(hwdev, ret);
628        if (dev_addr + size - 1 > dma_mask) {
629            /*
630             * The allocated memory isn't reachable by the device.
631             */
632            free_pages((unsigned long) ret, order);
633            ret = NULL;
634        }
635    }
636    if (!ret) {
637        /*
638         * We are either out of memory or the device can't DMA to
639         * GFP_DMA memory; fall back on map_single(), which
640         * will grab memory from the lowest available address range.
641         */
642        phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
643        if (paddr == SWIOTLB_MAP_ERROR)
644            return NULL;
645
646        ret = phys_to_virt(paddr);
647        dev_addr = phys_to_dma(hwdev, paddr);
648
649        /* Confirm address can be DMA'd by device */
650        if (dev_addr + size - 1 > dma_mask) {
651            printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
652                   (unsigned long long)dma_mask,
653                   (unsigned long long)dev_addr);
654
655            /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
656            swiotlb_tbl_unmap_single(hwdev, paddr,
657                         size, DMA_TO_DEVICE);
658            return NULL;
659        }
660    }
661
662    *dma_handle = dev_addr;
663    memset(ret, 0, size);
664
665    return ret;
666}
667EXPORT_SYMBOL(swiotlb_alloc_coherent);
668
669void
670swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
671              dma_addr_t dev_addr)
672{
673    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
674
675    WARN_ON(irqs_disabled());
676    if (!is_swiotlb_buffer(paddr))
677        free_pages((unsigned long)vaddr, get_order(size));
678    else
679        /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
680        swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
681}
682EXPORT_SYMBOL(swiotlb_free_coherent);
683
684static void
685swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
686         int do_panic)
687{
688    /*
689     * Ran out of IOMMU space for this operation. This is very bad.
690     * Unfortunately the drivers cannot handle this operation properly.
691     * unless they check for dma_mapping_error (most don't)
692     * When the mapping is small enough return a static buffer to limit
693     * the damage, or panic when the transfer is too big.
694     */
695    printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
696           "device %s\n", size, dev ? dev_name(dev) : "?");
697
698    if (size <= io_tlb_overflow || !do_panic)
699        return;
700
701    if (dir == DMA_BIDIRECTIONAL)
702        panic("DMA: Random memory could be DMA accessed\n");
703    if (dir == DMA_FROM_DEVICE)
704        panic("DMA: Random memory could be DMA written\n");
705    if (dir == DMA_TO_DEVICE)
706        panic("DMA: Random memory could be DMA read\n");
707}
708
709/*
710 * Map a single buffer of the indicated size for DMA in streaming mode. The
711 * physical address to use is returned.
712 *
713 * Once the device is given the dma address, the device owns this memory until
714 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
715 */
716dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
717                unsigned long offset, size_t size,
718                enum dma_data_direction dir,
719                struct dma_attrs *attrs)
720{
721    phys_addr_t map, phys = page_to_phys(page) + offset;
722    dma_addr_t dev_addr = phys_to_dma(dev, phys);
723
724    BUG_ON(dir == DMA_NONE);
725    /*
726     * If the address happens to be in the device's DMA window,
727     * we can safely return the device addr and not worry about bounce
728     * buffering it.
729     */
730    if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
731        return dev_addr;
732
733    trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
734
735    /* Oh well, have to allocate and map a bounce buffer. */
736    map = map_single(dev, phys, size, dir);
737    if (map == SWIOTLB_MAP_ERROR) {
738        swiotlb_full(dev, size, dir, 1);
739        return phys_to_dma(dev, io_tlb_overflow_buffer);
740    }
741
742    dev_addr = phys_to_dma(dev, map);
743
744    /* Ensure that the address returned is DMA'ble */
745    if (!dma_capable(dev, dev_addr, size)) {
746        swiotlb_tbl_unmap_single(dev, map, size, dir);
747        return phys_to_dma(dev, io_tlb_overflow_buffer);
748    }
749
750    return dev_addr;
751}
752EXPORT_SYMBOL_GPL(swiotlb_map_page);
753
754/*
755 * Unmap a single streaming mode DMA translation. The dma_addr and size must
756 * match what was provided for in a previous swiotlb_map_page call. All
757 * other usages are undefined.
758 *
759 * After this call, reads by the cpu to the buffer are guaranteed to see
760 * whatever the device wrote there.
761 */
762static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
763             size_t size, enum dma_data_direction dir)
764{
765    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
766
767    BUG_ON(dir == DMA_NONE);
768
769    if (is_swiotlb_buffer(paddr)) {
770        swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
771        return;
772    }
773
774    if (dir != DMA_FROM_DEVICE)
775        return;
776
777    /*
778     * phys_to_virt doesn't work with hihgmem page but we could
779     * call dma_mark_clean() with hihgmem page here. However, we
780     * are fine since dma_mark_clean() is null on POWERPC. We can
781     * make dma_mark_clean() take a physical address if necessary.
782     */
783    dma_mark_clean(phys_to_virt(paddr), size);
784}
785
786void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
787            size_t size, enum dma_data_direction dir,
788            struct dma_attrs *attrs)
789{
790    unmap_single(hwdev, dev_addr, size, dir);
791}
792EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
793
794/*
795 * Make physical memory consistent for a single streaming mode DMA translation
796 * after a transfer.
797 *
798 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
799 * using the cpu, yet do not wish to teardown the dma mapping, you must
800 * call this function before doing so. At the next point you give the dma
801 * address back to the card, you must first perform a
802 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
803 */
804static void
805swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
806            size_t size, enum dma_data_direction dir,
807            enum dma_sync_target target)
808{
809    phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
810
811    BUG_ON(dir == DMA_NONE);
812
813    if (is_swiotlb_buffer(paddr)) {
814        swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
815        return;
816    }
817
818    if (dir != DMA_FROM_DEVICE)
819        return;
820
821    dma_mark_clean(phys_to_virt(paddr), size);
822}
823
824void
825swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
826                size_t size, enum dma_data_direction dir)
827{
828    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
829}
830EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
831
832void
833swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
834                   size_t size, enum dma_data_direction dir)
835{
836    swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
837}
838EXPORT_SYMBOL(swiotlb_sync_single_for_device);
839
840/*
841 * Map a set of buffers described by scatterlist in streaming mode for DMA.
842 * This is the scatter-gather version of the above swiotlb_map_page
843 * interface. Here the scatter gather list elements are each tagged with the
844 * appropriate dma address and length. They are obtained via
845 * sg_dma_{address,length}(SG).
846 *
847 * NOTE: An implementation may be able to use a smaller number of
848 * DMA address/length pairs than there are SG table elements.
849 * (for example via virtual mapping capabilities)
850 * The routine returns the number of addr/length pairs actually
851 * used, at most nents.
852 *
853 * Device ownership issues as mentioned above for swiotlb_map_page are the
854 * same here.
855 */
856int
857swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
858             enum dma_data_direction dir, struct dma_attrs *attrs)
859{
860    struct scatterlist *sg;
861    int i;
862
863    BUG_ON(dir == DMA_NONE);
864
865    for_each_sg(sgl, sg, nelems, i) {
866        phys_addr_t paddr = sg_phys(sg);
867        dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
868
869        if (swiotlb_force ||
870            !dma_capable(hwdev, dev_addr, sg->length)) {
871            phys_addr_t map = map_single(hwdev, sg_phys(sg),
872                             sg->length, dir);
873            if (map == SWIOTLB_MAP_ERROR) {
874                /* Don't panic here, we expect map_sg users
875                   to do proper error handling. */
876                swiotlb_full(hwdev, sg->length, dir, 0);
877                swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
878                               attrs);
879                sg_dma_len(sgl) = 0;
880                return 0;
881            }
882            sg->dma_address = phys_to_dma(hwdev, map);
883        } else
884            sg->dma_address = dev_addr;
885        sg_dma_len(sg) = sg->length;
886    }
887    return nelems;
888}
889EXPORT_SYMBOL(swiotlb_map_sg_attrs);
890
891int
892swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
893           enum dma_data_direction dir)
894{
895    return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
896}
897EXPORT_SYMBOL(swiotlb_map_sg);
898
899/*
900 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
901 * concerning calls here are the same as for swiotlb_unmap_page() above.
902 */
903void
904swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
905               int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
906{
907    struct scatterlist *sg;
908    int i;
909
910    BUG_ON(dir == DMA_NONE);
911
912    for_each_sg(sgl, sg, nelems, i)
913        unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
914
915}
916EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
917
918void
919swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
920         enum dma_data_direction dir)
921{
922    return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
923}
924EXPORT_SYMBOL(swiotlb_unmap_sg);
925
926/*
927 * Make physical memory consistent for a set of streaming mode DMA translations
928 * after a transfer.
929 *
930 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
931 * and usage.
932 */
933static void
934swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
935        int nelems, enum dma_data_direction dir,
936        enum dma_sync_target target)
937{
938    struct scatterlist *sg;
939    int i;
940
941    for_each_sg(sgl, sg, nelems, i)
942        swiotlb_sync_single(hwdev, sg->dma_address,
943                    sg_dma_len(sg), dir, target);
944}
945
946void
947swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
948            int nelems, enum dma_data_direction dir)
949{
950    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
951}
952EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
953
954void
955swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
956               int nelems, enum dma_data_direction dir)
957{
958    swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
959}
960EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
961
962int
963swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
964{
965    return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
966}
967EXPORT_SYMBOL(swiotlb_dma_mapping_error);
968
969/*
970 * Return whether the given device DMA address mask can be supported
971 * properly. For example, if your device can only drive the low 24-bits
972 * during bus mastering, then you would pass 0x00ffffff as the mask to
973 * this function.
974 */
975int
976swiotlb_dma_supported(struct device *hwdev, u64 mask)
977{
978    return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
979}
980EXPORT_SYMBOL(swiotlb_dma_supported);
981

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