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1 | #include <linux/kernel.h> |
2 | #include <linux/errno.h> |
3 | #include <linux/string.h> |
4 | #include <linux/mm.h> |
5 | #include <linux/delay.h> |
6 | #include <linux/interrupt.h> |
7 | #include <linux/platform_device.h> |
8 | |
9 | #include <asm/setup.h> |
10 | #include <asm/irq.h> |
11 | #include <asm/amigahw.h> |
12 | #include <asm/amigaints.h> |
13 | #include <asm/apollohw.h> |
14 | #include <linux/fb.h> |
15 | #include <linux/module.h> |
16 | |
17 | /* apollo video HW definitions */ |
18 | |
19 | /* |
20 | * Control Registers. IOBASE + $x |
21 | * |
22 | * Note: these are the Memory/IO BASE definitions for a mono card set to the |
23 | * alternate address |
24 | * |
25 | * Control 3A and 3B serve identical functions except that 3A |
26 | * deals with control 1 and 3b deals with Color LUT reg. |
27 | */ |
28 | |
29 | #define AP_IOBASE 0x3b0 /* Base address of 1 plane board. */ |
30 | #define AP_STATUS isaIO2mem(AP_IOBASE+0) /* Status register. Read */ |
31 | #define AP_WRITE_ENABLE isaIO2mem(AP_IOBASE+0) /* Write Enable Register Write */ |
32 | #define AP_DEVICE_ID isaIO2mem(AP_IOBASE+1) /* Device ID Register. Read */ |
33 | #define AP_ROP_1 isaIO2mem(AP_IOBASE+2) /* Raster Operation reg. Write Word */ |
34 | #define AP_DIAG_MEM_REQ isaIO2mem(AP_IOBASE+4) /* Diagnostic Memory Request. Write Word */ |
35 | #define AP_CONTROL_0 isaIO2mem(AP_IOBASE+8) /* Control Register 0. Read/Write */ |
36 | #define AP_CONTROL_1 isaIO2mem(AP_IOBASE+0xa) /* Control Register 1. Read/Write */ |
37 | #define AP_CONTROL_3A isaIO2mem(AP_IOBASE+0xe) /* Control Register 3a. Read/Write */ |
38 | #define AP_CONTROL_2 isaIO2mem(AP_IOBASE+0xc) /* Control Register 2. Read/Write */ |
39 | |
40 | |
41 | #define FRAME_BUFFER_START 0x0FA0000 |
42 | #define FRAME_BUFFER_LEN 0x40000 |
43 | |
44 | /* CREG 0 */ |
45 | #define VECTOR_MODE 0x40 /* 010x.xxxx */ |
46 | #define DBLT_MODE 0x80 /* 100x.xxxx */ |
47 | #define NORMAL_MODE 0xE0 /* 111x.xxxx */ |
48 | #define SHIFT_BITS 0x1F /* xxx1.1111 */ |
49 | /* other bits are Shift value */ |
50 | |
51 | /* CREG 1 */ |
52 | #define AD_BLT 0x80 /* 1xxx.xxxx */ |
53 | #define NORMAL 0x80 /* 1xxx.xxxx */ /* What is happening here ?? */ |
54 | #define INVERSE 0x00 /* 0xxx.xxxx */ /* Clearing this reverses the screen */ |
55 | #define PIX_BLT 0x00 /* 0xxx.xxxx */ |
56 | |
57 | #define AD_HIBIT 0x40 /* xIxx.xxxx */ |
58 | |
59 | #define ROP_EN 0x10 /* xxx1.xxxx */ |
60 | #define DST_EQ_SRC 0x00 /* xxx0.xxxx */ |
61 | #define nRESET_SYNC 0x08 /* xxxx.1xxx */ |
62 | #define SYNC_ENAB 0x02 /* xxxx.xx1x */ |
63 | |
64 | #define BLANK_DISP 0x00 /* xxxx.xxx0 */ |
65 | #define ENAB_DISP 0x01 /* xxxx.xxx1 */ |
66 | |
67 | #define NORM_CREG1 (nRESET_SYNC | SYNC_ENAB | ENAB_DISP) /* no reset sync */ |
68 | |
69 | /* CREG 2 */ |
70 | |
71 | /* |
72 | * Following 3 defines are common to 1, 4 and 8 plane. |
73 | */ |
74 | |
75 | #define S_DATA_1s 0x00 /* 00xx.xxxx */ /* set source to all 1's -- vector drawing */ |
76 | #define S_DATA_PIX 0x40 /* 01xx.xxxx */ /* takes source from ls-bits and replicates over 16 bits */ |
77 | #define S_DATA_PLN 0xC0 /* 11xx.xxxx */ /* normal, each data access =16-bits in |
78 | one plane of image mem */ |
79 | |
80 | /* CREG 3A/CREG 3B */ |
81 | # define RESET_CREG 0x80 /* 1000.0000 */ |
82 | |
83 | /* ROP REG - all one nibble */ |
84 | /* ********* NOTE : this is used r0,r1,r2,r3 *********** */ |
85 | #define ROP(r2,r3,r0,r1) ( (U_SHORT)((r0)|((r1)<<4)|((r2)<<8)|((r3)<<12)) ) |
86 | #define DEST_ZERO 0x0 |
87 | #define SRC_AND_DEST 0x1 |
88 | #define SRC_AND_nDEST 0x2 |
89 | #define SRC 0x3 |
90 | #define nSRC_AND_DEST 0x4 |
91 | #define DEST 0x5 |
92 | #define SRC_XOR_DEST 0x6 |
93 | #define SRC_OR_DEST 0x7 |
94 | #define SRC_NOR_DEST 0x8 |
95 | #define SRC_XNOR_DEST 0x9 |
96 | #define nDEST 0xA |
97 | #define SRC_OR_nDEST 0xB |
98 | #define nSRC 0xC |
99 | #define nSRC_OR_DEST 0xD |
100 | #define SRC_NAND_DEST 0xE |
101 | #define DEST_ONE 0xF |
102 | |
103 | #define SWAP(A) ((A>>8) | ((A&0xff) <<8)) |
104 | |
105 | /* frame buffer operations */ |
106 | |
107 | static int dnfb_blank(int blank, struct fb_info *info); |
108 | static void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area); |
109 | |
110 | static struct fb_ops dn_fb_ops = { |
111 | .owner = THIS_MODULE, |
112 | .fb_blank = dnfb_blank, |
113 | .fb_fillrect = cfb_fillrect, |
114 | .fb_copyarea = dnfb_copyarea, |
115 | .fb_imageblit = cfb_imageblit, |
116 | }; |
117 | |
118 | struct fb_var_screeninfo dnfb_var __devinitdata = { |
119 | .xres = 1280, |
120 | .yres = 1024, |
121 | .xres_virtual = 2048, |
122 | .yres_virtual = 1024, |
123 | .bits_per_pixel = 1, |
124 | .height = -1, |
125 | .width = -1, |
126 | .vmode = FB_VMODE_NONINTERLACED, |
127 | }; |
128 | |
129 | static struct fb_fix_screeninfo dnfb_fix __devinitdata = { |
130 | .id = "Apollo Mono", |
131 | .smem_start = (FRAME_BUFFER_START + IO_BASE), |
132 | .smem_len = FRAME_BUFFER_LEN, |
133 | .type = FB_TYPE_PACKED_PIXELS, |
134 | .visual = FB_VISUAL_MONO10, |
135 | .line_length = 256, |
136 | }; |
137 | |
138 | static int dnfb_blank(int blank, struct fb_info *info) |
139 | { |
140 | if (blank) |
141 | out_8(AP_CONTROL_3A, 0x0); |
142 | else |
143 | out_8(AP_CONTROL_3A, 0x1); |
144 | return 0; |
145 | } |
146 | |
147 | static |
148 | void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) |
149 | { |
150 | |
151 | int incr, y_delta, pre_read = 0, x_end, x_word_count; |
152 | uint start_mask, end_mask, dest; |
153 | ushort *src, dummy; |
154 | short i, j; |
155 | |
156 | incr = (area->dy <= area->sy) ? 1 : -1; |
157 | |
158 | src = (ushort *)(info->screen_base + area->sy * info->fix.line_length + |
159 | (area->sx >> 4)); |
160 | dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4); |
161 | |
162 | if (incr > 0) { |
163 | y_delta = (info->fix.line_length * 8) - area->sx - area->width; |
164 | x_end = area->dx + area->width - 1; |
165 | x_word_count = (x_end >> 4) - (area->dx >> 4) + 1; |
166 | start_mask = 0xffff0000 >> (area->dx & 0xf); |
167 | end_mask = 0x7ffff >> (x_end & 0xf); |
168 | out_8(AP_CONTROL_0, |
169 | (((area->dx & 0xf) - (area->sx & 0xf)) % 16) | (0x4 << 5)); |
170 | if ((area->dx & 0xf) < (area->sx & 0xf)) |
171 | pre_read = 1; |
172 | } else { |
173 | y_delta = -((info->fix.line_length * 8) - area->sx - area->width); |
174 | x_end = area->dx - area->width + 1; |
175 | x_word_count = (area->dx >> 4) - (x_end >> 4) + 1; |
176 | start_mask = 0x7ffff >> (area->dx & 0xf); |
177 | end_mask = 0xffff0000 >> (x_end & 0xf); |
178 | out_8(AP_CONTROL_0, |
179 | ((-((area->sx & 0xf) - (area->dx & 0xf))) % 16) | |
180 | (0x4 << 5)); |
181 | if ((area->dx & 0xf) > (area->sx & 0xf)) |
182 | pre_read = 1; |
183 | } |
184 | |
185 | for (i = 0; i < area->height; i++) { |
186 | |
187 | out_8(AP_CONTROL_3A, 0xc | (dest >> 16)); |
188 | |
189 | if (pre_read) { |
190 | dummy = *src; |
191 | src += incr; |
192 | } |
193 | |
194 | if (x_word_count) { |
195 | out_8(AP_WRITE_ENABLE, start_mask); |
196 | *src = dest; |
197 | src += incr; |
198 | dest += incr; |
199 | out_8(AP_WRITE_ENABLE, 0); |
200 | |
201 | for (j = 1; j < (x_word_count - 1); j++) { |
202 | *src = dest; |
203 | src += incr; |
204 | dest += incr; |
205 | } |
206 | |
207 | out_8(AP_WRITE_ENABLE, start_mask); |
208 | *src = dest; |
209 | dest += incr; |
210 | src += incr; |
211 | } else { |
212 | out_8(AP_WRITE_ENABLE, start_mask | end_mask); |
213 | *src = dest; |
214 | dest += incr; |
215 | src += incr; |
216 | } |
217 | src += (y_delta / 16); |
218 | dest += (y_delta / 16); |
219 | } |
220 | out_8(AP_CONTROL_0, NORMAL_MODE); |
221 | } |
222 | |
223 | /* |
224 | * Initialization |
225 | */ |
226 | |
227 | static int __devinit dnfb_probe(struct platform_device *dev) |
228 | { |
229 | struct fb_info *info; |
230 | int err = 0; |
231 | |
232 | info = framebuffer_alloc(0, &dev->dev); |
233 | if (!info) |
234 | return -ENOMEM; |
235 | |
236 | info->fbops = &dn_fb_ops; |
237 | info->fix = dnfb_fix; |
238 | info->var = dnfb_var; |
239 | info->var.red.length = 1; |
240 | info->var.red.offset = 0; |
241 | info->var.green = info->var.blue = info->var.red; |
242 | info->screen_base = (u_char *) info->fix.smem_start; |
243 | |
244 | err = fb_alloc_cmap(&info->cmap, 2, 0); |
245 | if (err < 0) { |
246 | framebuffer_release(info); |
247 | return err; |
248 | } |
249 | |
250 | err = register_framebuffer(info); |
251 | if (err < 0) { |
252 | fb_dealloc_cmap(&info->cmap); |
253 | framebuffer_release(info); |
254 | return err; |
255 | } |
256 | platform_set_drvdata(dev, info); |
257 | |
258 | /* now we have registered we can safely setup the hardware */ |
259 | out_8(AP_CONTROL_3A, RESET_CREG); |
260 | out_be16(AP_WRITE_ENABLE, 0x0); |
261 | out_8(AP_CONTROL_0, NORMAL_MODE); |
262 | out_8(AP_CONTROL_1, (AD_BLT | DST_EQ_SRC | NORM_CREG1)); |
263 | out_8(AP_CONTROL_2, S_DATA_PLN); |
264 | out_be16(AP_ROP_1, SWAP(0x3)); |
265 | |
266 | printk("apollo frame buffer alive and kicking !\n"); |
267 | return err; |
268 | } |
269 | |
270 | static struct platform_driver dnfb_driver = { |
271 | .probe = dnfb_probe, |
272 | .driver = { |
273 | .name = "dnfb", |
274 | }, |
275 | }; |
276 | |
277 | static struct platform_device dnfb_device = { |
278 | .name = "dnfb", |
279 | }; |
280 | |
281 | int __init dnfb_init(void) |
282 | { |
283 | int ret; |
284 | |
285 | if (!MACH_IS_APOLLO) |
286 | return -ENODEV; |
287 | |
288 | if (fb_get_options("dnfb", NULL)) |
289 | return -ENODEV; |
290 | |
291 | ret = platform_driver_register(&dnfb_driver); |
292 | |
293 | if (!ret) { |
294 | ret = platform_device_register(&dnfb_device); |
295 | if (ret) |
296 | platform_driver_unregister(&dnfb_driver); |
297 | } |
298 | return ret; |
299 | } |
300 | |
301 | module_init(dnfb_init); |
302 | |
303 | MODULE_LICENSE("GPL"); |
304 |
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