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Root/drivers/acpi/processor_idle.c

1	/*
2	* processor_idle - idle state submodule to the ACPI processor driver
3	*
4	* Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5	* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6	* Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7	* Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8	* - Added processor hotplug support
9	* Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10	* - Added support for C3 on SMP
11	*
12	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13	*
14	* This program is free software; you can redistribute it and/or modify
15	* it under the terms of the GNU General Public License as published by
16	* the Free Software Foundation; either version 2 of the License, or (at
17	* your option) any later version.
18	*
19	* This program is distributed in the hope that it will be useful, but
20	* WITHOUT ANY WARRANTY; without even the implied warranty of
21	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22	* General Public License for more details.
23	*
24	* You should have received a copy of the GNU General Public License along
25	* with this program; if not, write to the Free Software Foundation, Inc.,
26	* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27	*
28	* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29	*/
30
31	#include <linux/kernel.h>
32	#include <linux/module.h>
33	#include <linux/init.h>
34	#include <linux/cpufreq.h>
35	#include <linux/slab.h>
36	#include <linux/acpi.h>
37	#include <linux/dmi.h>
38	#include <linux/moduleparam.h>
39	#include <linux/sched.h> /* need_resched() */
40	#include <linux/pm_qos.h>
41	#include <linux/clockchips.h>
42	#include <linux/cpuidle.h>
43	#include <linux/irqflags.h>
44
45	/*
46	* Include the apic definitions for x86 to have the APIC timer related defines
47	* available also for UP (on SMP it gets magically included via linux/smp.h).
48	* asm/acpi.h is not an option, as it would require more include magic. Also
49	* creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50	*/
51	#ifdef CONFIG_X86
52	#include <asm/apic.h>
53	#endif
54
55	#include <asm/io.h>
56	#include <asm/uaccess.h>
57
58	#include <acpi/acpi_bus.h>
59	#include <acpi/processor.h>
60	#include <asm/processor.h>
61
62	#define PREFIX "ACPI: "
63
64	#define ACPI_PROCESSOR_CLASS "processor"
65	#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66	ACPI_MODULE_NAME("processor_idle");
67	#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68	#define C2_OVERHEAD 1 /* 1us */
69	#define C3_OVERHEAD 1 /* 1us */
70	#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72	static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73	module_param(max_cstate, uint, 0000);
74	static unsigned int nocst __read_mostly;
75	module_param(nocst, uint, 0000);
76	static int bm_check_disable __read_mostly;
77	module_param(bm_check_disable, uint, 0000);
78
79	static unsigned int latency_factor __read_mostly = 2;
80	module_param(latency_factor, uint, 0644);
81
82	static int disabled_by_idle_boot_param(void)
83	{
84	return boot_option_idle_override == IDLE_POLL \|\|
85	boot_option_idle_override == IDLE_FORCE_MWAIT \|\|
86	boot_option_idle_override == IDLE_HALT;
87	}
88
89	/*
90	* IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91	* For now disable this. Probably a bug somewhere else.
92	*
93	* To skip this limit, boot/load with a large max_cstate limit.
94	*/
95	static int set_max_cstate(const struct dmi_system_id *id)
96	{
97	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98	return 0;
99
100	printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101	" Override with \"processor.max_cstate=%d\"\n", id->ident,
102	(long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104	max_cstate = (long)id->driver_data;
105
106	return 0;
107	}
108
109	/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110	callers to only run once -AK */
111	static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112	{ set_max_cstate, "Clevo 5600D", {
113	DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114	DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115	(void *)2},
116	{ set_max_cstate, "Pavilion zv5000", {
117	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118	DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119	(void *)1},
120	{ set_max_cstate, "Asus L8400B", {
121	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122	DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123	(void *)1},
124	{},
125	};
126
127
128	/*
129	* Callers should disable interrupts before the call and enable
130	* interrupts after return.
131	*/
132	static void acpi_safe_halt(void)
133	{
134	current_thread_info()->status &= ~TS_POLLING;
135	/*
136	* TS_POLLING-cleared state must be visible before we
137	* test NEED_RESCHED:
138	*/
139	smp_mb();
140	if (!need_resched()) {
141	safe_halt();
142	local_irq_disable();
143	}
144	current_thread_info()->status \|= TS_POLLING;
145	}
146
147	#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149	/*
150	* Some BIOS implementations switch to C3 in the published C2 state.
151	* This seems to be a common problem on AMD boxen, but other vendors
152	* are affected too. We pick the most conservative approach: we assume
153	* that the local APIC stops in both C2 and C3.
154	*/
155	static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156	struct acpi_processor_cx *cx)
157	{
158	struct acpi_processor_power *pwr = &pr->power;
159	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162	return;
163
164	if (amd_e400_c1e_detected)
165	type = ACPI_STATE_C1;
166
167	/*
168	* Check, if one of the previous states already marked the lapic
169	* unstable
170	*/
171	if (pwr->timer_broadcast_on_state < state)
172	return;
173
174	if (cx->type >= type)
175	pr->power.timer_broadcast_on_state = state;
176	}
177
178	static void __lapic_timer_propagate_broadcast(void *arg)
179	{
180	struct acpi_processor pr = (struct acpi_processor ) arg;
181	unsigned long reason;
182
183	reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184	CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186	clockevents_notify(reason, &pr->id);
187	}
188
189	static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190	{
191	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192	(void *)pr, 1);
193	}
194
195	/* Power(C) State timer broadcast control */
196	static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197	struct acpi_processor_cx *cx,
198	int broadcast)
199	{
200	int state = cx - pr->power.states;
201
202	if (state >= pr->power.timer_broadcast_on_state) {
203	unsigned long reason;
204
205	reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206	CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207	clockevents_notify(reason, &pr->id);
208	}
209	}
210
211	#else
212
213	static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214	struct acpi_processor_cx *cstate) { }
215	static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216	static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217	struct acpi_processor_cx *cx,
218	int broadcast)
219	{
220	}
221
222	#endif
223
224	static u32 saved_bm_rld;
225
226	static void acpi_idle_bm_rld_save(void)
227	{
228	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
229	}
230	static void acpi_idle_bm_rld_restore(void)
231	{
232	u32 resumed_bm_rld;
233
234	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
235
236	if (resumed_bm_rld != saved_bm_rld)
237	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
238	}
239
240	int acpi_processor_suspend(struct device *dev)
241	{
242	acpi_idle_bm_rld_save();
243	return 0;
244	}
245
246	int acpi_processor_resume(struct device *dev)
247	{
248	acpi_idle_bm_rld_restore();
249	return 0;
250	}
251
252	#if defined(CONFIG_X86)
253	static void tsc_check_state(int state)
254	{
255	switch (boot_cpu_data.x86_vendor) {
256	case X86_VENDOR_AMD:
257	case X86_VENDOR_INTEL:
258	/*
259	* AMD Fam10h TSC will tick in all
260	* C/P/S0/S1 states when this bit is set.
261	*/
262	if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
263	return;
264
265	/FALL THROUGH/
266	default:
267	/* TSC could halt in idle, so notify users */
268	if (state > ACPI_STATE_C1)
269	mark_tsc_unstable("TSC halts in idle");
270	}
271	}
272	#else
273	static void tsc_check_state(int state) { return; }
274	#endif
275
276	static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
277	{
278
279	if (!pr)
280	return -EINVAL;
281
282	if (!pr->pblk)
283	return -ENODEV;
284
285	/* if info is obtained from pblk/fadt, type equals state */
286	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
287	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
288
289	#ifndef CONFIG_HOTPLUG_CPU
290	/*
291	* Check for P_LVL2_UP flag before entering C2 and above on
292	* an SMP system.
293	*/
294	if ((num_online_cpus() > 1) &&
295	!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
296	return -ENODEV;
297	#endif
298
299	/* determine C2 and C3 address from pblk */
300	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
301	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
302
303	/* determine latencies from FADT */
304	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
305	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
306
307	/*
308	* FADT specified C2 latency must be less than or equal to
309	* 100 microseconds.
310	*/
311	if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
312	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
313	"C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
314	/* invalidate C2 */
315	pr->power.states[ACPI_STATE_C2].address = 0;
316	}
317
318	/*
319	* FADT supplied C3 latency must be less than or equal to
320	* 1000 microseconds.
321	*/
322	if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
323	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
324	"C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
325	/* invalidate C3 */
326	pr->power.states[ACPI_STATE_C3].address = 0;
327	}
328
329	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
330	"lvl2[0x%08x] lvl3[0x%08x]\n",
331	pr->power.states[ACPI_STATE_C2].address,
332	pr->power.states[ACPI_STATE_C3].address));
333
334	return 0;
335	}
336
337	static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
338	{
339	if (!pr->power.states[ACPI_STATE_C1].valid) {
340	/* set the first C-State to C1 */
341	/* all processors need to support C1 */
342	pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
343	pr->power.states[ACPI_STATE_C1].valid = 1;
344	pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
345	}
346	/* the C0 state only exists as a filler in our array */
347	pr->power.states[ACPI_STATE_C0].valid = 1;
348	return 0;
349	}
350
351	static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
352	{
353	acpi_status status = 0;
354	u64 count;
355	int current_count;
356	int i;
357	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
358	union acpi_object *cst;
359
360
361	if (nocst)
362	return -ENODEV;
363
364	current_count = 0;
365
366	status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
367	if (ACPI_FAILURE(status)) {
368	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
369	return -ENODEV;
370	}
371
372	cst = buffer.pointer;
373
374	/* There must be at least 2 elements */
375	if (!cst \|\| (cst->type != ACPI_TYPE_PACKAGE) \|\| cst->package.count < 2) {
376	printk(KERN_ERR PREFIX "not enough elements in _CST\n");
377	status = -EFAULT;
378	goto end;
379	}
380
381	count = cst->package.elements[0].integer.value;
382
383	/* Validate number of power states. */
384	if (count < 1 \|\| count != cst->package.count - 1) {
385	printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
386	status = -EFAULT;
387	goto end;
388	}
389
390	/* Tell driver that at least _CST is supported. */
391	pr->flags.has_cst = 1;
392
393	for (i = 1; i <= count; i++) {
394	union acpi_object *element;
395	union acpi_object *obj;
396	struct acpi_power_register *reg;
397	struct acpi_processor_cx cx;
398
399	memset(&cx, 0, sizeof(cx));
400
401	element = &(cst->package.elements[i]);
402	if (element->type != ACPI_TYPE_PACKAGE)
403	continue;
404
405	if (element->package.count != 4)
406	continue;
407
408	obj = &(element->package.elements[0]);
409
410	if (obj->type != ACPI_TYPE_BUFFER)
411	continue;
412
413	reg = (struct acpi_power_register *)obj->buffer.pointer;
414
415	if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
416	(reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
417	continue;
418
419	/* There should be an easy way to extract an integer... */
420	obj = &(element->package.elements[1]);
421	if (obj->type != ACPI_TYPE_INTEGER)
422	continue;
423
424	cx.type = obj->integer.value;
425	/*
426	* Some buggy BIOSes won't list C1 in _CST -
427	* Let acpi_processor_get_power_info_default() handle them later
428	*/
429	if (i == 1 && cx.type != ACPI_STATE_C1)
430	current_count++;
431
432	cx.address = reg->address;
433	cx.index = current_count + 1;
434
435	cx.entry_method = ACPI_CSTATE_SYSTEMIO;
436	if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
437	if (acpi_processor_ffh_cstate_probe
438	(pr->id, &cx, reg) == 0) {
439	cx.entry_method = ACPI_CSTATE_FFH;
440	} else if (cx.type == ACPI_STATE_C1) {
441	/*
442	* C1 is a special case where FIXED_HARDWARE
443	* can be handled in non-MWAIT way as well.
444	* In that case, save this _CST entry info.
445	* Otherwise, ignore this info and continue.
446	*/
447	cx.entry_method = ACPI_CSTATE_HALT;
448	snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
449	} else {
450	continue;
451	}
452	if (cx.type == ACPI_STATE_C1 &&
453	(boot_option_idle_override == IDLE_NOMWAIT)) {
454	/*
455	* In most cases the C1 space_id obtained from
456	* _CST object is FIXED_HARDWARE access mode.
457	* But when the option of idle=halt is added,
458	* the entry_method type should be changed from
459	* CSTATE_FFH to CSTATE_HALT.
460	* When the option of idle=nomwait is added,
461	* the C1 entry_method type should be
462	* CSTATE_HALT.
463	*/
464	cx.entry_method = ACPI_CSTATE_HALT;
465	snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
466	}
467	} else {
468	snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
469	cx.address);
470	}
471
472	if (cx.type == ACPI_STATE_C1) {
473	cx.valid = 1;
474	}
475
476	obj = &(element->package.elements[2]);
477	if (obj->type != ACPI_TYPE_INTEGER)
478	continue;
479
480	cx.latency = obj->integer.value;
481
482	obj = &(element->package.elements[3]);
483	if (obj->type != ACPI_TYPE_INTEGER)
484	continue;
485
486	cx.power = obj->integer.value;
487
488	current_count++;
489	memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
490
491	/*
492	* We support total ACPI_PROCESSOR_MAX_POWER - 1
493	* (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
494	*/
495	if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
496	printk(KERN_WARNING
497	"Limiting number of power states to max (%d)\n",
498	ACPI_PROCESSOR_MAX_POWER);
499	printk(KERN_WARNING
500	"Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
501	break;
502	}
503	}
504
505	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
506	current_count));
507
508	/* Validate number of power states discovered */
509	if (current_count < 2)
510	status = -EFAULT;
511
512	end:
513	kfree(buffer.pointer);
514
515	return status;
516	}
517
518	static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
519	struct acpi_processor_cx *cx)
520	{
521	static int bm_check_flag = -1;
522	static int bm_control_flag = -1;
523
524
525	if (!cx->address)
526	return;
527
528	/*
529	* PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
530	* DMA transfers are used by any ISA device to avoid livelock.
531	* Note that we could disable Type-F DMA (as recommended by
532	* the erratum), but this is known to disrupt certain ISA
533	* devices thus we take the conservative approach.
534	*/
535	else if (errata.piix4.fdma) {
536	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
537	"C3 not supported on PIIX4 with Type-F DMA\n"));
538	return;
539	}
540
541	/* All the logic here assumes flags.bm_check is same across all CPUs */
542	if (bm_check_flag == -1) {
543	/* Determine whether bm_check is needed based on CPU */
544	acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
545	bm_check_flag = pr->flags.bm_check;
546	bm_control_flag = pr->flags.bm_control;
547	} else {
548	pr->flags.bm_check = bm_check_flag;
549	pr->flags.bm_control = bm_control_flag;
550	}
551
552	if (pr->flags.bm_check) {
553	if (!pr->flags.bm_control) {
554	if (pr->flags.has_cst != 1) {
555	/* bus mastering control is necessary */
556	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
557	"C3 support requires BM control\n"));
558	return;
559	} else {
560	/* Here we enter C3 without bus mastering */
561	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
562	"C3 support without BM control\n"));
563	}
564	}
565	} else {
566	/*
567	* WBINVD should be set in fadt, for C3 state to be
568	* supported on when bm_check is not required.
569	*/
570	if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
571	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
572	"Cache invalidation should work properly"
573	" for C3 to be enabled on SMP systems\n"));
574	return;
575	}
576	}
577
578	/*
579	* Otherwise we've met all of our C3 requirements.
580	* Normalize the C3 latency to expidite policy. Enable
581	* checking of bus mastering status (bm_check) so we can
582	* use this in our C3 policy
583	*/
584	cx->valid = 1;
585
586	/*
587	* On older chipsets, BM_RLD needs to be set
588	* in order for Bus Master activity to wake the
589	* system from C3. Newer chipsets handle DMA
590	* during C3 automatically and BM_RLD is a NOP.
591	* In either case, the proper way to
592	* handle BM_RLD is to set it and leave it set.
593	*/
594	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
595
596	return;
597	}
598
599	static int acpi_processor_power_verify(struct acpi_processor *pr)
600	{
601	unsigned int i;
602	unsigned int working = 0;
603
604	pr->power.timer_broadcast_on_state = INT_MAX;
605
606	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
607	struct acpi_processor_cx *cx = &pr->power.states[i];
608
609	switch (cx->type) {
610	case ACPI_STATE_C1:
611	cx->valid = 1;
612	break;
613
614	case ACPI_STATE_C2:
615	if (!cx->address)
616	break;
617	cx->valid = 1;
618	break;
619
620	case ACPI_STATE_C3:
621	acpi_processor_power_verify_c3(pr, cx);
622	break;
623	}
624	if (!cx->valid)
625	continue;
626
627	lapic_timer_check_state(i, pr, cx);
628	tsc_check_state(cx->type);
629	working++;
630	}
631
632	lapic_timer_propagate_broadcast(pr);
633
634	return (working);
635	}
636
637	static int acpi_processor_get_power_info(struct acpi_processor *pr)
638	{
639	unsigned int i;
640	int result;
641
642
643	/* NOTE: the idle thread may not be running while calling
644	* this function */
645
646	/* Zero initialize all the C-states info. */
647	memset(pr->power.states, 0, sizeof(pr->power.states));
648
649	result = acpi_processor_get_power_info_cst(pr);
650	if (result == -ENODEV)
651	result = acpi_processor_get_power_info_fadt(pr);
652
653	if (result)
654	return result;
655
656	acpi_processor_get_power_info_default(pr);
657
658	pr->power.count = acpi_processor_power_verify(pr);
659
660	/*
661	* if one state of type C2 or C3 is available, mark this
662	* CPU as being "idle manageable"
663	*/
664	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
665	if (pr->power.states[i].valid) {
666	pr->power.count = i;
667	if (pr->power.states[i].type >= ACPI_STATE_C2)
668	pr->flags.power = 1;
669	}
670	}
671
672	return 0;
673	}
674
675	/**
676	* acpi_idle_bm_check - checks if bus master activity was detected
677	*/
678	static int acpi_idle_bm_check(void)
679	{
680	u32 bm_status = 0;
681
682	if (bm_check_disable)
683	return 0;
684
685	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
686	if (bm_status)
687	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
688	/*
689	* PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
690	* the true state of bus mastering activity; forcing us to
691	* manually check the BMIDEA bit of each IDE channel.
692	*/
693	else if (errata.piix4.bmisx) {
694	if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
695	\|\| (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
696	bm_status = 1;
697	}
698	return bm_status;
699	}
700
701	/**
702	* acpi_idle_do_entry - a helper function that does C2 and C3 type entry
703	* @cx: cstate data
704	*
705	* Caller disables interrupt before call and enables interrupt after return.
706	*/
707	static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
708	{
709	/* Don't trace irqs off for idle */
710	stop_critical_timings();
711	if (cx->entry_method == ACPI_CSTATE_FFH) {
712	/* Call into architectural FFH based C-state */
713	acpi_processor_ffh_cstate_enter(cx);
714	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
715	acpi_safe_halt();
716	} else {
717	/* IO port based C-state */
718	inb(cx->address);
719	/* Dummy wait op - must do something useless after P_LVL2 read
720	because chipsets cannot guarantee that STPCLK# signal
721	gets asserted in time to freeze execution properly. */
722	inl(acpi_gbl_FADT.xpm_timer_block.address);
723	}
724	start_critical_timings();
725	}
726
727	/**
728	* acpi_idle_enter_c1 - enters an ACPI C1 state-type
729	* @dev: the target CPU
730	* @drv: cpuidle driver containing cpuidle state info
731	* @index: index of target state
732	*
733	* This is equivalent to the HALT instruction.
734	*/
735	static int acpi_idle_enter_c1(struct cpuidle_device *dev,
736	struct cpuidle_driver *drv, int index)
737	{
738	ktime_t kt1, kt2;
739	s64 idle_time;
740	struct acpi_processor *pr;
741	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
742	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
743
744	pr = __this_cpu_read(processors);
745	dev->last_residency = 0;
746
747	if (unlikely(!pr))
748	return -EINVAL;
749
750	local_irq_disable();
751
752
753	lapic_timer_state_broadcast(pr, cx, 1);
754	kt1 = ktime_get_real();
755	acpi_idle_do_entry(cx);
756	kt2 = ktime_get_real();
757	idle_time = ktime_to_us(ktime_sub(kt2, kt1));
758
759	/* Update device last_residency*/
760	dev->last_residency = (int)idle_time;
761
762	local_irq_enable();
763	lapic_timer_state_broadcast(pr, cx, 0);
764
765	return index;
766	}
767
768
769	/**
770	* acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
771	* @dev: the target CPU
772	* @index: the index of suggested state
773	*/
774	static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
775	{
776	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
777	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
778
779	ACPI_FLUSH_CPU_CACHE();
780
781	while (1) {
782
783	if (cx->entry_method == ACPI_CSTATE_HALT)
784	safe_halt();
785	else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
786	inb(cx->address);
787	/* See comment in acpi_idle_do_entry() */
788	inl(acpi_gbl_FADT.xpm_timer_block.address);
789	} else
790	return -ENODEV;
791	}
792
793	/* Never reached */
794	return 0;
795	}
796
797	/**
798	* acpi_idle_enter_simple - enters an ACPI state without BM handling
799	* @dev: the target CPU
800	* @drv: cpuidle driver with cpuidle state information
801	* @index: the index of suggested state
802	*/
803	static int acpi_idle_enter_simple(struct cpuidle_device *dev,
804	struct cpuidle_driver *drv, int index)
805	{
806	struct acpi_processor *pr;
807	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
808	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
809	ktime_t kt1, kt2;
810	s64 idle_time_ns;
811	s64 idle_time;
812
813	pr = __this_cpu_read(processors);
814	dev->last_residency = 0;
815
816	if (unlikely(!pr))
817	return -EINVAL;
818
819	local_irq_disable();
820
821
822	if (cx->entry_method != ACPI_CSTATE_FFH) {
823	current_thread_info()->status &= ~TS_POLLING;
824	/*
825	* TS_POLLING-cleared state must be visible before we test
826	* NEED_RESCHED:
827	*/
828	smp_mb();
829
830	if (unlikely(need_resched())) {
831	current_thread_info()->status \|= TS_POLLING;
832	local_irq_enable();
833	return -EINVAL;
834	}
835	}
836
837	/*
838	* Must be done before busmaster disable as we might need to
839	* access HPET !
840	*/
841	lapic_timer_state_broadcast(pr, cx, 1);
842
843	if (cx->type == ACPI_STATE_C3)
844	ACPI_FLUSH_CPU_CACHE();
845
846	kt1 = ktime_get_real();
847	/* Tell the scheduler that we are going deep-idle: */
848	sched_clock_idle_sleep_event();
849	acpi_idle_do_entry(cx);
850	kt2 = ktime_get_real();
851	idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
852	idle_time = idle_time_ns;
853	do_div(idle_time, NSEC_PER_USEC);
854
855	/* Update device last_residency*/
856	dev->last_residency = (int)idle_time;
857
858	/* Tell the scheduler how much we idled: */
859	sched_clock_idle_wakeup_event(idle_time_ns);
860
861	local_irq_enable();
862	if (cx->entry_method != ACPI_CSTATE_FFH)
863	current_thread_info()->status \|= TS_POLLING;
864
865	lapic_timer_state_broadcast(pr, cx, 0);
866	return index;
867	}
868
869	static int c3_cpu_count;
870	static DEFINE_RAW_SPINLOCK(c3_lock);
871
872	/**
873	* acpi_idle_enter_bm - enters C3 with proper BM handling
874	* @dev: the target CPU
875	* @drv: cpuidle driver containing state data
876	* @index: the index of suggested state
877	*
878	* If BM is detected, the deepest non-C3 idle state is entered instead.
879	*/
880	static int acpi_idle_enter_bm(struct cpuidle_device *dev,
881	struct cpuidle_driver *drv, int index)
882	{
883	struct acpi_processor *pr;
884	struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
885	struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
886	ktime_t kt1, kt2;
887	s64 idle_time_ns;
888	s64 idle_time;
889
890
891	pr = __this_cpu_read(processors);
892	dev->last_residency = 0;
893
894	if (unlikely(!pr))
895	return -EINVAL;
896
897	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
898	if (drv->safe_state_index >= 0) {
899	return drv->states[drv->safe_state_index].enter(dev,
900	drv, drv->safe_state_index);
901	} else {
902	local_irq_disable();
903	acpi_safe_halt();
904	local_irq_enable();
905	return -EBUSY;
906	}
907	}
908
909	local_irq_disable();
910
911
912	if (cx->entry_method != ACPI_CSTATE_FFH) {
913	current_thread_info()->status &= ~TS_POLLING;
914	/*
915	* TS_POLLING-cleared state must be visible before we test
916	* NEED_RESCHED:
917	*/
918	smp_mb();
919
920	if (unlikely(need_resched())) {
921	current_thread_info()->status \|= TS_POLLING;
922	local_irq_enable();
923	return -EINVAL;
924	}
925	}
926
927	acpi_unlazy_tlb(smp_processor_id());
928
929	/* Tell the scheduler that we are going deep-idle: */
930	sched_clock_idle_sleep_event();
931	/*
932	* Must be done before busmaster disable as we might need to
933	* access HPET !
934	*/
935	lapic_timer_state_broadcast(pr, cx, 1);
936
937	kt1 = ktime_get_real();
938	/*
939	* disable bus master
940	* bm_check implies we need ARB_DIS
941	* !bm_check implies we need cache flush
942	* bm_control implies whether we can do ARB_DIS
943	*
944	* That leaves a case where bm_check is set and bm_control is
945	* not set. In that case we cannot do much, we enter C3
946	* without doing anything.
947	*/
948	if (pr->flags.bm_check && pr->flags.bm_control) {
949	raw_spin_lock(&c3_lock);
950	c3_cpu_count++;
951	/* Disable bus master arbitration when all CPUs are in C3 */
952	if (c3_cpu_count == num_online_cpus())
953	acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
954	raw_spin_unlock(&c3_lock);
955	} else if (!pr->flags.bm_check) {
956	ACPI_FLUSH_CPU_CACHE();
957	}
958
959	acpi_idle_do_entry(cx);
960
961	/* Re-enable bus master arbitration */
962	if (pr->flags.bm_check && pr->flags.bm_control) {
963	raw_spin_lock(&c3_lock);
964	acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
965	c3_cpu_count--;
966	raw_spin_unlock(&c3_lock);
967	}
968	kt2 = ktime_get_real();
969	idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
970	idle_time = idle_time_ns;
971	do_div(idle_time, NSEC_PER_USEC);
972
973	/* Update device last_residency*/
974	dev->last_residency = (int)idle_time;
975
976	/* Tell the scheduler how much we idled: */
977	sched_clock_idle_wakeup_event(idle_time_ns);
978
979	local_irq_enable();
980	if (cx->entry_method != ACPI_CSTATE_FFH)
981	current_thread_info()->status \|= TS_POLLING;
982
983	lapic_timer_state_broadcast(pr, cx, 0);
984	return index;
985	}
986
987	struct cpuidle_driver acpi_idle_driver = {
988	.name = "acpi_idle",
989	.owner = THIS_MODULE,
990	};
991
992	/**
993	* acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
994	* device i.e. per-cpu data
995	*
996	* @pr: the ACPI processor
997	*/
998	static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
999	{
1000	int i, count = CPUIDLE_DRIVER_STATE_START;
1001	struct acpi_processor_cx *cx;
1002	struct cpuidle_state_usage *state_usage;
1003	struct cpuidle_device *dev = &pr->power.dev;
1004
1005	if (!pr->flags.power_setup_done)
1006	return -EINVAL;
1007
1008	if (pr->flags.power == 0) {
1009	return -EINVAL;
1010	}
1011
1012	dev->cpu = pr->id;
1013
1014	if (max_cstate == 0)
1015	max_cstate = 1;
1016
1017	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1018	cx = &pr->power.states[i];
1019	state_usage = &dev->states_usage[count];
1020
1021	if (!cx->valid)
1022	continue;
1023
1024	#ifdef CONFIG_HOTPLUG_CPU
1025	if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1026	!pr->flags.has_cst &&
1027	!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1028	continue;
1029	#endif
1030
1031	cpuidle_set_statedata(state_usage, cx);
1032
1033	count++;
1034	if (count == CPUIDLE_STATE_MAX)
1035	break;
1036	}
1037
1038	dev->state_count = count;
1039
1040	if (!count)
1041	return -EINVAL;
1042
1043	return 0;
1044	}
1045
1046	/**
1047	* acpi_processor_setup_cpuidle states- prepares and configures cpuidle
1048	* global state data i.e. idle routines
1049	*
1050	* @pr: the ACPI processor
1051	*/
1052	static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1053	{
1054	int i, count = CPUIDLE_DRIVER_STATE_START;
1055	struct acpi_processor_cx *cx;
1056	struct cpuidle_state *state;
1057	struct cpuidle_driver *drv = &acpi_idle_driver;
1058
1059	if (!pr->flags.power_setup_done)
1060	return -EINVAL;
1061
1062	if (pr->flags.power == 0)
1063	return -EINVAL;
1064
1065	drv->safe_state_index = -1;
1066	for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1067	drv->states[i].name[0] = '\0';
1068	drv->states[i].desc[0] = '\0';
1069	}
1070
1071	if (max_cstate == 0)
1072	max_cstate = 1;
1073
1074	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1075	cx = &pr->power.states[i];
1076
1077	if (!cx->valid)
1078	continue;
1079
1080	#ifdef CONFIG_HOTPLUG_CPU
1081	if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1082	!pr->flags.has_cst &&
1083	!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1084	continue;
1085	#endif
1086
1087	state = &drv->states[count];
1088	snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1089	strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1090	state->exit_latency = cx->latency;
1091	state->target_residency = cx->latency * latency_factor;
1092
1093	state->flags = 0;
1094	switch (cx->type) {
1095	case ACPI_STATE_C1:
1096	if (cx->entry_method == ACPI_CSTATE_FFH)
1097	state->flags \|= CPUIDLE_FLAG_TIME_VALID;
1098
1099	state->enter = acpi_idle_enter_c1;
1100	state->enter_dead = acpi_idle_play_dead;
1101	drv->safe_state_index = count;
1102	break;
1103
1104	case ACPI_STATE_C2:
1105	state->flags \|= CPUIDLE_FLAG_TIME_VALID;
1106	state->enter = acpi_idle_enter_simple;
1107	state->enter_dead = acpi_idle_play_dead;
1108	drv->safe_state_index = count;
1109	break;
1110
1111	case ACPI_STATE_C3:
1112	state->flags \|= CPUIDLE_FLAG_TIME_VALID;
1113	state->enter = pr->flags.bm_check ?
1114	acpi_idle_enter_bm :
1115	acpi_idle_enter_simple;
1116	break;
1117	}
1118
1119	count++;
1120	if (count == CPUIDLE_STATE_MAX)
1121	break;
1122	}
1123
1124	drv->state_count = count;
1125
1126	if (!count)
1127	return -EINVAL;
1128
1129	return 0;
1130	}
1131
1132	int acpi_processor_hotplug(struct acpi_processor *pr)
1133	{
1134	int ret = 0;
1135
1136	if (disabled_by_idle_boot_param())
1137	return 0;
1138
1139	if (!pr)
1140	return -EINVAL;
1141
1142	if (nocst) {
1143	return -ENODEV;
1144	}
1145
1146	if (!pr->flags.power_setup_done)
1147	return -ENODEV;
1148
1149	cpuidle_pause_and_lock();
1150	cpuidle_disable_device(&pr->power.dev);
1151	acpi_processor_get_power_info(pr);
1152	if (pr->flags.power) {
1153	acpi_processor_setup_cpuidle_cx(pr);
1154	ret = cpuidle_enable_device(&pr->power.dev);
1155	}
1156	cpuidle_resume_and_unlock();
1157
1158	return ret;
1159	}
1160
1161	int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1162	{
1163	int cpu;
1164	struct acpi_processor *_pr;
1165
1166	if (disabled_by_idle_boot_param())
1167	return 0;
1168
1169	if (!pr)
1170	return -EINVAL;
1171
1172	if (nocst)
1173	return -ENODEV;
1174
1175	if (!pr->flags.power_setup_done)
1176	return -ENODEV;
1177
1178	/*
1179	* FIXME: Design the ACPI notification to make it once per
1180	* system instead of once per-cpu. This condition is a hack
1181	* to make the code that updates C-States be called once.
1182	*/
1183
1184	if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1185
1186	cpuidle_pause_and_lock();
1187	/* Protect against cpu-hotplug */
1188	get_online_cpus();
1189
1190	/* Disable all cpuidle devices */
1191	for_each_online_cpu(cpu) {
1192	_pr = per_cpu(processors, cpu);
1193	if (!_pr \|\| !_pr->flags.power_setup_done)
1194	continue;
1195	cpuidle_disable_device(&_pr->power.dev);
1196	}
1197
1198	/* Populate Updated C-state information */
1199	acpi_processor_setup_cpuidle_states(pr);
1200
1201	/* Enable all cpuidle devices */
1202	for_each_online_cpu(cpu) {
1203	_pr = per_cpu(processors, cpu);
1204	if (!_pr \|\| !_pr->flags.power_setup_done)
1205	continue;
1206	acpi_processor_get_power_info(_pr);
1207	if (_pr->flags.power) {
1208	acpi_processor_setup_cpuidle_cx(_pr);
1209	cpuidle_enable_device(&_pr->power.dev);
1210	}
1211	}
1212	put_online_cpus();
1213	cpuidle_resume_and_unlock();
1214	}
1215
1216	return 0;
1217	}
1218
1219	static int acpi_processor_registered;
1220
1221	int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1222	struct acpi_device *device)
1223	{
1224	acpi_status status = 0;
1225	int retval;
1226	static int first_run;
1227
1228	if (disabled_by_idle_boot_param())
1229	return 0;
1230
1231	if (!first_run) {
1232	dmi_check_system(processor_power_dmi_table);
1233	max_cstate = acpi_processor_cstate_check(max_cstate);
1234	if (max_cstate < ACPI_C_STATES_MAX)
1235	printk(KERN_NOTICE
1236	"ACPI: processor limited to max C-state %d\n",
1237	max_cstate);
1238	first_run++;
1239	}
1240
1241	if (!pr)
1242	return -EINVAL;
1243
1244	if (acpi_gbl_FADT.cst_control && !nocst) {
1245	status =
1246	acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1247	if (ACPI_FAILURE(status)) {
1248	ACPI_EXCEPTION((AE_INFO, status,
1249	"Notifying BIOS of _CST ability failed"));
1250	}
1251	}
1252
1253	acpi_processor_get_power_info(pr);
1254	pr->flags.power_setup_done = 1;
1255
1256	/*
1257	* Install the idle handler if processor power management is supported.
1258	* Note that we use previously set idle handler will be used on
1259	* platforms that only support C1.
1260	*/
1261	if (pr->flags.power) {
1262	/* Register acpi_idle_driver if not already registered */
1263	if (!acpi_processor_registered) {
1264	acpi_processor_setup_cpuidle_states(pr);
1265	retval = cpuidle_register_driver(&acpi_idle_driver);
1266	if (retval)
1267	return retval;
1268	printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1269	acpi_idle_driver.name);
1270	}
1271	/* Register per-cpu cpuidle_device. Cpuidle driver
1272	* must already be registered before registering device
1273	*/
1274	acpi_processor_setup_cpuidle_cx(pr);
1275	retval = cpuidle_register_device(&pr->power.dev);
1276	if (retval) {
1277	if (acpi_processor_registered == 0)
1278	cpuidle_unregister_driver(&acpi_idle_driver);
1279	return retval;
1280	}
1281	acpi_processor_registered++;
1282	}
1283	return 0;
1284	}
1285
1286	int acpi_processor_power_exit(struct acpi_processor *pr,
1287	struct acpi_device *device)
1288	{
1289	if (disabled_by_idle_boot_param())
1290	return 0;
1291
1292	if (pr->flags.power) {
1293	cpuidle_unregister_device(&pr->power.dev);
1294	acpi_processor_registered--;
1295	if (acpi_processor_registered == 0)
1296	cpuidle_unregister_driver(&acpi_idle_driver);
1297	}
1298
1299	pr->flags.power_setup_done = 0;
1300	return 0;
1301	}
1302

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jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master

Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9

Kernel

Kernel Git Source Tree

Root/drivers/acpi/processor_idle.c

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