Root/drivers/gpio/gpio-ab8500.c

1/*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * Author: BIBEK BASU <bibek.basu@stericsson.com>
5 * License terms: GNU General Public License (GPL) version 2
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/slab.h>
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/gpio.h>
19#include <linux/irq.h>
20#include <linux/interrupt.h>
21#include <linux/mfd/ab8500.h>
22#include <linux/mfd/abx500.h>
23#include <linux/mfd/ab8500/gpio.h>
24
25/*
26 * GPIO registers offset
27 * Bank: 0x10
28 */
29#define AB8500_GPIO_SEL1_REG 0x00
30#define AB8500_GPIO_SEL2_REG 0x01
31#define AB8500_GPIO_SEL3_REG 0x02
32#define AB8500_GPIO_SEL4_REG 0x03
33#define AB8500_GPIO_SEL5_REG 0x04
34#define AB8500_GPIO_SEL6_REG 0x05
35
36#define AB8500_GPIO_DIR1_REG 0x10
37#define AB8500_GPIO_DIR2_REG 0x11
38#define AB8500_GPIO_DIR3_REG 0x12
39#define AB8500_GPIO_DIR4_REG 0x13
40#define AB8500_GPIO_DIR5_REG 0x14
41#define AB8500_GPIO_DIR6_REG 0x15
42
43#define AB8500_GPIO_OUT1_REG 0x20
44#define AB8500_GPIO_OUT2_REG 0x21
45#define AB8500_GPIO_OUT3_REG 0x22
46#define AB8500_GPIO_OUT4_REG 0x23
47#define AB8500_GPIO_OUT5_REG 0x24
48#define AB8500_GPIO_OUT6_REG 0x25
49
50#define AB8500_GPIO_PUD1_REG 0x30
51#define AB8500_GPIO_PUD2_REG 0x31
52#define AB8500_GPIO_PUD3_REG 0x32
53#define AB8500_GPIO_PUD4_REG 0x33
54#define AB8500_GPIO_PUD5_REG 0x34
55#define AB8500_GPIO_PUD6_REG 0x35
56
57#define AB8500_GPIO_IN1_REG 0x40
58#define AB8500_GPIO_IN2_REG 0x41
59#define AB8500_GPIO_IN3_REG 0x42
60#define AB8500_GPIO_IN4_REG 0x43
61#define AB8500_GPIO_IN5_REG 0x44
62#define AB8500_GPIO_IN6_REG 0x45
63#define AB8500_GPIO_ALTFUN_REG 0x45
64#define ALTFUN_REG_INDEX 6
65#define AB8500_NUM_GPIO 42
66#define AB8500_NUM_VIR_GPIO_IRQ 16
67
68enum ab8500_gpio_action {
69    NONE,
70    STARTUP,
71    SHUTDOWN,
72    MASK,
73    UNMASK
74};
75
76struct ab8500_gpio {
77    struct gpio_chip chip;
78    struct ab8500 *parent;
79    struct device *dev;
80    struct mutex lock;
81    u32 irq_base;
82    enum ab8500_gpio_action irq_action;
83    u16 rising;
84    u16 falling;
85};
86/**
87 * to_ab8500_gpio() - get the pointer to ab8500_gpio
88 * @chip: Member of the structure ab8500_gpio
89 */
90static inline struct ab8500_gpio *to_ab8500_gpio(struct gpio_chip *chip)
91{
92    return container_of(chip, struct ab8500_gpio, chip);
93}
94
95static int ab8500_gpio_set_bits(struct gpio_chip *chip, u8 reg,
96                    unsigned offset, int val)
97{
98    struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
99    u8 pos = offset % 8;
100    int ret;
101
102    reg = reg + (offset / 8);
103    ret = abx500_mask_and_set_register_interruptible(ab8500_gpio->dev,
104                AB8500_MISC, reg, 1 << pos, val << pos);
105    if (ret < 0)
106        dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
107    return ret;
108}
109/**
110 * ab8500_gpio_get() - Get the particular GPIO value
111 * @chip: Gpio device
112 * @offset: GPIO number to read
113 */
114static int ab8500_gpio_get(struct gpio_chip *chip, unsigned offset)
115{
116    struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
117    u8 mask = 1 << (offset % 8);
118    u8 reg = AB8500_GPIO_OUT1_REG + (offset / 8);
119    int ret;
120    u8 data;
121    ret = abx500_get_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
122                        reg, &data);
123    if (ret < 0) {
124        dev_err(ab8500_gpio->dev, "%s read failed\n", __func__);
125        return ret;
126    }
127    return (data & mask) >> (offset % 8);
128}
129
130static void ab8500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
131{
132    struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
133    int ret;
134    /* Write the data */
135    ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, 1);
136    if (ret < 0)
137        dev_err(ab8500_gpio->dev, "%s write failed\n", __func__);
138}
139
140static int ab8500_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
141                    int val)
142{
143    int ret;
144    /* set direction as output */
145    ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 1);
146    if (ret < 0)
147        return ret;
148    /* disable pull down */
149    ret = ab8500_gpio_set_bits(chip, AB8500_GPIO_PUD1_REG, offset, 1);
150    if (ret < 0)
151        return ret;
152    /* set the output as 1 or 0 */
153    return ab8500_gpio_set_bits(chip, AB8500_GPIO_OUT1_REG, offset, val);
154
155}
156
157static int ab8500_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
158{
159    /* set the register as input */
160    return ab8500_gpio_set_bits(chip, AB8500_GPIO_DIR1_REG, offset, 0);
161}
162
163static int ab8500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
164{
165    /*
166     * Only some GPIOs are interrupt capable, and they are
167     * organized in discontiguous clusters:
168     *
169     * GPIO6 to GPIO13
170     * GPIO24 and GPIO25
171     * GPIO36 to GPIO41
172     */
173    static struct ab8500_gpio_irq_cluster {
174        int start;
175        int end;
176    } clusters[] = {
177        {.start = 6, .end = 13},
178        {.start = 24, .end = 25},
179        {.start = 36, .end = 41},
180    };
181    struct ab8500_gpio *ab8500_gpio = to_ab8500_gpio(chip);
182    int base = ab8500_gpio->irq_base;
183    int i;
184
185    for (i = 0; i < ARRAY_SIZE(clusters); i++) {
186        struct ab8500_gpio_irq_cluster *cluster = &clusters[i];
187
188        if (offset >= cluster->start && offset <= cluster->end)
189            return base + offset - cluster->start;
190
191        /* Advance by the number of gpios in this cluster */
192        base += cluster->end - cluster->start + 1;
193    }
194
195    return -EINVAL;
196}
197
198static struct gpio_chip ab8500gpio_chip = {
199    .label = "ab8500_gpio",
200    .owner = THIS_MODULE,
201    .direction_input = ab8500_gpio_direction_input,
202    .get = ab8500_gpio_get,
203    .direction_output = ab8500_gpio_direction_output,
204    .set = ab8500_gpio_set,
205    .to_irq = ab8500_gpio_to_irq,
206};
207
208static unsigned int irq_to_rising(unsigned int irq)
209{
210    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
211    int offset = irq - ab8500_gpio->irq_base;
212    int new_irq = offset + AB8500_INT_GPIO6R
213            + ab8500_gpio->parent->irq_base;
214    return new_irq;
215}
216
217static unsigned int irq_to_falling(unsigned int irq)
218{
219    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
220    int offset = irq - ab8500_gpio->irq_base;
221    int new_irq = offset + AB8500_INT_GPIO6F
222            + ab8500_gpio->parent->irq_base;
223    return new_irq;
224
225}
226
227static unsigned int rising_to_irq(unsigned int irq, void *dev)
228{
229    struct ab8500_gpio *ab8500_gpio = dev;
230    int offset = irq - AB8500_INT_GPIO6R
231            - ab8500_gpio->parent->irq_base ;
232    int new_irq = offset + ab8500_gpio->irq_base;
233    return new_irq;
234}
235
236static unsigned int falling_to_irq(unsigned int irq, void *dev)
237{
238    struct ab8500_gpio *ab8500_gpio = dev;
239    int offset = irq - AB8500_INT_GPIO6F
240            - ab8500_gpio->parent->irq_base ;
241    int new_irq = offset + ab8500_gpio->irq_base;
242    return new_irq;
243
244}
245
246/*
247 * IRQ handler
248 */
249
250static irqreturn_t handle_rising(int irq, void *dev)
251{
252
253    handle_nested_irq(rising_to_irq(irq , dev));
254    return IRQ_HANDLED;
255}
256
257static irqreturn_t handle_falling(int irq, void *dev)
258{
259
260    handle_nested_irq(falling_to_irq(irq, dev));
261    return IRQ_HANDLED;
262}
263
264static void ab8500_gpio_irq_lock(unsigned int irq)
265{
266    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
267    mutex_lock(&ab8500_gpio->lock);
268}
269
270static void ab8500_gpio_irq_sync_unlock(unsigned int irq)
271{
272    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
273    int offset = irq - ab8500_gpio->irq_base;
274    bool rising = ab8500_gpio->rising & BIT(offset);
275    bool falling = ab8500_gpio->falling & BIT(offset);
276    int ret;
277
278    switch (ab8500_gpio->irq_action) {
279    case STARTUP:
280        if (rising)
281            ret = request_threaded_irq(irq_to_rising(irq),
282                    NULL, handle_rising,
283                    IRQF_TRIGGER_RISING,
284                    "ab8500-gpio-r", ab8500_gpio);
285        if (falling)
286            ret = request_threaded_irq(irq_to_falling(irq),
287                       NULL, handle_falling,
288                       IRQF_TRIGGER_FALLING,
289                       "ab8500-gpio-f", ab8500_gpio);
290        break;
291    case SHUTDOWN:
292        if (rising)
293            free_irq(irq_to_rising(irq), ab8500_gpio);
294        if (falling)
295            free_irq(irq_to_falling(irq), ab8500_gpio);
296        break;
297    case MASK:
298        if (rising)
299            disable_irq(irq_to_rising(irq));
300        if (falling)
301            disable_irq(irq_to_falling(irq));
302        break;
303    case UNMASK:
304        if (rising)
305            enable_irq(irq_to_rising(irq));
306        if (falling)
307            enable_irq(irq_to_falling(irq));
308        break;
309    case NONE:
310        break;
311    }
312    ab8500_gpio->irq_action = NONE;
313    ab8500_gpio->rising &= ~(BIT(offset));
314    ab8500_gpio->falling &= ~(BIT(offset));
315    mutex_unlock(&ab8500_gpio->lock);
316}
317
318
319static void ab8500_gpio_irq_mask(unsigned int irq)
320{
321    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
322    ab8500_gpio->irq_action = MASK;
323}
324
325static void ab8500_gpio_irq_unmask(unsigned int irq)
326{
327    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
328    ab8500_gpio->irq_action = UNMASK;
329}
330
331static int ab8500_gpio_irq_set_type(unsigned int irq, unsigned int type)
332{
333    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
334    int offset = irq - ab8500_gpio->irq_base;
335
336    if (type == IRQ_TYPE_EDGE_BOTH) {
337        ab8500_gpio->rising = BIT(offset);
338        ab8500_gpio->falling = BIT(offset);
339    } else if (type == IRQ_TYPE_EDGE_RISING) {
340        ab8500_gpio->rising = BIT(offset);
341    } else {
342        ab8500_gpio->falling = BIT(offset);
343    }
344    return 0;
345}
346
347unsigned int ab8500_gpio_irq_startup(unsigned int irq)
348{
349    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
350    ab8500_gpio->irq_action = STARTUP;
351    return 0;
352}
353
354void ab8500_gpio_irq_shutdown(unsigned int irq)
355{
356    struct ab8500_gpio *ab8500_gpio = get_irq_chip_data(irq);
357    ab8500_gpio->irq_action = SHUTDOWN;
358}
359
360static struct irq_chip ab8500_gpio_irq_chip = {
361    .name = "ab8500-gpio",
362    .startup = ab8500_gpio_irq_startup,
363    .shutdown = ab8500_gpio_irq_shutdown,
364    .bus_lock = ab8500_gpio_irq_lock,
365    .bus_sync_unlock = ab8500_gpio_irq_sync_unlock,
366    .mask = ab8500_gpio_irq_mask,
367    .unmask = ab8500_gpio_irq_unmask,
368    .set_type = ab8500_gpio_irq_set_type,
369};
370
371static int ab8500_gpio_irq_init(struct ab8500_gpio *ab8500_gpio)
372{
373    u32 base = ab8500_gpio->irq_base;
374    int irq;
375
376    for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ ; irq++) {
377        set_irq_chip_data(irq, ab8500_gpio);
378        set_irq_chip_and_handler(irq, &ab8500_gpio_irq_chip,
379                handle_simple_irq);
380        set_irq_nested_thread(irq, 1);
381#ifdef CONFIG_ARM
382        set_irq_flags(irq, IRQF_VALID);
383#else
384        set_irq_noprobe(irq);
385#endif
386    }
387
388    return 0;
389}
390
391static void ab8500_gpio_irq_remove(struct ab8500_gpio *ab8500_gpio)
392{
393    int base = ab8500_gpio->irq_base;
394    int irq;
395
396    for (irq = base; irq < base + AB8500_NUM_VIR_GPIO_IRQ; irq++) {
397#ifdef CONFIG_ARM
398        set_irq_flags(irq, 0);
399#endif
400        set_irq_chip_and_handler(irq, NULL, NULL);
401        set_irq_chip_data(irq, NULL);
402    }
403}
404
405static int __devinit ab8500_gpio_probe(struct platform_device *pdev)
406{
407    struct ab8500_platform_data *ab8500_pdata =
408                dev_get_platdata(pdev->dev.parent);
409    struct ab8500_gpio_platform_data *pdata;
410    struct ab8500_gpio *ab8500_gpio;
411    int ret;
412    int i;
413
414    pdata = ab8500_pdata->gpio;
415    if (!pdata) {
416        dev_err(&pdev->dev, "gpio platform data missing\n");
417        return -ENODEV;
418    }
419
420    ab8500_gpio = kzalloc(sizeof(struct ab8500_gpio), GFP_KERNEL);
421    if (ab8500_gpio == NULL) {
422        dev_err(&pdev->dev, "failed to allocate memory\n");
423        return -ENOMEM;
424    }
425    ab8500_gpio->dev = &pdev->dev;
426    ab8500_gpio->parent = dev_get_drvdata(pdev->dev.parent);
427    ab8500_gpio->chip = ab8500gpio_chip;
428    ab8500_gpio->chip.ngpio = AB8500_NUM_GPIO;
429    ab8500_gpio->chip.dev = &pdev->dev;
430    ab8500_gpio->chip.base = pdata->gpio_base;
431    ab8500_gpio->irq_base = pdata->irq_base;
432    /* initialize the lock */
433    mutex_init(&ab8500_gpio->lock);
434    /*
435     * AB8500 core will handle and clear the IRQ
436     * configre GPIO based on config-reg value.
437     * These values are for selecting the PINs as
438     * GPIO or alternate function
439     */
440    for (i = AB8500_GPIO_SEL1_REG; i <= AB8500_GPIO_SEL6_REG; i++) {
441        ret = abx500_set_register_interruptible(ab8500_gpio->dev,
442                AB8500_MISC, i,
443                pdata->config_reg[i]);
444        if (ret < 0)
445            goto out_free;
446    }
447    ret = abx500_set_register_interruptible(ab8500_gpio->dev, AB8500_MISC,
448                AB8500_GPIO_ALTFUN_REG,
449                pdata->config_reg[ALTFUN_REG_INDEX]);
450    if (ret < 0)
451        goto out_free;
452
453    ret = ab8500_gpio_irq_init(ab8500_gpio);
454    if (ret)
455        goto out_free;
456    ret = gpiochip_add(&ab8500_gpio->chip);
457    if (ret) {
458        dev_err(&pdev->dev, "unable to add gpiochip: %d\n",
459                ret);
460        goto out_rem_irq;
461    }
462    platform_set_drvdata(pdev, ab8500_gpio);
463    return 0;
464
465out_rem_irq:
466    ab8500_gpio_irq_remove(ab8500_gpio);
467out_free:
468    mutex_destroy(&ab8500_gpio->lock);
469    kfree(ab8500_gpio);
470    return ret;
471}
472
473/*
474 * ab8500_gpio_remove() - remove Ab8500-gpio driver
475 * @pdev : Platform device registered
476 */
477static int __devexit ab8500_gpio_remove(struct platform_device *pdev)
478{
479    struct ab8500_gpio *ab8500_gpio = platform_get_drvdata(pdev);
480    int ret;
481
482    ret = gpiochip_remove(&ab8500_gpio->chip);
483    if (ret < 0) {
484        dev_err(ab8500_gpio->dev, "unable to remove gpiochip: %d\n",
485            ret);
486        return ret;
487    }
488
489    platform_set_drvdata(pdev, NULL);
490    mutex_destroy(&ab8500_gpio->lock);
491    kfree(ab8500_gpio);
492
493    return 0;
494}
495
496static struct platform_driver ab8500_gpio_driver = {
497    .driver = {
498        .name = "ab8500-gpio",
499        .owner = THIS_MODULE,
500    },
501    .probe = ab8500_gpio_probe,
502    .remove = __devexit_p(ab8500_gpio_remove),
503};
504
505static int __init ab8500_gpio_init(void)
506{
507    return platform_driver_register(&ab8500_gpio_driver);
508}
509arch_initcall(ab8500_gpio_init);
510
511static void __exit ab8500_gpio_exit(void)
512{
513    platform_driver_unregister(&ab8500_gpio_driver);
514}
515module_exit(ab8500_gpio_exit);
516
517MODULE_AUTHOR("BIBEK BASU <bibek.basu@stericsson.com>");
518MODULE_DESCRIPTION("Driver allows to use AB8500 unused pins to be used as GPIO");
519MODULE_ALIAS("platform:ab8500-gpio");
520MODULE_LICENSE("GPL v2");
521

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