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1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
2 | * |
3 | * This program is free software; you can redistribute it and/or modify |
4 | * it under the terms of the GNU General Public License version 2 and |
5 | * only version 2 as published by the Free Software Foundation. |
6 | * |
7 | * This program is distributed in the hope that it will be useful, |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
10 | * GNU General Public License for more details. |
11 | * |
12 | * You should have received a copy of the GNU General Public License |
13 | * along with this program; if not, write to the Free Software |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA |
15 | * 02110-1301, USA. |
16 | */ |
17 | #include <linux/gpio.h> |
18 | #include <linux/i2c.h> |
19 | #include <linux/init.h> |
20 | #include <linux/interrupt.h> |
21 | #include <linux/irq.h> |
22 | #include <linux/module.h> |
23 | #include <linux/mutex.h> |
24 | #include <linux/slab.h> |
25 | #include <linux/workqueue.h> |
26 | #include <linux/i2c/sx150x.h> |
27 | |
28 | #define NO_UPDATE_PENDING -1 |
29 | |
30 | struct sx150x_device_data { |
31 | u8 reg_pullup; |
32 | u8 reg_pulldn; |
33 | u8 reg_drain; |
34 | u8 reg_polarity; |
35 | u8 reg_dir; |
36 | u8 reg_data; |
37 | u8 reg_irq_mask; |
38 | u8 reg_irq_src; |
39 | u8 reg_sense; |
40 | u8 reg_clock; |
41 | u8 reg_misc; |
42 | u8 reg_reset; |
43 | u8 ngpios; |
44 | }; |
45 | |
46 | struct sx150x_chip { |
47 | struct gpio_chip gpio_chip; |
48 | struct i2c_client *client; |
49 | const struct sx150x_device_data *dev_cfg; |
50 | int irq_summary; |
51 | int irq_base; |
52 | int irq_update; |
53 | u32 irq_sense; |
54 | u32 irq_masked; |
55 | u32 dev_sense; |
56 | u32 dev_masked; |
57 | struct irq_chip irq_chip; |
58 | struct mutex lock; |
59 | }; |
60 | |
61 | static const struct sx150x_device_data sx150x_devices[] = { |
62 | [0] = { /* sx1508q */ |
63 | .reg_pullup = 0x03, |
64 | .reg_pulldn = 0x04, |
65 | .reg_drain = 0x05, |
66 | .reg_polarity = 0x06, |
67 | .reg_dir = 0x07, |
68 | .reg_data = 0x08, |
69 | .reg_irq_mask = 0x09, |
70 | .reg_irq_src = 0x0c, |
71 | .reg_sense = 0x0b, |
72 | .reg_clock = 0x0f, |
73 | .reg_misc = 0x10, |
74 | .reg_reset = 0x7d, |
75 | .ngpios = 8 |
76 | }, |
77 | [1] = { /* sx1509q */ |
78 | .reg_pullup = 0x07, |
79 | .reg_pulldn = 0x09, |
80 | .reg_drain = 0x0b, |
81 | .reg_polarity = 0x0d, |
82 | .reg_dir = 0x0f, |
83 | .reg_data = 0x11, |
84 | .reg_irq_mask = 0x13, |
85 | .reg_irq_src = 0x19, |
86 | .reg_sense = 0x17, |
87 | .reg_clock = 0x1e, |
88 | .reg_misc = 0x1f, |
89 | .reg_reset = 0x7d, |
90 | .ngpios = 16 |
91 | }, |
92 | }; |
93 | |
94 | static const struct i2c_device_id sx150x_id[] = { |
95 | {"sx1508q", 0}, |
96 | {"sx1509q", 1}, |
97 | {} |
98 | }; |
99 | MODULE_DEVICE_TABLE(i2c, sx150x_id); |
100 | |
101 | static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) |
102 | { |
103 | s32 err = i2c_smbus_write_byte_data(client, reg, val); |
104 | |
105 | if (err < 0) |
106 | dev_warn(&client->dev, |
107 | "i2c write fail: can't write %02x to %02x: %d\n", |
108 | val, reg, err); |
109 | return err; |
110 | } |
111 | |
112 | static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val) |
113 | { |
114 | s32 err = i2c_smbus_read_byte_data(client, reg); |
115 | |
116 | if (err >= 0) |
117 | *val = err; |
118 | else |
119 | dev_warn(&client->dev, |
120 | "i2c read fail: can't read from %02x: %d\n", |
121 | reg, err); |
122 | return err; |
123 | } |
124 | |
125 | static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset) |
126 | { |
127 | return (chip->dev_cfg->ngpios == offset); |
128 | } |
129 | |
130 | /* |
131 | * These utility functions solve the common problem of locating and setting |
132 | * configuration bits. Configuration bits are grouped into registers |
133 | * whose indexes increase downwards. For example, with eight-bit registers, |
134 | * sixteen gpios would have their config bits grouped in the following order: |
135 | * REGISTER N-1 [ f e d c b a 9 8 ] |
136 | * N [ 7 6 5 4 3 2 1 0 ] |
137 | * |
138 | * For multi-bit configurations, the pattern gets wider: |
139 | * REGISTER N-3 [ f f e e d d c c ] |
140 | * N-2 [ b b a a 9 9 8 8 ] |
141 | * N-1 [ 7 7 6 6 5 5 4 4 ] |
142 | * N [ 3 3 2 2 1 1 0 0 ] |
143 | * |
144 | * Given the address of the starting register 'N', the index of the gpio |
145 | * whose configuration we seek to change, and the width in bits of that |
146 | * configuration, these functions allow us to locate the correct |
147 | * register and mask the correct bits. |
148 | */ |
149 | static inline void sx150x_find_cfg(u8 offset, u8 width, |
150 | u8 *reg, u8 *mask, u8 *shift) |
151 | { |
152 | *reg -= offset * width / 8; |
153 | *mask = (1 << width) - 1; |
154 | *shift = (offset * width) % 8; |
155 | *mask <<= *shift; |
156 | } |
157 | |
158 | static s32 sx150x_write_cfg(struct sx150x_chip *chip, |
159 | u8 offset, u8 width, u8 reg, u8 val) |
160 | { |
161 | u8 mask; |
162 | u8 data; |
163 | u8 shift; |
164 | s32 err; |
165 | |
166 | sx150x_find_cfg(offset, width, ®, &mask, &shift); |
167 | err = sx150x_i2c_read(chip->client, reg, &data); |
168 | if (err < 0) |
169 | return err; |
170 | |
171 | data &= ~mask; |
172 | data |= (val << shift) & mask; |
173 | return sx150x_i2c_write(chip->client, reg, data); |
174 | } |
175 | |
176 | static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset) |
177 | { |
178 | u8 reg = chip->dev_cfg->reg_data; |
179 | u8 mask; |
180 | u8 data; |
181 | u8 shift; |
182 | s32 err; |
183 | |
184 | sx150x_find_cfg(offset, 1, ®, &mask, &shift); |
185 | err = sx150x_i2c_read(chip->client, reg, &data); |
186 | if (err >= 0) |
187 | err = (data & mask) != 0 ? 1 : 0; |
188 | |
189 | return err; |
190 | } |
191 | |
192 | static void sx150x_set_oscio(struct sx150x_chip *chip, int val) |
193 | { |
194 | sx150x_i2c_write(chip->client, |
195 | chip->dev_cfg->reg_clock, |
196 | (val ? 0x1f : 0x10)); |
197 | } |
198 | |
199 | static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val) |
200 | { |
201 | sx150x_write_cfg(chip, |
202 | offset, |
203 | 1, |
204 | chip->dev_cfg->reg_data, |
205 | (val ? 1 : 0)); |
206 | } |
207 | |
208 | static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset) |
209 | { |
210 | return sx150x_write_cfg(chip, |
211 | offset, |
212 | 1, |
213 | chip->dev_cfg->reg_dir, |
214 | 1); |
215 | } |
216 | |
217 | static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) |
218 | { |
219 | int err; |
220 | |
221 | err = sx150x_write_cfg(chip, |
222 | offset, |
223 | 1, |
224 | chip->dev_cfg->reg_data, |
225 | (val ? 1 : 0)); |
226 | if (err >= 0) |
227 | err = sx150x_write_cfg(chip, |
228 | offset, |
229 | 1, |
230 | chip->dev_cfg->reg_dir, |
231 | 0); |
232 | return err; |
233 | } |
234 | |
235 | static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) |
236 | { |
237 | struct sx150x_chip *chip; |
238 | int status = -EINVAL; |
239 | |
240 | chip = container_of(gc, struct sx150x_chip, gpio_chip); |
241 | |
242 | if (!offset_is_oscio(chip, offset)) { |
243 | mutex_lock(&chip->lock); |
244 | status = sx150x_get_io(chip, offset); |
245 | mutex_unlock(&chip->lock); |
246 | } |
247 | |
248 | return status; |
249 | } |
250 | |
251 | static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) |
252 | { |
253 | struct sx150x_chip *chip; |
254 | |
255 | chip = container_of(gc, struct sx150x_chip, gpio_chip); |
256 | |
257 | mutex_lock(&chip->lock); |
258 | if (offset_is_oscio(chip, offset)) |
259 | sx150x_set_oscio(chip, val); |
260 | else |
261 | sx150x_set_io(chip, offset, val); |
262 | mutex_unlock(&chip->lock); |
263 | } |
264 | |
265 | static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
266 | { |
267 | struct sx150x_chip *chip; |
268 | int status = -EINVAL; |
269 | |
270 | chip = container_of(gc, struct sx150x_chip, gpio_chip); |
271 | |
272 | if (!offset_is_oscio(chip, offset)) { |
273 | mutex_lock(&chip->lock); |
274 | status = sx150x_io_input(chip, offset); |
275 | mutex_unlock(&chip->lock); |
276 | } |
277 | return status; |
278 | } |
279 | |
280 | static int sx150x_gpio_direction_output(struct gpio_chip *gc, |
281 | unsigned offset, |
282 | int val) |
283 | { |
284 | struct sx150x_chip *chip; |
285 | int status = 0; |
286 | |
287 | chip = container_of(gc, struct sx150x_chip, gpio_chip); |
288 | |
289 | if (!offset_is_oscio(chip, offset)) { |
290 | mutex_lock(&chip->lock); |
291 | status = sx150x_io_output(chip, offset, val); |
292 | mutex_unlock(&chip->lock); |
293 | } |
294 | return status; |
295 | } |
296 | |
297 | static int sx150x_gpio_to_irq(struct gpio_chip *gc, unsigned offset) |
298 | { |
299 | struct sx150x_chip *chip; |
300 | |
301 | chip = container_of(gc, struct sx150x_chip, gpio_chip); |
302 | |
303 | if (offset >= chip->dev_cfg->ngpios) |
304 | return -EINVAL; |
305 | |
306 | if (chip->irq_base < 0) |
307 | return -EINVAL; |
308 | |
309 | return chip->irq_base + offset; |
310 | } |
311 | |
312 | static void sx150x_irq_mask(struct irq_data *d) |
313 | { |
314 | struct irq_chip *ic = irq_data_get_irq_chip(d); |
315 | struct sx150x_chip *chip; |
316 | unsigned n; |
317 | |
318 | chip = container_of(ic, struct sx150x_chip, irq_chip); |
319 | n = d->irq - chip->irq_base; |
320 | chip->irq_masked |= (1 << n); |
321 | chip->irq_update = n; |
322 | } |
323 | |
324 | static void sx150x_irq_unmask(struct irq_data *d) |
325 | { |
326 | struct irq_chip *ic = irq_data_get_irq_chip(d); |
327 | struct sx150x_chip *chip; |
328 | unsigned n; |
329 | |
330 | chip = container_of(ic, struct sx150x_chip, irq_chip); |
331 | n = d->irq - chip->irq_base; |
332 | |
333 | chip->irq_masked &= ~(1 << n); |
334 | chip->irq_update = n; |
335 | } |
336 | |
337 | static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) |
338 | { |
339 | struct irq_chip *ic = irq_data_get_irq_chip(d); |
340 | struct sx150x_chip *chip; |
341 | unsigned n, val = 0; |
342 | |
343 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) |
344 | return -EINVAL; |
345 | |
346 | chip = container_of(ic, struct sx150x_chip, irq_chip); |
347 | n = d->irq - chip->irq_base; |
348 | |
349 | if (flow_type & IRQ_TYPE_EDGE_RISING) |
350 | val |= 0x1; |
351 | if (flow_type & IRQ_TYPE_EDGE_FALLING) |
352 | val |= 0x2; |
353 | |
354 | chip->irq_sense &= ~(3UL << (n * 2)); |
355 | chip->irq_sense |= val << (n * 2); |
356 | chip->irq_update = n; |
357 | return 0; |
358 | } |
359 | |
360 | static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id) |
361 | { |
362 | struct sx150x_chip *chip = (struct sx150x_chip *)dev_id; |
363 | unsigned nhandled = 0; |
364 | unsigned sub_irq; |
365 | unsigned n; |
366 | s32 err; |
367 | u8 val; |
368 | int i; |
369 | |
370 | for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) { |
371 | err = sx150x_i2c_read(chip->client, |
372 | chip->dev_cfg->reg_irq_src - i, |
373 | &val); |
374 | if (err < 0) |
375 | continue; |
376 | |
377 | sx150x_i2c_write(chip->client, |
378 | chip->dev_cfg->reg_irq_src - i, |
379 | val); |
380 | for (n = 0; n < 8; ++n) { |
381 | if (val & (1 << n)) { |
382 | sub_irq = chip->irq_base + (i * 8) + n; |
383 | handle_nested_irq(sub_irq); |
384 | ++nhandled; |
385 | } |
386 | } |
387 | } |
388 | |
389 | return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); |
390 | } |
391 | |
392 | static void sx150x_irq_bus_lock(struct irq_data *d) |
393 | { |
394 | struct irq_chip *ic = irq_data_get_irq_chip(d); |
395 | struct sx150x_chip *chip; |
396 | |
397 | chip = container_of(ic, struct sx150x_chip, irq_chip); |
398 | |
399 | mutex_lock(&chip->lock); |
400 | } |
401 | |
402 | static void sx150x_irq_bus_sync_unlock(struct irq_data *d) |
403 | { |
404 | struct irq_chip *ic = irq_data_get_irq_chip(d); |
405 | struct sx150x_chip *chip; |
406 | unsigned n; |
407 | |
408 | chip = container_of(ic, struct sx150x_chip, irq_chip); |
409 | |
410 | if (chip->irq_update == NO_UPDATE_PENDING) |
411 | goto out; |
412 | |
413 | n = chip->irq_update; |
414 | chip->irq_update = NO_UPDATE_PENDING; |
415 | |
416 | /* Avoid updates if nothing changed */ |
417 | if (chip->dev_sense == chip->irq_sense && |
418 | chip->dev_sense == chip->irq_masked) |
419 | goto out; |
420 | |
421 | chip->dev_sense = chip->irq_sense; |
422 | chip->dev_masked = chip->irq_masked; |
423 | |
424 | if (chip->irq_masked & (1 << n)) { |
425 | sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1); |
426 | sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0); |
427 | } else { |
428 | sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0); |
429 | sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, |
430 | chip->irq_sense >> (n * 2)); |
431 | } |
432 | out: |
433 | mutex_unlock(&chip->lock); |
434 | } |
435 | |
436 | static void sx150x_init_chip(struct sx150x_chip *chip, |
437 | struct i2c_client *client, |
438 | kernel_ulong_t driver_data, |
439 | struct sx150x_platform_data *pdata) |
440 | { |
441 | mutex_init(&chip->lock); |
442 | |
443 | chip->client = client; |
444 | chip->dev_cfg = &sx150x_devices[driver_data]; |
445 | chip->gpio_chip.label = client->name; |
446 | chip->gpio_chip.direction_input = sx150x_gpio_direction_input; |
447 | chip->gpio_chip.direction_output = sx150x_gpio_direction_output; |
448 | chip->gpio_chip.get = sx150x_gpio_get; |
449 | chip->gpio_chip.set = sx150x_gpio_set; |
450 | chip->gpio_chip.to_irq = sx150x_gpio_to_irq; |
451 | chip->gpio_chip.base = pdata->gpio_base; |
452 | chip->gpio_chip.can_sleep = 1; |
453 | chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; |
454 | if (pdata->oscio_is_gpo) |
455 | ++chip->gpio_chip.ngpio; |
456 | |
457 | chip->irq_chip.name = client->name; |
458 | chip->irq_chip.irq_mask = sx150x_irq_mask; |
459 | chip->irq_chip.irq_unmask = sx150x_irq_unmask; |
460 | chip->irq_chip.irq_set_type = sx150x_irq_set_type; |
461 | chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock; |
462 | chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock; |
463 | chip->irq_summary = -1; |
464 | chip->irq_base = -1; |
465 | chip->irq_masked = ~0; |
466 | chip->irq_sense = 0; |
467 | chip->dev_masked = ~0; |
468 | chip->dev_sense = 0; |
469 | chip->irq_update = NO_UPDATE_PENDING; |
470 | } |
471 | |
472 | static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg) |
473 | { |
474 | int err = 0; |
475 | unsigned n; |
476 | |
477 | for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n) |
478 | err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8)); |
479 | return err; |
480 | } |
481 | |
482 | static int sx150x_reset(struct sx150x_chip *chip) |
483 | { |
484 | int err; |
485 | |
486 | err = i2c_smbus_write_byte_data(chip->client, |
487 | chip->dev_cfg->reg_reset, |
488 | 0x12); |
489 | if (err < 0) |
490 | return err; |
491 | |
492 | err = i2c_smbus_write_byte_data(chip->client, |
493 | chip->dev_cfg->reg_reset, |
494 | 0x34); |
495 | return err; |
496 | } |
497 | |
498 | static int sx150x_init_hw(struct sx150x_chip *chip, |
499 | struct sx150x_platform_data *pdata) |
500 | { |
501 | int err = 0; |
502 | |
503 | if (pdata->reset_during_probe) { |
504 | err = sx150x_reset(chip); |
505 | if (err < 0) |
506 | return err; |
507 | } |
508 | |
509 | err = sx150x_i2c_write(chip->client, |
510 | chip->dev_cfg->reg_misc, |
511 | 0x01); |
512 | if (err < 0) |
513 | return err; |
514 | |
515 | err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup, |
516 | pdata->io_pullup_ena); |
517 | if (err < 0) |
518 | return err; |
519 | |
520 | err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn, |
521 | pdata->io_pulldn_ena); |
522 | if (err < 0) |
523 | return err; |
524 | |
525 | err = sx150x_init_io(chip, chip->dev_cfg->reg_drain, |
526 | pdata->io_open_drain_ena); |
527 | if (err < 0) |
528 | return err; |
529 | |
530 | err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity, |
531 | pdata->io_polarity); |
532 | if (err < 0) |
533 | return err; |
534 | |
535 | if (pdata->oscio_is_gpo) |
536 | sx150x_set_oscio(chip, 0); |
537 | |
538 | return err; |
539 | } |
540 | |
541 | static int sx150x_install_irq_chip(struct sx150x_chip *chip, |
542 | int irq_summary, |
543 | int irq_base) |
544 | { |
545 | int err; |
546 | unsigned n; |
547 | unsigned irq; |
548 | |
549 | chip->irq_summary = irq_summary; |
550 | chip->irq_base = irq_base; |
551 | |
552 | for (n = 0; n < chip->dev_cfg->ngpios; ++n) { |
553 | irq = irq_base + n; |
554 | irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq); |
555 | irq_set_nested_thread(irq, 1); |
556 | #ifdef CONFIG_ARM |
557 | set_irq_flags(irq, IRQF_VALID); |
558 | #else |
559 | irq_set_noprobe(irq); |
560 | #endif |
561 | } |
562 | |
563 | err = request_threaded_irq(irq_summary, |
564 | NULL, |
565 | sx150x_irq_thread_fn, |
566 | IRQF_SHARED | IRQF_TRIGGER_FALLING, |
567 | chip->irq_chip.name, |
568 | chip); |
569 | if (err < 0) { |
570 | chip->irq_summary = -1; |
571 | chip->irq_base = -1; |
572 | } |
573 | |
574 | return err; |
575 | } |
576 | |
577 | static void sx150x_remove_irq_chip(struct sx150x_chip *chip) |
578 | { |
579 | unsigned n; |
580 | unsigned irq; |
581 | |
582 | free_irq(chip->irq_summary, chip); |
583 | |
584 | for (n = 0; n < chip->dev_cfg->ngpios; ++n) { |
585 | irq = chip->irq_base + n; |
586 | irq_set_chip_and_handler(irq, NULL, NULL); |
587 | } |
588 | } |
589 | |
590 | static int __devinit sx150x_probe(struct i2c_client *client, |
591 | const struct i2c_device_id *id) |
592 | { |
593 | static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA | |
594 | I2C_FUNC_SMBUS_WRITE_WORD_DATA; |
595 | struct sx150x_platform_data *pdata; |
596 | struct sx150x_chip *chip; |
597 | int rc; |
598 | |
599 | pdata = client->dev.platform_data; |
600 | if (!pdata) |
601 | return -EINVAL; |
602 | |
603 | if (!i2c_check_functionality(client->adapter, i2c_funcs)) |
604 | return -ENOSYS; |
605 | |
606 | chip = kzalloc(sizeof(struct sx150x_chip), GFP_KERNEL); |
607 | if (!chip) |
608 | return -ENOMEM; |
609 | |
610 | sx150x_init_chip(chip, client, id->driver_data, pdata); |
611 | rc = sx150x_init_hw(chip, pdata); |
612 | if (rc < 0) |
613 | goto probe_fail_pre_gpiochip_add; |
614 | |
615 | rc = gpiochip_add(&chip->gpio_chip); |
616 | if (rc < 0) |
617 | goto probe_fail_pre_gpiochip_add; |
618 | |
619 | if (pdata->irq_summary >= 0) { |
620 | rc = sx150x_install_irq_chip(chip, |
621 | pdata->irq_summary, |
622 | pdata->irq_base); |
623 | if (rc < 0) |
624 | goto probe_fail_post_gpiochip_add; |
625 | } |
626 | |
627 | i2c_set_clientdata(client, chip); |
628 | |
629 | return 0; |
630 | probe_fail_post_gpiochip_add: |
631 | WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0); |
632 | probe_fail_pre_gpiochip_add: |
633 | kfree(chip); |
634 | return rc; |
635 | } |
636 | |
637 | static int __devexit sx150x_remove(struct i2c_client *client) |
638 | { |
639 | struct sx150x_chip *chip; |
640 | int rc; |
641 | |
642 | chip = i2c_get_clientdata(client); |
643 | rc = gpiochip_remove(&chip->gpio_chip); |
644 | if (rc < 0) |
645 | return rc; |
646 | |
647 | if (chip->irq_summary >= 0) |
648 | sx150x_remove_irq_chip(chip); |
649 | |
650 | kfree(chip); |
651 | |
652 | return 0; |
653 | } |
654 | |
655 | static struct i2c_driver sx150x_driver = { |
656 | .driver = { |
657 | .name = "sx150x", |
658 | .owner = THIS_MODULE |
659 | }, |
660 | .probe = sx150x_probe, |
661 | .remove = __devexit_p(sx150x_remove), |
662 | .id_table = sx150x_id, |
663 | }; |
664 | |
665 | static int __init sx150x_init(void) |
666 | { |
667 | return i2c_add_driver(&sx150x_driver); |
668 | } |
669 | subsys_initcall(sx150x_init); |
670 | |
671 | static void __exit sx150x_exit(void) |
672 | { |
673 | return i2c_del_driver(&sx150x_driver); |
674 | } |
675 | module_exit(sx150x_exit); |
676 | |
677 | MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); |
678 | MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); |
679 | MODULE_LICENSE("GPL v2"); |
680 | MODULE_ALIAS("i2c:sx150x"); |
681 |
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Tags:
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v2.6.34-rc5
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