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1 | /* |
2 | * jc42.c - driver for Jedec JC42.4 compliant temperature sensors |
3 | * |
4 | * Copyright (c) 2010 Ericsson AB. |
5 | * |
6 | * Derived from lm77.c by Andras BALI <drewie@freemail.hu>. |
7 | * |
8 | * JC42.4 compliant temperature sensors are typically used on memory modules. |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by |
12 | * the Free Software Foundation; either version 2 of the License, or |
13 | * (at your option) any later version. |
14 | * |
15 | * This program is distributed in the hope that it will be useful, |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
18 | * GNU General Public License for more details. |
19 | * |
20 | * You should have received a copy of the GNU General Public License |
21 | * along with this program; if not, write to the Free Software |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
23 | */ |
24 | |
25 | #include <linux/module.h> |
26 | #include <linux/init.h> |
27 | #include <linux/slab.h> |
28 | #include <linux/jiffies.h> |
29 | #include <linux/i2c.h> |
30 | #include <linux/hwmon.h> |
31 | #include <linux/hwmon-sysfs.h> |
32 | #include <linux/err.h> |
33 | #include <linux/mutex.h> |
34 | |
35 | /* Addresses to scan */ |
36 | static const unsigned short normal_i2c[] = { |
37 | 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END }; |
38 | |
39 | /* JC42 registers. All registers are 16 bit. */ |
40 | #define JC42_REG_CAP 0x00 |
41 | #define JC42_REG_CONFIG 0x01 |
42 | #define JC42_REG_TEMP_UPPER 0x02 |
43 | #define JC42_REG_TEMP_LOWER 0x03 |
44 | #define JC42_REG_TEMP_CRITICAL 0x04 |
45 | #define JC42_REG_TEMP 0x05 |
46 | #define JC42_REG_MANID 0x06 |
47 | #define JC42_REG_DEVICEID 0x07 |
48 | |
49 | /* Status bits in temperature register */ |
50 | #define JC42_ALARM_CRIT_BIT 15 |
51 | #define JC42_ALARM_MAX_BIT 14 |
52 | #define JC42_ALARM_MIN_BIT 13 |
53 | |
54 | /* Configuration register defines */ |
55 | #define JC42_CFG_CRIT_ONLY (1 << 2) |
56 | #define JC42_CFG_TCRIT_LOCK (1 << 6) |
57 | #define JC42_CFG_EVENT_LOCK (1 << 7) |
58 | #define JC42_CFG_SHUTDOWN (1 << 8) |
59 | #define JC42_CFG_HYST_SHIFT 9 |
60 | #define JC42_CFG_HYST_MASK (0x03 << 9) |
61 | |
62 | /* Capabilities */ |
63 | #define JC42_CAP_RANGE (1 << 2) |
64 | |
65 | /* Manufacturer IDs */ |
66 | #define ADT_MANID 0x11d4 /* Analog Devices */ |
67 | #define ATMEL_MANID 0x001f /* Atmel */ |
68 | #define MAX_MANID 0x004d /* Maxim */ |
69 | #define IDT_MANID 0x00b3 /* IDT */ |
70 | #define MCP_MANID 0x0054 /* Microchip */ |
71 | #define NXP_MANID 0x1131 /* NXP Semiconductors */ |
72 | #define ONS_MANID 0x1b09 /* ON Semiconductor */ |
73 | #define STM_MANID 0x104a /* ST Microelectronics */ |
74 | |
75 | /* Supported chips */ |
76 | |
77 | /* Analog Devices */ |
78 | #define ADT7408_DEVID 0x0801 |
79 | #define ADT7408_DEVID_MASK 0xffff |
80 | |
81 | /* Atmel */ |
82 | #define AT30TS00_DEVID 0x8201 |
83 | #define AT30TS00_DEVID_MASK 0xffff |
84 | |
85 | /* IDT */ |
86 | #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */ |
87 | #define TS3000B3_DEVID_MASK 0xffff |
88 | |
89 | #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */ |
90 | #define TS3000GB2_DEVID_MASK 0xffff |
91 | |
92 | /* Maxim */ |
93 | #define MAX6604_DEVID 0x3e00 |
94 | #define MAX6604_DEVID_MASK 0xffff |
95 | |
96 | /* Microchip */ |
97 | #define MCP9804_DEVID 0x0200 |
98 | #define MCP9804_DEVID_MASK 0xfffc |
99 | |
100 | #define MCP98242_DEVID 0x2000 |
101 | #define MCP98242_DEVID_MASK 0xfffc |
102 | |
103 | #define MCP98243_DEVID 0x2100 |
104 | #define MCP98243_DEVID_MASK 0xfffc |
105 | |
106 | #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */ |
107 | #define MCP9843_DEVID_MASK 0xfffe |
108 | |
109 | /* NXP */ |
110 | #define SE97_DEVID 0xa200 |
111 | #define SE97_DEVID_MASK 0xfffc |
112 | |
113 | #define SE98_DEVID 0xa100 |
114 | #define SE98_DEVID_MASK 0xfffc |
115 | |
116 | /* ON Semiconductor */ |
117 | #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */ |
118 | #define CAT6095_DEVID_MASK 0xffe0 |
119 | |
120 | /* ST Microelectronics */ |
121 | #define STTS424_DEVID 0x0101 |
122 | #define STTS424_DEVID_MASK 0xffff |
123 | |
124 | #define STTS424E_DEVID 0x0000 |
125 | #define STTS424E_DEVID_MASK 0xfffe |
126 | |
127 | #define STTS2002_DEVID 0x0300 |
128 | #define STTS2002_DEVID_MASK 0xffff |
129 | |
130 | #define STTS3000_DEVID 0x0200 |
131 | #define STTS3000_DEVID_MASK 0xffff |
132 | |
133 | static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 }; |
134 | |
135 | struct jc42_chips { |
136 | u16 manid; |
137 | u16 devid; |
138 | u16 devid_mask; |
139 | }; |
140 | |
141 | static struct jc42_chips jc42_chips[] = { |
142 | { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK }, |
143 | { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK }, |
144 | { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK }, |
145 | { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK }, |
146 | { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK }, |
147 | { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK }, |
148 | { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK }, |
149 | { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK }, |
150 | { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK }, |
151 | { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK }, |
152 | { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK }, |
153 | { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK }, |
154 | { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK }, |
155 | { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK }, |
156 | { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK }, |
157 | { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK }, |
158 | }; |
159 | |
160 | /* Each client has this additional data */ |
161 | struct jc42_data { |
162 | struct device *hwmon_dev; |
163 | struct mutex update_lock; /* protect register access */ |
164 | bool extended; /* true if extended range supported */ |
165 | bool valid; |
166 | unsigned long last_updated; /* In jiffies */ |
167 | u16 orig_config; /* original configuration */ |
168 | u16 config; /* current configuration */ |
169 | u16 temp_input; /* Temperatures */ |
170 | u16 temp_crit; |
171 | u16 temp_min; |
172 | u16 temp_max; |
173 | }; |
174 | |
175 | static int jc42_probe(struct i2c_client *client, |
176 | const struct i2c_device_id *id); |
177 | static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info); |
178 | static int jc42_remove(struct i2c_client *client); |
179 | |
180 | static struct jc42_data *jc42_update_device(struct device *dev); |
181 | |
182 | static const struct i2c_device_id jc42_id[] = { |
183 | { "jc42", 0 }, |
184 | { } |
185 | }; |
186 | MODULE_DEVICE_TABLE(i2c, jc42_id); |
187 | |
188 | #ifdef CONFIG_PM |
189 | |
190 | static int jc42_suspend(struct device *dev) |
191 | { |
192 | struct i2c_client *client = to_i2c_client(dev); |
193 | struct jc42_data *data = i2c_get_clientdata(client); |
194 | |
195 | data->config |= JC42_CFG_SHUTDOWN; |
196 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
197 | return 0; |
198 | } |
199 | |
200 | static int jc42_resume(struct device *dev) |
201 | { |
202 | struct i2c_client *client = to_i2c_client(dev); |
203 | struct jc42_data *data = i2c_get_clientdata(client); |
204 | |
205 | data->config &= ~JC42_CFG_SHUTDOWN; |
206 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config); |
207 | return 0; |
208 | } |
209 | |
210 | static const struct dev_pm_ops jc42_dev_pm_ops = { |
211 | .suspend = jc42_suspend, |
212 | .resume = jc42_resume, |
213 | }; |
214 | |
215 | #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops) |
216 | #else |
217 | #define JC42_DEV_PM_OPS NULL |
218 | #endif /* CONFIG_PM */ |
219 | |
220 | /* This is the driver that will be inserted */ |
221 | static struct i2c_driver jc42_driver = { |
222 | .class = I2C_CLASS_SPD, |
223 | .driver = { |
224 | .name = "jc42", |
225 | .pm = JC42_DEV_PM_OPS, |
226 | }, |
227 | .probe = jc42_probe, |
228 | .remove = jc42_remove, |
229 | .id_table = jc42_id, |
230 | .detect = jc42_detect, |
231 | .address_list = normal_i2c, |
232 | }; |
233 | |
234 | #define JC42_TEMP_MIN_EXTENDED (-40000) |
235 | #define JC42_TEMP_MIN 0 |
236 | #define JC42_TEMP_MAX 125000 |
237 | |
238 | static u16 jc42_temp_to_reg(int temp, bool extended) |
239 | { |
240 | int ntemp = SENSORS_LIMIT(temp, |
241 | extended ? JC42_TEMP_MIN_EXTENDED : |
242 | JC42_TEMP_MIN, JC42_TEMP_MAX); |
243 | |
244 | /* convert from 0.001 to 0.0625 resolution */ |
245 | return (ntemp * 2 / 125) & 0x1fff; |
246 | } |
247 | |
248 | static int jc42_temp_from_reg(s16 reg) |
249 | { |
250 | reg &= 0x1fff; |
251 | |
252 | /* sign extend register */ |
253 | if (reg & 0x1000) |
254 | reg |= 0xf000; |
255 | |
256 | /* convert from 0.0625 to 0.001 resolution */ |
257 | return reg * 125 / 2; |
258 | } |
259 | |
260 | /* sysfs stuff */ |
261 | |
262 | /* read routines for temperature limits */ |
263 | #define show(value) \ |
264 | static ssize_t show_##value(struct device *dev, \ |
265 | struct device_attribute *attr, \ |
266 | char *buf) \ |
267 | { \ |
268 | struct jc42_data *data = jc42_update_device(dev); \ |
269 | if (IS_ERR(data)) \ |
270 | return PTR_ERR(data); \ |
271 | return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \ |
272 | } |
273 | |
274 | show(temp_input); |
275 | show(temp_crit); |
276 | show(temp_min); |
277 | show(temp_max); |
278 | |
279 | /* read routines for hysteresis values */ |
280 | static ssize_t show_temp_crit_hyst(struct device *dev, |
281 | struct device_attribute *attr, char *buf) |
282 | { |
283 | struct jc42_data *data = jc42_update_device(dev); |
284 | int temp, hyst; |
285 | |
286 | if (IS_ERR(data)) |
287 | return PTR_ERR(data); |
288 | |
289 | temp = jc42_temp_from_reg(data->temp_crit); |
290 | hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) |
291 | >> JC42_CFG_HYST_SHIFT]; |
292 | return sprintf(buf, "%d\n", temp - hyst); |
293 | } |
294 | |
295 | static ssize_t show_temp_max_hyst(struct device *dev, |
296 | struct device_attribute *attr, char *buf) |
297 | { |
298 | struct jc42_data *data = jc42_update_device(dev); |
299 | int temp, hyst; |
300 | |
301 | if (IS_ERR(data)) |
302 | return PTR_ERR(data); |
303 | |
304 | temp = jc42_temp_from_reg(data->temp_max); |
305 | hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK) |
306 | >> JC42_CFG_HYST_SHIFT]; |
307 | return sprintf(buf, "%d\n", temp - hyst); |
308 | } |
309 | |
310 | /* write routines */ |
311 | #define set(value, reg) \ |
312 | static ssize_t set_##value(struct device *dev, \ |
313 | struct device_attribute *attr, \ |
314 | const char *buf, size_t count) \ |
315 | { \ |
316 | struct i2c_client *client = to_i2c_client(dev); \ |
317 | struct jc42_data *data = i2c_get_clientdata(client); \ |
318 | int err, ret = count; \ |
319 | long val; \ |
320 | if (kstrtol(buf, 10, &val) < 0) \ |
321 | return -EINVAL; \ |
322 | mutex_lock(&data->update_lock); \ |
323 | data->value = jc42_temp_to_reg(val, data->extended); \ |
324 | err = i2c_smbus_write_word_swapped(client, reg, data->value); \ |
325 | if (err < 0) \ |
326 | ret = err; \ |
327 | mutex_unlock(&data->update_lock); \ |
328 | return ret; \ |
329 | } |
330 | |
331 | set(temp_min, JC42_REG_TEMP_LOWER); |
332 | set(temp_max, JC42_REG_TEMP_UPPER); |
333 | set(temp_crit, JC42_REG_TEMP_CRITICAL); |
334 | |
335 | /* |
336 | * JC42.4 compliant chips only support four hysteresis values. |
337 | * Pick best choice and go from there. |
338 | */ |
339 | static ssize_t set_temp_crit_hyst(struct device *dev, |
340 | struct device_attribute *attr, |
341 | const char *buf, size_t count) |
342 | { |
343 | struct i2c_client *client = to_i2c_client(dev); |
344 | struct jc42_data *data = i2c_get_clientdata(client); |
345 | unsigned long val; |
346 | int diff, hyst; |
347 | int err; |
348 | int ret = count; |
349 | |
350 | if (kstrtoul(buf, 10, &val) < 0) |
351 | return -EINVAL; |
352 | |
353 | diff = jc42_temp_from_reg(data->temp_crit) - val; |
354 | hyst = 0; |
355 | if (diff > 0) { |
356 | if (diff < 2250) |
357 | hyst = 1; /* 1.5 degrees C */ |
358 | else if (diff < 4500) |
359 | hyst = 2; /* 3.0 degrees C */ |
360 | else |
361 | hyst = 3; /* 6.0 degrees C */ |
362 | } |
363 | |
364 | mutex_lock(&data->update_lock); |
365 | data->config = (data->config & ~JC42_CFG_HYST_MASK) |
366 | | (hyst << JC42_CFG_HYST_SHIFT); |
367 | err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, |
368 | data->config); |
369 | if (err < 0) |
370 | ret = err; |
371 | mutex_unlock(&data->update_lock); |
372 | return ret; |
373 | } |
374 | |
375 | static ssize_t show_alarm(struct device *dev, |
376 | struct device_attribute *attr, char *buf) |
377 | { |
378 | u16 bit = to_sensor_dev_attr(attr)->index; |
379 | struct jc42_data *data = jc42_update_device(dev); |
380 | u16 val; |
381 | |
382 | if (IS_ERR(data)) |
383 | return PTR_ERR(data); |
384 | |
385 | val = data->temp_input; |
386 | if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY)) |
387 | val = 0; |
388 | return sprintf(buf, "%u\n", (val >> bit) & 1); |
389 | } |
390 | |
391 | static DEVICE_ATTR(temp1_input, S_IRUGO, |
392 | show_temp_input, NULL); |
393 | static DEVICE_ATTR(temp1_crit, S_IRUGO, |
394 | show_temp_crit, set_temp_crit); |
395 | static DEVICE_ATTR(temp1_min, S_IRUGO, |
396 | show_temp_min, set_temp_min); |
397 | static DEVICE_ATTR(temp1_max, S_IRUGO, |
398 | show_temp_max, set_temp_max); |
399 | |
400 | static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, |
401 | show_temp_crit_hyst, set_temp_crit_hyst); |
402 | static DEVICE_ATTR(temp1_max_hyst, S_IRUGO, |
403 | show_temp_max_hyst, NULL); |
404 | |
405 | static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, |
406 | JC42_ALARM_CRIT_BIT); |
407 | static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, |
408 | JC42_ALARM_MIN_BIT); |
409 | static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, |
410 | JC42_ALARM_MAX_BIT); |
411 | |
412 | static struct attribute *jc42_attributes[] = { |
413 | &dev_attr_temp1_input.attr, |
414 | &dev_attr_temp1_crit.attr, |
415 | &dev_attr_temp1_min.attr, |
416 | &dev_attr_temp1_max.attr, |
417 | &dev_attr_temp1_crit_hyst.attr, |
418 | &dev_attr_temp1_max_hyst.attr, |
419 | &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, |
420 | &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, |
421 | &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, |
422 | NULL |
423 | }; |
424 | |
425 | static umode_t jc42_attribute_mode(struct kobject *kobj, |
426 | struct attribute *attr, int index) |
427 | { |
428 | struct device *dev = container_of(kobj, struct device, kobj); |
429 | struct i2c_client *client = to_i2c_client(dev); |
430 | struct jc42_data *data = i2c_get_clientdata(client); |
431 | unsigned int config = data->config; |
432 | bool readonly; |
433 | |
434 | if (attr == &dev_attr_temp1_crit.attr) |
435 | readonly = config & JC42_CFG_TCRIT_LOCK; |
436 | else if (attr == &dev_attr_temp1_min.attr || |
437 | attr == &dev_attr_temp1_max.attr) |
438 | readonly = config & JC42_CFG_EVENT_LOCK; |
439 | else if (attr == &dev_attr_temp1_crit_hyst.attr) |
440 | readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK); |
441 | else |
442 | readonly = true; |
443 | |
444 | return S_IRUGO | (readonly ? 0 : S_IWUSR); |
445 | } |
446 | |
447 | static const struct attribute_group jc42_group = { |
448 | .attrs = jc42_attributes, |
449 | .is_visible = jc42_attribute_mode, |
450 | }; |
451 | |
452 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
453 | static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info) |
454 | { |
455 | struct i2c_adapter *adapter = client->adapter; |
456 | int i, config, cap, manid, devid; |
457 | |
458 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | |
459 | I2C_FUNC_SMBUS_WORD_DATA)) |
460 | return -ENODEV; |
461 | |
462 | cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); |
463 | config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); |
464 | manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID); |
465 | devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID); |
466 | |
467 | if (cap < 0 || config < 0 || manid < 0 || devid < 0) |
468 | return -ENODEV; |
469 | |
470 | if ((cap & 0xff00) || (config & 0xf800)) |
471 | return -ENODEV; |
472 | |
473 | for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) { |
474 | struct jc42_chips *chip = &jc42_chips[i]; |
475 | if (manid == chip->manid && |
476 | (devid & chip->devid_mask) == chip->devid) { |
477 | strlcpy(info->type, "jc42", I2C_NAME_SIZE); |
478 | return 0; |
479 | } |
480 | } |
481 | return -ENODEV; |
482 | } |
483 | |
484 | static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id) |
485 | { |
486 | struct jc42_data *data; |
487 | int config, cap, err; |
488 | struct device *dev = &client->dev; |
489 | |
490 | data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL); |
491 | if (!data) |
492 | return -ENOMEM; |
493 | |
494 | i2c_set_clientdata(client, data); |
495 | mutex_init(&data->update_lock); |
496 | |
497 | cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP); |
498 | if (cap < 0) |
499 | return cap; |
500 | |
501 | data->extended = !!(cap & JC42_CAP_RANGE); |
502 | |
503 | config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG); |
504 | if (config < 0) |
505 | return config; |
506 | |
507 | data->orig_config = config; |
508 | if (config & JC42_CFG_SHUTDOWN) { |
509 | config &= ~JC42_CFG_SHUTDOWN; |
510 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); |
511 | } |
512 | data->config = config; |
513 | |
514 | /* Register sysfs hooks */ |
515 | err = sysfs_create_group(&dev->kobj, &jc42_group); |
516 | if (err) |
517 | return err; |
518 | |
519 | data->hwmon_dev = hwmon_device_register(dev); |
520 | if (IS_ERR(data->hwmon_dev)) { |
521 | err = PTR_ERR(data->hwmon_dev); |
522 | goto exit_remove; |
523 | } |
524 | |
525 | return 0; |
526 | |
527 | exit_remove: |
528 | sysfs_remove_group(&dev->kobj, &jc42_group); |
529 | return err; |
530 | } |
531 | |
532 | static int jc42_remove(struct i2c_client *client) |
533 | { |
534 | struct jc42_data *data = i2c_get_clientdata(client); |
535 | hwmon_device_unregister(data->hwmon_dev); |
536 | sysfs_remove_group(&client->dev.kobj, &jc42_group); |
537 | |
538 | /* Restore original configuration except hysteresis */ |
539 | if ((data->config & ~JC42_CFG_HYST_MASK) != |
540 | (data->orig_config & ~JC42_CFG_HYST_MASK)) { |
541 | int config; |
542 | |
543 | config = (data->orig_config & ~JC42_CFG_HYST_MASK) |
544 | | (data->config & JC42_CFG_HYST_MASK); |
545 | i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config); |
546 | } |
547 | return 0; |
548 | } |
549 | |
550 | static struct jc42_data *jc42_update_device(struct device *dev) |
551 | { |
552 | struct i2c_client *client = to_i2c_client(dev); |
553 | struct jc42_data *data = i2c_get_clientdata(client); |
554 | struct jc42_data *ret = data; |
555 | int val; |
556 | |
557 | mutex_lock(&data->update_lock); |
558 | |
559 | if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { |
560 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP); |
561 | if (val < 0) { |
562 | ret = ERR_PTR(val); |
563 | goto abort; |
564 | } |
565 | data->temp_input = val; |
566 | |
567 | val = i2c_smbus_read_word_swapped(client, |
568 | JC42_REG_TEMP_CRITICAL); |
569 | if (val < 0) { |
570 | ret = ERR_PTR(val); |
571 | goto abort; |
572 | } |
573 | data->temp_crit = val; |
574 | |
575 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER); |
576 | if (val < 0) { |
577 | ret = ERR_PTR(val); |
578 | goto abort; |
579 | } |
580 | data->temp_min = val; |
581 | |
582 | val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER); |
583 | if (val < 0) { |
584 | ret = ERR_PTR(val); |
585 | goto abort; |
586 | } |
587 | data->temp_max = val; |
588 | |
589 | data->last_updated = jiffies; |
590 | data->valid = true; |
591 | } |
592 | abort: |
593 | mutex_unlock(&data->update_lock); |
594 | return ret; |
595 | } |
596 | |
597 | module_i2c_driver(jc42_driver); |
598 | |
599 | MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>"); |
600 | MODULE_DESCRIPTION("JC42 driver"); |
601 | MODULE_LICENSE("GPL"); |
602 |
Branches:
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javiroman/ks7010
jz-2.6.34
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9