Root/
1 | /* |
2 | * Support for common PCI multi-I/O cards (which is most of them) |
3 | * |
4 | * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com> |
5 | * |
6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License |
8 | * as published by the Free Software Foundation; either version |
9 | * 2 of the License, or (at your option) any later version. |
10 | * |
11 | * |
12 | * Multi-function PCI cards are supposed to present separate logical |
13 | * devices on the bus. A common thing to do seems to be to just use |
14 | * one logical device with lots of base address registers for both |
15 | * parallel ports and serial ports. This driver is for dealing with |
16 | * that. |
17 | * |
18 | */ |
19 | |
20 | #include <linux/types.h> |
21 | #include <linux/module.h> |
22 | #include <linux/init.h> |
23 | #include <linux/slab.h> |
24 | #include <linux/pci.h> |
25 | #include <linux/interrupt.h> |
26 | #include <linux/parport.h> |
27 | #include <linux/parport_pc.h> |
28 | #include <linux/8250_pci.h> |
29 | |
30 | enum parport_pc_pci_cards { |
31 | titan_110l = 0, |
32 | titan_210l, |
33 | netmos_9xx5_combo, |
34 | netmos_9855, |
35 | netmos_9855_2p, |
36 | netmos_9900, |
37 | netmos_9900_2p, |
38 | netmos_99xx_1p, |
39 | avlab_1s1p, |
40 | avlab_1s2p, |
41 | avlab_2s1p, |
42 | siig_1s1p_10x, |
43 | siig_2s1p_10x, |
44 | siig_2p1s_20x, |
45 | siig_1s1p_20x, |
46 | siig_2s1p_20x, |
47 | timedia_4078a, |
48 | timedia_4079h, |
49 | timedia_4085h, |
50 | timedia_4088a, |
51 | timedia_4089a, |
52 | timedia_4095a, |
53 | timedia_4096a, |
54 | timedia_4078u, |
55 | timedia_4079a, |
56 | timedia_4085u, |
57 | timedia_4079r, |
58 | timedia_4079s, |
59 | timedia_4079d, |
60 | timedia_4079e, |
61 | timedia_4079f, |
62 | timedia_9079a, |
63 | timedia_9079b, |
64 | timedia_9079c, |
65 | }; |
66 | |
67 | /* each element directly indexed from enum list, above */ |
68 | struct parport_pc_pci { |
69 | int numports; |
70 | struct { /* BAR (base address registers) numbers in the config |
71 | space header */ |
72 | int lo; |
73 | int hi; /* -1 if not there, >6 for offset-method (max |
74 | BAR is 6) */ |
75 | } addr[4]; |
76 | |
77 | /* If set, this is called immediately after pci_enable_device. |
78 | * If it returns non-zero, no probing will take place and the |
79 | * ports will not be used. */ |
80 | int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card, |
81 | int autoirq, int autodma); |
82 | |
83 | /* If set, this is called after probing for ports. If 'failed' |
84 | * is non-zero we couldn't use any of the ports. */ |
85 | void (*postinit_hook) (struct pci_dev *pdev, |
86 | struct parport_pc_pci *card, int failed); |
87 | }; |
88 | |
89 | static int __devinit netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par, int autoirq, int autodma) |
90 | { |
91 | /* the rule described below doesn't hold for this device */ |
92 | if (dev->device == PCI_DEVICE_ID_NETMOS_9835 && |
93 | dev->subsystem_vendor == PCI_VENDOR_ID_IBM && |
94 | dev->subsystem_device == 0x0299) |
95 | return -ENODEV; |
96 | |
97 | if (dev->device == PCI_DEVICE_ID_NETMOS_9912) { |
98 | par->numports = 1; |
99 | } else { |
100 | /* |
101 | * Netmos uses the subdevice ID to indicate the number of parallel |
102 | * and serial ports. The form is 0x00PS, where <P> is the number of |
103 | * parallel ports and <S> is the number of serial ports. |
104 | */ |
105 | par->numports = (dev->subsystem_device & 0xf0) >> 4; |
106 | if (par->numports > ARRAY_SIZE(par->addr)) |
107 | par->numports = ARRAY_SIZE(par->addr); |
108 | } |
109 | |
110 | return 0; |
111 | } |
112 | |
113 | static struct parport_pc_pci cards[] __devinitdata = { |
114 | /* titan_110l */ { 1, { { 3, -1 }, } }, |
115 | /* titan_210l */ { 1, { { 3, -1 }, } }, |
116 | /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init }, |
117 | /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init }, |
118 | /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } }, |
119 | /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init }, |
120 | /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } }, |
121 | /* netmos_99xx_1p */ {1, { { 0, 1 }, } }, |
122 | /* avlab_1s1p */ { 1, { { 1, 2}, } }, |
123 | /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} }, |
124 | /* avlab_2s1p */ { 1, { { 2, 3}, } }, |
125 | /* siig_1s1p_10x */ { 1, { { 3, 4 }, } }, |
126 | /* siig_2s1p_10x */ { 1, { { 4, 5 }, } }, |
127 | /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } }, |
128 | /* siig_1s1p_20x */ { 1, { { 1, 2 }, } }, |
129 | /* siig_2s1p_20x */ { 1, { { 2, 3 }, } }, |
130 | /* timedia_4078a */ { 1, { { 2, -1 }, } }, |
131 | /* timedia_4079h */ { 1, { { 2, 3 }, } }, |
132 | /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
133 | /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
134 | /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
135 | /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
136 | /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
137 | /* timedia_4078u */ { 1, { { 2, -1 }, } }, |
138 | /* timedia_4079a */ { 1, { { 2, 3 }, } }, |
139 | /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
140 | /* timedia_4079r */ { 1, { { 2, 3 }, } }, |
141 | /* timedia_4079s */ { 1, { { 2, 3 }, } }, |
142 | /* timedia_4079d */ { 1, { { 2, 3 }, } }, |
143 | /* timedia_4079e */ { 1, { { 2, 3 }, } }, |
144 | /* timedia_4079f */ { 1, { { 2, 3 }, } }, |
145 | /* timedia_9079a */ { 1, { { 2, 3 }, } }, |
146 | /* timedia_9079b */ { 1, { { 2, 3 }, } }, |
147 | /* timedia_9079c */ { 1, { { 2, 3 }, } }, |
148 | }; |
149 | |
150 | static struct pci_device_id parport_serial_pci_tbl[] = { |
151 | /* PCI cards */ |
152 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L, |
153 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l }, |
154 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L, |
155 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l }, |
156 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735, |
157 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
158 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745, |
159 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
160 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, |
161 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
162 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845, |
163 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
164 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
165 | 0x1000, 0x0020, 0, 0, netmos_9855_2p }, |
166 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
167 | 0x1000, 0x0022, 0, 0, netmos_9855_2p }, |
168 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
169 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 }, |
170 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
171 | 0xA000, 0x3011, 0, 0, netmos_9900 }, |
172 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
173 | 0xA000, 0x3012, 0, 0, netmos_9900 }, |
174 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
175 | 0xA000, 0x3020, 0, 0, netmos_9900_2p }, |
176 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912, |
177 | 0xA000, 0x2000, 0, 0, netmos_99xx_1p }, |
178 | /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ |
179 | { PCI_VENDOR_ID_AFAVLAB, 0x2110, |
180 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
181 | { PCI_VENDOR_ID_AFAVLAB, 0x2111, |
182 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
183 | { PCI_VENDOR_ID_AFAVLAB, 0x2112, |
184 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
185 | { PCI_VENDOR_ID_AFAVLAB, 0x2140, |
186 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
187 | { PCI_VENDOR_ID_AFAVLAB, 0x2141, |
188 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
189 | { PCI_VENDOR_ID_AFAVLAB, 0x2142, |
190 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
191 | { PCI_VENDOR_ID_AFAVLAB, 0x2160, |
192 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
193 | { PCI_VENDOR_ID_AFAVLAB, 0x2161, |
194 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
195 | { PCI_VENDOR_ID_AFAVLAB, 0x2162, |
196 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
197 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550, |
198 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
199 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650, |
200 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
201 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850, |
202 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
203 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550, |
204 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
205 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650, |
206 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
207 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850, |
208 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
209 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550, |
210 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
211 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650, |
212 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
213 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850, |
214 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
215 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550, |
216 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
217 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650, |
218 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, |
219 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850, |
220 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, |
221 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550, |
222 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
223 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650, |
224 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
225 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850, |
226 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
227 | /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ |
228 | { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, |
229 | { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, |
230 | { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, |
231 | { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, |
232 | { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, |
233 | { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, |
234 | { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, |
235 | { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, |
236 | { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, |
237 | { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, |
238 | { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, |
239 | { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, |
240 | { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, |
241 | { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, |
242 | { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, |
243 | { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, |
244 | { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, |
245 | { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, |
246 | |
247 | { 0, } /* terminate list */ |
248 | }; |
249 | MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl); |
250 | |
251 | /* |
252 | * This table describes the serial "geometry" of these boards. Any |
253 | * quirks for these can be found in drivers/serial/8250_pci.c |
254 | * |
255 | * Cards not tested are marked n/t |
256 | * If you have one of these cards and it works for you, please tell me.. |
257 | */ |
258 | static struct pciserial_board pci_parport_serial_boards[] __devinitdata = { |
259 | [titan_110l] = { |
260 | .flags = FL_BASE1 | FL_BASE_BARS, |
261 | .num_ports = 1, |
262 | .base_baud = 921600, |
263 | .uart_offset = 8, |
264 | }, |
265 | [titan_210l] = { |
266 | .flags = FL_BASE1 | FL_BASE_BARS, |
267 | .num_ports = 2, |
268 | .base_baud = 921600, |
269 | .uart_offset = 8, |
270 | }, |
271 | [netmos_9xx5_combo] = { |
272 | .flags = FL_BASE0 | FL_BASE_BARS, |
273 | .num_ports = 1, |
274 | .base_baud = 115200, |
275 | .uart_offset = 8, |
276 | }, |
277 | [netmos_9855] = { |
278 | .flags = FL_BASE2 | FL_BASE_BARS, |
279 | .num_ports = 1, |
280 | .base_baud = 115200, |
281 | .uart_offset = 8, |
282 | }, |
283 | [netmos_9855_2p] = { |
284 | .flags = FL_BASE4 | FL_BASE_BARS, |
285 | .num_ports = 1, |
286 | .base_baud = 115200, |
287 | .uart_offset = 8, |
288 | }, |
289 | [netmos_9900] = { /* n/t */ |
290 | .flags = FL_BASE0 | FL_BASE_BARS, |
291 | .num_ports = 1, |
292 | .base_baud = 115200, |
293 | .uart_offset = 8, |
294 | }, |
295 | [netmos_9900_2p] = { /* parallel only */ /* n/t */ |
296 | .flags = FL_BASE0, |
297 | .num_ports = 0, |
298 | .base_baud = 115200, |
299 | .uart_offset = 8, |
300 | }, |
301 | [netmos_99xx_1p] = { /* parallel only */ /* n/t */ |
302 | .flags = FL_BASE0, |
303 | .num_ports = 0, |
304 | .base_baud = 115200, |
305 | .uart_offset = 8, |
306 | }, |
307 | [avlab_1s1p] = { /* n/t */ |
308 | .flags = FL_BASE0 | FL_BASE_BARS, |
309 | .num_ports = 1, |
310 | .base_baud = 115200, |
311 | .uart_offset = 8, |
312 | }, |
313 | [avlab_1s2p] = { /* n/t */ |
314 | .flags = FL_BASE0 | FL_BASE_BARS, |
315 | .num_ports = 1, |
316 | .base_baud = 115200, |
317 | .uart_offset = 8, |
318 | }, |
319 | [avlab_2s1p] = { /* n/t */ |
320 | .flags = FL_BASE0 | FL_BASE_BARS, |
321 | .num_ports = 2, |
322 | .base_baud = 115200, |
323 | .uart_offset = 8, |
324 | }, |
325 | [siig_1s1p_10x] = { |
326 | .flags = FL_BASE2, |
327 | .num_ports = 1, |
328 | .base_baud = 460800, |
329 | .uart_offset = 8, |
330 | }, |
331 | [siig_2s1p_10x] = { |
332 | .flags = FL_BASE2, |
333 | .num_ports = 1, |
334 | .base_baud = 921600, |
335 | .uart_offset = 8, |
336 | }, |
337 | [siig_2p1s_20x] = { |
338 | .flags = FL_BASE0, |
339 | .num_ports = 1, |
340 | .base_baud = 921600, |
341 | .uart_offset = 8, |
342 | }, |
343 | [siig_1s1p_20x] = { |
344 | .flags = FL_BASE0, |
345 | .num_ports = 1, |
346 | .base_baud = 921600, |
347 | .uart_offset = 8, |
348 | }, |
349 | [siig_2s1p_20x] = { |
350 | .flags = FL_BASE0, |
351 | .num_ports = 1, |
352 | .base_baud = 921600, |
353 | .uart_offset = 8, |
354 | }, |
355 | [timedia_4078a] = { |
356 | .flags = FL_BASE0|FL_BASE_BARS, |
357 | .num_ports = 1, |
358 | .base_baud = 921600, |
359 | .uart_offset = 8, |
360 | }, |
361 | [timedia_4079h] = { |
362 | .flags = FL_BASE0|FL_BASE_BARS, |
363 | .num_ports = 1, |
364 | .base_baud = 921600, |
365 | .uart_offset = 8, |
366 | }, |
367 | [timedia_4085h] = { |
368 | .flags = FL_BASE0|FL_BASE_BARS, |
369 | .num_ports = 1, |
370 | .base_baud = 921600, |
371 | .uart_offset = 8, |
372 | }, |
373 | [timedia_4088a] = { |
374 | .flags = FL_BASE0|FL_BASE_BARS, |
375 | .num_ports = 1, |
376 | .base_baud = 921600, |
377 | .uart_offset = 8, |
378 | }, |
379 | [timedia_4089a] = { |
380 | .flags = FL_BASE0|FL_BASE_BARS, |
381 | .num_ports = 1, |
382 | .base_baud = 921600, |
383 | .uart_offset = 8, |
384 | }, |
385 | [timedia_4095a] = { |
386 | .flags = FL_BASE0|FL_BASE_BARS, |
387 | .num_ports = 1, |
388 | .base_baud = 921600, |
389 | .uart_offset = 8, |
390 | }, |
391 | [timedia_4096a] = { |
392 | .flags = FL_BASE0|FL_BASE_BARS, |
393 | .num_ports = 1, |
394 | .base_baud = 921600, |
395 | .uart_offset = 8, |
396 | }, |
397 | [timedia_4078u] = { |
398 | .flags = FL_BASE0|FL_BASE_BARS, |
399 | .num_ports = 1, |
400 | .base_baud = 921600, |
401 | .uart_offset = 8, |
402 | }, |
403 | [timedia_4079a] = { |
404 | .flags = FL_BASE0|FL_BASE_BARS, |
405 | .num_ports = 1, |
406 | .base_baud = 921600, |
407 | .uart_offset = 8, |
408 | }, |
409 | [timedia_4085u] = { |
410 | .flags = FL_BASE0|FL_BASE_BARS, |
411 | .num_ports = 1, |
412 | .base_baud = 921600, |
413 | .uart_offset = 8, |
414 | }, |
415 | [timedia_4079r] = { |
416 | .flags = FL_BASE0|FL_BASE_BARS, |
417 | .num_ports = 1, |
418 | .base_baud = 921600, |
419 | .uart_offset = 8, |
420 | }, |
421 | [timedia_4079s] = { |
422 | .flags = FL_BASE0|FL_BASE_BARS, |
423 | .num_ports = 1, |
424 | .base_baud = 921600, |
425 | .uart_offset = 8, |
426 | }, |
427 | [timedia_4079d] = { |
428 | .flags = FL_BASE0|FL_BASE_BARS, |
429 | .num_ports = 1, |
430 | .base_baud = 921600, |
431 | .uart_offset = 8, |
432 | }, |
433 | [timedia_4079e] = { |
434 | .flags = FL_BASE0|FL_BASE_BARS, |
435 | .num_ports = 1, |
436 | .base_baud = 921600, |
437 | .uart_offset = 8, |
438 | }, |
439 | [timedia_4079f] = { |
440 | .flags = FL_BASE0|FL_BASE_BARS, |
441 | .num_ports = 1, |
442 | .base_baud = 921600, |
443 | .uart_offset = 8, |
444 | }, |
445 | [timedia_9079a] = { |
446 | .flags = FL_BASE0|FL_BASE_BARS, |
447 | .num_ports = 1, |
448 | .base_baud = 921600, |
449 | .uart_offset = 8, |
450 | }, |
451 | [timedia_9079b] = { |
452 | .flags = FL_BASE0|FL_BASE_BARS, |
453 | .num_ports = 1, |
454 | .base_baud = 921600, |
455 | .uart_offset = 8, |
456 | }, |
457 | [timedia_9079c] = { |
458 | .flags = FL_BASE0|FL_BASE_BARS, |
459 | .num_ports = 1, |
460 | .base_baud = 921600, |
461 | .uart_offset = 8, |
462 | }, |
463 | }; |
464 | |
465 | struct parport_serial_private { |
466 | struct serial_private *serial; |
467 | int num_par; |
468 | struct parport *port[PARPORT_MAX]; |
469 | struct parport_pc_pci par; |
470 | }; |
471 | |
472 | /* Register the serial port(s) of a PCI card. */ |
473 | static int __devinit serial_register (struct pci_dev *dev, |
474 | const struct pci_device_id *id) |
475 | { |
476 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
477 | struct pciserial_board *board; |
478 | struct serial_private *serial; |
479 | |
480 | board = &pci_parport_serial_boards[id->driver_data]; |
481 | |
482 | if (board->num_ports == 0) |
483 | return 0; |
484 | |
485 | serial = pciserial_init_ports(dev, board); |
486 | |
487 | if (IS_ERR(serial)) |
488 | return PTR_ERR(serial); |
489 | |
490 | priv->serial = serial; |
491 | return 0; |
492 | } |
493 | |
494 | /* Register the parallel port(s) of a PCI card. */ |
495 | static int __devinit parport_register (struct pci_dev *dev, |
496 | const struct pci_device_id *id) |
497 | { |
498 | struct parport_pc_pci *card; |
499 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
500 | int n, success = 0; |
501 | |
502 | priv->par = cards[id->driver_data]; |
503 | card = &priv->par; |
504 | if (card->preinit_hook && |
505 | card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) |
506 | return -ENODEV; |
507 | |
508 | for (n = 0; n < card->numports; n++) { |
509 | struct parport *port; |
510 | int lo = card->addr[n].lo; |
511 | int hi = card->addr[n].hi; |
512 | unsigned long io_lo, io_hi; |
513 | int irq; |
514 | |
515 | if (priv->num_par == ARRAY_SIZE (priv->port)) { |
516 | printk (KERN_WARNING |
517 | "parport_serial: %s: only %zu parallel ports " |
518 | "supported (%d reported)\n", pci_name (dev), |
519 | ARRAY_SIZE(priv->port), card->numports); |
520 | break; |
521 | } |
522 | |
523 | io_lo = pci_resource_start (dev, lo); |
524 | io_hi = 0; |
525 | if ((hi >= 0) && (hi <= 6)) |
526 | io_hi = pci_resource_start (dev, hi); |
527 | else if (hi > 6) |
528 | io_lo += hi; /* Reinterpret the meaning of |
529 | "hi" as an offset (see SYBA |
530 | def.) */ |
531 | /* TODO: test if sharing interrupts works */ |
532 | irq = dev->irq; |
533 | if (irq == IRQ_NONE) { |
534 | dev_dbg(&dev->dev, |
535 | "PCI parallel port detected: I/O at %#lx(%#lx)\n", |
536 | io_lo, io_hi); |
537 | irq = PARPORT_IRQ_NONE; |
538 | } else { |
539 | dev_dbg(&dev->dev, |
540 | "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n", |
541 | io_lo, io_hi, irq); |
542 | } |
543 | port = parport_pc_probe_port (io_lo, io_hi, irq, |
544 | PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED); |
545 | if (port) { |
546 | priv->port[priv->num_par++] = port; |
547 | success = 1; |
548 | } |
549 | } |
550 | |
551 | if (card->postinit_hook) |
552 | card->postinit_hook (dev, card, !success); |
553 | |
554 | return 0; |
555 | } |
556 | |
557 | static int __devinit parport_serial_pci_probe (struct pci_dev *dev, |
558 | const struct pci_device_id *id) |
559 | { |
560 | struct parport_serial_private *priv; |
561 | int err; |
562 | |
563 | priv = kzalloc (sizeof *priv, GFP_KERNEL); |
564 | if (!priv) |
565 | return -ENOMEM; |
566 | pci_set_drvdata (dev, priv); |
567 | |
568 | err = pci_enable_device (dev); |
569 | if (err) { |
570 | pci_set_drvdata (dev, NULL); |
571 | kfree (priv); |
572 | return err; |
573 | } |
574 | |
575 | if (parport_register (dev, id)) { |
576 | pci_set_drvdata (dev, NULL); |
577 | kfree (priv); |
578 | return -ENODEV; |
579 | } |
580 | |
581 | if (serial_register (dev, id)) { |
582 | int i; |
583 | for (i = 0; i < priv->num_par; i++) |
584 | parport_pc_unregister_port (priv->port[i]); |
585 | pci_set_drvdata (dev, NULL); |
586 | kfree (priv); |
587 | return -ENODEV; |
588 | } |
589 | |
590 | return 0; |
591 | } |
592 | |
593 | static void __devexit parport_serial_pci_remove (struct pci_dev *dev) |
594 | { |
595 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
596 | int i; |
597 | |
598 | pci_set_drvdata(dev, NULL); |
599 | |
600 | // Serial ports |
601 | if (priv->serial) |
602 | pciserial_remove_ports(priv->serial); |
603 | |
604 | // Parallel ports |
605 | for (i = 0; i < priv->num_par; i++) |
606 | parport_pc_unregister_port (priv->port[i]); |
607 | |
608 | kfree (priv); |
609 | return; |
610 | } |
611 | |
612 | #ifdef CONFIG_PM |
613 | static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state) |
614 | { |
615 | struct parport_serial_private *priv = pci_get_drvdata(dev); |
616 | |
617 | if (priv->serial) |
618 | pciserial_suspend_ports(priv->serial); |
619 | |
620 | /* FIXME: What about parport? */ |
621 | |
622 | pci_save_state(dev); |
623 | pci_set_power_state(dev, pci_choose_state(dev, state)); |
624 | return 0; |
625 | } |
626 | |
627 | static int parport_serial_pci_resume(struct pci_dev *dev) |
628 | { |
629 | struct parport_serial_private *priv = pci_get_drvdata(dev); |
630 | int err; |
631 | |
632 | pci_set_power_state(dev, PCI_D0); |
633 | pci_restore_state(dev); |
634 | |
635 | /* |
636 | * The device may have been disabled. Re-enable it. |
637 | */ |
638 | err = pci_enable_device(dev); |
639 | if (err) { |
640 | printk(KERN_ERR "parport_serial: %s: error enabling " |
641 | "device for resume (%d)\n", pci_name(dev), err); |
642 | return err; |
643 | } |
644 | |
645 | if (priv->serial) |
646 | pciserial_resume_ports(priv->serial); |
647 | |
648 | /* FIXME: What about parport? */ |
649 | |
650 | return 0; |
651 | } |
652 | #endif |
653 | |
654 | static struct pci_driver parport_serial_pci_driver = { |
655 | .name = "parport_serial", |
656 | .id_table = parport_serial_pci_tbl, |
657 | .probe = parport_serial_pci_probe, |
658 | .remove = __devexit_p(parport_serial_pci_remove), |
659 | #ifdef CONFIG_PM |
660 | .suspend = parport_serial_pci_suspend, |
661 | .resume = parport_serial_pci_resume, |
662 | #endif |
663 | }; |
664 | |
665 | |
666 | static int __init parport_serial_init (void) |
667 | { |
668 | return pci_register_driver (&parport_serial_pci_driver); |
669 | } |
670 | |
671 | static void __exit parport_serial_exit (void) |
672 | { |
673 | pci_unregister_driver (&parport_serial_pci_driver); |
674 | return; |
675 | } |
676 | |
677 | MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>"); |
678 | MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards"); |
679 | MODULE_LICENSE("GPL"); |
680 | |
681 | module_init(parport_serial_init); |
682 | module_exit(parport_serial_exit); |
683 |
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