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1 | /* parport_sunbpp.c: Parallel-port routines for SBUS |
2 | * |
3 | * Author: Derrick J. Brashear <shadow@dementia.org> |
4 | * |
5 | * based on work by: |
6 | * Phil Blundell <philb@gnu.org> |
7 | * Tim Waugh <tim@cyberelk.demon.co.uk> |
8 | * Jose Renau <renau@acm.org> |
9 | * David Campbell <campbell@tirian.che.curtin.edu.au> |
10 | * Grant Guenther <grant@torque.net> |
11 | * Eddie C. Dost <ecd@skynet.be> |
12 | * Stephen Williams (steve@icarus.com) |
13 | * Gus Baldauf (gbaldauf@ix.netcom.com) |
14 | * Peter Zaitcev |
15 | * Tom Dyas |
16 | * |
17 | * Updated to new SBUS device framework: David S. Miller <davem@davemloft.net> |
18 | * |
19 | */ |
20 | |
21 | #include <linux/string.h> |
22 | #include <linux/module.h> |
23 | #include <linux/delay.h> |
24 | #include <linux/errno.h> |
25 | #include <linux/ioport.h> |
26 | #include <linux/kernel.h> |
27 | #include <linux/slab.h> |
28 | #include <linux/init.h> |
29 | #include <linux/of.h> |
30 | #include <linux/of_device.h> |
31 | |
32 | #include <linux/parport.h> |
33 | |
34 | #include <asm/ptrace.h> |
35 | #include <linux/interrupt.h> |
36 | |
37 | #include <asm/io.h> |
38 | #include <asm/oplib.h> /* OpenProm Library */ |
39 | #include <asm/dma.h> /* BPP uses LSI 64854 for DMA */ |
40 | #include <asm/irq.h> |
41 | #include <asm/sunbpp.h> |
42 | |
43 | #undef __SUNBPP_DEBUG |
44 | #ifdef __SUNBPP_DEBUG |
45 | #define dprintk(x) printk x |
46 | #else |
47 | #define dprintk(x) |
48 | #endif |
49 | |
50 | static void parport_sunbpp_disable_irq(struct parport *p) |
51 | { |
52 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
53 | u32 tmp; |
54 | |
55 | tmp = sbus_readl(®s->p_csr); |
56 | tmp &= ~DMA_INT_ENAB; |
57 | sbus_writel(tmp, ®s->p_csr); |
58 | } |
59 | |
60 | static void parport_sunbpp_enable_irq(struct parport *p) |
61 | { |
62 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
63 | u32 tmp; |
64 | |
65 | tmp = sbus_readl(®s->p_csr); |
66 | tmp |= DMA_INT_ENAB; |
67 | sbus_writel(tmp, ®s->p_csr); |
68 | } |
69 | |
70 | static void parport_sunbpp_write_data(struct parport *p, unsigned char d) |
71 | { |
72 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
73 | |
74 | sbus_writeb(d, ®s->p_dr); |
75 | dprintk((KERN_DEBUG "wrote 0x%x\n", d)); |
76 | } |
77 | |
78 | static unsigned char parport_sunbpp_read_data(struct parport *p) |
79 | { |
80 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
81 | |
82 | return sbus_readb(®s->p_dr); |
83 | } |
84 | |
85 | static unsigned char status_sunbpp_to_pc(struct parport *p) |
86 | { |
87 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
88 | unsigned char bits = 0; |
89 | unsigned char value_tcr = sbus_readb(®s->p_tcr); |
90 | unsigned char value_ir = sbus_readb(®s->p_ir); |
91 | |
92 | if (!(value_ir & P_IR_ERR)) |
93 | bits |= PARPORT_STATUS_ERROR; |
94 | if (!(value_ir & P_IR_SLCT)) |
95 | bits |= PARPORT_STATUS_SELECT; |
96 | if (!(value_ir & P_IR_PE)) |
97 | bits |= PARPORT_STATUS_PAPEROUT; |
98 | if (value_tcr & P_TCR_ACK) |
99 | bits |= PARPORT_STATUS_ACK; |
100 | if (!(value_tcr & P_TCR_BUSY)) |
101 | bits |= PARPORT_STATUS_BUSY; |
102 | |
103 | dprintk((KERN_DEBUG "tcr 0x%x ir 0x%x\n", value_tcr, value_ir)); |
104 | dprintk((KERN_DEBUG "read status 0x%x\n", bits)); |
105 | return bits; |
106 | } |
107 | |
108 | static unsigned char control_sunbpp_to_pc(struct parport *p) |
109 | { |
110 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
111 | unsigned char bits = 0; |
112 | unsigned char value_tcr = sbus_readb(®s->p_tcr); |
113 | unsigned char value_or = sbus_readb(®s->p_or); |
114 | |
115 | if (!(value_tcr & P_TCR_DS)) |
116 | bits |= PARPORT_CONTROL_STROBE; |
117 | if (!(value_or & P_OR_AFXN)) |
118 | bits |= PARPORT_CONTROL_AUTOFD; |
119 | if (!(value_or & P_OR_INIT)) |
120 | bits |= PARPORT_CONTROL_INIT; |
121 | if (value_or & P_OR_SLCT_IN) |
122 | bits |= PARPORT_CONTROL_SELECT; |
123 | |
124 | dprintk((KERN_DEBUG "tcr 0x%x or 0x%x\n", value_tcr, value_or)); |
125 | dprintk((KERN_DEBUG "read control 0x%x\n", bits)); |
126 | return bits; |
127 | } |
128 | |
129 | static unsigned char parport_sunbpp_read_control(struct parport *p) |
130 | { |
131 | return control_sunbpp_to_pc(p); |
132 | } |
133 | |
134 | static unsigned char parport_sunbpp_frob_control(struct parport *p, |
135 | unsigned char mask, |
136 | unsigned char val) |
137 | { |
138 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
139 | unsigned char value_tcr = sbus_readb(®s->p_tcr); |
140 | unsigned char value_or = sbus_readb(®s->p_or); |
141 | |
142 | dprintk((KERN_DEBUG "frob1: tcr 0x%x or 0x%x\n", |
143 | value_tcr, value_or)); |
144 | if (mask & PARPORT_CONTROL_STROBE) { |
145 | if (val & PARPORT_CONTROL_STROBE) { |
146 | value_tcr &= ~P_TCR_DS; |
147 | } else { |
148 | value_tcr |= P_TCR_DS; |
149 | } |
150 | } |
151 | if (mask & PARPORT_CONTROL_AUTOFD) { |
152 | if (val & PARPORT_CONTROL_AUTOFD) { |
153 | value_or &= ~P_OR_AFXN; |
154 | } else { |
155 | value_or |= P_OR_AFXN; |
156 | } |
157 | } |
158 | if (mask & PARPORT_CONTROL_INIT) { |
159 | if (val & PARPORT_CONTROL_INIT) { |
160 | value_or &= ~P_OR_INIT; |
161 | } else { |
162 | value_or |= P_OR_INIT; |
163 | } |
164 | } |
165 | if (mask & PARPORT_CONTROL_SELECT) { |
166 | if (val & PARPORT_CONTROL_SELECT) { |
167 | value_or |= P_OR_SLCT_IN; |
168 | } else { |
169 | value_or &= ~P_OR_SLCT_IN; |
170 | } |
171 | } |
172 | |
173 | sbus_writeb(value_or, ®s->p_or); |
174 | sbus_writeb(value_tcr, ®s->p_tcr); |
175 | dprintk((KERN_DEBUG "frob2: tcr 0x%x or 0x%x\n", |
176 | value_tcr, value_or)); |
177 | return parport_sunbpp_read_control(p); |
178 | } |
179 | |
180 | static void parport_sunbpp_write_control(struct parport *p, unsigned char d) |
181 | { |
182 | const unsigned char wm = (PARPORT_CONTROL_STROBE | |
183 | PARPORT_CONTROL_AUTOFD | |
184 | PARPORT_CONTROL_INIT | |
185 | PARPORT_CONTROL_SELECT); |
186 | |
187 | parport_sunbpp_frob_control (p, wm, d & wm); |
188 | } |
189 | |
190 | static unsigned char parport_sunbpp_read_status(struct parport *p) |
191 | { |
192 | return status_sunbpp_to_pc(p); |
193 | } |
194 | |
195 | static void parport_sunbpp_data_forward (struct parport *p) |
196 | { |
197 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
198 | unsigned char value_tcr = sbus_readb(®s->p_tcr); |
199 | |
200 | dprintk((KERN_DEBUG "forward\n")); |
201 | value_tcr &= ~P_TCR_DIR; |
202 | sbus_writeb(value_tcr, ®s->p_tcr); |
203 | } |
204 | |
205 | static void parport_sunbpp_data_reverse (struct parport *p) |
206 | { |
207 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; |
208 | u8 val = sbus_readb(®s->p_tcr); |
209 | |
210 | dprintk((KERN_DEBUG "reverse\n")); |
211 | val |= P_TCR_DIR; |
212 | sbus_writeb(val, ®s->p_tcr); |
213 | } |
214 | |
215 | static void parport_sunbpp_init_state(struct pardevice *dev, struct parport_state *s) |
216 | { |
217 | s->u.pc.ctr = 0xc; |
218 | s->u.pc.ecr = 0x0; |
219 | } |
220 | |
221 | static void parport_sunbpp_save_state(struct parport *p, struct parport_state *s) |
222 | { |
223 | s->u.pc.ctr = parport_sunbpp_read_control(p); |
224 | } |
225 | |
226 | static void parport_sunbpp_restore_state(struct parport *p, struct parport_state *s) |
227 | { |
228 | parport_sunbpp_write_control(p, s->u.pc.ctr); |
229 | } |
230 | |
231 | static struct parport_operations parport_sunbpp_ops = |
232 | { |
233 | .write_data = parport_sunbpp_write_data, |
234 | .read_data = parport_sunbpp_read_data, |
235 | |
236 | .write_control = parport_sunbpp_write_control, |
237 | .read_control = parport_sunbpp_read_control, |
238 | .frob_control = parport_sunbpp_frob_control, |
239 | |
240 | .read_status = parport_sunbpp_read_status, |
241 | |
242 | .enable_irq = parport_sunbpp_enable_irq, |
243 | .disable_irq = parport_sunbpp_disable_irq, |
244 | |
245 | .data_forward = parport_sunbpp_data_forward, |
246 | .data_reverse = parport_sunbpp_data_reverse, |
247 | |
248 | .init_state = parport_sunbpp_init_state, |
249 | .save_state = parport_sunbpp_save_state, |
250 | .restore_state = parport_sunbpp_restore_state, |
251 | |
252 | .epp_write_data = parport_ieee1284_epp_write_data, |
253 | .epp_read_data = parport_ieee1284_epp_read_data, |
254 | .epp_write_addr = parport_ieee1284_epp_write_addr, |
255 | .epp_read_addr = parport_ieee1284_epp_read_addr, |
256 | |
257 | .ecp_write_data = parport_ieee1284_ecp_write_data, |
258 | .ecp_read_data = parport_ieee1284_ecp_read_data, |
259 | .ecp_write_addr = parport_ieee1284_ecp_write_addr, |
260 | |
261 | .compat_write_data = parport_ieee1284_write_compat, |
262 | .nibble_read_data = parport_ieee1284_read_nibble, |
263 | .byte_read_data = parport_ieee1284_read_byte, |
264 | |
265 | .owner = THIS_MODULE, |
266 | }; |
267 | |
268 | static int __devinit bpp_probe(struct platform_device *op) |
269 | { |
270 | struct parport_operations *ops; |
271 | struct bpp_regs __iomem *regs; |
272 | int irq, dma, err = 0, size; |
273 | unsigned char value_tcr; |
274 | void __iomem *base; |
275 | struct parport *p; |
276 | |
277 | irq = op->archdata.irqs[0]; |
278 | base = of_ioremap(&op->resource[0], 0, |
279 | resource_size(&op->resource[0]), |
280 | "sunbpp"); |
281 | if (!base) |
282 | return -ENODEV; |
283 | |
284 | size = resource_size(&op->resource[0]); |
285 | dma = PARPORT_DMA_NONE; |
286 | |
287 | ops = kmalloc(sizeof(struct parport_operations), GFP_KERNEL); |
288 | if (!ops) |
289 | goto out_unmap; |
290 | |
291 | memcpy (ops, &parport_sunbpp_ops, sizeof(struct parport_operations)); |
292 | |
293 | dprintk(("register_port\n")); |
294 | if (!(p = parport_register_port((unsigned long)base, irq, dma, ops))) |
295 | goto out_free_ops; |
296 | |
297 | p->size = size; |
298 | p->dev = &op->dev; |
299 | |
300 | if ((err = request_irq(p->irq, parport_irq_handler, |
301 | IRQF_SHARED, p->name, p)) != 0) { |
302 | goto out_put_port; |
303 | } |
304 | |
305 | parport_sunbpp_enable_irq(p); |
306 | |
307 | regs = (struct bpp_regs __iomem *)p->base; |
308 | |
309 | value_tcr = sbus_readb(®s->p_tcr); |
310 | value_tcr &= ~P_TCR_DIR; |
311 | sbus_writeb(value_tcr, ®s->p_tcr); |
312 | |
313 | printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base); |
314 | |
315 | dev_set_drvdata(&op->dev, p); |
316 | |
317 | parport_announce_port(p); |
318 | |
319 | return 0; |
320 | |
321 | out_put_port: |
322 | parport_put_port(p); |
323 | |
324 | out_free_ops: |
325 | kfree(ops); |
326 | |
327 | out_unmap: |
328 | of_iounmap(&op->resource[0], base, size); |
329 | |
330 | return err; |
331 | } |
332 | |
333 | static int __devexit bpp_remove(struct platform_device *op) |
334 | { |
335 | struct parport *p = dev_get_drvdata(&op->dev); |
336 | struct parport_operations *ops = p->ops; |
337 | |
338 | parport_remove_port(p); |
339 | |
340 | if (p->irq != PARPORT_IRQ_NONE) { |
341 | parport_sunbpp_disable_irq(p); |
342 | free_irq(p->irq, p); |
343 | } |
344 | |
345 | of_iounmap(&op->resource[0], (void __iomem *) p->base, p->size); |
346 | parport_put_port(p); |
347 | kfree(ops); |
348 | |
349 | dev_set_drvdata(&op->dev, NULL); |
350 | |
351 | return 0; |
352 | } |
353 | |
354 | static const struct of_device_id bpp_match[] = { |
355 | { |
356 | .name = "SUNW,bpp", |
357 | }, |
358 | {}, |
359 | }; |
360 | |
361 | MODULE_DEVICE_TABLE(of, bpp_match); |
362 | |
363 | static struct platform_driver bpp_sbus_driver = { |
364 | .driver = { |
365 | .name = "bpp", |
366 | .owner = THIS_MODULE, |
367 | .of_match_table = bpp_match, |
368 | }, |
369 | .probe = bpp_probe, |
370 | .remove = __devexit_p(bpp_remove), |
371 | }; |
372 | |
373 | module_platform_driver(bpp_sbus_driver); |
374 | |
375 | MODULE_AUTHOR("Derrick J Brashear"); |
376 | MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port"); |
377 | MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port"); |
378 | MODULE_VERSION("2.0"); |
379 | MODULE_LICENSE("GPL"); |
380 |
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