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1 | /* |
2 | * Regulator driver for National Semiconductors LP3972 PMIC chip |
3 | * |
4 | * Based on lp3971.c |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. |
9 | * |
10 | */ |
11 | |
12 | #include <linux/bug.h> |
13 | #include <linux/err.h> |
14 | #include <linux/i2c.h> |
15 | #include <linux/module.h> |
16 | #include <linux/kernel.h> |
17 | #include <linux/regulator/driver.h> |
18 | #include <linux/regulator/lp3972.h> |
19 | #include <linux/slab.h> |
20 | |
21 | struct lp3972 { |
22 | struct device *dev; |
23 | struct mutex io_lock; |
24 | struct i2c_client *i2c; |
25 | int num_regulators; |
26 | struct regulator_dev **rdev; |
27 | }; |
28 | |
29 | /* LP3972 Control Registers */ |
30 | #define LP3972_SCR_REG 0x07 |
31 | #define LP3972_OVER1_REG 0x10 |
32 | #define LP3972_OVSR1_REG 0x11 |
33 | #define LP3972_OVER2_REG 0x12 |
34 | #define LP3972_OVSR2_REG 0x13 |
35 | #define LP3972_VCC1_REG 0x20 |
36 | #define LP3972_ADTV1_REG 0x23 |
37 | #define LP3972_ADTV2_REG 0x24 |
38 | #define LP3972_AVRC_REG 0x25 |
39 | #define LP3972_CDTC1_REG 0x26 |
40 | #define LP3972_CDTC2_REG 0x27 |
41 | #define LP3972_SDTV1_REG 0x29 |
42 | #define LP3972_SDTV2_REG 0x2A |
43 | #define LP3972_MDTV1_REG 0x32 |
44 | #define LP3972_MDTV2_REG 0x33 |
45 | #define LP3972_L2VCR_REG 0x39 |
46 | #define LP3972_L34VCR_REG 0x3A |
47 | #define LP3972_SCR1_REG 0x80 |
48 | #define LP3972_SCR2_REG 0x81 |
49 | #define LP3972_OEN3_REG 0x82 |
50 | #define LP3972_OSR3_REG 0x83 |
51 | #define LP3972_LOER4_REG 0x84 |
52 | #define LP3972_B2TV_REG 0x85 |
53 | #define LP3972_B3TV_REG 0x86 |
54 | #define LP3972_B32RC_REG 0x87 |
55 | #define LP3972_ISRA_REG 0x88 |
56 | #define LP3972_BCCR_REG 0x89 |
57 | #define LP3972_II1RR_REG 0x8E |
58 | #define LP3972_II2RR_REG 0x8F |
59 | |
60 | #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG |
61 | /* System control register 1 initial value, |
62 | * bits 5, 6 and 7 are EPROM programmable */ |
63 | #define SYS_CONTROL1_INIT_VAL 0x02 |
64 | #define SYS_CONTROL1_INIT_MASK 0x1F |
65 | |
66 | #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG |
67 | #define LP3972_VOL_CHANGE_FLAG_GO 0x01 |
68 | #define LP3972_VOL_CHANGE_FLAG_MASK 0x03 |
69 | |
70 | /* LDO output enable mask */ |
71 | #define LP3972_OEN3_L1EN BIT(0) |
72 | #define LP3972_OVER2_LDO2_EN BIT(2) |
73 | #define LP3972_OVER2_LDO3_EN BIT(3) |
74 | #define LP3972_OVER2_LDO4_EN BIT(4) |
75 | #define LP3972_OVER1_S_EN BIT(2) |
76 | |
77 | static const unsigned int ldo1_voltage_map[] = { |
78 | 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000, |
79 | 1900000, 1925000, 1950000, 1975000, 2000000, |
80 | }; |
81 | |
82 | static const unsigned int ldo23_voltage_map[] = { |
83 | 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000, |
84 | 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000, |
85 | }; |
86 | |
87 | static const unsigned int ldo4_voltage_map[] = { |
88 | 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000, |
89 | 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000, |
90 | }; |
91 | |
92 | static const unsigned int ldo5_voltage_map[] = { |
93 | 0, 0, 0, 0, 0, 850000, 875000, 900000, |
94 | 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, |
95 | 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, |
96 | 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, |
97 | }; |
98 | |
99 | static const unsigned int buck1_voltage_map[] = { |
100 | 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000, |
101 | 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, |
102 | 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, |
103 | 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, |
104 | }; |
105 | |
106 | static const unsigned int buck23_voltage_map[] = { |
107 | 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000, |
108 | 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000, |
109 | 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000, |
110 | 3000000, 3300000, |
111 | }; |
112 | |
113 | static const int ldo_output_enable_mask[] = { |
114 | LP3972_OEN3_L1EN, |
115 | LP3972_OVER2_LDO2_EN, |
116 | LP3972_OVER2_LDO3_EN, |
117 | LP3972_OVER2_LDO4_EN, |
118 | LP3972_OVER1_S_EN, |
119 | }; |
120 | |
121 | static const int ldo_output_enable_addr[] = { |
122 | LP3972_OEN3_REG, |
123 | LP3972_OVER2_REG, |
124 | LP3972_OVER2_REG, |
125 | LP3972_OVER2_REG, |
126 | LP3972_OVER1_REG, |
127 | }; |
128 | |
129 | static const int ldo_vol_ctl_addr[] = { |
130 | LP3972_MDTV1_REG, |
131 | LP3972_L2VCR_REG, |
132 | LP3972_L34VCR_REG, |
133 | LP3972_L34VCR_REG, |
134 | LP3972_SDTV1_REG, |
135 | }; |
136 | |
137 | static const int buck_vol_enable_addr[] = { |
138 | LP3972_OVER1_REG, |
139 | LP3972_OEN3_REG, |
140 | LP3972_OEN3_REG, |
141 | }; |
142 | |
143 | static const int buck_base_addr[] = { |
144 | LP3972_ADTV1_REG, |
145 | LP3972_B2TV_REG, |
146 | LP3972_B3TV_REG, |
147 | }; |
148 | |
149 | #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x]) |
150 | #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x]) |
151 | |
152 | /* LDO voltage control registers shift: |
153 | LP3972_LDO1 -> 0, LP3972_LDO2 -> 4 |
154 | LP3972_LDO3 -> 0, LP3972_LDO4 -> 4 |
155 | LP3972_LDO5 -> 0 |
156 | */ |
157 | #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2) |
158 | #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x]) |
159 | #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6) |
160 | |
161 | #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f) |
162 | #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00) |
163 | #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c) |
164 | |
165 | #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x]) |
166 | #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x]) |
167 | #define LP3972_BUCK_VOL_MASK 0x1f |
168 | #define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00) |
169 | #define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f) |
170 | |
171 | static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count, |
172 | u16 *dest) |
173 | { |
174 | int ret; |
175 | |
176 | if (count != 1) |
177 | return -EIO; |
178 | ret = i2c_smbus_read_byte_data(i2c, reg); |
179 | if (ret < 0) |
180 | return ret; |
181 | |
182 | *dest = ret; |
183 | return 0; |
184 | } |
185 | |
186 | static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count, |
187 | const u16 *src) |
188 | { |
189 | if (count != 1) |
190 | return -EIO; |
191 | return i2c_smbus_write_byte_data(i2c, reg, *src); |
192 | } |
193 | |
194 | static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg) |
195 | { |
196 | u16 val = 0; |
197 | |
198 | mutex_lock(&lp3972->io_lock); |
199 | |
200 | lp3972_i2c_read(lp3972->i2c, reg, 1, &val); |
201 | |
202 | dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg, |
203 | (unsigned)val & 0xff); |
204 | |
205 | mutex_unlock(&lp3972->io_lock); |
206 | |
207 | return val & 0xff; |
208 | } |
209 | |
210 | static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val) |
211 | { |
212 | u16 tmp; |
213 | int ret; |
214 | |
215 | mutex_lock(&lp3972->io_lock); |
216 | |
217 | ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp); |
218 | tmp = (tmp & ~mask) | val; |
219 | if (ret == 0) { |
220 | ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp); |
221 | dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg, |
222 | (unsigned)val & 0xff); |
223 | } |
224 | mutex_unlock(&lp3972->io_lock); |
225 | |
226 | return ret; |
227 | } |
228 | |
229 | static int lp3972_ldo_is_enabled(struct regulator_dev *dev) |
230 | { |
231 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
232 | int ldo = rdev_get_id(dev) - LP3972_LDO1; |
233 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); |
234 | u16 val; |
235 | |
236 | val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo)); |
237 | return !!(val & mask); |
238 | } |
239 | |
240 | static int lp3972_ldo_enable(struct regulator_dev *dev) |
241 | { |
242 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
243 | int ldo = rdev_get_id(dev) - LP3972_LDO1; |
244 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); |
245 | |
246 | return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), |
247 | mask, mask); |
248 | } |
249 | |
250 | static int lp3972_ldo_disable(struct regulator_dev *dev) |
251 | { |
252 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
253 | int ldo = rdev_get_id(dev) - LP3972_LDO1; |
254 | u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo); |
255 | |
256 | return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo), |
257 | mask, 0); |
258 | } |
259 | |
260 | static int lp3972_ldo_get_voltage(struct regulator_dev *dev) |
261 | { |
262 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
263 | int ldo = rdev_get_id(dev) - LP3972_LDO1; |
264 | u16 mask = LP3972_LDO_VOL_MASK(ldo); |
265 | u16 val, reg; |
266 | |
267 | reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo)); |
268 | val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask; |
269 | |
270 | return dev->desc->volt_table[val]; |
271 | } |
272 | |
273 | static int lp3972_ldo_set_voltage_sel(struct regulator_dev *dev, |
274 | unsigned int selector) |
275 | { |
276 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
277 | int ldo = rdev_get_id(dev) - LP3972_LDO1; |
278 | int shift, ret; |
279 | |
280 | shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo); |
281 | ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo), |
282 | LP3972_LDO_VOL_MASK(ldo) << shift, selector << shift); |
283 | |
284 | if (ret) |
285 | return ret; |
286 | |
287 | /* |
288 | * LDO1 and LDO5 support voltage control by either target voltage1 |
289 | * or target voltage2 register. |
290 | * We use target voltage1 register for LDO1 and LDO5 in this driver. |
291 | * We need to update voltage change control register(0x20) to enable |
292 | * LDO1 and LDO5 to change to their programmed target values. |
293 | */ |
294 | switch (ldo) { |
295 | case LP3972_LDO1: |
296 | case LP3972_LDO5: |
297 | shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo); |
298 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, |
299 | LP3972_VOL_CHANGE_FLAG_MASK << shift, |
300 | LP3972_VOL_CHANGE_FLAG_GO << shift); |
301 | if (ret) |
302 | return ret; |
303 | |
304 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, |
305 | LP3972_VOL_CHANGE_FLAG_MASK << shift, 0); |
306 | break; |
307 | } |
308 | |
309 | return ret; |
310 | } |
311 | |
312 | static struct regulator_ops lp3972_ldo_ops = { |
313 | .list_voltage = regulator_list_voltage_table, |
314 | .is_enabled = lp3972_ldo_is_enabled, |
315 | .enable = lp3972_ldo_enable, |
316 | .disable = lp3972_ldo_disable, |
317 | .get_voltage = lp3972_ldo_get_voltage, |
318 | .set_voltage_sel = lp3972_ldo_set_voltage_sel, |
319 | }; |
320 | |
321 | static int lp3972_dcdc_is_enabled(struct regulator_dev *dev) |
322 | { |
323 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
324 | int buck = rdev_get_id(dev) - LP3972_DCDC1; |
325 | u16 mask = 1 << (buck * 2); |
326 | u16 val; |
327 | |
328 | val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck)); |
329 | return !!(val & mask); |
330 | } |
331 | |
332 | static int lp3972_dcdc_enable(struct regulator_dev *dev) |
333 | { |
334 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
335 | int buck = rdev_get_id(dev) - LP3972_DCDC1; |
336 | u16 mask = 1 << (buck * 2); |
337 | u16 val; |
338 | |
339 | val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), |
340 | mask, mask); |
341 | return val; |
342 | } |
343 | |
344 | static int lp3972_dcdc_disable(struct regulator_dev *dev) |
345 | { |
346 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
347 | int buck = rdev_get_id(dev) - LP3972_DCDC1; |
348 | u16 mask = 1 << (buck * 2); |
349 | u16 val; |
350 | |
351 | val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck), |
352 | mask, 0); |
353 | return val; |
354 | } |
355 | |
356 | static int lp3972_dcdc_get_voltage(struct regulator_dev *dev) |
357 | { |
358 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
359 | int buck = rdev_get_id(dev) - LP3972_DCDC1; |
360 | u16 reg; |
361 | int val; |
362 | |
363 | reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck)); |
364 | reg &= LP3972_BUCK_VOL_MASK; |
365 | if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck)) |
366 | val = dev->desc->volt_table[reg]; |
367 | else { |
368 | val = 0; |
369 | dev_warn(&dev->dev, "chip reported incorrect voltage value." |
370 | " reg = %d\n", reg); |
371 | } |
372 | |
373 | return val; |
374 | } |
375 | |
376 | static int lp3972_dcdc_set_voltage_sel(struct regulator_dev *dev, |
377 | unsigned int selector) |
378 | { |
379 | struct lp3972 *lp3972 = rdev_get_drvdata(dev); |
380 | int buck = rdev_get_id(dev) - LP3972_DCDC1; |
381 | int ret; |
382 | |
383 | ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck), |
384 | LP3972_BUCK_VOL_MASK, selector); |
385 | if (ret) |
386 | return ret; |
387 | |
388 | if (buck != 0) |
389 | return ret; |
390 | |
391 | ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, |
392 | LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO); |
393 | if (ret) |
394 | return ret; |
395 | |
396 | return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG, |
397 | LP3972_VOL_CHANGE_FLAG_MASK, 0); |
398 | } |
399 | |
400 | static struct regulator_ops lp3972_dcdc_ops = { |
401 | .list_voltage = regulator_list_voltage_table, |
402 | .is_enabled = lp3972_dcdc_is_enabled, |
403 | .enable = lp3972_dcdc_enable, |
404 | .disable = lp3972_dcdc_disable, |
405 | .get_voltage = lp3972_dcdc_get_voltage, |
406 | .set_voltage_sel = lp3972_dcdc_set_voltage_sel, |
407 | }; |
408 | |
409 | static const struct regulator_desc regulators[] = { |
410 | { |
411 | .name = "LDO1", |
412 | .id = LP3972_LDO1, |
413 | .ops = &lp3972_ldo_ops, |
414 | .n_voltages = ARRAY_SIZE(ldo1_voltage_map), |
415 | .volt_table = ldo1_voltage_map, |
416 | .type = REGULATOR_VOLTAGE, |
417 | .owner = THIS_MODULE, |
418 | }, |
419 | { |
420 | .name = "LDO2", |
421 | .id = LP3972_LDO2, |
422 | .ops = &lp3972_ldo_ops, |
423 | .n_voltages = ARRAY_SIZE(ldo23_voltage_map), |
424 | .volt_table = ldo23_voltage_map, |
425 | .type = REGULATOR_VOLTAGE, |
426 | .owner = THIS_MODULE, |
427 | }, |
428 | { |
429 | .name = "LDO3", |
430 | .id = LP3972_LDO3, |
431 | .ops = &lp3972_ldo_ops, |
432 | .n_voltages = ARRAY_SIZE(ldo23_voltage_map), |
433 | .volt_table = ldo23_voltage_map, |
434 | .type = REGULATOR_VOLTAGE, |
435 | .owner = THIS_MODULE, |
436 | }, |
437 | { |
438 | .name = "LDO4", |
439 | .id = LP3972_LDO4, |
440 | .ops = &lp3972_ldo_ops, |
441 | .n_voltages = ARRAY_SIZE(ldo4_voltage_map), |
442 | .volt_table = ldo4_voltage_map, |
443 | .type = REGULATOR_VOLTAGE, |
444 | .owner = THIS_MODULE, |
445 | }, |
446 | { |
447 | .name = "LDO5", |
448 | .id = LP3972_LDO5, |
449 | .ops = &lp3972_ldo_ops, |
450 | .n_voltages = ARRAY_SIZE(ldo5_voltage_map), |
451 | .volt_table = ldo5_voltage_map, |
452 | .type = REGULATOR_VOLTAGE, |
453 | .owner = THIS_MODULE, |
454 | }, |
455 | { |
456 | .name = "DCDC1", |
457 | .id = LP3972_DCDC1, |
458 | .ops = &lp3972_dcdc_ops, |
459 | .n_voltages = ARRAY_SIZE(buck1_voltage_map), |
460 | .volt_table = buck1_voltage_map, |
461 | .type = REGULATOR_VOLTAGE, |
462 | .owner = THIS_MODULE, |
463 | }, |
464 | { |
465 | .name = "DCDC2", |
466 | .id = LP3972_DCDC2, |
467 | .ops = &lp3972_dcdc_ops, |
468 | .n_voltages = ARRAY_SIZE(buck23_voltage_map), |
469 | .volt_table = buck23_voltage_map, |
470 | .type = REGULATOR_VOLTAGE, |
471 | .owner = THIS_MODULE, |
472 | }, |
473 | { |
474 | .name = "DCDC3", |
475 | .id = LP3972_DCDC3, |
476 | .ops = &lp3972_dcdc_ops, |
477 | .n_voltages = ARRAY_SIZE(buck23_voltage_map), |
478 | .volt_table = buck23_voltage_map, |
479 | .type = REGULATOR_VOLTAGE, |
480 | .owner = THIS_MODULE, |
481 | }, |
482 | }; |
483 | |
484 | static int __devinit setup_regulators(struct lp3972 *lp3972, |
485 | struct lp3972_platform_data *pdata) |
486 | { |
487 | int i, err; |
488 | |
489 | lp3972->num_regulators = pdata->num_regulators; |
490 | lp3972->rdev = kcalloc(pdata->num_regulators, |
491 | sizeof(struct regulator_dev *), GFP_KERNEL); |
492 | if (!lp3972->rdev) { |
493 | err = -ENOMEM; |
494 | goto err_nomem; |
495 | } |
496 | |
497 | /* Instantiate the regulators */ |
498 | for (i = 0; i < pdata->num_regulators; i++) { |
499 | struct lp3972_regulator_subdev *reg = &pdata->regulators[i]; |
500 | struct regulator_config config = { }; |
501 | |
502 | config.dev = lp3972->dev; |
503 | config.init_data = reg->initdata; |
504 | config.driver_data = lp3972; |
505 | |
506 | lp3972->rdev[i] = regulator_register(®ulators[reg->id], |
507 | &config); |
508 | if (IS_ERR(lp3972->rdev[i])) { |
509 | err = PTR_ERR(lp3972->rdev[i]); |
510 | dev_err(lp3972->dev, "regulator init failed: %d\n", |
511 | err); |
512 | goto error; |
513 | } |
514 | } |
515 | |
516 | return 0; |
517 | error: |
518 | while (--i >= 0) |
519 | regulator_unregister(lp3972->rdev[i]); |
520 | kfree(lp3972->rdev); |
521 | lp3972->rdev = NULL; |
522 | err_nomem: |
523 | return err; |
524 | } |
525 | |
526 | static int __devinit lp3972_i2c_probe(struct i2c_client *i2c, |
527 | const struct i2c_device_id *id) |
528 | { |
529 | struct lp3972 *lp3972; |
530 | struct lp3972_platform_data *pdata = i2c->dev.platform_data; |
531 | int ret; |
532 | u16 val; |
533 | |
534 | if (!pdata) { |
535 | dev_dbg(&i2c->dev, "No platform init data supplied\n"); |
536 | return -ENODEV; |
537 | } |
538 | |
539 | lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL); |
540 | if (!lp3972) |
541 | return -ENOMEM; |
542 | |
543 | lp3972->i2c = i2c; |
544 | lp3972->dev = &i2c->dev; |
545 | |
546 | mutex_init(&lp3972->io_lock); |
547 | |
548 | /* Detect LP3972 */ |
549 | ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val); |
550 | if (ret == 0 && |
551 | (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) { |
552 | ret = -ENODEV; |
553 | dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val); |
554 | } |
555 | if (ret < 0) { |
556 | dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret); |
557 | goto err_detect; |
558 | } |
559 | |
560 | ret = setup_regulators(lp3972, pdata); |
561 | if (ret < 0) |
562 | goto err_detect; |
563 | |
564 | i2c_set_clientdata(i2c, lp3972); |
565 | return 0; |
566 | |
567 | err_detect: |
568 | kfree(lp3972); |
569 | return ret; |
570 | } |
571 | |
572 | static int __devexit lp3972_i2c_remove(struct i2c_client *i2c) |
573 | { |
574 | struct lp3972 *lp3972 = i2c_get_clientdata(i2c); |
575 | int i; |
576 | |
577 | for (i = 0; i < lp3972->num_regulators; i++) |
578 | regulator_unregister(lp3972->rdev[i]); |
579 | kfree(lp3972->rdev); |
580 | kfree(lp3972); |
581 | |
582 | return 0; |
583 | } |
584 | |
585 | static const struct i2c_device_id lp3972_i2c_id[] = { |
586 | { "lp3972", 0 }, |
587 | { } |
588 | }; |
589 | MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id); |
590 | |
591 | static struct i2c_driver lp3972_i2c_driver = { |
592 | .driver = { |
593 | .name = "lp3972", |
594 | .owner = THIS_MODULE, |
595 | }, |
596 | .probe = lp3972_i2c_probe, |
597 | .remove = __devexit_p(lp3972_i2c_remove), |
598 | .id_table = lp3972_i2c_id, |
599 | }; |
600 | |
601 | static int __init lp3972_module_init(void) |
602 | { |
603 | return i2c_add_driver(&lp3972_i2c_driver); |
604 | } |
605 | subsys_initcall(lp3972_module_init); |
606 | |
607 | static void __exit lp3972_module_exit(void) |
608 | { |
609 | i2c_del_driver(&lp3972_i2c_driver); |
610 | } |
611 | module_exit(lp3972_module_exit); |
612 | |
613 | MODULE_LICENSE("GPL"); |
614 | MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>"); |
615 | MODULE_DESCRIPTION("LP3972 PMIC driver"); |
616 |
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