Root/drivers/staging/nvec/nvec.c

1/*
2 * NVEC: NVIDIA compliant embedded controller interface
3 *
4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
5 *
6 * Authors: Pierre-Hugues Husson <phhusson@free.fr>
7 * Ilya Petrov <ilya.muromec@gmail.com>
8 * Marc Dietrich <marvin24@gmx.de>
9 * Julian Andres Klode <jak@jak-linux.org>
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16
17/* #define DEBUG */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/atomic.h>
22#include <linux/clk.h>
23#include <linux/completion.h>
24#include <linux/delay.h>
25#include <linux/err.h>
26#include <linux/gpio.h>
27#include <linux/interrupt.h>
28#include <linux/io.h>
29#include <linux/irq.h>
30#include <linux/of.h>
31#include <linux/of_gpio.h>
32#include <linux/list.h>
33#include <linux/mfd/core.h>
34#include <linux/mutex.h>
35#include <linux/notifier.h>
36#include <linux/platform_device.h>
37#include <linux/slab.h>
38#include <linux/spinlock.h>
39#include <linux/workqueue.h>
40
41#include <mach/clk.h>
42#include <mach/iomap.h>
43
44#include "nvec.h"
45
46#define I2C_CNFG 0x00
47#define I2C_CNFG_PACKET_MODE_EN (1<<10)
48#define I2C_CNFG_NEW_MASTER_SFM (1<<11)
49#define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
50
51#define I2C_SL_CNFG 0x20
52#define I2C_SL_NEWSL (1<<2)
53#define I2C_SL_NACK (1<<1)
54#define I2C_SL_RESP (1<<0)
55#define I2C_SL_IRQ (1<<3)
56#define END_TRANS (1<<4)
57#define RCVD (1<<2)
58#define RNW (1<<1)
59
60#define I2C_SL_RCVD 0x24
61#define I2C_SL_STATUS 0x28
62#define I2C_SL_ADDR1 0x2c
63#define I2C_SL_ADDR2 0x30
64#define I2C_SL_DELAY_COUNT 0x3c
65
66/**
67 * enum nvec_msg_category - Message categories for nvec_msg_alloc()
68 * @NVEC_MSG_RX: The message is an incoming message (from EC)
69 * @NVEC_MSG_TX: The message is an outgoing message (to EC)
70 */
71enum nvec_msg_category {
72    NVEC_MSG_RX,
73    NVEC_MSG_TX,
74};
75
76static const unsigned char EC_DISABLE_EVENT_REPORTING[3] = "\x04\x00\x00";
77static const unsigned char EC_ENABLE_EVENT_REPORTING[3] = "\x04\x00\x01";
78static const unsigned char EC_GET_FIRMWARE_VERSION[2] = "\x07\x15";
79
80static struct nvec_chip *nvec_power_handle;
81
82static struct mfd_cell nvec_devices[] = {
83    {
84        .name = "nvec-kbd",
85        .id = 1,
86    },
87    {
88        .name = "nvec-mouse",
89        .id = 1,
90    },
91    {
92        .name = "nvec-power",
93        .id = 1,
94    },
95    {
96        .name = "nvec-power",
97        .id = 2,
98    },
99    {
100        .name = "nvec-paz00",
101        .id = 1,
102    },
103};
104
105/**
106 * nvec_register_notifier - Register a notifier with nvec
107 * @nvec: A &struct nvec_chip
108 * @nb: The notifier block to register
109 *
110 * Registers a notifier with @nvec. The notifier will be added to an atomic
111 * notifier chain that is called for all received messages except those that
112 * correspond to a request initiated by nvec_write_sync().
113 */
114int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb,
115               unsigned int events)
116{
117    return atomic_notifier_chain_register(&nvec->notifier_list, nb);
118}
119EXPORT_SYMBOL_GPL(nvec_register_notifier);
120
121/**
122 * nvec_status_notifier - The final notifier
123 *
124 * Prints a message about control events not handled in the notifier
125 * chain.
126 */
127static int nvec_status_notifier(struct notifier_block *nb,
128                unsigned long event_type, void *data)
129{
130    struct nvec_chip *nvec = container_of(nb, struct nvec_chip,
131                        nvec_status_notifier);
132    unsigned char *msg = (unsigned char *)data;
133
134    if (event_type != NVEC_CNTL)
135        return NOTIFY_DONE;
136
137    dev_warn(nvec->dev, "unhandled msg type %ld\n", event_type);
138    print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1,
139        msg, msg[1] + 2, true);
140
141    return NOTIFY_OK;
142}
143
144/**
145 * nvec_msg_alloc:
146 * @nvec: A &struct nvec_chip
147 * @category: Pool category, see &enum nvec_msg_category
148 *
149 * Allocate a single &struct nvec_msg object from the message pool of
150 * @nvec. The result shall be passed to nvec_msg_free() if no longer
151 * used.
152 *
153 * Outgoing messages are placed in the upper 75% of the pool, keeping the
154 * lower 25% available for RX buffers only. The reason is to prevent a
155 * situation where all buffers are full and a message is thus endlessly
156 * retried because the response could never be processed.
157 */
158static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec,
159                       enum nvec_msg_category category)
160{
161    int i = (category == NVEC_MSG_TX) ? (NVEC_POOL_SIZE / 4) : 0;
162
163    for (; i < NVEC_POOL_SIZE; i++) {
164        if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) {
165            dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i);
166            return &nvec->msg_pool[i];
167        }
168    }
169
170    dev_err(nvec->dev, "could not allocate %s buffer\n",
171        (category == NVEC_MSG_TX) ? "TX" : "RX");
172
173    return NULL;
174}
175
176/**
177 * nvec_msg_free:
178 * @nvec: A &struct nvec_chip
179 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec)
180 *
181 * Free the given message
182 */
183inline void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg)
184{
185    if (msg != &nvec->tx_scratch)
186        dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool);
187    atomic_set(&msg->used, 0);
188}
189EXPORT_SYMBOL_GPL(nvec_msg_free);
190
191/**
192 * nvec_msg_is_event - Return %true if @msg is an event
193 * @msg: A message
194 */
195static bool nvec_msg_is_event(struct nvec_msg *msg)
196{
197    return msg->data[0] >> 7;
198}
199
200/**
201 * nvec_msg_size - Get the size of a message
202 * @msg: The message to get the size for
203 *
204 * This only works for received messages, not for outgoing messages.
205 */
206static size_t nvec_msg_size(struct nvec_msg *msg)
207{
208    bool is_event = nvec_msg_is_event(msg);
209    int event_length = (msg->data[0] & 0x60) >> 5;
210
211    /* for variable size, payload size in byte 1 + count (1) + cmd (1) */
212    if (!is_event || event_length == NVEC_VAR_SIZE)
213        return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0;
214    else if (event_length == NVEC_2BYTES)
215        return 2;
216    else if (event_length == NVEC_3BYTES)
217        return 3;
218    else
219        return 0;
220}
221
222/**
223 * nvec_gpio_set_value - Set the GPIO value
224 * @nvec: A &struct nvec_chip
225 * @value: The value to write (0 or 1)
226 *
227 * Like gpio_set_value(), but generating debugging information
228 */
229static void nvec_gpio_set_value(struct nvec_chip *nvec, int value)
230{
231    dev_dbg(nvec->dev, "GPIO changed from %u to %u\n",
232        gpio_get_value(nvec->gpio), value);
233    gpio_set_value(nvec->gpio, value);
234}
235
236/**
237 * nvec_write_async - Asynchronously write a message to NVEC
238 * @nvec: An nvec_chip instance
239 * @data: The message data, starting with the request type
240 * @size: The size of @data
241 *
242 * Queue a single message to be transferred to the embedded controller
243 * and return immediately.
244 *
245 * Returns: 0 on success, a negative error code on failure. If a failure
246 * occured, the nvec driver may print an error.
247 */
248int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data,
249            short size)
250{
251    struct nvec_msg *msg;
252    unsigned long flags;
253
254    msg = nvec_msg_alloc(nvec, NVEC_MSG_TX);
255
256    if (msg == NULL)
257        return -ENOMEM;
258
259    msg->data[0] = size;
260    memcpy(msg->data + 1, data, size);
261    msg->size = size + 1;
262
263    spin_lock_irqsave(&nvec->tx_lock, flags);
264    list_add_tail(&msg->node, &nvec->tx_data);
265    spin_unlock_irqrestore(&nvec->tx_lock, flags);
266
267    queue_work(nvec->wq, &nvec->tx_work);
268
269    return 0;
270}
271EXPORT_SYMBOL(nvec_write_async);
272
273/**
274 * nvec_write_sync - Write a message to nvec and read the response
275 * @nvec: An &struct nvec_chip
276 * @data: The data to write
277 * @size: The size of @data
278 *
279 * This is similar to nvec_write_async(), but waits for the
280 * request to be answered before returning. This function
281 * uses a mutex and can thus not be called from e.g.
282 * interrupt handlers.
283 *
284 * Returns: A pointer to the response message on success,
285 * %NULL on failure. Free with nvec_msg_free() once no longer
286 * used.
287 */
288struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec,
289        const unsigned char *data, short size)
290{
291    struct nvec_msg *msg;
292
293    mutex_lock(&nvec->sync_write_mutex);
294
295    nvec->sync_write_pending = (data[1] << 8) + data[0];
296
297    if (nvec_write_async(nvec, data, size) < 0)
298        return NULL;
299
300    dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n",
301                    nvec->sync_write_pending);
302    if (!(wait_for_completion_timeout(&nvec->sync_write,
303                msecs_to_jiffies(2000)))) {
304        dev_warn(nvec->dev, "timeout waiting for sync write to complete\n");
305        mutex_unlock(&nvec->sync_write_mutex);
306        return NULL;
307    }
308
309    dev_dbg(nvec->dev, "nvec_sync_write: pong!\n");
310
311    msg = nvec->last_sync_msg;
312
313    mutex_unlock(&nvec->sync_write_mutex);
314
315    return msg;
316}
317EXPORT_SYMBOL(nvec_write_sync);
318
319/**
320 * nvec_request_master - Process outgoing messages
321 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
322 *
323 * Processes all outgoing requests by sending the request and awaiting the
324 * response, then continuing with the next request. Once a request has a
325 * matching response, it will be freed and removed from the list.
326 */
327static void nvec_request_master(struct work_struct *work)
328{
329    struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work);
330    unsigned long flags;
331    long err;
332    struct nvec_msg *msg;
333
334    spin_lock_irqsave(&nvec->tx_lock, flags);
335    while (!list_empty(&nvec->tx_data)) {
336        msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node);
337        spin_unlock_irqrestore(&nvec->tx_lock, flags);
338        nvec_gpio_set_value(nvec, 0);
339        err = wait_for_completion_interruptible_timeout(
340                &nvec->ec_transfer, msecs_to_jiffies(5000));
341
342        if (err == 0) {
343            dev_warn(nvec->dev, "timeout waiting for ec transfer\n");
344            nvec_gpio_set_value(nvec, 1);
345            msg->pos = 0;
346        }
347
348        spin_lock_irqsave(&nvec->tx_lock, flags);
349
350        if (err > 0) {
351            list_del_init(&msg->node);
352            nvec_msg_free(nvec, msg);
353        }
354    }
355    spin_unlock_irqrestore(&nvec->tx_lock, flags);
356}
357
358/**
359 * parse_msg - Print some information and call the notifiers on an RX message
360 * @nvec: A &struct nvec_chip
361 * @msg: A message received by @nvec
362 *
363 * Paarse some pieces of the message and then call the chain of notifiers
364 * registered via nvec_register_notifier.
365 */
366static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg)
367{
368    if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) {
369        dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n",
370            msg->data[0], msg->data[1], msg->data[2], msg->data[3]);
371        return -EINVAL;
372    }
373
374    if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5)
375        print_hex_dump(KERN_WARNING, "ec system event ",
376                DUMP_PREFIX_NONE, 16, 1, msg->data,
377                msg->data[1] + 2, true);
378
379    atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f,
380                   msg->data);
381
382    return 0;
383}
384
385/**
386 * nvec_dispatch - Process messages received from the EC
387 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
388 *
389 * Process messages previously received from the EC and put into the RX
390 * queue of the &struct nvec_chip instance associated with @work.
391 */
392static void nvec_dispatch(struct work_struct *work)
393{
394    struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work);
395    unsigned long flags;
396    struct nvec_msg *msg;
397
398    spin_lock_irqsave(&nvec->rx_lock, flags);
399    while (!list_empty(&nvec->rx_data)) {
400        msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node);
401        list_del_init(&msg->node);
402        spin_unlock_irqrestore(&nvec->rx_lock, flags);
403
404        if (nvec->sync_write_pending ==
405              (msg->data[2] << 8) + msg->data[0]) {
406            dev_dbg(nvec->dev, "sync write completed!\n");
407            nvec->sync_write_pending = 0;
408            nvec->last_sync_msg = msg;
409            complete(&nvec->sync_write);
410        } else {
411            parse_msg(nvec, msg);
412            nvec_msg_free(nvec, msg);
413        }
414        spin_lock_irqsave(&nvec->rx_lock, flags);
415    }
416    spin_unlock_irqrestore(&nvec->rx_lock, flags);
417}
418
419/**
420 * nvec_tx_completed - Complete the current transfer
421 * @nvec: A &struct nvec_chip
422 *
423 * This is called when we have received an END_TRANS on a TX transfer.
424 */
425static void nvec_tx_completed(struct nvec_chip *nvec)
426{
427    /* We got an END_TRANS, let's skip this, maybe there's an event */
428    if (nvec->tx->pos != nvec->tx->size) {
429        dev_err(nvec->dev, "premature END_TRANS, resending\n");
430        nvec->tx->pos = 0;
431        nvec_gpio_set_value(nvec, 0);
432    } else {
433        nvec->state = 0;
434    }
435}
436
437/**
438 * nvec_rx_completed - Complete the current transfer
439 * @nvec: A &struct nvec_chip
440 *
441 * This is called when we have received an END_TRANS on a RX transfer.
442 */
443static void nvec_rx_completed(struct nvec_chip *nvec)
444{
445    if (nvec->rx->pos != nvec_msg_size(nvec->rx)) {
446        dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n",
447               (uint) nvec_msg_size(nvec->rx),
448               (uint) nvec->rx->pos);
449
450        nvec_msg_free(nvec, nvec->rx);
451        nvec->state = 0;
452
453        /* Battery quirk - Often incomplete, and likes to crash */
454        if (nvec->rx->data[0] == NVEC_BAT)
455            complete(&nvec->ec_transfer);
456
457        return;
458    }
459
460    spin_lock(&nvec->rx_lock);
461
462    /* add the received data to the work list
463       and move the ring buffer pointer to the next entry */
464    list_add_tail(&nvec->rx->node, &nvec->rx_data);
465
466    spin_unlock(&nvec->rx_lock);
467
468    nvec->state = 0;
469
470    if (!nvec_msg_is_event(nvec->rx))
471        complete(&nvec->ec_transfer);
472
473    queue_work(nvec->wq, &nvec->rx_work);
474}
475
476/**
477 * nvec_invalid_flags - Send an error message about invalid flags and jump
478 * @nvec: The nvec device
479 * @status: The status flags
480 * @reset: Whether we shall jump to state 0.
481 */
482static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status,
483                   bool reset)
484{
485    dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n",
486        status, nvec->state);
487    if (reset)
488        nvec->state = 0;
489}
490
491/**
492 * nvec_tx_set - Set the message to transfer (nvec->tx)
493 * @nvec: A &struct nvec_chip
494 *
495 * Gets the first entry from the tx_data list of @nvec and sets the
496 * tx member to it. If the tx_data list is empty, this uses the
497 * tx_scratch message to send a no operation message.
498 */
499static void nvec_tx_set(struct nvec_chip *nvec)
500{
501    spin_lock(&nvec->tx_lock);
502    if (list_empty(&nvec->tx_data)) {
503        dev_err(nvec->dev, "empty tx - sending no-op\n");
504        memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3);
505        nvec->tx_scratch.size = 3;
506        nvec->tx_scratch.pos = 0;
507        nvec->tx = &nvec->tx_scratch;
508        list_add_tail(&nvec->tx->node, &nvec->tx_data);
509    } else {
510        nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg,
511                        node);
512        nvec->tx->pos = 0;
513    }
514    spin_unlock(&nvec->tx_lock);
515
516    dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n",
517        (uint)nvec->tx->size, nvec->tx->data[1]);
518}
519
520/**
521 * nvec_interrupt - Interrupt handler
522 * @irq: The IRQ
523 * @dev: The nvec device
524 *
525 * Interrupt handler that fills our RX buffers and empties our TX
526 * buffers. This uses a finite state machine with ridiculous amounts
527 * of error checking, in order to be fairly reliable.
528 */
529static irqreturn_t nvec_interrupt(int irq, void *dev)
530{
531    unsigned long status;
532    unsigned int received = 0;
533    unsigned char to_send = 0xff;
534    const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW;
535    struct nvec_chip *nvec = dev;
536    unsigned int state = nvec->state;
537
538    status = readl(nvec->base + I2C_SL_STATUS);
539
540    /* Filter out some errors */
541    if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) {
542        dev_err(nvec->dev, "unexpected irq mask %lx\n", status);
543        return IRQ_HANDLED;
544    }
545    if ((status & I2C_SL_IRQ) == 0) {
546        dev_err(nvec->dev, "Spurious IRQ\n");
547        return IRQ_HANDLED;
548    }
549
550    /* The EC did not request a read, so it send us something, read it */
551    if ((status & RNW) == 0) {
552        received = readl(nvec->base + I2C_SL_RCVD);
553        if (status & RCVD)
554            writel(0, nvec->base + I2C_SL_RCVD);
555    }
556
557    if (status == (I2C_SL_IRQ | RCVD))
558        nvec->state = 0;
559
560    switch (nvec->state) {
561    case 0: /* Verify that its a transfer start, the rest later */
562        if (status != (I2C_SL_IRQ | RCVD))
563            nvec_invalid_flags(nvec, status, false);
564        break;
565    case 1: /* command byte */
566        if (status != I2C_SL_IRQ) {
567            nvec_invalid_flags(nvec, status, true);
568        } else {
569            nvec->rx = nvec_msg_alloc(nvec, NVEC_MSG_RX);
570            /* Should not happen in a normal world */
571            if (unlikely(nvec->rx == NULL)) {
572                nvec->state = 0;
573                break;
574            }
575            nvec->rx->data[0] = received;
576            nvec->rx->pos = 1;
577            nvec->state = 2;
578        }
579        break;
580    case 2: /* first byte after command */
581        if (status == (I2C_SL_IRQ | RNW | RCVD)) {
582            udelay(33);
583            if (nvec->rx->data[0] != 0x01) {
584                dev_err(nvec->dev,
585                    "Read without prior read command\n");
586                nvec->state = 0;
587                break;
588            }
589            nvec_msg_free(nvec, nvec->rx);
590            nvec->state = 3;
591            nvec_tx_set(nvec);
592            BUG_ON(nvec->tx->size < 1);
593            to_send = nvec->tx->data[0];
594            nvec->tx->pos = 1;
595        } else if (status == (I2C_SL_IRQ)) {
596            BUG_ON(nvec->rx == NULL);
597            nvec->rx->data[1] = received;
598            nvec->rx->pos = 2;
599            nvec->state = 4;
600        } else {
601            nvec_invalid_flags(nvec, status, true);
602        }
603        break;
604    case 3: /* EC does a block read, we transmit data */
605        if (status & END_TRANS) {
606            nvec_tx_completed(nvec);
607        } else if ((status & RNW) == 0 || (status & RCVD)) {
608            nvec_invalid_flags(nvec, status, true);
609        } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) {
610            to_send = nvec->tx->data[nvec->tx->pos++];
611        } else {
612            dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n",
613                nvec->tx,
614                (uint) (nvec->tx ? nvec->tx->pos : 0),
615                (uint) (nvec->tx ? nvec->tx->size : 0));
616            nvec->state = 0;
617        }
618        break;
619    case 4: /* EC does some write, we read the data */
620        if ((status & (END_TRANS | RNW)) == END_TRANS)
621            nvec_rx_completed(nvec);
622        else if (status & (RNW | RCVD))
623            nvec_invalid_flags(nvec, status, true);
624        else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE)
625            nvec->rx->data[nvec->rx->pos++] = received;
626        else
627            dev_err(nvec->dev,
628                "RX buffer overflow on %p: "
629                "Trying to write byte %u of %u\n",
630                nvec->rx, nvec->rx->pos, NVEC_MSG_SIZE);
631        break;
632    default:
633        nvec->state = 0;
634    }
635
636    /* If we are told that a new transfer starts, verify it */
637    if ((status & (RCVD | RNW)) == RCVD) {
638        if (received != nvec->i2c_addr)
639            dev_err(nvec->dev,
640            "received address 0x%02x, expected 0x%02x\n",
641            received, nvec->i2c_addr);
642        nvec->state = 1;
643    }
644
645    /* Send data if requested, but not on end of transmission */
646    if ((status & (RNW | END_TRANS)) == RNW)
647        writel(to_send, nvec->base + I2C_SL_RCVD);
648
649    /* If we have send the first byte */
650    if (status == (I2C_SL_IRQ | RNW | RCVD))
651        nvec_gpio_set_value(nvec, 1);
652
653    dev_dbg(nvec->dev,
654        "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n",
655        (status & RNW) == 0 ? "received" : "R=",
656        received,
657        (status & (RNW | END_TRANS)) ? "sent" : "S=",
658        to_send,
659        state,
660        status & END_TRANS ? " END_TRANS" : "",
661        status & RCVD ? " RCVD" : "",
662        status & RNW ? " RNW" : "");
663
664
665    /*
666     * TODO: A correct fix needs to be found for this.
667     *
668     * We experience less incomplete messages with this delay than without
669     * it, but we don't know why. Help is appreciated.
670     */
671    udelay(100);
672
673    return IRQ_HANDLED;
674}
675
676static void tegra_init_i2c_slave(struct nvec_chip *nvec)
677{
678    u32 val;
679
680    clk_prepare_enable(nvec->i2c_clk);
681
682    tegra_periph_reset_assert(nvec->i2c_clk);
683    udelay(2);
684    tegra_periph_reset_deassert(nvec->i2c_clk);
685
686    val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN |
687        (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
688    writel(val, nvec->base + I2C_CNFG);
689
690    clk_set_rate(nvec->i2c_clk, 8 * 80000);
691
692    writel(I2C_SL_NEWSL, nvec->base + I2C_SL_CNFG);
693    writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT);
694
695    writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1);
696    writel(0, nvec->base + I2C_SL_ADDR2);
697
698    enable_irq(nvec->irq);
699
700    clk_disable_unprepare(nvec->i2c_clk);
701}
702
703#ifdef CONFIG_PM_SLEEP
704static void nvec_disable_i2c_slave(struct nvec_chip *nvec)
705{
706    disable_irq(nvec->irq);
707    writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG);
708    clk_disable_unprepare(nvec->i2c_clk);
709}
710#endif
711
712static void nvec_power_off(void)
713{
714    nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3);
715    nvec_write_async(nvec_power_handle, "\x04\x01", 2);
716}
717
718static int __devinit tegra_nvec_probe(struct platform_device *pdev)
719{
720    int err, ret;
721    struct clk *i2c_clk;
722    struct nvec_platform_data *pdata = pdev->dev.platform_data;
723    struct nvec_chip *nvec;
724    struct nvec_msg *msg;
725    struct resource *res;
726    void __iomem *base;
727
728    nvec = devm_kzalloc(&pdev->dev, sizeof(struct nvec_chip), GFP_KERNEL);
729    if (nvec == NULL) {
730        dev_err(&pdev->dev, "failed to reserve memory\n");
731        return -ENOMEM;
732    }
733    platform_set_drvdata(pdev, nvec);
734    nvec->dev = &pdev->dev;
735
736    if (pdata) {
737        nvec->gpio = pdata->gpio;
738        nvec->i2c_addr = pdata->i2c_addr;
739    } else if (nvec->dev->of_node) {
740        nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios", 0);
741        if (nvec->gpio < 0) {
742            dev_err(&pdev->dev, "no gpio specified");
743            return -ENODEV;
744        }
745        if (of_property_read_u32(nvec->dev->of_node, "slave-addr", &nvec->i2c_addr)) {
746            dev_err(&pdev->dev, "no i2c address specified");
747            return -ENODEV;
748        }
749    } else {
750        dev_err(&pdev->dev, "no platform data\n");
751        return -ENODEV;
752    }
753
754    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
755    if (!res) {
756        dev_err(&pdev->dev, "no mem resource?\n");
757        return -ENODEV;
758    }
759
760    base = devm_request_and_ioremap(&pdev->dev, res);
761    if (!base) {
762        dev_err(&pdev->dev, "Can't ioremap I2C region\n");
763        return -ENOMEM;
764    }
765
766    res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
767    if (!res) {
768        dev_err(&pdev->dev, "no irq resource?\n");
769        return -ENODEV;
770    }
771
772    i2c_clk = clk_get_sys("tegra-i2c.2", NULL);
773    if (IS_ERR(i2c_clk)) {
774        dev_err(nvec->dev, "failed to get controller clock\n");
775        return -ENODEV;
776    }
777
778    nvec->base = base;
779    nvec->irq = res->start;
780    nvec->i2c_clk = i2c_clk;
781    nvec->rx = &nvec->msg_pool[0];
782
783    ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list);
784
785    init_completion(&nvec->sync_write);
786    init_completion(&nvec->ec_transfer);
787    mutex_init(&nvec->sync_write_mutex);
788    spin_lock_init(&nvec->tx_lock);
789    spin_lock_init(&nvec->rx_lock);
790    INIT_LIST_HEAD(&nvec->rx_data);
791    INIT_LIST_HEAD(&nvec->tx_data);
792    INIT_WORK(&nvec->rx_work, nvec_dispatch);
793    INIT_WORK(&nvec->tx_work, nvec_request_master);
794    nvec->wq = alloc_workqueue("nvec", WQ_NON_REENTRANT, 2);
795
796    err = devm_gpio_request_one(&pdev->dev, nvec->gpio, GPIOF_OUT_INIT_HIGH,
797                    "nvec gpio");
798    if (err < 0) {
799        dev_err(nvec->dev, "couldn't request gpio\n");
800        destroy_workqueue(nvec->wq);
801        return -ENODEV;
802    }
803
804    err = devm_request_irq(&pdev->dev, nvec->irq, nvec_interrupt, 0,
805                "nvec", nvec);
806    if (err) {
807        dev_err(nvec->dev, "couldn't request irq\n");
808        destroy_workqueue(nvec->wq);
809        return -ENODEV;
810    }
811    disable_irq(nvec->irq);
812
813    tegra_init_i2c_slave(nvec);
814
815    clk_prepare_enable(i2c_clk);
816
817
818    /* enable event reporting */
819    nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING,
820             sizeof(EC_ENABLE_EVENT_REPORTING));
821
822    nvec->nvec_status_notifier.notifier_call = nvec_status_notifier;
823    nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0);
824
825    nvec_power_handle = nvec;
826    pm_power_off = nvec_power_off;
827
828    /* Get Firmware Version */
829    msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION,
830        sizeof(EC_GET_FIRMWARE_VERSION));
831
832    if (msg) {
833        dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n",
834            msg->data[4], msg->data[5], msg->data[6], msg->data[7]);
835
836        nvec_msg_free(nvec, msg);
837    }
838
839    ret = mfd_add_devices(nvec->dev, -1, nvec_devices,
840                  ARRAY_SIZE(nvec_devices), base, 0, NULL);
841    if (ret)
842        dev_err(nvec->dev, "error adding subdevices\n");
843
844    /* unmute speakers? */
845    nvec_write_async(nvec, "\x0d\x10\x59\x95", 4);
846
847    /* enable lid switch event */
848    nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7);
849
850    /* enable power button event */
851    nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7);
852
853    return 0;
854}
855
856static int __devexit tegra_nvec_remove(struct platform_device *pdev)
857{
858    struct nvec_chip *nvec = platform_get_drvdata(pdev);
859
860    nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3);
861    mfd_remove_devices(nvec->dev);
862    destroy_workqueue(nvec->wq);
863
864    return 0;
865}
866
867#ifdef CONFIG_PM_SLEEP
868static int nvec_suspend(struct device *dev)
869{
870    struct platform_device *pdev = to_platform_device(dev);
871    struct nvec_chip *nvec = platform_get_drvdata(pdev);
872    struct nvec_msg *msg;
873
874    dev_dbg(nvec->dev, "suspending\n");
875
876    /* keep these sync or you'll break suspend */
877    msg = nvec_write_sync(nvec, EC_DISABLE_EVENT_REPORTING, 3);
878    nvec_msg_free(nvec, msg);
879    msg = nvec_write_sync(nvec, "\x04\x02", 2);
880    nvec_msg_free(nvec, msg);
881
882    nvec_disable_i2c_slave(nvec);
883
884    return 0;
885}
886
887static int nvec_resume(struct device *dev)
888{
889    struct platform_device *pdev = to_platform_device(dev);
890    struct nvec_chip *nvec = platform_get_drvdata(pdev);
891
892    dev_dbg(nvec->dev, "resuming\n");
893    tegra_init_i2c_slave(nvec);
894    nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3);
895
896    return 0;
897}
898#endif
899
900static const SIMPLE_DEV_PM_OPS(nvec_pm_ops, nvec_suspend, nvec_resume);
901
902/* Match table for of_platform binding */
903static const struct of_device_id nvidia_nvec_of_match[] __devinitconst = {
904    { .compatible = "nvidia,nvec", },
905    {},
906};
907MODULE_DEVICE_TABLE(of, nvidia_nvec_of_match);
908
909static struct platform_driver nvec_device_driver = {
910    .probe = tegra_nvec_probe,
911    .remove = __devexit_p(tegra_nvec_remove),
912    .driver = {
913        .name = "nvec",
914        .owner = THIS_MODULE,
915        .pm = &nvec_pm_ops,
916        .of_match_table = nvidia_nvec_of_match,
917    }
918};
919
920module_platform_driver(nvec_device_driver);
921
922MODULE_ALIAS("platform:nvec");
923MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface");
924MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>");
925MODULE_LICENSE("GPL");
926

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