Root/drivers/staging/winbond/wb35reg.c

1#include "wb35reg_f.h"
2
3#include <linux/usb.h>
4#include <linux/slab.h>
5
6extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
7
8/*
9 * true : read command process successfully
10 * false : register not support
11 * RegisterNo : start base
12 * pRegisterData : data point
13 * NumberOfData : number of register data
14 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
15 * NO_INCREMENT - Function will write data into the same register
16 */
17unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
18{
19    struct wb35_reg *reg = &pHwData->reg;
20    struct urb *urb = NULL;
21    struct wb35_reg_queue *reg_queue = NULL;
22    u16 UrbSize;
23    struct usb_ctrlrequest *dr;
24    u16 i, DataSize = NumberOfData * 4;
25
26    /* Module shutdown */
27    if (pHwData->SurpriseRemove)
28        return false;
29
30    /* Trying to use burst write function if use new hardware */
31    UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
32    reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
33    urb = usb_alloc_urb(0, GFP_ATOMIC);
34    if (urb && reg_queue) {
35        reg_queue->DIRECT = 2; /* burst write register */
36        reg_queue->INDEX = RegisterNo;
37        reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
38        memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
39        /* the function for reversing register data from little endian to big endian */
40        for (i = 0; i < NumberOfData ; i++)
41            reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
42
43        dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
44        dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
45        dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
46        dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
47        dr->wIndex = cpu_to_le16(RegisterNo);
48        dr->wLength = cpu_to_le16(DataSize);
49        reg_queue->Next = NULL;
50        reg_queue->pUsbReq = dr;
51        reg_queue->urb = urb;
52
53        spin_lock_irq(&reg->EP0VM_spin_lock);
54        if (reg->reg_first == NULL)
55            reg->reg_first = reg_queue;
56        else
57            reg->reg_last->Next = reg_queue;
58        reg->reg_last = reg_queue;
59
60        spin_unlock_irq(&reg->EP0VM_spin_lock);
61
62        /* Start EP0VM */
63        Wb35Reg_EP0VM_start(pHwData);
64
65        return true;
66    } else {
67        if (urb)
68            usb_free_urb(urb);
69        kfree(reg_queue);
70        return false;
71    }
72   return false;
73}
74
75void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
76{
77    struct wb35_reg *reg = &pHwData->reg;
78    switch (RegisterNo) {
79    case 0x3b0: reg->U1B0 = RegisterValue; break;
80    case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
81    case 0x400: reg->D00_DmaControl = RegisterValue; break;
82    case 0x800: reg->M00_MacControl = RegisterValue; break;
83    case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
84    case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
85    case 0x824: reg->M24_MacControl = RegisterValue; break;
86    case 0x828: reg->M28_MacControl = RegisterValue; break;
87    case 0x82c: reg->M2C_MacControl = RegisterValue; break;
88    case 0x838: reg->M38_MacControl = RegisterValue; break;
89    case 0x840: reg->M40_MacControl = RegisterValue; break;
90    case 0x844: reg->M44_MacControl = RegisterValue; break;
91    case 0x848: reg->M48_MacControl = RegisterValue; break;
92    case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
93    case 0x860: reg->M60_MacControl = RegisterValue; break;
94    case 0x868: reg->M68_MacControl = RegisterValue; break;
95    case 0x870: reg->M70_MacControl = RegisterValue; break;
96    case 0x874: reg->M74_MacControl = RegisterValue; break;
97    case 0x878: reg->M78_ERPInformation = RegisterValue; break;
98    case 0x87C: reg->M7C_MacControl = RegisterValue; break;
99    case 0x880: reg->M80_MacControl = RegisterValue; break;
100    case 0x884: reg->M84_MacControl = RegisterValue; break;
101    case 0x888: reg->M88_MacControl = RegisterValue; break;
102    case 0x898: reg->M98_MacControl = RegisterValue; break;
103    case 0x100c: reg->BB0C = RegisterValue; break;
104    case 0x102c: reg->BB2C = RegisterValue; break;
105    case 0x1030: reg->BB30 = RegisterValue; break;
106    case 0x103c: reg->BB3C = RegisterValue; break;
107    case 0x1048: reg->BB48 = RegisterValue; break;
108    case 0x104c: reg->BB4C = RegisterValue; break;
109    case 0x1050: reg->BB50 = RegisterValue; break;
110    case 0x1054: reg->BB54 = RegisterValue; break;
111    case 0x1058: reg->BB58 = RegisterValue; break;
112    case 0x105c: reg->BB5C = RegisterValue; break;
113    case 0x1060: reg->BB60 = RegisterValue; break;
114    }
115}
116
117/*
118 * true : read command process successfully
119 * false : register not support
120 */
121unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
122{
123    struct wb35_reg *reg = &pHwData->reg;
124    int ret = -1;
125
126    /* Module shutdown */
127    if (pHwData->SurpriseRemove)
128        return false;
129
130    RegisterValue = cpu_to_le32(RegisterValue);
131
132    /* update the register by send usb message */
133    reg->SyncIoPause = 1;
134
135    /* Wait until EP0VM stop */
136    while (reg->EP0vm_state != VM_STOP)
137        msleep(10);
138
139    /* Sync IoCallDriver */
140    reg->EP0vm_state = VM_RUNNING;
141    ret = usb_control_msg(pHwData->udev,
142                   usb_sndctrlpipe(pHwData->udev, 0),
143                   0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
144                   0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
145    reg->EP0vm_state = VM_STOP;
146    reg->SyncIoPause = 0;
147
148    Wb35Reg_EP0VM_start(pHwData);
149
150    if (ret < 0) {
151        pr_debug("EP0 Write register usb message sending error\n");
152        pHwData->SurpriseRemove = 1;
153        return false;
154    }
155    return true;
156}
157
158/*
159 * true : read command process successfully
160 * false : register not support
161 */
162unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
163{
164    struct wb35_reg *reg = &pHwData->reg;
165    struct usb_ctrlrequest *dr;
166    struct urb *urb = NULL;
167    struct wb35_reg_queue *reg_queue = NULL;
168    u16 UrbSize;
169
170    /* Module shutdown */
171    if (pHwData->SurpriseRemove)
172        return false;
173
174    /* update the register by send urb request */
175    UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
176    reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
177    urb = usb_alloc_urb(0, GFP_ATOMIC);
178    if (urb && reg_queue) {
179        reg_queue->DIRECT = 1; /* burst write register */
180        reg_queue->INDEX = RegisterNo;
181        reg_queue->VALUE = cpu_to_le32(RegisterValue);
182        reg_queue->RESERVED_VALID = false;
183        dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
184        dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
185        dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
186        dr->wValue = cpu_to_le16(0x0);
187        dr->wIndex = cpu_to_le16(RegisterNo);
188        dr->wLength = cpu_to_le16(4);
189
190        /* Enter the sending queue */
191        reg_queue->Next = NULL;
192        reg_queue->pUsbReq = dr;
193        reg_queue->urb = urb;
194
195        spin_lock_irq(&reg->EP0VM_spin_lock);
196        if (reg->reg_first == NULL)
197            reg->reg_first = reg_queue;
198        else
199            reg->reg_last->Next = reg_queue;
200        reg->reg_last = reg_queue;
201
202        spin_unlock_irq(&reg->EP0VM_spin_lock);
203
204        /* Start EP0VM */
205        Wb35Reg_EP0VM_start(pHwData);
206
207        return true;
208    } else {
209        if (urb)
210            usb_free_urb(urb);
211        kfree(reg_queue);
212        return false;
213    }
214}
215
216/*
217 * This command will be executed with a user defined value. When it completes,
218 * this value is useful. For example, hal_set_current_channel will use it.
219 * true : read command process successfully
220 * false : register not support
221 */
222unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
223                        u16 RegisterNo,
224                        u32 RegisterValue,
225                        s8 *pValue,
226                        s8 Len)
227{
228    struct wb35_reg *reg = &pHwData->reg;
229    struct usb_ctrlrequest *dr;
230    struct urb *urb = NULL;
231    struct wb35_reg_queue *reg_queue = NULL;
232    u16 UrbSize;
233
234    /* Module shutdown */
235    if (pHwData->SurpriseRemove)
236        return false;
237
238    /* update the register by send urb request */
239    UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
240    reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
241    urb = usb_alloc_urb(0, GFP_ATOMIC);
242    if (urb && reg_queue) {
243        reg_queue->DIRECT = 1; /* burst write register */
244        reg_queue->INDEX = RegisterNo;
245        reg_queue->VALUE = cpu_to_le32(RegisterValue);
246        /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
247        memcpy(reg_queue->RESERVED, pValue, Len);
248        reg_queue->RESERVED_VALID = true;
249        dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
250        dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
251        dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
252        dr->wValue = cpu_to_le16(0x0);
253        dr->wIndex = cpu_to_le16(RegisterNo);
254        dr->wLength = cpu_to_le16(4);
255
256        /* Enter the sending queue */
257        reg_queue->Next = NULL;
258        reg_queue->pUsbReq = dr;
259        reg_queue->urb = urb;
260        spin_lock_irq(&reg->EP0VM_spin_lock);
261        if (reg->reg_first == NULL)
262            reg->reg_first = reg_queue;
263        else
264            reg->reg_last->Next = reg_queue;
265        reg->reg_last = reg_queue;
266
267        spin_unlock_irq(&reg->EP0VM_spin_lock);
268
269        /* Start EP0VM */
270        Wb35Reg_EP0VM_start(pHwData);
271        return true;
272    } else {
273        if (urb)
274            usb_free_urb(urb);
275        kfree(reg_queue);
276        return false;
277    }
278}
279
280/*
281 * true : read command process successfully
282 * false : register not support
283 * pRegisterValue : It must be a resident buffer due to
284 * asynchronous read register.
285 */
286unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
287{
288    struct wb35_reg *reg = &pHwData->reg;
289    u32 *pltmp = pRegisterValue;
290    int ret = -1;
291
292    /* Module shutdown */
293    if (pHwData->SurpriseRemove)
294        return false;
295
296    /* Read the register by send usb message */
297    reg->SyncIoPause = 1;
298
299    /* Wait until EP0VM stop */
300    while (reg->EP0vm_state != VM_STOP)
301        msleep(10);
302
303    reg->EP0vm_state = VM_RUNNING;
304    ret = usb_control_msg(pHwData->udev,
305                   usb_rcvctrlpipe(pHwData->udev, 0),
306                   0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
307                   0x0, RegisterNo, pltmp, 4, HZ * 100);
308
309    *pRegisterValue = cpu_to_le32(*pltmp);
310
311    reg->EP0vm_state = VM_STOP;
312
313    Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
314    reg->SyncIoPause = 0;
315
316    Wb35Reg_EP0VM_start(pHwData);
317
318    if (ret < 0) {
319        pr_debug("EP0 Read register usb message sending error\n");
320        pHwData->SurpriseRemove = 1;
321        return false;
322    }
323    return true;
324}
325
326/*
327 * true : read command process successfully
328 * false : register not support
329 * pRegisterValue : It must be a resident buffer due to
330 * asynchronous read register.
331 */
332unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
333{
334    struct wb35_reg *reg = &pHwData->reg;
335    struct usb_ctrlrequest *dr;
336    struct urb *urb;
337    struct wb35_reg_queue *reg_queue;
338    u16 UrbSize;
339
340    /* Module shutdown */
341    if (pHwData->SurpriseRemove)
342        return false;
343
344    /* update the variable by send Urb to read register */
345    UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
346    reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
347    urb = usb_alloc_urb(0, GFP_ATOMIC);
348    if (urb && reg_queue) {
349        reg_queue->DIRECT = 0; /* read register */
350        reg_queue->INDEX = RegisterNo;
351        reg_queue->pBuffer = pRegisterValue;
352        dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
353        dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
354        dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
355        dr->wValue = cpu_to_le16(0x0);
356        dr->wIndex = cpu_to_le16(RegisterNo);
357        dr->wLength = cpu_to_le16(4);
358
359        /* Enter the sending queue */
360        reg_queue->Next = NULL;
361        reg_queue->pUsbReq = dr;
362        reg_queue->urb = urb;
363        spin_lock_irq(&reg->EP0VM_spin_lock);
364        if (reg->reg_first == NULL)
365            reg->reg_first = reg_queue;
366        else
367            reg->reg_last->Next = reg_queue;
368        reg->reg_last = reg_queue;
369
370        spin_unlock_irq(&reg->EP0VM_spin_lock);
371
372        /* Start EP0VM */
373        Wb35Reg_EP0VM_start(pHwData);
374
375        return true;
376    } else {
377        if (urb)
378            usb_free_urb(urb);
379        kfree(reg_queue);
380        return false;
381    }
382}
383
384
385void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
386{
387    struct wb35_reg *reg = &pHwData->reg;
388
389    if (atomic_inc_return(&reg->RegFireCount) == 1) {
390        reg->EP0vm_state = VM_RUNNING;
391        Wb35Reg_EP0VM(pHwData);
392    } else
393        atomic_dec(&reg->RegFireCount);
394}
395
396void Wb35Reg_EP0VM(struct hw_data *pHwData)
397{
398    struct wb35_reg *reg = &pHwData->reg;
399    struct urb *urb;
400    struct usb_ctrlrequest *dr;
401    u32 *pBuffer;
402    int ret = -1;
403    struct wb35_reg_queue *reg_queue;
404
405
406    if (reg->SyncIoPause)
407        goto cleanup;
408
409    if (pHwData->SurpriseRemove)
410        goto cleanup;
411
412    /* Get the register data and send to USB through Irp */
413    spin_lock_irq(&reg->EP0VM_spin_lock);
414    reg_queue = reg->reg_first;
415    spin_unlock_irq(&reg->EP0VM_spin_lock);
416
417    if (!reg_queue)
418        goto cleanup;
419
420    /* Get an Urb, send it */
421    urb = (struct urb *)reg_queue->urb;
422
423    dr = reg_queue->pUsbReq;
424    urb = reg_queue->urb;
425    pBuffer = reg_queue->pBuffer;
426    if (reg_queue->DIRECT == 1) /* output */
427        pBuffer = &reg_queue->VALUE;
428
429    usb_fill_control_urb(urb, pHwData->udev,
430                  REG_DIRECTION(pHwData->udev, reg_queue),
431                  (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
432                  Wb35Reg_EP0VM_complete, (void *)pHwData);
433
434    reg->EP0vm_state = VM_RUNNING;
435
436    ret = usb_submit_urb(urb, GFP_ATOMIC);
437
438    if (ret < 0) {
439        pr_debug("EP0 Irp sending error\n");
440        goto cleanup;
441    }
442    return;
443
444 cleanup:
445    reg->EP0vm_state = VM_STOP;
446    atomic_dec(&reg->RegFireCount);
447}
448
449
450void Wb35Reg_EP0VM_complete(struct urb *urb)
451{
452    struct hw_data *pHwData = (struct hw_data *)urb->context;
453    struct wb35_reg *reg = &pHwData->reg;
454    struct wb35_reg_queue *reg_queue;
455
456
457    /* Variable setting */
458    reg->EP0vm_state = VM_COMPLETED;
459    reg->EP0VM_status = urb->status;
460
461    if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
462        reg->EP0vm_state = VM_STOP;
463        atomic_dec(&reg->RegFireCount);
464    } else {
465        /* Complete to send, remove the URB from the first */
466        spin_lock_irq(&reg->EP0VM_spin_lock);
467        reg_queue = reg->reg_first;
468        if (reg_queue == reg->reg_last)
469            reg->reg_last = NULL;
470        reg->reg_first = reg->reg_first->Next;
471        spin_unlock_irq(&reg->EP0VM_spin_lock);
472
473        if (reg->EP0VM_status) {
474            pr_debug("EP0 IoCompleteRoutine return error\n");
475            reg->EP0vm_state = VM_STOP;
476            pHwData->SurpriseRemove = 1;
477        } else {
478            /* Success. Update the result */
479
480            /* Start the next send */
481            Wb35Reg_EP0VM(pHwData);
482        }
483
484        kfree(reg_queue);
485    }
486
487    usb_free_urb(urb);
488}
489
490
491void Wb35Reg_destroy(struct hw_data *pHwData)
492{
493    struct wb35_reg *reg = &pHwData->reg;
494    struct urb *urb;
495    struct wb35_reg_queue *reg_queue;
496
497    Uxx_power_off_procedure(pHwData);
498
499    /* Wait for Reg operation completed */
500    do {
501        msleep(10); /* Delay for waiting function enter */
502    } while (reg->EP0vm_state != VM_STOP);
503    msleep(10); /* Delay for waiting function enter */
504
505    /* Release all the data in RegQueue */
506    spin_lock_irq(&reg->EP0VM_spin_lock);
507    reg_queue = reg->reg_first;
508    while (reg_queue) {
509        if (reg_queue == reg->reg_last)
510            reg->reg_last = NULL;
511        reg->reg_first = reg->reg_first->Next;
512
513        urb = reg_queue->urb;
514        spin_unlock_irq(&reg->EP0VM_spin_lock);
515        if (urb) {
516            usb_free_urb(urb);
517            kfree(reg_queue);
518        } else {
519            pr_debug("EP0 queue release error\n");
520        }
521        spin_lock_irq(&reg->EP0VM_spin_lock);
522
523        reg_queue = reg->reg_first;
524    }
525    spin_unlock_irq(&reg->EP0VM_spin_lock);
526}
527
528/*
529 * =======================================================================
530 * The function can be run in passive-level only.
531 * =========================================================================
532 */
533unsigned char Wb35Reg_initial(struct hw_data *pHwData)
534{
535    struct wb35_reg *reg = &pHwData->reg;
536    u32 ltmp;
537    u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
538
539    /* Spin lock is acquired for read and write IRP command */
540    spin_lock_init(&reg->EP0VM_spin_lock);
541
542    /* Getting RF module type from EEPROM */
543    Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
544    Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
545
546    /* Update RF module type and determine the PHY type by inf or EEPROM */
547    reg->EEPROMPhyType = (u8)(ltmp & 0xff);
548    /*
549     * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
550     * 16V AL2230, 17 - AL7230, 18 - AL2230S
551     * 32 Reserved
552     * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
553     */
554    if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
555        if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
556            (reg->EEPROMPhyType == RF_MAXIM_2827) ||
557            (reg->EEPROMPhyType == RF_MAXIM_2828) ||
558            (reg->EEPROMPhyType == RF_MAXIM_2829) ||
559            (reg->EEPROMPhyType == RF_MAXIM_V1) ||
560            (reg->EEPROMPhyType == RF_AIROHA_2230) ||
561            (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
562            (reg->EEPROMPhyType == RF_AIROHA_7230) ||
563            (reg->EEPROMPhyType == RF_WB_242) ||
564            (reg->EEPROMPhyType == RF_WB_242_1))
565            pHwData->phy_type = reg->EEPROMPhyType;
566    }
567
568    /* Power On procedure running. The relative parameter will be set according to phy_type */
569    Uxx_power_on_procedure(pHwData);
570
571    /* Reading MAC address */
572    Uxx_ReadEthernetAddress(pHwData);
573
574    /* Read VCO trim for RF parameter */
575    Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
576    Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
577
578    /* Read Antenna On/Off of software flag */
579    Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
580    Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
581
582    /* Read TXVGA */
583    Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
584    Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
585
586    /* Get Scan interval setting from EEPROM offset 0x1c */
587    Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
588    Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
589
590    /* Update Ethernet address */
591    memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
592
593    /* Update software variable */
594    pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
595    TxVga &= 0x000000ff;
596    pHwData->PowerIndexFromEEPROM = (u8)TxVga;
597    pHwData->VCO_trim = (u8)VCO_trim & 0xff;
598    if (pHwData->VCO_trim == 0xff)
599        pHwData->VCO_trim = 0x28;
600
601    reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
602    if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
603        reg->EEPROMRegion = REGION_AUTO;
604
605    /* For Get Tx VGA from EEPROM */
606    GetTxVgaFromEEPROM(pHwData);
607
608    /* Set Scan Interval */
609    pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
610    if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
611        pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
612
613    /* Initial register */
614    RFSynthesizer_initial(pHwData);
615
616    BBProcessor_initial(pHwData); /* Async write, must wait until complete */
617
618    Wb35Reg_phy_calibration(pHwData);
619
620    Mxx_initial(pHwData);
621    Dxx_initial(pHwData);
622
623    if (pHwData->SurpriseRemove)
624        return false;
625    else
626        return true; /* Initial fail */
627}
628
629/*
630 * ================================================================
631 * CardComputeCrc --
632 *
633 * Description:
634 * Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
635 *
636 * Arguments:
637 * Buffer - the input buffer
638 * Length - the length of Buffer
639 *
640 * Return Value:
641 * The 32-bit CRC value.
642 * ===================================================================
643 */
644u32 CardComputeCrc(u8 *Buffer, u32 Length)
645{
646    u32 Crc, Carry;
647    u32 i, j;
648    u8 CurByte;
649
650    Crc = 0xffffffff;
651
652    for (i = 0; i < Length; i++) {
653        CurByte = Buffer[i];
654        for (j = 0; j < 8; j++) {
655            Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
656            Crc <<= 1;
657            CurByte >>= 1;
658            if (Carry)
659                Crc = (Crc ^ 0x04c11db6) | Carry;
660        }
661    }
662    return Crc;
663}
664
665
666/*
667 * ==================================================================
668 * BitReverse --
669 * Reverse the bits in the input argument, dwData, which is
670 * regarded as a string of bits with the length, DataLength.
671 *
672 * Arguments:
673 * dwData :
674 * DataLength :
675 *
676 * Return:
677 * The converted value.
678 * ==================================================================
679 */
680u32 BitReverse(u32 dwData, u32 DataLength)
681{
682    u32 HalfLength, i, j;
683    u32 BitA, BitB;
684
685    if (DataLength <= 0)
686        return 0; /* No conversion is done. */
687    dwData = dwData & (0xffffffff >> (32 - DataLength));
688
689    HalfLength = DataLength / 2;
690    for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
691        BitA = GetBit(dwData, i);
692        BitB = GetBit(dwData, j);
693        if (BitA && !BitB) {
694            dwData = ClearBit(dwData, i);
695            dwData = SetBit(dwData, j);
696        } else if (!BitA && BitB) {
697            dwData = SetBit(dwData, i);
698            dwData = ClearBit(dwData, j);
699        } else {
700            /* Do nothing since these two bits are of the save values. */
701        }
702    }
703    return dwData;
704}
705
706void Wb35Reg_phy_calibration(struct hw_data *pHwData)
707{
708    u32 BB3c, BB54;
709
710    if ((pHwData->phy_type == RF_WB_242) ||
711        (pHwData->phy_type == RF_WB_242_1)) {
712        phy_calibration_winbond(pHwData, 2412); /* Sync operation */
713        Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
714        Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
715
716        pHwData->BB3c_cal = BB3c;
717        pHwData->BB54_cal = BB54;
718
719        RFSynthesizer_initial(pHwData);
720        BBProcessor_initial(pHwData); /* Async operation */
721
722        Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
723        Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
724    }
725}
726
727
728

Archive Download this file



interactive