Root/
| 1 | menu "TI VLYNQ" |
| 2 | depends on AR7 && EXPERIMENTAL |
| 3 | |
| 4 | config VLYNQ |
| 5 | bool "TI VLYNQ bus support" |
| 6 | help |
| 7 | Support for Texas Instruments(R) VLYNQ bus. |
| 8 | The VLYNQ bus is a high-speed, serial and packetized |
| 9 | data bus which allows external peripherals of a SoC |
| 10 | to appear into the system's main memory. |
| 11 | |
| 12 | If unsure, say N |
| 13 | |
| 14 | config VLYNQ_DEBUG |
| 15 | bool "VLYNQ bus debug" |
| 16 | depends on VLYNQ && DEBUG_KERNEL |
| 17 | help |
| 18 | Turn on VLYNQ bus debugging. |
| 19 | |
| 20 | endmenu |
| 21 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9
