Root/drivers/watchdog/hpwdt.c

1/*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18#include <linux/device.h>
19#include <linux/fs.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/bitops.h>
23#include <linux/kernel.h>
24#include <linux/miscdevice.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/pci.h>
28#include <linux/pci_ids.h>
29#include <linux/types.h>
30#include <linux/uaccess.h>
31#include <linux/watchdog.h>
32#ifdef CONFIG_HPWDT_NMI_DECODING
33#include <linux/dmi.h>
34#include <linux/spinlock.h>
35#include <linux/nmi.h>
36#include <linux/kdebug.h>
37#include <linux/notifier.h>
38#include <asm/cacheflush.h>
39#endif /* CONFIG_HPWDT_NMI_DECODING */
40#include <asm/nmi.h>
41
42#define HPWDT_VERSION "1.3.0"
43#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
44#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
45#define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
46#define DEFAULT_MARGIN 30
47
48static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
49static unsigned int reload; /* the computed soft_margin */
50static bool nowayout = WATCHDOG_NOWAYOUT;
51static char expect_release;
52static unsigned long hpwdt_is_open;
53
54static void __iomem *pci_mem_addr; /* the PCI-memory address */
55static unsigned long __iomem *hpwdt_timer_reg;
56static unsigned long __iomem *hpwdt_timer_con;
57
58static DEFINE_PCI_DEVICE_TABLE(hpwdt_devices) = {
59    { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
60    { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
61    {0}, /* terminate list */
62};
63MODULE_DEVICE_TABLE(pci, hpwdt_devices);
64
65#ifdef CONFIG_HPWDT_NMI_DECODING
66#define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
67#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
68#define PCI_BIOS32_PARAGRAPH_LEN 16
69#define PCI_ROM_BASE1 0x000F0000
70#define ROM_SIZE 0x10000
71
72struct bios32_service_dir {
73    u32 signature;
74    u32 entry_point;
75    u8 revision;
76    u8 length;
77    u8 checksum;
78    u8 reserved[5];
79};
80
81/* type 212 */
82struct smbios_cru64_info {
83    u8 type;
84    u8 byte_length;
85    u16 handle;
86    u32 signature;
87    u64 physical_address;
88    u32 double_length;
89    u32 double_offset;
90};
91#define SMBIOS_CRU64_INFORMATION 212
92
93/* type 219 */
94struct smbios_proliant_info {
95    u8 type;
96    u8 byte_length;
97    u16 handle;
98    u32 power_features;
99    u32 omega_features;
100    u32 reserved;
101    u32 misc_features;
102};
103#define SMBIOS_ICRU_INFORMATION 219
104
105
106struct cmn_registers {
107    union {
108        struct {
109            u8 ral;
110            u8 rah;
111            u16 rea2;
112        };
113        u32 reax;
114    } u1;
115    union {
116        struct {
117            u8 rbl;
118            u8 rbh;
119            u8 reb2l;
120            u8 reb2h;
121        };
122        u32 rebx;
123    } u2;
124    union {
125        struct {
126            u8 rcl;
127            u8 rch;
128            u16 rec2;
129        };
130        u32 recx;
131    } u3;
132    union {
133        struct {
134            u8 rdl;
135            u8 rdh;
136            u16 red2;
137        };
138        u32 redx;
139    } u4;
140
141    u32 resi;
142    u32 redi;
143    u16 rds;
144    u16 res;
145    u32 reflags;
146} __attribute__((packed));
147
148static unsigned int hpwdt_nmi_decoding;
149static unsigned int allow_kdump = 1;
150static unsigned int is_icru;
151static DEFINE_SPINLOCK(rom_lock);
152static void *cru_rom_addr;
153static struct cmn_registers cmn_regs;
154
155extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
156                        unsigned long *pRomEntry);
157
158#ifdef CONFIG_X86_32
159/* --32 Bit Bios------------------------------------------------------------ */
160
161#define HPWDT_ARCH 32
162
163asm(".text \n\t"
164    ".align 4 \n"
165    "asminline_call: \n\t"
166    "pushl %ebp \n\t"
167    "movl %esp, %ebp \n\t"
168    "pusha \n\t"
169    "pushf \n\t"
170    "push %es \n\t"
171    "push %ds \n\t"
172    "pop %es \n\t"
173    "movl 8(%ebp),%eax \n\t"
174    "movl 4(%eax),%ebx \n\t"
175    "movl 8(%eax),%ecx \n\t"
176    "movl 12(%eax),%edx \n\t"
177    "movl 16(%eax),%esi \n\t"
178    "movl 20(%eax),%edi \n\t"
179    "movl (%eax),%eax \n\t"
180    "push %cs \n\t"
181    "call *12(%ebp) \n\t"
182    "pushf \n\t"
183    "pushl %eax \n\t"
184    "movl 8(%ebp),%eax \n\t"
185    "movl %ebx,4(%eax) \n\t"
186    "movl %ecx,8(%eax) \n\t"
187    "movl %edx,12(%eax) \n\t"
188    "movl %esi,16(%eax) \n\t"
189    "movl %edi,20(%eax) \n\t"
190    "movw %ds,24(%eax) \n\t"
191    "movw %es,26(%eax) \n\t"
192    "popl %ebx \n\t"
193    "movl %ebx,(%eax) \n\t"
194    "popl %ebx \n\t"
195    "movl %ebx,28(%eax) \n\t"
196    "pop %es \n\t"
197    "popf \n\t"
198    "popa \n\t"
199    "leave \n\t"
200    "ret \n\t"
201    ".previous");
202
203
204/*
205 * cru_detect
206 *
207 * Routine Description:
208 * This function uses the 32-bit BIOS Service Directory record to
209 * search for a $CRU record.
210 *
211 * Return Value:
212 * 0 : SUCCESS
213 * <0 : FAILURE
214 */
215static int __devinit cru_detect(unsigned long map_entry,
216    unsigned long map_offset)
217{
218    void *bios32_map;
219    unsigned long *bios32_entrypoint;
220    unsigned long cru_physical_address;
221    unsigned long cru_length;
222    unsigned long physical_bios_base = 0;
223    unsigned long physical_bios_offset = 0;
224    int retval = -ENODEV;
225
226    bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
227
228    if (bios32_map == NULL)
229        return -ENODEV;
230
231    bios32_entrypoint = bios32_map + map_offset;
232
233    cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
234
235    set_memory_x((unsigned long)bios32_map, 2);
236    asminline_call(&cmn_regs, bios32_entrypoint);
237
238    if (cmn_regs.u1.ral != 0) {
239        pr_warn("Call succeeded but with an error: 0x%x\n",
240            cmn_regs.u1.ral);
241    } else {
242        physical_bios_base = cmn_regs.u2.rebx;
243        physical_bios_offset = cmn_regs.u4.redx;
244        cru_length = cmn_regs.u3.recx;
245        cru_physical_address =
246            physical_bios_base + physical_bios_offset;
247
248        /* If the values look OK, then map it in. */
249        if ((physical_bios_base + physical_bios_offset)) {
250            cru_rom_addr =
251                ioremap(cru_physical_address, cru_length);
252            if (cru_rom_addr) {
253                set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
254                    (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
255                retval = 0;
256            }
257        }
258
259        pr_debug("CRU Base Address: 0x%lx\n", physical_bios_base);
260        pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
261        pr_debug("CRU Length: 0x%lx\n", cru_length);
262        pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
263    }
264    iounmap(bios32_map);
265    return retval;
266}
267
268/*
269 * bios_checksum
270 */
271static int __devinit bios_checksum(const char __iomem *ptr, int len)
272{
273    char sum = 0;
274    int i;
275
276    /*
277     * calculate checksum of size bytes. This should add up
278     * to zero if we have a valid header.
279     */
280    for (i = 0; i < len; i++)
281        sum += ptr[i];
282
283    return ((sum == 0) && (len > 0));
284}
285
286/*
287 * bios32_present
288 *
289 * Routine Description:
290 * This function finds the 32-bit BIOS Service Directory
291 *
292 * Return Value:
293 * 0 : SUCCESS
294 * <0 : FAILURE
295 */
296static int __devinit bios32_present(const char __iomem *p)
297{
298    struct bios32_service_dir *bios_32_ptr;
299    int length;
300    unsigned long map_entry, map_offset;
301
302    bios_32_ptr = (struct bios32_service_dir *) p;
303
304    /*
305     * Search for signature by checking equal to the swizzled value
306     * instead of calling another routine to perform a strcmp.
307     */
308    if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
309        length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
310        if (bios_checksum(p, length)) {
311            /*
312             * According to the spec, we're looking for the
313             * first 4KB-aligned address below the entrypoint
314             * listed in the header. The Service Directory code
315             * is guaranteed to occupy no more than 2 4KB pages.
316             */
317            map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
318            map_offset = bios_32_ptr->entry_point - map_entry;
319
320            return cru_detect(map_entry, map_offset);
321        }
322    }
323    return -ENODEV;
324}
325
326static int __devinit detect_cru_service(void)
327{
328    char __iomem *p, *q;
329    int rc = -1;
330
331    /*
332     * Search from 0x0f0000 through 0x0fffff, inclusive.
333     */
334    p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
335    if (p == NULL)
336        return -ENOMEM;
337
338    for (q = p; q < p + ROM_SIZE; q += 16) {
339        rc = bios32_present(q);
340        if (!rc)
341            break;
342    }
343    iounmap(p);
344    return rc;
345}
346/* ------------------------------------------------------------------------- */
347#endif /* CONFIG_X86_32 */
348#ifdef CONFIG_X86_64
349/* --64 Bit Bios------------------------------------------------------------ */
350
351#define HPWDT_ARCH 64
352
353asm(".text \n\t"
354    ".align 4 \n"
355    "asminline_call: \n\t"
356    "pushq %rbp \n\t"
357    "movq %rsp, %rbp \n\t"
358    "pushq %rax \n\t"
359    "pushq %rbx \n\t"
360    "pushq %rdx \n\t"
361    "pushq %r12 \n\t"
362    "pushq %r9 \n\t"
363    "movq %rsi, %r12 \n\t"
364    "movq %rdi, %r9 \n\t"
365    "movl 4(%r9),%ebx \n\t"
366    "movl 8(%r9),%ecx \n\t"
367    "movl 12(%r9),%edx \n\t"
368    "movl 16(%r9),%esi \n\t"
369    "movl 20(%r9),%edi \n\t"
370    "movl (%r9),%eax \n\t"
371    "call *%r12 \n\t"
372    "pushfq \n\t"
373    "popq %r12 \n\t"
374    "movl %eax, (%r9) \n\t"
375    "movl %ebx, 4(%r9) \n\t"
376    "movl %ecx, 8(%r9) \n\t"
377    "movl %edx, 12(%r9) \n\t"
378    "movl %esi, 16(%r9) \n\t"
379    "movl %edi, 20(%r9) \n\t"
380    "movq %r12, %rax \n\t"
381    "movl %eax, 28(%r9) \n\t"
382    "popq %r9 \n\t"
383    "popq %r12 \n\t"
384    "popq %rdx \n\t"
385    "popq %rbx \n\t"
386    "popq %rax \n\t"
387    "leave \n\t"
388    "ret \n\t"
389    ".previous");
390
391/*
392 * dmi_find_cru
393 *
394 * Routine Description:
395 * This function checks whether or not a SMBIOS/DMI record is
396 * the 64bit CRU info or not
397 */
398static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
399{
400    struct smbios_cru64_info *smbios_cru64_ptr;
401    unsigned long cru_physical_address;
402
403    if (dm->type == SMBIOS_CRU64_INFORMATION) {
404        smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
405        if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
406            cru_physical_address =
407                smbios_cru64_ptr->physical_address +
408                smbios_cru64_ptr->double_offset;
409            cru_rom_addr = ioremap(cru_physical_address,
410                smbios_cru64_ptr->double_length);
411            set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
412                smbios_cru64_ptr->double_length >> PAGE_SHIFT);
413        }
414    }
415}
416
417static int __devinit detect_cru_service(void)
418{
419    cru_rom_addr = NULL;
420
421    dmi_walk(dmi_find_cru, NULL);
422
423    /* if cru_rom_addr has been set then we found a CRU service */
424    return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
425}
426/* ------------------------------------------------------------------------- */
427#endif /* CONFIG_X86_64 */
428#endif /* CONFIG_HPWDT_NMI_DECODING */
429
430/*
431 * Watchdog operations
432 */
433static void hpwdt_start(void)
434{
435    reload = SECS_TO_TICKS(soft_margin);
436    iowrite16(reload, hpwdt_timer_reg);
437    iowrite8(0x85, hpwdt_timer_con);
438}
439
440static void hpwdt_stop(void)
441{
442    unsigned long data;
443
444    data = ioread8(hpwdt_timer_con);
445    data &= 0xFE;
446    iowrite8(data, hpwdt_timer_con);
447}
448
449static void hpwdt_ping(void)
450{
451    iowrite16(reload, hpwdt_timer_reg);
452}
453
454static int hpwdt_change_timer(int new_margin)
455{
456    if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
457        pr_warn("New value passed in is invalid: %d seconds\n",
458            new_margin);
459        return -EINVAL;
460    }
461
462    soft_margin = new_margin;
463    pr_debug("New timer passed in is %d seconds\n", new_margin);
464    reload = SECS_TO_TICKS(soft_margin);
465
466    return 0;
467}
468
469static int hpwdt_time_left(void)
470{
471    return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
472}
473
474#ifdef CONFIG_HPWDT_NMI_DECODING
475/*
476 * NMI Handler
477 */
478static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
479{
480    unsigned long rom_pl;
481    static int die_nmi_called;
482
483    if (!hpwdt_nmi_decoding)
484        goto out;
485
486    spin_lock_irqsave(&rom_lock, rom_pl);
487    if (!die_nmi_called && !is_icru)
488        asminline_call(&cmn_regs, cru_rom_addr);
489    die_nmi_called = 1;
490    spin_unlock_irqrestore(&rom_lock, rom_pl);
491
492    if (allow_kdump)
493        hpwdt_stop();
494
495    if (!is_icru) {
496        if (cmn_regs.u1.ral == 0) {
497            panic("An NMI occurred, "
498                "but unable to determine source.\n");
499        }
500    }
501    panic("An NMI occurred, please see the Integrated "
502        "Management Log for details.\n");
503
504out:
505    return NMI_DONE;
506}
507#endif /* CONFIG_HPWDT_NMI_DECODING */
508
509/*
510 * /dev/watchdog handling
511 */
512static int hpwdt_open(struct inode *inode, struct file *file)
513{
514    /* /dev/watchdog can only be opened once */
515    if (test_and_set_bit(0, &hpwdt_is_open))
516        return -EBUSY;
517
518    /* Start the watchdog */
519    hpwdt_start();
520    hpwdt_ping();
521
522    return nonseekable_open(inode, file);
523}
524
525static int hpwdt_release(struct inode *inode, struct file *file)
526{
527    /* Stop the watchdog */
528    if (expect_release == 42) {
529        hpwdt_stop();
530    } else {
531        pr_crit("Unexpected close, not stopping watchdog!\n");
532        hpwdt_ping();
533    }
534
535    expect_release = 0;
536
537    /* /dev/watchdog is being closed, make sure it can be re-opened */
538    clear_bit(0, &hpwdt_is_open);
539
540    return 0;
541}
542
543static ssize_t hpwdt_write(struct file *file, const char __user *data,
544    size_t len, loff_t *ppos)
545{
546    /* See if we got the magic character 'V' and reload the timer */
547    if (len) {
548        if (!nowayout) {
549            size_t i;
550
551            /* note: just in case someone wrote the magic character
552             * five months ago... */
553            expect_release = 0;
554
555            /* scan to see whether or not we got the magic char. */
556            for (i = 0; i != len; i++) {
557                char c;
558                if (get_user(c, data + i))
559                    return -EFAULT;
560                if (c == 'V')
561                    expect_release = 42;
562            }
563        }
564
565        /* someone wrote to us, we should reload the timer */
566        hpwdt_ping();
567    }
568
569    return len;
570}
571
572static const struct watchdog_info ident = {
573    .options = WDIOF_SETTIMEOUT |
574           WDIOF_KEEPALIVEPING |
575           WDIOF_MAGICCLOSE,
576    .identity = "HP iLO2+ HW Watchdog Timer",
577};
578
579static long hpwdt_ioctl(struct file *file, unsigned int cmd,
580    unsigned long arg)
581{
582    void __user *argp = (void __user *)arg;
583    int __user *p = argp;
584    int new_margin;
585    int ret = -ENOTTY;
586
587    switch (cmd) {
588    case WDIOC_GETSUPPORT:
589        ret = 0;
590        if (copy_to_user(argp, &ident, sizeof(ident)))
591            ret = -EFAULT;
592        break;
593
594    case WDIOC_GETSTATUS:
595    case WDIOC_GETBOOTSTATUS:
596        ret = put_user(0, p);
597        break;
598
599    case WDIOC_KEEPALIVE:
600        hpwdt_ping();
601        ret = 0;
602        break;
603
604    case WDIOC_SETTIMEOUT:
605        ret = get_user(new_margin, p);
606        if (ret)
607            break;
608
609        ret = hpwdt_change_timer(new_margin);
610        if (ret)
611            break;
612
613        hpwdt_ping();
614        /* Fall */
615    case WDIOC_GETTIMEOUT:
616        ret = put_user(soft_margin, p);
617        break;
618
619    case WDIOC_GETTIMELEFT:
620        ret = put_user(hpwdt_time_left(), p);
621        break;
622    }
623    return ret;
624}
625
626/*
627 * Kernel interfaces
628 */
629static const struct file_operations hpwdt_fops = {
630    .owner = THIS_MODULE,
631    .llseek = no_llseek,
632    .write = hpwdt_write,
633    .unlocked_ioctl = hpwdt_ioctl,
634    .open = hpwdt_open,
635    .release = hpwdt_release,
636};
637
638static struct miscdevice hpwdt_miscdev = {
639    .minor = WATCHDOG_MINOR,
640    .name = "watchdog",
641    .fops = &hpwdt_fops,
642};
643
644/*
645 * Init & Exit
646 */
647
648#ifdef CONFIG_HPWDT_NMI_DECODING
649#ifdef CONFIG_X86_LOCAL_APIC
650static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
651{
652    /*
653     * If nmi_watchdog is turned off then we can turn on
654     * our nmi decoding capability.
655     */
656    hpwdt_nmi_decoding = 1;
657}
658#else
659static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
660{
661    dev_warn(&dev->dev, "NMI decoding is disabled. "
662        "Your kernel does not support a NMI Watchdog.\n");
663}
664#endif /* CONFIG_X86_LOCAL_APIC */
665
666/*
667 * dmi_find_icru
668 *
669 * Routine Description:
670 * This function checks whether or not we are on an iCRU-based server.
671 * This check is independent of architecture and needs to be made for
672 * any ProLiant system.
673 */
674static void __devinit dmi_find_icru(const struct dmi_header *dm, void *dummy)
675{
676    struct smbios_proliant_info *smbios_proliant_ptr;
677
678    if (dm->type == SMBIOS_ICRU_INFORMATION) {
679        smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
680        if (smbios_proliant_ptr->misc_features & 0x01)
681            is_icru = 1;
682    }
683}
684
685static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
686{
687    int retval;
688
689    /*
690     * On typical CRU-based systems we need to map that service in
691     * the BIOS. For 32 bit Operating Systems we need to go through
692     * the 32 Bit BIOS Service Directory. For 64 bit Operating
693     * Systems we get that service through SMBIOS.
694     *
695     * On systems that support the new iCRU service all we need to
696     * do is call dmi_walk to get the supported flag value and skip
697     * the old cru detect code.
698     */
699    dmi_walk(dmi_find_icru, NULL);
700    if (!is_icru) {
701
702        /*
703        * We need to map the ROM to get the CRU service.
704        * For 32 bit Operating Systems we need to go through the 32 Bit
705        * BIOS Service Directory
706        * For 64 bit Operating Systems we get that service through SMBIOS.
707        */
708        retval = detect_cru_service();
709        if (retval < 0) {
710            dev_warn(&dev->dev,
711                "Unable to detect the %d Bit CRU Service.\n",
712                HPWDT_ARCH);
713            return retval;
714        }
715
716        /*
717        * We know this is the only CRU call we need to make so lets keep as
718        * few instructions as possible once the NMI comes in.
719        */
720        cmn_regs.u1.rah = 0x0D;
721        cmn_regs.u1.ral = 0x02;
722    }
723
724    /*
725     * Only one function can register for NMI_UNKNOWN
726     */
727    retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
728    if (retval)
729        goto error;
730    retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
731    if (retval)
732        goto error1;
733    retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
734    if (retval)
735        goto error2;
736
737    dev_info(&dev->dev,
738            "HP Watchdog Timer Driver: NMI decoding initialized"
739            ", allow kernel dump: %s (default = 0/OFF)\n",
740            (allow_kdump == 0) ? "OFF" : "ON");
741    return 0;
742
743error2:
744    unregister_nmi_handler(NMI_SERR, "hpwdt");
745error1:
746    unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
747error:
748    dev_warn(&dev->dev,
749        "Unable to register a die notifier (err=%d).\n",
750        retval);
751    if (cru_rom_addr)
752        iounmap(cru_rom_addr);
753    return retval;
754}
755
756static void hpwdt_exit_nmi_decoding(void)
757{
758    unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
759    unregister_nmi_handler(NMI_SERR, "hpwdt");
760    unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
761    if (cru_rom_addr)
762        iounmap(cru_rom_addr);
763}
764#else /* !CONFIG_HPWDT_NMI_DECODING */
765static void __devinit hpwdt_check_nmi_decoding(struct pci_dev *dev)
766{
767}
768
769static int __devinit hpwdt_init_nmi_decoding(struct pci_dev *dev)
770{
771    return 0;
772}
773
774static void hpwdt_exit_nmi_decoding(void)
775{
776}
777#endif /* CONFIG_HPWDT_NMI_DECODING */
778
779static int __devinit hpwdt_init_one(struct pci_dev *dev,
780                    const struct pci_device_id *ent)
781{
782    int retval;
783
784    /*
785     * Check if we can do NMI decoding or not
786     */
787    hpwdt_check_nmi_decoding(dev);
788
789    /*
790     * First let's find out if we are on an iLO2+ server. We will
791     * not run on a legacy ASM box.
792     * So we only support the G5 ProLiant servers and higher.
793     */
794    if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
795        dev_warn(&dev->dev,
796            "This server does not have an iLO2+ ASIC.\n");
797        return -ENODEV;
798    }
799
800    if (pci_enable_device(dev)) {
801        dev_warn(&dev->dev,
802            "Not possible to enable PCI Device: 0x%x:0x%x.\n",
803            ent->vendor, ent->device);
804        return -ENODEV;
805    }
806
807    pci_mem_addr = pci_iomap(dev, 1, 0x80);
808    if (!pci_mem_addr) {
809        dev_warn(&dev->dev,
810            "Unable to detect the iLO2+ server memory.\n");
811        retval = -ENOMEM;
812        goto error_pci_iomap;
813    }
814    hpwdt_timer_reg = pci_mem_addr + 0x70;
815    hpwdt_timer_con = pci_mem_addr + 0x72;
816
817    /* Make sure that timer is disabled until /dev/watchdog is opened */
818    hpwdt_stop();
819
820    /* Make sure that we have a valid soft_margin */
821    if (hpwdt_change_timer(soft_margin))
822        hpwdt_change_timer(DEFAULT_MARGIN);
823
824    /* Initialize NMI Decoding functionality */
825    retval = hpwdt_init_nmi_decoding(dev);
826    if (retval != 0)
827        goto error_init_nmi_decoding;
828
829    retval = misc_register(&hpwdt_miscdev);
830    if (retval < 0) {
831        dev_warn(&dev->dev,
832            "Unable to register miscdev on minor=%d (err=%d).\n",
833            WATCHDOG_MINOR, retval);
834        goto error_misc_register;
835    }
836
837    dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
838            ", timer margin: %d seconds (nowayout=%d).\n",
839            HPWDT_VERSION, soft_margin, nowayout);
840    return 0;
841
842error_misc_register:
843    hpwdt_exit_nmi_decoding();
844error_init_nmi_decoding:
845    pci_iounmap(dev, pci_mem_addr);
846error_pci_iomap:
847    pci_disable_device(dev);
848    return retval;
849}
850
851static void __devexit hpwdt_exit(struct pci_dev *dev)
852{
853    if (!nowayout)
854        hpwdt_stop();
855
856    misc_deregister(&hpwdt_miscdev);
857    hpwdt_exit_nmi_decoding();
858    pci_iounmap(dev, pci_mem_addr);
859    pci_disable_device(dev);
860}
861
862static struct pci_driver hpwdt_driver = {
863    .name = "hpwdt",
864    .id_table = hpwdt_devices,
865    .probe = hpwdt_init_one,
866    .remove = __devexit_p(hpwdt_exit),
867};
868
869MODULE_AUTHOR("Tom Mingarelli");
870MODULE_DESCRIPTION("hp watchdog driver");
871MODULE_LICENSE("GPL");
872MODULE_VERSION(HPWDT_VERSION);
873MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
874
875module_param(soft_margin, int, 0);
876MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
877
878module_param(nowayout, bool, 0);
879MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
880        __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
881
882#ifdef CONFIG_HPWDT_NMI_DECODING
883module_param(allow_kdump, int, 0);
884MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
885#endif /* !CONFIG_HPWDT_NMI_DECODING */
886
887module_pci_driver(hpwdt_driver);
888

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