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1 | #ifndef CCISS_CMD_H |
2 | #define CCISS_CMD_H |
3 | |
4 | #include <linux/cciss_defs.h> |
5 | |
6 | /* DEFINES */ |
7 | #define CISS_VERSION "1.00" |
8 | |
9 | /* general boundary definitions */ |
10 | #define MAXSGENTRIES 32 |
11 | #define CCISS_SG_CHAIN 0x80000000 |
12 | #define MAXREPLYQS 256 |
13 | |
14 | /* Unit Attentions ASC's as defined for the MSA2012sa */ |
15 | #define POWER_OR_RESET 0x29 |
16 | #define STATE_CHANGED 0x2a |
17 | #define UNIT_ATTENTION_CLEARED 0x2f |
18 | #define LUN_FAILED 0x3e |
19 | #define REPORT_LUNS_CHANGED 0x3f |
20 | |
21 | /* Unit Attentions ASCQ's as defined for the MSA2012sa */ |
22 | |
23 | /* These ASCQ's defined for ASC = POWER_OR_RESET */ |
24 | #define POWER_ON_RESET 0x00 |
25 | #define POWER_ON_REBOOT 0x01 |
26 | #define SCSI_BUS_RESET 0x02 |
27 | #define MSA_TARGET_RESET 0x03 |
28 | #define CONTROLLER_FAILOVER 0x04 |
29 | #define TRANSCEIVER_SE 0x05 |
30 | #define TRANSCEIVER_LVD 0x06 |
31 | |
32 | /* These ASCQ's defined for ASC = STATE_CHANGED */ |
33 | #define RESERVATION_PREEMPTED 0x03 |
34 | #define ASYM_ACCESS_CHANGED 0x06 |
35 | #define LUN_CAPACITY_CHANGED 0x09 |
36 | |
37 | /* config space register offsets */ |
38 | #define CFG_VENDORID 0x00 |
39 | #define CFG_DEVICEID 0x02 |
40 | #define CFG_I2OBAR 0x10 |
41 | #define CFG_MEM1BAR 0x14 |
42 | |
43 | /* i2o space register offsets */ |
44 | #define I2O_IBDB_SET 0x20 |
45 | #define I2O_IBDB_CLEAR 0x70 |
46 | #define I2O_INT_STATUS 0x30 |
47 | #define I2O_INT_MASK 0x34 |
48 | #define I2O_IBPOST_Q 0x40 |
49 | #define I2O_OBPOST_Q 0x44 |
50 | #define I2O_DMA1_CFG 0x214 |
51 | |
52 | /* Configuration Table */ |
53 | #define CFGTBL_ChangeReq 0x00000001l |
54 | #define CFGTBL_AccCmds 0x00000001l |
55 | #define DOORBELL_CTLR_RESET 0x00000004l |
56 | #define DOORBELL_CTLR_RESET2 0x00000020l |
57 | |
58 | #define CFGTBL_Trans_Simple 0x00000002l |
59 | #define CFGTBL_Trans_Performant 0x00000004l |
60 | #define CFGTBL_Trans_use_short_tags 0x20000000l |
61 | |
62 | #define CFGTBL_BusType_Ultra2 0x00000001l |
63 | #define CFGTBL_BusType_Ultra3 0x00000002l |
64 | #define CFGTBL_BusType_Fibre1G 0x00000100l |
65 | #define CFGTBL_BusType_Fibre2G 0x00000200l |
66 | typedef struct _vals32 |
67 | { |
68 | __u32 lower; |
69 | __u32 upper; |
70 | } vals32; |
71 | |
72 | typedef union _u64bit |
73 | { |
74 | vals32 val32; |
75 | __u64 val; |
76 | } u64bit; |
77 | |
78 | /* Type defs used in the following structs */ |
79 | #define QWORD vals32 |
80 | |
81 | /* STRUCTURES */ |
82 | #define CISS_MAX_PHYS_LUN 1024 |
83 | /* SCSI-3 Cmmands */ |
84 | |
85 | #pragma pack(1) |
86 | |
87 | #define CISS_INQUIRY 0x12 |
88 | /* Date returned */ |
89 | typedef struct _InquiryData_struct |
90 | { |
91 | BYTE data_byte[36]; |
92 | } InquiryData_struct; |
93 | |
94 | #define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */ |
95 | #define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */ |
96 | /* Data returned */ |
97 | typedef struct _ReportLUNdata_struct |
98 | { |
99 | BYTE LUNListLength[4]; |
100 | DWORD reserved; |
101 | BYTE LUN[CISS_MAX_LUN][8]; |
102 | } ReportLunData_struct; |
103 | |
104 | #define CCISS_READ_CAPACITY 0x25 /* Read Capacity */ |
105 | typedef struct _ReadCapdata_struct |
106 | { |
107 | BYTE total_size[4]; /* Total size in blocks */ |
108 | BYTE block_size[4]; /* Size of blocks in bytes */ |
109 | } ReadCapdata_struct; |
110 | |
111 | #define CCISS_READ_CAPACITY_16 0x9e /* Read Capacity 16 */ |
112 | |
113 | /* service action to differentiate a 16 byte read capacity from |
114 | other commands that use the 0x9e SCSI op code */ |
115 | |
116 | #define CCISS_READ_CAPACITY_16_SERVICE_ACT 0x10 |
117 | |
118 | typedef struct _ReadCapdata_struct_16 |
119 | { |
120 | BYTE total_size[8]; /* Total size in blocks */ |
121 | BYTE block_size[4]; /* Size of blocks in bytes */ |
122 | BYTE prot_en:1; /* protection enable bit */ |
123 | BYTE rto_en:1; /* reference tag own enable bit */ |
124 | BYTE reserved:6; /* reserved bits */ |
125 | BYTE reserved2[18]; /* reserved bytes per spec */ |
126 | } ReadCapdata_struct_16; |
127 | |
128 | /* Define the supported read/write commands for cciss based controllers */ |
129 | |
130 | #define CCISS_READ_10 0x28 /* Read(10) */ |
131 | #define CCISS_WRITE_10 0x2a /* Write(10) */ |
132 | #define CCISS_READ_16 0x88 /* Read(16) */ |
133 | #define CCISS_WRITE_16 0x8a /* Write(16) */ |
134 | |
135 | /* Define the CDB lengths supported by cciss based controllers */ |
136 | |
137 | #define CDB_LEN10 10 |
138 | #define CDB_LEN16 16 |
139 | |
140 | /* BMIC commands */ |
141 | #define BMIC_READ 0x26 |
142 | #define BMIC_WRITE 0x27 |
143 | #define BMIC_CACHE_FLUSH 0xc2 |
144 | #define CCISS_CACHE_FLUSH 0x01 /* C2 was already being used by CCISS */ |
145 | |
146 | #define CCISS_ABORT_MSG 0x00 |
147 | #define CCISS_RESET_MSG 0x01 |
148 | #define CCISS_RESET_TYPE_CONTROLLER 0x00 |
149 | #define CCISS_RESET_TYPE_BUS 0x01 |
150 | #define CCISS_RESET_TYPE_TARGET 0x03 |
151 | #define CCISS_RESET_TYPE_LUN 0x04 |
152 | #define CCISS_NOOP_MSG 0x03 |
153 | |
154 | /* Command List Structure */ |
155 | #define CTLR_LUNID "\0\0\0\0\0\0\0\0" |
156 | |
157 | typedef struct _CommandListHeader_struct { |
158 | BYTE ReplyQueue; |
159 | BYTE SGList; |
160 | HWORD SGTotal; |
161 | QWORD Tag; |
162 | LUNAddr_struct LUN; |
163 | } CommandListHeader_struct; |
164 | typedef struct _ErrDescriptor_struct { |
165 | QWORD Addr; |
166 | DWORD Len; |
167 | } ErrDescriptor_struct; |
168 | typedef struct _SGDescriptor_struct { |
169 | QWORD Addr; |
170 | DWORD Len; |
171 | DWORD Ext; |
172 | } SGDescriptor_struct; |
173 | |
174 | /* Command types */ |
175 | #define CMD_RWREQ 0x00 |
176 | #define CMD_IOCTL_PEND 0x01 |
177 | #define CMD_SCSI 0x03 |
178 | #define CMD_MSG_DONE 0x04 |
179 | #define CMD_MSG_TIMEOUT 0x05 |
180 | #define CMD_MSG_STALE 0xff |
181 | |
182 | /* This structure needs to be divisible by COMMANDLIST_ALIGNMENT |
183 | * because low bits of the address are used to to indicate that |
184 | * whether the tag contains an index or an address. PAD_32 and |
185 | * PAD_64 can be adjusted independently as needed for 32-bit |
186 | * and 64-bits systems. |
187 | */ |
188 | #define COMMANDLIST_ALIGNMENT (32) |
189 | #define IS_64_BIT ((sizeof(long) - 4)/4) |
190 | #define IS_32_BIT (!IS_64_BIT) |
191 | #define PAD_32 (0) |
192 | #define PAD_64 (4) |
193 | #define PADSIZE (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64) |
194 | #define DIRECT_LOOKUP_BIT 0x10 |
195 | #define DIRECT_LOOKUP_SHIFT 5 |
196 | |
197 | typedef struct _CommandList_struct { |
198 | CommandListHeader_struct Header; |
199 | RequestBlock_struct Request; |
200 | ErrDescriptor_struct ErrDesc; |
201 | SGDescriptor_struct SG[MAXSGENTRIES]; |
202 | /* information associated with the command */ |
203 | __u32 busaddr; /* physical address of this record */ |
204 | ErrorInfo_struct * err_info; /* pointer to the allocated mem */ |
205 | int ctlr; |
206 | int cmd_type; |
207 | long cmdindex; |
208 | struct list_head list; |
209 | struct request * rq; |
210 | struct completion *waiting; |
211 | int retry_count; |
212 | void * scsi_cmd; |
213 | char pad[PADSIZE]; |
214 | } CommandList_struct; |
215 | |
216 | /* Configuration Table Structure */ |
217 | typedef struct _HostWrite_struct { |
218 | DWORD TransportRequest; |
219 | DWORD Reserved; |
220 | DWORD CoalIntDelay; |
221 | DWORD CoalIntCount; |
222 | } HostWrite_struct; |
223 | |
224 | typedef struct _CfgTable_struct { |
225 | BYTE Signature[4]; |
226 | DWORD SpecValence; |
227 | #define SIMPLE_MODE 0x02 |
228 | #define PERFORMANT_MODE 0x04 |
229 | #define MEMQ_MODE 0x08 |
230 | DWORD TransportSupport; |
231 | DWORD TransportActive; |
232 | HostWrite_struct HostWrite; |
233 | DWORD CmdsOutMax; |
234 | DWORD BusTypes; |
235 | DWORD TransMethodOffset; |
236 | BYTE ServerName[16]; |
237 | DWORD HeartBeat; |
238 | DWORD SCSI_Prefetch; |
239 | DWORD MaxSGElements; |
240 | DWORD MaxLogicalUnits; |
241 | DWORD MaxPhysicalDrives; |
242 | DWORD MaxPhysicalDrivesPerLogicalUnit; |
243 | DWORD MaxPerformantModeCommands; |
244 | u8 reserved[0x78 - 0x58]; |
245 | u32 misc_fw_support; /* offset 0x78 */ |
246 | #define MISC_FW_DOORBELL_RESET (0x02) |
247 | #define MISC_FW_DOORBELL_RESET2 (0x10) |
248 | u8 driver_version[32]; |
249 | } CfgTable_struct; |
250 | |
251 | struct TransTable_struct { |
252 | u32 BlockFetch0; |
253 | u32 BlockFetch1; |
254 | u32 BlockFetch2; |
255 | u32 BlockFetch3; |
256 | u32 BlockFetch4; |
257 | u32 BlockFetch5; |
258 | u32 BlockFetch6; |
259 | u32 BlockFetch7; |
260 | u32 RepQSize; |
261 | u32 RepQCount; |
262 | u32 RepQCtrAddrLow32; |
263 | u32 RepQCtrAddrHigh32; |
264 | u32 RepQAddr0Low32; |
265 | u32 RepQAddr0High32; |
266 | }; |
267 | |
268 | #pragma pack() |
269 | #endif /* CCISS_CMD_H */ |
270 |
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