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1 | /* |
2 | * EDAC PCI component |
3 | * |
4 | * Author: Dave Jiang <djiang@mvista.com> |
5 | * |
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
7 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express |
9 | * or implied. |
10 | * |
11 | */ |
12 | #include <linux/module.h> |
13 | #include <linux/types.h> |
14 | #include <linux/smp.h> |
15 | #include <linux/init.h> |
16 | #include <linux/sysctl.h> |
17 | #include <linux/highmem.h> |
18 | #include <linux/timer.h> |
19 | #include <linux/slab.h> |
20 | #include <linux/spinlock.h> |
21 | #include <linux/list.h> |
22 | #include <linux/ctype.h> |
23 | #include <linux/workqueue.h> |
24 | #include <asm/uaccess.h> |
25 | #include <asm/page.h> |
26 | |
27 | #include "edac_core.h" |
28 | #include "edac_module.h" |
29 | |
30 | static DEFINE_MUTEX(edac_pci_ctls_mutex); |
31 | static LIST_HEAD(edac_pci_list); |
32 | static atomic_t pci_indexes = ATOMIC_INIT(0); |
33 | |
34 | /* |
35 | * edac_pci_alloc_ctl_info |
36 | * |
37 | * The alloc() function for the 'edac_pci' control info |
38 | * structure. The chip driver will allocate one of these for each |
39 | * edac_pci it is going to control/register with the EDAC CORE. |
40 | */ |
41 | struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, |
42 | const char *edac_pci_name) |
43 | { |
44 | struct edac_pci_ctl_info *pci; |
45 | void *p = NULL, *pvt; |
46 | unsigned int size; |
47 | |
48 | edac_dbg(1, "\n"); |
49 | |
50 | pci = edac_align_ptr(&p, sizeof(*pci), 1); |
51 | pvt = edac_align_ptr(&p, 1, sz_pvt); |
52 | size = ((unsigned long)pvt) + sz_pvt; |
53 | |
54 | /* Alloc the needed control struct memory */ |
55 | pci = kzalloc(size, GFP_KERNEL); |
56 | if (pci == NULL) |
57 | return NULL; |
58 | |
59 | /* Now much private space */ |
60 | pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL; |
61 | |
62 | pci->pvt_info = pvt; |
63 | pci->op_state = OP_ALLOC; |
64 | |
65 | snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name); |
66 | |
67 | return pci; |
68 | } |
69 | EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info); |
70 | |
71 | /* |
72 | * edac_pci_free_ctl_info() |
73 | * |
74 | * Last action on the pci control structure. |
75 | * |
76 | * call the remove sysfs information, which will unregister |
77 | * this control struct's kobj. When that kobj's ref count |
78 | * goes to zero, its release function will be call and then |
79 | * kfree() the memory. |
80 | */ |
81 | void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci) |
82 | { |
83 | edac_dbg(1, "\n"); |
84 | |
85 | edac_pci_remove_sysfs(pci); |
86 | } |
87 | EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info); |
88 | |
89 | /* |
90 | * find_edac_pci_by_dev() |
91 | * scans the edac_pci list for a specific 'struct device *' |
92 | * |
93 | * return NULL if not found, or return control struct pointer |
94 | */ |
95 | static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev) |
96 | { |
97 | struct edac_pci_ctl_info *pci; |
98 | struct list_head *item; |
99 | |
100 | edac_dbg(1, "\n"); |
101 | |
102 | list_for_each(item, &edac_pci_list) { |
103 | pci = list_entry(item, struct edac_pci_ctl_info, link); |
104 | |
105 | if (pci->dev == dev) |
106 | return pci; |
107 | } |
108 | |
109 | return NULL; |
110 | } |
111 | |
112 | /* |
113 | * add_edac_pci_to_global_list |
114 | * Before calling this function, caller must assign a unique value to |
115 | * edac_dev->pci_idx. |
116 | * Return: |
117 | * 0 on success |
118 | * 1 on failure |
119 | */ |
120 | static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci) |
121 | { |
122 | struct list_head *item, *insert_before; |
123 | struct edac_pci_ctl_info *rover; |
124 | |
125 | edac_dbg(1, "\n"); |
126 | |
127 | insert_before = &edac_pci_list; |
128 | |
129 | /* Determine if already on the list */ |
130 | rover = find_edac_pci_by_dev(pci->dev); |
131 | if (unlikely(rover != NULL)) |
132 | goto fail0; |
133 | |
134 | /* Insert in ascending order by 'pci_idx', so find position */ |
135 | list_for_each(item, &edac_pci_list) { |
136 | rover = list_entry(item, struct edac_pci_ctl_info, link); |
137 | |
138 | if (rover->pci_idx >= pci->pci_idx) { |
139 | if (unlikely(rover->pci_idx == pci->pci_idx)) |
140 | goto fail1; |
141 | |
142 | insert_before = item; |
143 | break; |
144 | } |
145 | } |
146 | |
147 | list_add_tail_rcu(&pci->link, insert_before); |
148 | return 0; |
149 | |
150 | fail0: |
151 | edac_printk(KERN_WARNING, EDAC_PCI, |
152 | "%s (%s) %s %s already assigned %d\n", |
153 | dev_name(rover->dev), edac_dev_name(rover), |
154 | rover->mod_name, rover->ctl_name, rover->pci_idx); |
155 | return 1; |
156 | |
157 | fail1: |
158 | edac_printk(KERN_WARNING, EDAC_PCI, |
159 | "but in low-level driver: attempt to assign\n" |
160 | "\tduplicate pci_idx %d in %s()\n", rover->pci_idx, |
161 | __func__); |
162 | return 1; |
163 | } |
164 | |
165 | /* |
166 | * del_edac_pci_from_global_list |
167 | * |
168 | * remove the PCI control struct from the global list |
169 | */ |
170 | static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci) |
171 | { |
172 | list_del_rcu(&pci->link); |
173 | |
174 | /* these are for safe removal of devices from global list while |
175 | * NMI handlers may be traversing list |
176 | */ |
177 | synchronize_rcu(); |
178 | INIT_LIST_HEAD(&pci->link); |
179 | } |
180 | |
181 | #if 0 |
182 | /* Older code, but might use in the future */ |
183 | |
184 | /* |
185 | * edac_pci_find() |
186 | * Search for an edac_pci_ctl_info structure whose index is 'idx' |
187 | * |
188 | * If found, return a pointer to the structure |
189 | * Else return NULL. |
190 | * |
191 | * Caller must hold pci_ctls_mutex. |
192 | */ |
193 | struct edac_pci_ctl_info *edac_pci_find(int idx) |
194 | { |
195 | struct list_head *item; |
196 | struct edac_pci_ctl_info *pci; |
197 | |
198 | /* Iterage over list, looking for exact match of ID */ |
199 | list_for_each(item, &edac_pci_list) { |
200 | pci = list_entry(item, struct edac_pci_ctl_info, link); |
201 | |
202 | if (pci->pci_idx >= idx) { |
203 | if (pci->pci_idx == idx) |
204 | return pci; |
205 | |
206 | /* not on list, so terminate early */ |
207 | break; |
208 | } |
209 | } |
210 | |
211 | return NULL; |
212 | } |
213 | EXPORT_SYMBOL_GPL(edac_pci_find); |
214 | #endif |
215 | |
216 | /* |
217 | * edac_pci_workq_function() |
218 | * |
219 | * periodic function that performs the operation |
220 | * scheduled by a workq request, for a given PCI control struct |
221 | */ |
222 | static void edac_pci_workq_function(struct work_struct *work_req) |
223 | { |
224 | struct delayed_work *d_work = to_delayed_work(work_req); |
225 | struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work); |
226 | int msec; |
227 | unsigned long delay; |
228 | |
229 | edac_dbg(3, "checking\n"); |
230 | |
231 | mutex_lock(&edac_pci_ctls_mutex); |
232 | |
233 | if (pci->op_state == OP_RUNNING_POLL) { |
234 | /* we might be in POLL mode, but there may NOT be a poll func |
235 | */ |
236 | if ((pci->edac_check != NULL) && edac_pci_get_check_errors()) |
237 | pci->edac_check(pci); |
238 | |
239 | /* if we are on a one second period, then use round */ |
240 | msec = edac_pci_get_poll_msec(); |
241 | if (msec == 1000) |
242 | delay = round_jiffies_relative(msecs_to_jiffies(msec)); |
243 | else |
244 | delay = msecs_to_jiffies(msec); |
245 | |
246 | /* Reschedule only if we are in POLL mode */ |
247 | queue_delayed_work(edac_workqueue, &pci->work, delay); |
248 | } |
249 | |
250 | mutex_unlock(&edac_pci_ctls_mutex); |
251 | } |
252 | |
253 | /* |
254 | * edac_pci_workq_setup() |
255 | * initialize a workq item for this edac_pci instance |
256 | * passing in the new delay period in msec |
257 | * |
258 | * locking model: |
259 | * called when 'edac_pci_ctls_mutex' is locked |
260 | */ |
261 | static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci, |
262 | unsigned int msec) |
263 | { |
264 | edac_dbg(0, "\n"); |
265 | |
266 | INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function); |
267 | queue_delayed_work(edac_workqueue, &pci->work, |
268 | msecs_to_jiffies(edac_pci_get_poll_msec())); |
269 | } |
270 | |
271 | /* |
272 | * edac_pci_workq_teardown() |
273 | * stop the workq processing on this edac_pci instance |
274 | */ |
275 | static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci) |
276 | { |
277 | int status; |
278 | |
279 | edac_dbg(0, "\n"); |
280 | |
281 | status = cancel_delayed_work(&pci->work); |
282 | if (status == 0) |
283 | flush_workqueue(edac_workqueue); |
284 | } |
285 | |
286 | /* |
287 | * edac_pci_reset_delay_period |
288 | * |
289 | * called with a new period value for the workq period |
290 | * a) stop current workq timer |
291 | * b) restart workq timer with new value |
292 | */ |
293 | void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci, |
294 | unsigned long value) |
295 | { |
296 | edac_dbg(0, "\n"); |
297 | |
298 | edac_pci_workq_teardown(pci); |
299 | |
300 | /* need to lock for the setup */ |
301 | mutex_lock(&edac_pci_ctls_mutex); |
302 | |
303 | edac_pci_workq_setup(pci, value); |
304 | |
305 | mutex_unlock(&edac_pci_ctls_mutex); |
306 | } |
307 | EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period); |
308 | |
309 | /* |
310 | * edac_pci_alloc_index: Allocate a unique PCI index number |
311 | * |
312 | * Return: |
313 | * allocated index number |
314 | * |
315 | */ |
316 | int edac_pci_alloc_index(void) |
317 | { |
318 | return atomic_inc_return(&pci_indexes) - 1; |
319 | } |
320 | EXPORT_SYMBOL_GPL(edac_pci_alloc_index); |
321 | |
322 | /* |
323 | * edac_pci_add_device: Insert the 'edac_dev' structure into the |
324 | * edac_pci global list and create sysfs entries associated with |
325 | * edac_pci structure. |
326 | * @pci: pointer to the edac_device structure to be added to the list |
327 | * @edac_idx: A unique numeric identifier to be assigned to the |
328 | * 'edac_pci' structure. |
329 | * |
330 | * Return: |
331 | * 0 Success |
332 | * !0 Failure |
333 | */ |
334 | int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx) |
335 | { |
336 | edac_dbg(0, "\n"); |
337 | |
338 | pci->pci_idx = edac_idx; |
339 | pci->start_time = jiffies; |
340 | |
341 | mutex_lock(&edac_pci_ctls_mutex); |
342 | |
343 | if (add_edac_pci_to_global_list(pci)) |
344 | goto fail0; |
345 | |
346 | if (edac_pci_create_sysfs(pci)) { |
347 | edac_pci_printk(pci, KERN_WARNING, |
348 | "failed to create sysfs pci\n"); |
349 | goto fail1; |
350 | } |
351 | |
352 | if (pci->edac_check != NULL) { |
353 | pci->op_state = OP_RUNNING_POLL; |
354 | |
355 | edac_pci_workq_setup(pci, 1000); |
356 | } else { |
357 | pci->op_state = OP_RUNNING_INTERRUPT; |
358 | } |
359 | |
360 | edac_pci_printk(pci, KERN_INFO, |
361 | "Giving out device to module '%s' controller '%s':" |
362 | " DEV '%s' (%s)\n", |
363 | pci->mod_name, |
364 | pci->ctl_name, |
365 | edac_dev_name(pci), edac_op_state_to_string(pci->op_state)); |
366 | |
367 | mutex_unlock(&edac_pci_ctls_mutex); |
368 | return 0; |
369 | |
370 | /* error unwind stack */ |
371 | fail1: |
372 | del_edac_pci_from_global_list(pci); |
373 | fail0: |
374 | mutex_unlock(&edac_pci_ctls_mutex); |
375 | return 1; |
376 | } |
377 | EXPORT_SYMBOL_GPL(edac_pci_add_device); |
378 | |
379 | /* |
380 | * edac_pci_del_device() |
381 | * Remove sysfs entries for specified edac_pci structure and |
382 | * then remove edac_pci structure from global list |
383 | * |
384 | * @dev: |
385 | * Pointer to 'struct device' representing edac_pci structure |
386 | * to remove |
387 | * |
388 | * Return: |
389 | * Pointer to removed edac_pci structure, |
390 | * or NULL if device not found |
391 | */ |
392 | struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev) |
393 | { |
394 | struct edac_pci_ctl_info *pci; |
395 | |
396 | edac_dbg(0, "\n"); |
397 | |
398 | mutex_lock(&edac_pci_ctls_mutex); |
399 | |
400 | /* ensure the control struct is on the global list |
401 | * if not, then leave |
402 | */ |
403 | pci = find_edac_pci_by_dev(dev); |
404 | if (pci == NULL) { |
405 | mutex_unlock(&edac_pci_ctls_mutex); |
406 | return NULL; |
407 | } |
408 | |
409 | pci->op_state = OP_OFFLINE; |
410 | |
411 | del_edac_pci_from_global_list(pci); |
412 | |
413 | mutex_unlock(&edac_pci_ctls_mutex); |
414 | |
415 | /* stop the workq timer */ |
416 | edac_pci_workq_teardown(pci); |
417 | |
418 | edac_printk(KERN_INFO, EDAC_PCI, |
419 | "Removed device %d for %s %s: DEV %s\n", |
420 | pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci)); |
421 | |
422 | return pci; |
423 | } |
424 | EXPORT_SYMBOL_GPL(edac_pci_del_device); |
425 | |
426 | /* |
427 | * edac_pci_generic_check |
428 | * |
429 | * a Generic parity check API |
430 | */ |
431 | static void edac_pci_generic_check(struct edac_pci_ctl_info *pci) |
432 | { |
433 | edac_dbg(4, "\n"); |
434 | edac_pci_do_parity_check(); |
435 | } |
436 | |
437 | /* free running instance index counter */ |
438 | static int edac_pci_idx; |
439 | #define EDAC_PCI_GENCTL_NAME "EDAC PCI controller" |
440 | |
441 | struct edac_pci_gen_data { |
442 | int edac_idx; |
443 | }; |
444 | |
445 | /* |
446 | * edac_pci_create_generic_ctl |
447 | * |
448 | * A generic constructor for a PCI parity polling device |
449 | * Some systems have more than one domain of PCI busses. |
450 | * For systems with one domain, then this API will |
451 | * provide for a generic poller. |
452 | * |
453 | * This routine calls the edac_pci_alloc_ctl_info() for |
454 | * the generic device, with default values |
455 | */ |
456 | struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, |
457 | const char *mod_name) |
458 | { |
459 | struct edac_pci_ctl_info *pci; |
460 | struct edac_pci_gen_data *pdata; |
461 | |
462 | pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME); |
463 | if (!pci) |
464 | return NULL; |
465 | |
466 | pdata = pci->pvt_info; |
467 | pci->dev = dev; |
468 | dev_set_drvdata(pci->dev, pci); |
469 | pci->dev_name = pci_name(to_pci_dev(dev)); |
470 | |
471 | pci->mod_name = mod_name; |
472 | pci->ctl_name = EDAC_PCI_GENCTL_NAME; |
473 | if (edac_op_state == EDAC_OPSTATE_POLL) |
474 | pci->edac_check = edac_pci_generic_check; |
475 | |
476 | pdata->edac_idx = edac_pci_idx++; |
477 | |
478 | if (edac_pci_add_device(pci, pdata->edac_idx) > 0) { |
479 | edac_dbg(3, "failed edac_pci_add_device()\n"); |
480 | edac_pci_free_ctl_info(pci); |
481 | return NULL; |
482 | } |
483 | |
484 | return pci; |
485 | } |
486 | EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl); |
487 | |
488 | /* |
489 | * edac_pci_release_generic_ctl |
490 | * |
491 | * The release function of a generic EDAC PCI polling device |
492 | */ |
493 | void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci) |
494 | { |
495 | edac_dbg(0, "pci mod=%s\n", pci->mod_name); |
496 | |
497 | edac_pci_del_device(pci->dev); |
498 | edac_pci_free_ctl_info(pci); |
499 | } |
500 | EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl); |
501 |
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