Root/
1 | /* |
2 | * Regular cardbus driver ("yenta_socket") |
3 | * |
4 | * (C) Copyright 1999, 2000 Linus Torvalds |
5 | * |
6 | * Changelog: |
7 | * Aug 2002: Manfred Spraul <manfred@colorfullife.com> |
8 | * Dynamically adjust the size of the bridge resource |
9 | * |
10 | * May 2003: Dominik Brodowski <linux@brodo.de> |
11 | * Merge pci_socket.c and yenta.c into one file |
12 | */ |
13 | #include <linux/init.h> |
14 | #include <linux/pci.h> |
15 | #include <linux/workqueue.h> |
16 | #include <linux/interrupt.h> |
17 | #include <linux/delay.h> |
18 | #include <linux/module.h> |
19 | #include <linux/io.h> |
20 | #include <linux/slab.h> |
21 | |
22 | #include <pcmcia/ss.h> |
23 | |
24 | #include "yenta_socket.h" |
25 | #include "i82365.h" |
26 | |
27 | static bool disable_clkrun; |
28 | module_param(disable_clkrun, bool, 0444); |
29 | MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option"); |
30 | |
31 | static bool isa_probe = 1; |
32 | module_param(isa_probe, bool, 0444); |
33 | MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing"); |
34 | |
35 | static bool pwr_irqs_off; |
36 | module_param(pwr_irqs_off, bool, 0644); |
37 | MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!"); |
38 | |
39 | static char o2_speedup[] = "default"; |
40 | module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444); |
41 | MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' " |
42 | "or 'default' (uses recommended behaviour for the detected bridge)"); |
43 | |
44 | /* |
45 | * Only probe "regular" interrupts, don't |
46 | * touch dangerous spots like the mouse irq, |
47 | * because there are mice that apparently |
48 | * get really confused if they get fondled |
49 | * too intimately. |
50 | * |
51 | * Default to 11, 10, 9, 7, 6, 5, 4, 3. |
52 | */ |
53 | static u32 isa_interrupts = 0x0ef8; |
54 | |
55 | |
56 | #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args) |
57 | |
58 | /* Don't ask.. */ |
59 | #define to_cycles(ns) ((ns)/120) |
60 | #define to_ns(cycles) ((cycles)*120) |
61 | |
62 | /* |
63 | * yenta PCI irq probing. |
64 | * currently only used in the TI/EnE initialization code |
65 | */ |
66 | #ifdef CONFIG_YENTA_TI |
67 | static int yenta_probe_cb_irq(struct yenta_socket *socket); |
68 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, |
69 | u32 isa_irq_mask); |
70 | #endif |
71 | |
72 | |
73 | static unsigned int override_bios; |
74 | module_param(override_bios, uint, 0000); |
75 | MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation"); |
76 | |
77 | /* |
78 | * Generate easy-to-use ways of reading a cardbus sockets |
79 | * regular memory space ("cb_xxx"), configuration space |
80 | * ("config_xxx") and compatibility space ("exca_xxxx") |
81 | */ |
82 | static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg) |
83 | { |
84 | u32 val = readl(socket->base + reg); |
85 | debug("%04x %08x\n", socket, reg, val); |
86 | return val; |
87 | } |
88 | |
89 | static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val) |
90 | { |
91 | debug("%04x %08x\n", socket, reg, val); |
92 | writel(val, socket->base + reg); |
93 | readl(socket->base + reg); /* avoid problems with PCI write posting */ |
94 | } |
95 | |
96 | static inline u8 config_readb(struct yenta_socket *socket, unsigned offset) |
97 | { |
98 | u8 val; |
99 | pci_read_config_byte(socket->dev, offset, &val); |
100 | debug("%04x %02x\n", socket, offset, val); |
101 | return val; |
102 | } |
103 | |
104 | static inline u16 config_readw(struct yenta_socket *socket, unsigned offset) |
105 | { |
106 | u16 val; |
107 | pci_read_config_word(socket->dev, offset, &val); |
108 | debug("%04x %04x\n", socket, offset, val); |
109 | return val; |
110 | } |
111 | |
112 | static inline u32 config_readl(struct yenta_socket *socket, unsigned offset) |
113 | { |
114 | u32 val; |
115 | pci_read_config_dword(socket->dev, offset, &val); |
116 | debug("%04x %08x\n", socket, offset, val); |
117 | return val; |
118 | } |
119 | |
120 | static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val) |
121 | { |
122 | debug("%04x %02x\n", socket, offset, val); |
123 | pci_write_config_byte(socket->dev, offset, val); |
124 | } |
125 | |
126 | static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val) |
127 | { |
128 | debug("%04x %04x\n", socket, offset, val); |
129 | pci_write_config_word(socket->dev, offset, val); |
130 | } |
131 | |
132 | static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val) |
133 | { |
134 | debug("%04x %08x\n", socket, offset, val); |
135 | pci_write_config_dword(socket->dev, offset, val); |
136 | } |
137 | |
138 | static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg) |
139 | { |
140 | u8 val = readb(socket->base + 0x800 + reg); |
141 | debug("%04x %02x\n", socket, reg, val); |
142 | return val; |
143 | } |
144 | |
145 | static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg) |
146 | { |
147 | u16 val; |
148 | val = readb(socket->base + 0x800 + reg); |
149 | val |= readb(socket->base + 0x800 + reg + 1) << 8; |
150 | debug("%04x %04x\n", socket, reg, val); |
151 | return val; |
152 | } |
153 | |
154 | static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val) |
155 | { |
156 | debug("%04x %02x\n", socket, reg, val); |
157 | writeb(val, socket->base + 0x800 + reg); |
158 | readb(socket->base + 0x800 + reg); /* PCI write posting... */ |
159 | } |
160 | |
161 | static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val) |
162 | { |
163 | debug("%04x %04x\n", socket, reg, val); |
164 | writeb(val, socket->base + 0x800 + reg); |
165 | writeb(val >> 8, socket->base + 0x800 + reg + 1); |
166 | |
167 | /* PCI write posting... */ |
168 | readb(socket->base + 0x800 + reg); |
169 | readb(socket->base + 0x800 + reg + 1); |
170 | } |
171 | |
172 | static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf) |
173 | { |
174 | struct pci_dev *dev = to_pci_dev(yentadev); |
175 | struct yenta_socket *socket = pci_get_drvdata(dev); |
176 | int offset = 0, i; |
177 | |
178 | offset = snprintf(buf, PAGE_SIZE, "CB registers:"); |
179 | for (i = 0; i < 0x24; i += 4) { |
180 | unsigned val; |
181 | if (!(i & 15)) |
182 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); |
183 | val = cb_readl(socket, i); |
184 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val); |
185 | } |
186 | |
187 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:"); |
188 | for (i = 0; i < 0x45; i++) { |
189 | unsigned char val; |
190 | if (!(i & 7)) { |
191 | if (i & 8) { |
192 | memcpy(buf + offset, " -", 2); |
193 | offset += 2; |
194 | } else |
195 | offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i); |
196 | } |
197 | val = exca_readb(socket, i); |
198 | offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val); |
199 | } |
200 | buf[offset++] = '\n'; |
201 | return offset; |
202 | } |
203 | |
204 | static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL); |
205 | |
206 | /* |
207 | * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend |
208 | * on what kind of card is inserted.. |
209 | */ |
210 | static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value) |
211 | { |
212 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
213 | unsigned int val; |
214 | u32 state = cb_readl(socket, CB_SOCKET_STATE); |
215 | |
216 | val = (state & CB_3VCARD) ? SS_3VCARD : 0; |
217 | val |= (state & CB_XVCARD) ? SS_XVCARD : 0; |
218 | val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING; |
219 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0; |
220 | |
221 | |
222 | if (state & CB_CBCARD) { |
223 | val |= SS_CARDBUS; |
224 | val |= (state & CB_CARDSTS) ? SS_STSCHG : 0; |
225 | val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT; |
226 | val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0; |
227 | } else if (state & CB_16BITCARD) { |
228 | u8 status = exca_readb(socket, I365_STATUS); |
229 | val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0; |
230 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { |
231 | val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG; |
232 | } else { |
233 | val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD; |
234 | val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN; |
235 | } |
236 | val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0; |
237 | val |= (status & I365_CS_READY) ? SS_READY : 0; |
238 | val |= (status & I365_CS_POWERON) ? SS_POWERON : 0; |
239 | } |
240 | |
241 | *value = val; |
242 | return 0; |
243 | } |
244 | |
245 | static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state) |
246 | { |
247 | /* some birdges require to use the ExCA registers to power 16bit cards */ |
248 | if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) && |
249 | (socket->flags & YENTA_16BIT_POWER_EXCA)) { |
250 | u8 reg, old; |
251 | reg = old = exca_readb(socket, I365_POWER); |
252 | reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK); |
253 | |
254 | /* i82365SL-DF style */ |
255 | if (socket->flags & YENTA_16BIT_POWER_DF) { |
256 | switch (state->Vcc) { |
257 | case 33: |
258 | reg |= I365_VCC_3V; |
259 | break; |
260 | case 50: |
261 | reg |= I365_VCC_5V; |
262 | break; |
263 | default: |
264 | reg = 0; |
265 | break; |
266 | } |
267 | switch (state->Vpp) { |
268 | case 33: |
269 | case 50: |
270 | reg |= I365_VPP1_5V; |
271 | break; |
272 | case 120: |
273 | reg |= I365_VPP1_12V; |
274 | break; |
275 | } |
276 | } else { |
277 | /* i82365SL-B style */ |
278 | switch (state->Vcc) { |
279 | case 50: |
280 | reg |= I365_VCC_5V; |
281 | break; |
282 | default: |
283 | reg = 0; |
284 | break; |
285 | } |
286 | switch (state->Vpp) { |
287 | case 50: |
288 | reg |= I365_VPP1_5V | I365_VPP2_5V; |
289 | break; |
290 | case 120: |
291 | reg |= I365_VPP1_12V | I365_VPP2_12V; |
292 | break; |
293 | } |
294 | } |
295 | |
296 | if (reg != old) |
297 | exca_writeb(socket, I365_POWER, reg); |
298 | } else { |
299 | u32 reg = 0; /* CB_SC_STPCLK? */ |
300 | switch (state->Vcc) { |
301 | case 33: |
302 | reg = CB_SC_VCC_3V; |
303 | break; |
304 | case 50: |
305 | reg = CB_SC_VCC_5V; |
306 | break; |
307 | default: |
308 | reg = 0; |
309 | break; |
310 | } |
311 | switch (state->Vpp) { |
312 | case 33: |
313 | reg |= CB_SC_VPP_3V; |
314 | break; |
315 | case 50: |
316 | reg |= CB_SC_VPP_5V; |
317 | break; |
318 | case 120: |
319 | reg |= CB_SC_VPP_12V; |
320 | break; |
321 | } |
322 | if (reg != cb_readl(socket, CB_SOCKET_CONTROL)) |
323 | cb_writel(socket, CB_SOCKET_CONTROL, reg); |
324 | } |
325 | } |
326 | |
327 | static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state) |
328 | { |
329 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
330 | u16 bridge; |
331 | |
332 | /* if powering down: do it immediately */ |
333 | if (state->Vcc == 0) |
334 | yenta_set_power(socket, state); |
335 | |
336 | socket->io_irq = state->io_irq; |
337 | bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR); |
338 | if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) { |
339 | u8 intr; |
340 | bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0; |
341 | |
342 | /* ISA interrupt control? */ |
343 | intr = exca_readb(socket, I365_INTCTL); |
344 | intr = (intr & ~0xf); |
345 | if (!socket->dev->irq) { |
346 | intr |= socket->cb_irq ? socket->cb_irq : state->io_irq; |
347 | bridge |= CB_BRIDGE_INTR; |
348 | } |
349 | exca_writeb(socket, I365_INTCTL, intr); |
350 | } else { |
351 | u8 reg; |
352 | |
353 | reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA); |
354 | reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET; |
355 | reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0; |
356 | if (state->io_irq != socket->dev->irq) { |
357 | reg |= state->io_irq; |
358 | bridge |= CB_BRIDGE_INTR; |
359 | } |
360 | exca_writeb(socket, I365_INTCTL, reg); |
361 | |
362 | reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK); |
363 | reg |= I365_PWR_NORESET; |
364 | if (state->flags & SS_PWR_AUTO) |
365 | reg |= I365_PWR_AUTO; |
366 | if (state->flags & SS_OUTPUT_ENA) |
367 | reg |= I365_PWR_OUT; |
368 | if (exca_readb(socket, I365_POWER) != reg) |
369 | exca_writeb(socket, I365_POWER, reg); |
370 | |
371 | /* CSC interrupt: no ISA irq for CSC */ |
372 | reg = exca_readb(socket, I365_CSCINT); |
373 | reg &= I365_CSC_IRQ_MASK; |
374 | reg |= I365_CSC_DETECT; |
375 | if (state->flags & SS_IOCARD) { |
376 | if (state->csc_mask & SS_STSCHG) |
377 | reg |= I365_CSC_STSCHG; |
378 | } else { |
379 | if (state->csc_mask & SS_BATDEAD) |
380 | reg |= I365_CSC_BVD1; |
381 | if (state->csc_mask & SS_BATWARN) |
382 | reg |= I365_CSC_BVD2; |
383 | if (state->csc_mask & SS_READY) |
384 | reg |= I365_CSC_READY; |
385 | } |
386 | exca_writeb(socket, I365_CSCINT, reg); |
387 | exca_readb(socket, I365_CSC); |
388 | if (sock->zoom_video) |
389 | sock->zoom_video(sock, state->flags & SS_ZVCARD); |
390 | } |
391 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); |
392 | /* Socket event mask: get card insert/remove events.. */ |
393 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
394 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); |
395 | |
396 | /* if powering up: do it as the last step when the socket is configured */ |
397 | if (state->Vcc != 0) |
398 | yenta_set_power(socket, state); |
399 | return 0; |
400 | } |
401 | |
402 | static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) |
403 | { |
404 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
405 | int map; |
406 | unsigned char ioctl, addr, enable; |
407 | |
408 | map = io->map; |
409 | |
410 | if (map > 1) |
411 | return -EINVAL; |
412 | |
413 | enable = I365_ENA_IO(map); |
414 | addr = exca_readb(socket, I365_ADDRWIN); |
415 | |
416 | /* Disable the window before changing it.. */ |
417 | if (addr & enable) { |
418 | addr &= ~enable; |
419 | exca_writeb(socket, I365_ADDRWIN, addr); |
420 | } |
421 | |
422 | exca_writew(socket, I365_IO(map)+I365_W_START, io->start); |
423 | exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop); |
424 | |
425 | ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); |
426 | if (io->flags & MAP_0WS) |
427 | ioctl |= I365_IOCTL_0WS(map); |
428 | if (io->flags & MAP_16BIT) |
429 | ioctl |= I365_IOCTL_16BIT(map); |
430 | if (io->flags & MAP_AUTOSZ) |
431 | ioctl |= I365_IOCTL_IOCS16(map); |
432 | exca_writeb(socket, I365_IOCTL, ioctl); |
433 | |
434 | if (io->flags & MAP_ACTIVE) |
435 | exca_writeb(socket, I365_ADDRWIN, addr | enable); |
436 | return 0; |
437 | } |
438 | |
439 | static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem) |
440 | { |
441 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
442 | struct pci_bus_region region; |
443 | int map; |
444 | unsigned char addr, enable; |
445 | unsigned int start, stop, card_start; |
446 | unsigned short word; |
447 | |
448 | pcibios_resource_to_bus(socket->dev, ®ion, mem->res); |
449 | |
450 | map = mem->map; |
451 | start = region.start; |
452 | stop = region.end; |
453 | card_start = mem->card_start; |
454 | |
455 | if (map > 4 || start > stop || ((start ^ stop) >> 24) || |
456 | (card_start >> 26) || mem->speed > 1000) |
457 | return -EINVAL; |
458 | |
459 | enable = I365_ENA_MEM(map); |
460 | addr = exca_readb(socket, I365_ADDRWIN); |
461 | if (addr & enable) { |
462 | addr &= ~enable; |
463 | exca_writeb(socket, I365_ADDRWIN, addr); |
464 | } |
465 | |
466 | exca_writeb(socket, CB_MEM_PAGE(map), start >> 24); |
467 | |
468 | word = (start >> 12) & 0x0fff; |
469 | if (mem->flags & MAP_16BIT) |
470 | word |= I365_MEM_16BIT; |
471 | if (mem->flags & MAP_0WS) |
472 | word |= I365_MEM_0WS; |
473 | exca_writew(socket, I365_MEM(map) + I365_W_START, word); |
474 | |
475 | word = (stop >> 12) & 0x0fff; |
476 | switch (to_cycles(mem->speed)) { |
477 | case 0: |
478 | break; |
479 | case 1: |
480 | word |= I365_MEM_WS0; |
481 | break; |
482 | case 2: |
483 | word |= I365_MEM_WS1; |
484 | break; |
485 | default: |
486 | word |= I365_MEM_WS1 | I365_MEM_WS0; |
487 | break; |
488 | } |
489 | exca_writew(socket, I365_MEM(map) + I365_W_STOP, word); |
490 | |
491 | word = ((card_start - start) >> 12) & 0x3fff; |
492 | if (mem->flags & MAP_WRPROT) |
493 | word |= I365_MEM_WRPROT; |
494 | if (mem->flags & MAP_ATTRIB) |
495 | word |= I365_MEM_REG; |
496 | exca_writew(socket, I365_MEM(map) + I365_W_OFF, word); |
497 | |
498 | if (mem->flags & MAP_ACTIVE) |
499 | exca_writeb(socket, I365_ADDRWIN, addr | enable); |
500 | return 0; |
501 | } |
502 | |
503 | |
504 | |
505 | static irqreturn_t yenta_interrupt(int irq, void *dev_id) |
506 | { |
507 | unsigned int events; |
508 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; |
509 | u8 csc; |
510 | u32 cb_event; |
511 | |
512 | /* Clear interrupt status for the event */ |
513 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); |
514 | cb_writel(socket, CB_SOCKET_EVENT, cb_event); |
515 | |
516 | csc = exca_readb(socket, I365_CSC); |
517 | |
518 | if (!(cb_event || csc)) |
519 | return IRQ_NONE; |
520 | |
521 | events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ; |
522 | events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0; |
523 | if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) { |
524 | events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; |
525 | } else { |
526 | events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; |
527 | events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; |
528 | events |= (csc & I365_CSC_READY) ? SS_READY : 0; |
529 | } |
530 | |
531 | if (events) |
532 | pcmcia_parse_events(&socket->socket, events); |
533 | |
534 | return IRQ_HANDLED; |
535 | } |
536 | |
537 | static void yenta_interrupt_wrapper(unsigned long data) |
538 | { |
539 | struct yenta_socket *socket = (struct yenta_socket *) data; |
540 | |
541 | yenta_interrupt(0, (void *)socket); |
542 | socket->poll_timer.expires = jiffies + HZ; |
543 | add_timer(&socket->poll_timer); |
544 | } |
545 | |
546 | static void yenta_clear_maps(struct yenta_socket *socket) |
547 | { |
548 | int i; |
549 | struct resource res = { .start = 0, .end = 0x0fff }; |
550 | pccard_io_map io = { 0, 0, 0, 0, 1 }; |
551 | pccard_mem_map mem = { .res = &res, }; |
552 | |
553 | yenta_set_socket(&socket->socket, &dead_socket); |
554 | for (i = 0; i < 2; i++) { |
555 | io.map = i; |
556 | yenta_set_io_map(&socket->socket, &io); |
557 | } |
558 | for (i = 0; i < 5; i++) { |
559 | mem.map = i; |
560 | yenta_set_mem_map(&socket->socket, &mem); |
561 | } |
562 | } |
563 | |
564 | /* redoes voltage interrogation if required */ |
565 | static void yenta_interrogate(struct yenta_socket *socket) |
566 | { |
567 | u32 state; |
568 | |
569 | state = cb_readl(socket, CB_SOCKET_STATE); |
570 | if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) || |
571 | (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) || |
572 | ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD))) |
573 | cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST); |
574 | } |
575 | |
576 | /* Called at resume and initialization events */ |
577 | static int yenta_sock_init(struct pcmcia_socket *sock) |
578 | { |
579 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
580 | |
581 | exca_writeb(socket, I365_GBLCTL, 0x00); |
582 | exca_writeb(socket, I365_GENCTL, 0x00); |
583 | |
584 | /* Redo card voltage interrogation */ |
585 | yenta_interrogate(socket); |
586 | |
587 | yenta_clear_maps(socket); |
588 | |
589 | if (socket->type && socket->type->sock_init) |
590 | socket->type->sock_init(socket); |
591 | |
592 | /* Re-enable CSC interrupts */ |
593 | cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK); |
594 | |
595 | return 0; |
596 | } |
597 | |
598 | static int yenta_sock_suspend(struct pcmcia_socket *sock) |
599 | { |
600 | struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket); |
601 | |
602 | /* Disable CSC interrupts */ |
603 | cb_writel(socket, CB_SOCKET_MASK, 0x0); |
604 | |
605 | return 0; |
606 | } |
607 | |
608 | /* |
609 | * Use an adaptive allocation for the memory resource, |
610 | * sometimes the memory behind pci bridges is limited: |
611 | * 1/8 of the size of the io window of the parent. |
612 | * max 4 MB, min 16 kB. We try very hard to not get below |
613 | * the "ACC" values, though. |
614 | */ |
615 | #define BRIDGE_MEM_MAX (4*1024*1024) |
616 | #define BRIDGE_MEM_ACC (128*1024) |
617 | #define BRIDGE_MEM_MIN (16*1024) |
618 | |
619 | #define BRIDGE_IO_MAX 512 |
620 | #define BRIDGE_IO_ACC 256 |
621 | #define BRIDGE_IO_MIN 32 |
622 | |
623 | #ifndef PCIBIOS_MIN_CARDBUS_IO |
624 | #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO |
625 | #endif |
626 | |
627 | static int yenta_search_one_res(struct resource *root, struct resource *res, |
628 | u32 min) |
629 | { |
630 | u32 align, size, start, end; |
631 | |
632 | if (res->flags & IORESOURCE_IO) { |
633 | align = 1024; |
634 | size = BRIDGE_IO_MAX; |
635 | start = PCIBIOS_MIN_CARDBUS_IO; |
636 | end = ~0U; |
637 | } else { |
638 | unsigned long avail = root->end - root->start; |
639 | int i; |
640 | size = BRIDGE_MEM_MAX; |
641 | if (size > avail/8) { |
642 | size = (avail+1)/8; |
643 | /* round size down to next power of 2 */ |
644 | i = 0; |
645 | while ((size /= 2) != 0) |
646 | i++; |
647 | size = 1 << i; |
648 | } |
649 | if (size < min) |
650 | size = min; |
651 | align = size; |
652 | start = PCIBIOS_MIN_MEM; |
653 | end = ~0U; |
654 | } |
655 | |
656 | do { |
657 | if (allocate_resource(root, res, size, start, end, align, |
658 | NULL, NULL) == 0) { |
659 | return 1; |
660 | } |
661 | size = size/2; |
662 | align = size; |
663 | } while (size >= min); |
664 | |
665 | return 0; |
666 | } |
667 | |
668 | |
669 | static int yenta_search_res(struct yenta_socket *socket, struct resource *res, |
670 | u32 min) |
671 | { |
672 | struct resource *root; |
673 | int i; |
674 | |
675 | pci_bus_for_each_resource(socket->dev->bus, root, i) { |
676 | if (!root) |
677 | continue; |
678 | |
679 | if ((res->flags ^ root->flags) & |
680 | (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH)) |
681 | continue; /* Wrong type */ |
682 | |
683 | if (yenta_search_one_res(root, res, min)) |
684 | return 1; |
685 | } |
686 | return 0; |
687 | } |
688 | |
689 | static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end) |
690 | { |
691 | struct pci_dev *dev = socket->dev; |
692 | struct resource *res; |
693 | struct pci_bus_region region; |
694 | unsigned mask; |
695 | |
696 | res = dev->resource + PCI_BRIDGE_RESOURCES + nr; |
697 | /* Already allocated? */ |
698 | if (res->parent) |
699 | return 0; |
700 | |
701 | /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */ |
702 | mask = ~0xfff; |
703 | if (type & IORESOURCE_IO) |
704 | mask = ~3; |
705 | |
706 | res->name = dev->subordinate->name; |
707 | res->flags = type; |
708 | |
709 | region.start = config_readl(socket, addr_start) & mask; |
710 | region.end = config_readl(socket, addr_end) | ~mask; |
711 | if (region.start && region.end > region.start && !override_bios) { |
712 | pcibios_bus_to_resource(dev, res, ®ion); |
713 | if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0) |
714 | return 0; |
715 | dev_printk(KERN_INFO, &dev->dev, |
716 | "Preassigned resource %d busy or not available, " |
717 | "reconfiguring...\n", |
718 | nr); |
719 | } |
720 | |
721 | if (type & IORESOURCE_IO) { |
722 | if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) || |
723 | (yenta_search_res(socket, res, BRIDGE_IO_ACC)) || |
724 | (yenta_search_res(socket, res, BRIDGE_IO_MIN))) |
725 | return 1; |
726 | } else { |
727 | if (type & IORESOURCE_PREFETCH) { |
728 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || |
729 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || |
730 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
731 | return 1; |
732 | /* Approximating prefetchable by non-prefetchable */ |
733 | res->flags = IORESOURCE_MEM; |
734 | } |
735 | if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) || |
736 | (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) || |
737 | (yenta_search_res(socket, res, BRIDGE_MEM_MIN))) |
738 | return 1; |
739 | } |
740 | |
741 | dev_printk(KERN_INFO, &dev->dev, |
742 | "no resource of type %x available, trying to continue...\n", |
743 | type); |
744 | res->start = res->end = res->flags = 0; |
745 | return 0; |
746 | } |
747 | |
748 | /* |
749 | * Allocate the bridge mappings for the device.. |
750 | */ |
751 | static void yenta_allocate_resources(struct yenta_socket *socket) |
752 | { |
753 | int program = 0; |
754 | program += yenta_allocate_res(socket, 0, IORESOURCE_IO, |
755 | PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0); |
756 | program += yenta_allocate_res(socket, 1, IORESOURCE_IO, |
757 | PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1); |
758 | program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH, |
759 | PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0); |
760 | program += yenta_allocate_res(socket, 3, IORESOURCE_MEM, |
761 | PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1); |
762 | if (program) |
763 | pci_setup_cardbus(socket->dev->subordinate); |
764 | } |
765 | |
766 | |
767 | /* |
768 | * Free the bridge mappings for the device.. |
769 | */ |
770 | static void yenta_free_resources(struct yenta_socket *socket) |
771 | { |
772 | int i; |
773 | for (i = 0; i < 4; i++) { |
774 | struct resource *res; |
775 | res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i; |
776 | if (res->start != 0 && res->end != 0) |
777 | release_resource(res); |
778 | res->start = res->end = res->flags = 0; |
779 | } |
780 | } |
781 | |
782 | |
783 | /* |
784 | * Close it down - release our resources and go home.. |
785 | */ |
786 | static void yenta_close(struct pci_dev *dev) |
787 | { |
788 | struct yenta_socket *sock = pci_get_drvdata(dev); |
789 | |
790 | /* Remove the register attributes */ |
791 | device_remove_file(&dev->dev, &dev_attr_yenta_registers); |
792 | |
793 | /* we don't want a dying socket registered */ |
794 | pcmcia_unregister_socket(&sock->socket); |
795 | |
796 | /* Disable all events so we don't die in an IRQ storm */ |
797 | cb_writel(sock, CB_SOCKET_MASK, 0x0); |
798 | exca_writeb(sock, I365_CSCINT, 0); |
799 | |
800 | if (sock->cb_irq) |
801 | free_irq(sock->cb_irq, sock); |
802 | else |
803 | del_timer_sync(&sock->poll_timer); |
804 | |
805 | if (sock->base) |
806 | iounmap(sock->base); |
807 | yenta_free_resources(sock); |
808 | |
809 | pci_release_regions(dev); |
810 | pci_disable_device(dev); |
811 | pci_set_drvdata(dev, NULL); |
812 | } |
813 | |
814 | |
815 | static struct pccard_operations yenta_socket_operations = { |
816 | .init = yenta_sock_init, |
817 | .suspend = yenta_sock_suspend, |
818 | .get_status = yenta_get_status, |
819 | .set_socket = yenta_set_socket, |
820 | .set_io_map = yenta_set_io_map, |
821 | .set_mem_map = yenta_set_mem_map, |
822 | }; |
823 | |
824 | |
825 | #ifdef CONFIG_YENTA_TI |
826 | #include "ti113x.h" |
827 | #endif |
828 | #ifdef CONFIG_YENTA_RICOH |
829 | #include "ricoh.h" |
830 | #endif |
831 | #ifdef CONFIG_YENTA_TOSHIBA |
832 | #include "topic.h" |
833 | #endif |
834 | #ifdef CONFIG_YENTA_O2 |
835 | #include "o2micro.h" |
836 | #endif |
837 | |
838 | enum { |
839 | CARDBUS_TYPE_DEFAULT = -1, |
840 | CARDBUS_TYPE_TI, |
841 | CARDBUS_TYPE_TI113X, |
842 | CARDBUS_TYPE_TI12XX, |
843 | CARDBUS_TYPE_TI1250, |
844 | CARDBUS_TYPE_RICOH, |
845 | CARDBUS_TYPE_TOPIC95, |
846 | CARDBUS_TYPE_TOPIC97, |
847 | CARDBUS_TYPE_O2MICRO, |
848 | CARDBUS_TYPE_ENE, |
849 | }; |
850 | |
851 | /* |
852 | * Different cardbus controllers have slightly different |
853 | * initialization sequences etc details. List them here.. |
854 | */ |
855 | static struct cardbus_type cardbus_type[] = { |
856 | #ifdef CONFIG_YENTA_TI |
857 | [CARDBUS_TYPE_TI] = { |
858 | .override = ti_override, |
859 | .save_state = ti_save_state, |
860 | .restore_state = ti_restore_state, |
861 | .sock_init = ti_init, |
862 | }, |
863 | [CARDBUS_TYPE_TI113X] = { |
864 | .override = ti113x_override, |
865 | .save_state = ti_save_state, |
866 | .restore_state = ti_restore_state, |
867 | .sock_init = ti_init, |
868 | }, |
869 | [CARDBUS_TYPE_TI12XX] = { |
870 | .override = ti12xx_override, |
871 | .save_state = ti_save_state, |
872 | .restore_state = ti_restore_state, |
873 | .sock_init = ti_init, |
874 | }, |
875 | [CARDBUS_TYPE_TI1250] = { |
876 | .override = ti1250_override, |
877 | .save_state = ti_save_state, |
878 | .restore_state = ti_restore_state, |
879 | .sock_init = ti_init, |
880 | }, |
881 | [CARDBUS_TYPE_ENE] = { |
882 | .override = ene_override, |
883 | .save_state = ti_save_state, |
884 | .restore_state = ti_restore_state, |
885 | .sock_init = ti_init, |
886 | }, |
887 | #endif |
888 | #ifdef CONFIG_YENTA_RICOH |
889 | [CARDBUS_TYPE_RICOH] = { |
890 | .override = ricoh_override, |
891 | .save_state = ricoh_save_state, |
892 | .restore_state = ricoh_restore_state, |
893 | }, |
894 | #endif |
895 | #ifdef CONFIG_YENTA_TOSHIBA |
896 | [CARDBUS_TYPE_TOPIC95] = { |
897 | .override = topic95_override, |
898 | }, |
899 | [CARDBUS_TYPE_TOPIC97] = { |
900 | .override = topic97_override, |
901 | }, |
902 | #endif |
903 | #ifdef CONFIG_YENTA_O2 |
904 | [CARDBUS_TYPE_O2MICRO] = { |
905 | .override = o2micro_override, |
906 | .restore_state = o2micro_restore_state, |
907 | }, |
908 | #endif |
909 | }; |
910 | |
911 | |
912 | static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask) |
913 | { |
914 | int i; |
915 | unsigned long val; |
916 | u32 mask; |
917 | u8 reg; |
918 | |
919 | /* |
920 | * Probe for usable interrupts using the force |
921 | * register to generate bogus card status events. |
922 | */ |
923 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
924 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); |
925 | reg = exca_readb(socket, I365_CSCINT); |
926 | exca_writeb(socket, I365_CSCINT, 0); |
927 | val = probe_irq_on() & isa_irq_mask; |
928 | for (i = 1; i < 16; i++) { |
929 | if (!((val >> i) & 1)) |
930 | continue; |
931 | exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4)); |
932 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); |
933 | udelay(100); |
934 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
935 | } |
936 | cb_writel(socket, CB_SOCKET_MASK, 0); |
937 | exca_writeb(socket, I365_CSCINT, reg); |
938 | |
939 | mask = probe_irq_mask(val) & 0xffff; |
940 | |
941 | return mask; |
942 | } |
943 | |
944 | |
945 | /* |
946 | * yenta PCI irq probing. |
947 | * currently only used in the TI/EnE initialization code |
948 | */ |
949 | #ifdef CONFIG_YENTA_TI |
950 | |
951 | /* interrupt handler, only used during probing */ |
952 | static irqreturn_t yenta_probe_handler(int irq, void *dev_id) |
953 | { |
954 | struct yenta_socket *socket = (struct yenta_socket *) dev_id; |
955 | u8 csc; |
956 | u32 cb_event; |
957 | |
958 | /* Clear interrupt status for the event */ |
959 | cb_event = cb_readl(socket, CB_SOCKET_EVENT); |
960 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
961 | csc = exca_readb(socket, I365_CSC); |
962 | |
963 | if (cb_event || csc) { |
964 | socket->probe_status = 1; |
965 | return IRQ_HANDLED; |
966 | } |
967 | |
968 | return IRQ_NONE; |
969 | } |
970 | |
971 | /* probes the PCI interrupt, use only on override functions */ |
972 | static int yenta_probe_cb_irq(struct yenta_socket *socket) |
973 | { |
974 | u8 reg = 0; |
975 | |
976 | if (!socket->cb_irq) |
977 | return -1; |
978 | |
979 | socket->probe_status = 0; |
980 | |
981 | if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) { |
982 | dev_printk(KERN_WARNING, &socket->dev->dev, |
983 | "request_irq() in yenta_probe_cb_irq() failed!\n"); |
984 | return -1; |
985 | } |
986 | |
987 | /* generate interrupt, wait */ |
988 | if (!socket->dev->irq) |
989 | reg = exca_readb(socket, I365_CSCINT); |
990 | exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG); |
991 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
992 | cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); |
993 | cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS); |
994 | |
995 | msleep(100); |
996 | |
997 | /* disable interrupts */ |
998 | cb_writel(socket, CB_SOCKET_MASK, 0); |
999 | exca_writeb(socket, I365_CSCINT, reg); |
1000 | cb_writel(socket, CB_SOCKET_EVENT, -1); |
1001 | exca_readb(socket, I365_CSC); |
1002 | |
1003 | free_irq(socket->cb_irq, socket); |
1004 | |
1005 | return (int) socket->probe_status; |
1006 | } |
1007 | |
1008 | #endif /* CONFIG_YENTA_TI */ |
1009 | |
1010 | |
1011 | /* |
1012 | * Set static data that doesn't need re-initializing.. |
1013 | */ |
1014 | static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask) |
1015 | { |
1016 | socket->socket.pci_irq = socket->cb_irq; |
1017 | if (isa_probe) |
1018 | socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask); |
1019 | else |
1020 | socket->socket.irq_mask = 0; |
1021 | |
1022 | dev_printk(KERN_INFO, &socket->dev->dev, |
1023 | "ISA IRQ mask 0x%04x, PCI irq %d\n", |
1024 | socket->socket.irq_mask, socket->cb_irq); |
1025 | } |
1026 | |
1027 | /* |
1028 | * Initialize the standard cardbus registers |
1029 | */ |
1030 | static void yenta_config_init(struct yenta_socket *socket) |
1031 | { |
1032 | u16 bridge; |
1033 | struct pci_dev *dev = socket->dev; |
1034 | struct pci_bus_region region; |
1035 | |
1036 | pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]); |
1037 | |
1038 | config_writel(socket, CB_LEGACY_MODE_BASE, 0); |
1039 | config_writel(socket, PCI_BASE_ADDRESS_0, region.start); |
1040 | config_writew(socket, PCI_COMMAND, |
1041 | PCI_COMMAND_IO | |
1042 | PCI_COMMAND_MEMORY | |
1043 | PCI_COMMAND_MASTER | |
1044 | PCI_COMMAND_WAIT); |
1045 | |
1046 | /* MAGIC NUMBERS! Fixme */ |
1047 | config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4); |
1048 | config_writeb(socket, PCI_LATENCY_TIMER, 168); |
1049 | config_writel(socket, PCI_PRIMARY_BUS, |
1050 | (176 << 24) | /* sec. latency timer */ |
1051 | ((unsigned int)dev->subordinate->busn_res.end << 16) | /* subordinate bus */ |
1052 | ((unsigned int)dev->subordinate->busn_res.start << 8) | /* secondary bus */ |
1053 | dev->subordinate->primary); /* primary bus */ |
1054 | |
1055 | /* |
1056 | * Set up the bridging state: |
1057 | * - enable write posting. |
1058 | * - memory window 0 prefetchable, window 1 non-prefetchable |
1059 | * - PCI interrupts enabled if a PCI interrupt exists.. |
1060 | */ |
1061 | bridge = config_readw(socket, CB_BRIDGE_CONTROL); |
1062 | bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN); |
1063 | bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN; |
1064 | config_writew(socket, CB_BRIDGE_CONTROL, bridge); |
1065 | } |
1066 | |
1067 | /** |
1068 | * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge |
1069 | * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to |
1070 | * |
1071 | * Checks if devices on the bus which the CardBus bridge bridges to would be |
1072 | * invisible during PCI scans because of a misconfigured subordinate number |
1073 | * of the parent brige - some BIOSes seem to be too lazy to set it right. |
1074 | * Does the fixup carefully by checking how far it can go without conflicts. |
1075 | * See http://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information. |
1076 | */ |
1077 | static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge) |
1078 | { |
1079 | struct list_head *tmp; |
1080 | unsigned char upper_limit; |
1081 | /* |
1082 | * We only check and fix the parent bridge: All systems which need |
1083 | * this fixup that have been reviewed are laptops and the only bridge |
1084 | * which needed fixing was the parent bridge of the CardBus bridge: |
1085 | */ |
1086 | struct pci_bus *bridge_to_fix = cardbus_bridge->parent; |
1087 | |
1088 | /* Check bus numbers are already set up correctly: */ |
1089 | if (bridge_to_fix->busn_res.end >= cardbus_bridge->busn_res.end) |
1090 | return; /* The subordinate number is ok, nothing to do */ |
1091 | |
1092 | if (!bridge_to_fix->parent) |
1093 | return; /* Root bridges are ok */ |
1094 | |
1095 | /* stay within the limits of the bus range of the parent: */ |
1096 | upper_limit = bridge_to_fix->parent->busn_res.end; |
1097 | |
1098 | /* check the bus ranges of all silbling bridges to prevent overlap */ |
1099 | list_for_each(tmp, &bridge_to_fix->parent->children) { |
1100 | struct pci_bus *silbling = pci_bus_b(tmp); |
1101 | /* |
1102 | * If the silbling has a higher secondary bus number |
1103 | * and it's secondary is equal or smaller than our |
1104 | * current upper limit, set the new upper limit to |
1105 | * the bus number below the silbling's range: |
1106 | */ |
1107 | if (silbling->busn_res.start > bridge_to_fix->busn_res.end |
1108 | && silbling->busn_res.start <= upper_limit) |
1109 | upper_limit = silbling->busn_res.start - 1; |
1110 | } |
1111 | |
1112 | /* Show that the wanted subordinate number is not possible: */ |
1113 | if (cardbus_bridge->busn_res.end > upper_limit) |
1114 | dev_printk(KERN_WARNING, &cardbus_bridge->dev, |
1115 | "Upper limit for fixing this " |
1116 | "bridge's parent bridge: #%02x\n", upper_limit); |
1117 | |
1118 | /* If we have room to increase the bridge's subordinate number, */ |
1119 | if (bridge_to_fix->busn_res.end < upper_limit) { |
1120 | |
1121 | /* use the highest number of the hidden bus, within limits */ |
1122 | unsigned char subordinate_to_assign = |
1123 | min_t(int, cardbus_bridge->busn_res.end, upper_limit); |
1124 | |
1125 | dev_printk(KERN_INFO, &bridge_to_fix->dev, |
1126 | "Raising subordinate bus# of parent " |
1127 | "bus (#%02x) from #%02x to #%02x\n", |
1128 | bridge_to_fix->number, |
1129 | (int)bridge_to_fix->busn_res.end, subordinate_to_assign); |
1130 | |
1131 | /* Save the new subordinate in the bus struct of the bridge */ |
1132 | bridge_to_fix->busn_res.end = subordinate_to_assign; |
1133 | |
1134 | /* and update the PCI config space with the new subordinate */ |
1135 | pci_write_config_byte(bridge_to_fix->self, |
1136 | PCI_SUBORDINATE_BUS, bridge_to_fix->busn_res.end); |
1137 | } |
1138 | } |
1139 | |
1140 | /* |
1141 | * Initialize a cardbus controller. Make sure we have a usable |
1142 | * interrupt, and that we can map the cardbus area. Fill in the |
1143 | * socket information structure.. |
1144 | */ |
1145 | static int yenta_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1146 | { |
1147 | struct yenta_socket *socket; |
1148 | int ret; |
1149 | |
1150 | /* |
1151 | * If we failed to assign proper bus numbers for this cardbus |
1152 | * controller during PCI probe, its subordinate pci_bus is NULL. |
1153 | * Bail out if so. |
1154 | */ |
1155 | if (!dev->subordinate) { |
1156 | dev_printk(KERN_ERR, &dev->dev, "no bus associated! " |
1157 | "(try 'pci=assign-busses')\n"); |
1158 | return -ENODEV; |
1159 | } |
1160 | |
1161 | socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL); |
1162 | if (!socket) |
1163 | return -ENOMEM; |
1164 | |
1165 | /* prepare pcmcia_socket */ |
1166 | socket->socket.ops = ¥ta_socket_operations; |
1167 | socket->socket.resource_ops = &pccard_nonstatic_ops; |
1168 | socket->socket.dev.parent = &dev->dev; |
1169 | socket->socket.driver_data = socket; |
1170 | socket->socket.owner = THIS_MODULE; |
1171 | socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD; |
1172 | socket->socket.map_size = 0x1000; |
1173 | socket->socket.cb_dev = dev; |
1174 | |
1175 | /* prepare struct yenta_socket */ |
1176 | socket->dev = dev; |
1177 | pci_set_drvdata(dev, socket); |
1178 | |
1179 | /* |
1180 | * Do some basic sanity checking.. |
1181 | */ |
1182 | if (pci_enable_device(dev)) { |
1183 | ret = -EBUSY; |
1184 | goto free; |
1185 | } |
1186 | |
1187 | ret = pci_request_regions(dev, "yenta_socket"); |
1188 | if (ret) |
1189 | goto disable; |
1190 | |
1191 | if (!pci_resource_start(dev, 0)) { |
1192 | dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n"); |
1193 | ret = -ENODEV; |
1194 | goto release; |
1195 | } |
1196 | |
1197 | /* |
1198 | * Ok, start setup.. Map the cardbus registers, |
1199 | * and request the IRQ. |
1200 | */ |
1201 | socket->base = ioremap(pci_resource_start(dev, 0), 0x1000); |
1202 | if (!socket->base) { |
1203 | ret = -ENOMEM; |
1204 | goto release; |
1205 | } |
1206 | |
1207 | /* |
1208 | * report the subsystem vendor and device for help debugging |
1209 | * the irq stuff... |
1210 | */ |
1211 | dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n", |
1212 | dev->subsystem_vendor, dev->subsystem_device); |
1213 | |
1214 | yenta_config_init(socket); |
1215 | |
1216 | /* Disable all events */ |
1217 | cb_writel(socket, CB_SOCKET_MASK, 0x0); |
1218 | |
1219 | /* Set up the bridge regions.. */ |
1220 | yenta_allocate_resources(socket); |
1221 | |
1222 | socket->cb_irq = dev->irq; |
1223 | |
1224 | /* Do we have special options for the device? */ |
1225 | if (id->driver_data != CARDBUS_TYPE_DEFAULT && |
1226 | id->driver_data < ARRAY_SIZE(cardbus_type)) { |
1227 | socket->type = &cardbus_type[id->driver_data]; |
1228 | |
1229 | ret = socket->type->override(socket); |
1230 | if (ret < 0) |
1231 | goto unmap; |
1232 | } |
1233 | |
1234 | /* We must finish initialization here */ |
1235 | |
1236 | if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) { |
1237 | /* No IRQ or request_irq failed. Poll */ |
1238 | socket->cb_irq = 0; /* But zero is a valid IRQ number. */ |
1239 | init_timer(&socket->poll_timer); |
1240 | socket->poll_timer.function = yenta_interrupt_wrapper; |
1241 | socket->poll_timer.data = (unsigned long)socket; |
1242 | socket->poll_timer.expires = jiffies + HZ; |
1243 | add_timer(&socket->poll_timer); |
1244 | dev_printk(KERN_INFO, &dev->dev, |
1245 | "no PCI IRQ, CardBus support disabled for this " |
1246 | "socket.\n"); |
1247 | dev_printk(KERN_INFO, &dev->dev, |
1248 | "check your BIOS CardBus, BIOS IRQ or ACPI " |
1249 | "settings.\n"); |
1250 | } else { |
1251 | socket->socket.features |= SS_CAP_CARDBUS; |
1252 | } |
1253 | |
1254 | /* Figure out what the dang thing can do for the PCMCIA layer... */ |
1255 | yenta_interrogate(socket); |
1256 | yenta_get_socket_capabilities(socket, isa_interrupts); |
1257 | dev_printk(KERN_INFO, &dev->dev, |
1258 | "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); |
1259 | |
1260 | yenta_fixup_parent_bridge(dev->subordinate); |
1261 | |
1262 | /* Register it with the pcmcia layer.. */ |
1263 | ret = pcmcia_register_socket(&socket->socket); |
1264 | if (ret == 0) { |
1265 | /* Add the yenta register attributes */ |
1266 | ret = device_create_file(&dev->dev, &dev_attr_yenta_registers); |
1267 | if (ret == 0) |
1268 | goto out; |
1269 | |
1270 | /* error path... */ |
1271 | pcmcia_unregister_socket(&socket->socket); |
1272 | } |
1273 | |
1274 | unmap: |
1275 | iounmap(socket->base); |
1276 | release: |
1277 | pci_release_regions(dev); |
1278 | disable: |
1279 | pci_disable_device(dev); |
1280 | free: |
1281 | kfree(socket); |
1282 | out: |
1283 | return ret; |
1284 | } |
1285 | |
1286 | #ifdef CONFIG_PM |
1287 | static int yenta_dev_suspend_noirq(struct device *dev) |
1288 | { |
1289 | struct pci_dev *pdev = to_pci_dev(dev); |
1290 | struct yenta_socket *socket = pci_get_drvdata(pdev); |
1291 | |
1292 | if (!socket) |
1293 | return 0; |
1294 | |
1295 | if (socket->type && socket->type->save_state) |
1296 | socket->type->save_state(socket); |
1297 | |
1298 | pci_save_state(pdev); |
1299 | pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]); |
1300 | pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]); |
1301 | pci_disable_device(pdev); |
1302 | |
1303 | return 0; |
1304 | } |
1305 | |
1306 | static int yenta_dev_resume_noirq(struct device *dev) |
1307 | { |
1308 | struct pci_dev *pdev = to_pci_dev(dev); |
1309 | struct yenta_socket *socket = pci_get_drvdata(pdev); |
1310 | int ret; |
1311 | |
1312 | if (!socket) |
1313 | return 0; |
1314 | |
1315 | pci_write_config_dword(pdev, 16*4, socket->saved_state[0]); |
1316 | pci_write_config_dword(pdev, 17*4, socket->saved_state[1]); |
1317 | |
1318 | ret = pci_enable_device(pdev); |
1319 | if (ret) |
1320 | return ret; |
1321 | |
1322 | pci_set_master(pdev); |
1323 | |
1324 | if (socket->type && socket->type->restore_state) |
1325 | socket->type->restore_state(socket); |
1326 | |
1327 | return 0; |
1328 | } |
1329 | |
1330 | static const struct dev_pm_ops yenta_pm_ops = { |
1331 | .suspend_noirq = yenta_dev_suspend_noirq, |
1332 | .resume_noirq = yenta_dev_resume_noirq, |
1333 | .freeze_noirq = yenta_dev_suspend_noirq, |
1334 | .thaw_noirq = yenta_dev_resume_noirq, |
1335 | .poweroff_noirq = yenta_dev_suspend_noirq, |
1336 | .restore_noirq = yenta_dev_resume_noirq, |
1337 | }; |
1338 | |
1339 | #define YENTA_PM_OPS (¥ta_pm_ops) |
1340 | #else |
1341 | #define YENTA_PM_OPS NULL |
1342 | #endif |
1343 | |
1344 | #define CB_ID(vend, dev, type) \ |
1345 | { \ |
1346 | .vendor = vend, \ |
1347 | .device = dev, \ |
1348 | .subvendor = PCI_ANY_ID, \ |
1349 | .subdevice = PCI_ANY_ID, \ |
1350 | .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \ |
1351 | .class_mask = ~0, \ |
1352 | .driver_data = CARDBUS_TYPE_##type, \ |
1353 | } |
1354 | |
1355 | static DEFINE_PCI_DEVICE_TABLE(yenta_table) = { |
1356 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI), |
1357 | |
1358 | /* |
1359 | * TBD: Check if these TI variants can use more |
1360 | * advanced overrides instead. (I can't get the |
1361 | * data sheets for these devices. --rmk) |
1362 | */ |
1363 | #ifdef CONFIG_YENTA_TI |
1364 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI), |
1365 | |
1366 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X), |
1367 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X), |
1368 | |
1369 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX), |
1370 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX), |
1371 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX), |
1372 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX), |
1373 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX), |
1374 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX), |
1375 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX), |
1376 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX), |
1377 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX), |
1378 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX), |
1379 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX), |
1380 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX), |
1381 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX), |
1382 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX), |
1383 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX), |
1384 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX), |
1385 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX), |
1386 | |
1387 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250), |
1388 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250), |
1389 | |
1390 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX), |
1391 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX), |
1392 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX), |
1393 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX), |
1394 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX), |
1395 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX), |
1396 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX), |
1397 | CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX), |
1398 | |
1399 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE), |
1400 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE), |
1401 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE), |
1402 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE), |
1403 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE), |
1404 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE), |
1405 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE), |
1406 | CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE), |
1407 | #endif /* CONFIG_YENTA_TI */ |
1408 | |
1409 | #ifdef CONFIG_YENTA_RICOH |
1410 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH), |
1411 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH), |
1412 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH), |
1413 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH), |
1414 | CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH), |
1415 | #endif |
1416 | |
1417 | #ifdef CONFIG_YENTA_TOSHIBA |
1418 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95), |
1419 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97), |
1420 | CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97), |
1421 | #endif |
1422 | |
1423 | #ifdef CONFIG_YENTA_O2 |
1424 | CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO), |
1425 | #endif |
1426 | |
1427 | /* match any cardbus bridge */ |
1428 | CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT), |
1429 | { /* all zeroes */ } |
1430 | }; |
1431 | MODULE_DEVICE_TABLE(pci, yenta_table); |
1432 | |
1433 | |
1434 | static struct pci_driver yenta_cardbus_driver = { |
1435 | .name = "yenta_cardbus", |
1436 | .id_table = yenta_table, |
1437 | .probe = yenta_probe, |
1438 | .remove = yenta_close, |
1439 | .driver.pm = YENTA_PM_OPS, |
1440 | }; |
1441 | |
1442 | |
1443 | static int __init yenta_socket_init(void) |
1444 | { |
1445 | return pci_register_driver(¥ta_cardbus_driver); |
1446 | } |
1447 | |
1448 | |
1449 | static void __exit yenta_socket_exit(void) |
1450 | { |
1451 | pci_unregister_driver(¥ta_cardbus_driver); |
1452 | } |
1453 | |
1454 | |
1455 | module_init(yenta_socket_init); |
1456 | module_exit(yenta_socket_exit); |
1457 | |
1458 | MODULE_LICENSE("GPL"); |
1459 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
jz-2.6.34-rc6
jz-2.6.34-rc7
jz-2.6.35
jz-2.6.36
jz-2.6.37
jz-2.6.38
jz-2.6.39
jz-3.0
jz-3.1
jz-3.11
jz-3.12
jz-3.13
jz-3.15
jz-3.16
jz-3.18-dt
jz-3.2
jz-3.3
jz-3.4
jz-3.5
jz-3.6
jz-3.6-rc2-pwm
jz-3.9
jz-3.9-clk
jz-3.9-rc8
jz47xx
jz47xx-2.6.38
master
Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9