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1 | /* |
2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> |
5 | * Copyright (C) 2006 Tower Technologies |
6 | * Copyright (C) 2008 Paul Mundt |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. |
11 | */ |
12 | |
13 | #include <linux/i2c.h> |
14 | #include <linux/rtc.h> |
15 | #include <linux/bcd.h> |
16 | #include <linux/slab.h> |
17 | #include <linux/module.h> |
18 | |
19 | #define DRV_VERSION "0.6" |
20 | |
21 | |
22 | /* |
23 | * Ricoh has a family of I2C based RTCs, which differ only slightly from |
24 | * each other. Differences center on pinout (e.g. how many interrupts, |
25 | * output clock, etc) and how the control registers are used. The '372 |
26 | * is significant only because that's the one this driver first supported. |
27 | */ |
28 | #define RS5C372_REG_SECS 0 |
29 | #define RS5C372_REG_MINS 1 |
30 | #define RS5C372_REG_HOURS 2 |
31 | #define RS5C372_REG_WDAY 3 |
32 | #define RS5C372_REG_DAY 4 |
33 | #define RS5C372_REG_MONTH 5 |
34 | #define RS5C372_REG_YEAR 6 |
35 | #define RS5C372_REG_TRIM 7 |
36 | # define RS5C372_TRIM_XSL 0x80 |
37 | # define RS5C372_TRIM_MASK 0x7F |
38 | |
39 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ |
40 | #define RS5C_REG_ALARM_A_HOURS 9 |
41 | #define RS5C_REG_ALARM_A_WDAY 10 |
42 | |
43 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ |
44 | #define RS5C_REG_ALARM_B_HOURS 12 |
45 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ |
46 | |
47 | #define RS5C_REG_CTRL1 14 |
48 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ |
49 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ |
50 | # define RV5C387_CTRL1_24 (1 << 5) |
51 | # define RS5C372A_CTRL1_SL1 (1 << 5) |
52 | # define RS5C_CTRL1_CT_MASK (7 << 0) |
53 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ |
54 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ |
55 | #define RS5C_REG_CTRL2 15 |
56 | # define RS5C372_CTRL2_24 (1 << 5) |
57 | # define R2025_CTRL2_XST (1 << 5) |
58 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ |
59 | # define RS5C_CTRL2_CTFG (1 << 2) |
60 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ |
61 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ |
62 | |
63 | |
64 | /* to read (style 1) or write registers starting at R */ |
65 | #define RS5C_ADDR(R) (((R) << 4) | 0) |
66 | |
67 | |
68 | enum rtc_type { |
69 | rtc_undef = 0, |
70 | rtc_r2025sd, |
71 | rtc_rs5c372a, |
72 | rtc_rs5c372b, |
73 | rtc_rv5c386, |
74 | rtc_rv5c387a, |
75 | }; |
76 | |
77 | static const struct i2c_device_id rs5c372_id[] = { |
78 | { "r2025sd", rtc_r2025sd }, |
79 | { "rs5c372a", rtc_rs5c372a }, |
80 | { "rs5c372b", rtc_rs5c372b }, |
81 | { "rv5c386", rtc_rv5c386 }, |
82 | { "rv5c387a", rtc_rv5c387a }, |
83 | { } |
84 | }; |
85 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); |
86 | |
87 | /* REVISIT: this assumes that: |
88 | * - we're in the 21st century, so it's safe to ignore the century |
89 | * bit for rv5c38[67] (REG_MONTH bit 7); |
90 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) |
91 | */ |
92 | struct rs5c372 { |
93 | struct i2c_client *client; |
94 | struct rtc_device *rtc; |
95 | enum rtc_type type; |
96 | unsigned time24:1; |
97 | unsigned has_irq:1; |
98 | unsigned smbus:1; |
99 | char buf[17]; |
100 | char *regs; |
101 | }; |
102 | |
103 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
104 | { |
105 | struct i2c_client *client = rs5c->client; |
106 | struct i2c_msg msgs[] = { |
107 | { |
108 | .addr = client->addr, |
109 | .flags = I2C_M_RD, |
110 | .len = sizeof(rs5c->buf), |
111 | .buf = rs5c->buf |
112 | }, |
113 | }; |
114 | |
115 | /* This implements the third reading method from the datasheet, using |
116 | * an internal address that's reset after each transaction (by STOP) |
117 | * to 0x0f ... so we read extra registers, and skip the first one. |
118 | * |
119 | * The first method doesn't work with the iop3xx adapter driver, on at |
120 | * least 80219 chips; this works around that bug. |
121 | * |
122 | * The third method on the other hand doesn't work for the SMBus-only |
123 | * configurations, so we use the the first method there, stripping off |
124 | * the extra register in the process. |
125 | */ |
126 | if (rs5c->smbus) { |
127 | int addr = RS5C_ADDR(RS5C372_REG_SECS); |
128 | int size = sizeof(rs5c->buf) - 1; |
129 | |
130 | if (i2c_smbus_read_i2c_block_data(client, addr, size, |
131 | rs5c->buf + 1) != size) { |
132 | dev_warn(&client->dev, "can't read registers\n"); |
133 | return -EIO; |
134 | } |
135 | } else { |
136 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { |
137 | dev_warn(&client->dev, "can't read registers\n"); |
138 | return -EIO; |
139 | } |
140 | } |
141 | |
142 | dev_dbg(&client->dev, |
143 | "%02x %02x %02x (%02x) %02x %02x %02x (%02x), " |
144 | "%02x %02x %02x, %02x %02x %02x; %02x %02x\n", |
145 | rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3], |
146 | rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7], |
147 | rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11], |
148 | rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]); |
149 | |
150 | return 0; |
151 | } |
152 | |
153 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
154 | { |
155 | unsigned hour; |
156 | |
157 | if (rs5c->time24) |
158 | return bcd2bin(reg & 0x3f); |
159 | |
160 | hour = bcd2bin(reg & 0x1f); |
161 | if (hour == 12) |
162 | hour = 0; |
163 | if (reg & 0x20) |
164 | hour += 12; |
165 | return hour; |
166 | } |
167 | |
168 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) |
169 | { |
170 | if (rs5c->time24) |
171 | return bin2bcd(hour); |
172 | |
173 | if (hour > 12) |
174 | return 0x20 | bin2bcd(hour - 12); |
175 | if (hour == 12) |
176 | return 0x20 | bin2bcd(12); |
177 | if (hour == 0) |
178 | return bin2bcd(12); |
179 | return bin2bcd(hour); |
180 | } |
181 | |
182 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
183 | { |
184 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
185 | int status = rs5c_get_regs(rs5c); |
186 | |
187 | if (status < 0) |
188 | return status; |
189 | |
190 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
191 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); |
192 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
193 | |
194 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
195 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); |
196 | |
197 | /* tm->tm_mon is zero-based */ |
198 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
199 | |
200 | /* year is 1900 + tm->tm_year */ |
201 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
202 | |
203 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
204 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
205 | __func__, |
206 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
207 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
208 | |
209 | /* rtc might need initialization */ |
210 | return rtc_valid_tm(tm); |
211 | } |
212 | |
213 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) |
214 | { |
215 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
216 | unsigned char buf[7]; |
217 | int addr; |
218 | |
219 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
220 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
221 | __func__, |
222 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
223 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
224 | |
225 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
226 | buf[0] = bin2bcd(tm->tm_sec); |
227 | buf[1] = bin2bcd(tm->tm_min); |
228 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
229 | buf[3] = bin2bcd(tm->tm_wday); |
230 | buf[4] = bin2bcd(tm->tm_mday); |
231 | buf[5] = bin2bcd(tm->tm_mon + 1); |
232 | buf[6] = bin2bcd(tm->tm_year - 100); |
233 | |
234 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
235 | dev_err(&client->dev, "%s: write error\n", __func__); |
236 | return -EIO; |
237 | } |
238 | |
239 | return 0; |
240 | } |
241 | |
242 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
243 | #define NEED_TRIM |
244 | #endif |
245 | |
246 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
247 | #define NEED_TRIM |
248 | #endif |
249 | |
250 | #ifdef NEED_TRIM |
251 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
252 | { |
253 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
254 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
255 | |
256 | if (osc) |
257 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
258 | |
259 | if (trim) { |
260 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
261 | tmp &= RS5C372_TRIM_MASK; |
262 | if (tmp & 0x3e) { |
263 | int t = tmp & 0x3f; |
264 | |
265 | if (tmp & 0x40) |
266 | t = (~t | (s8)0xc0) + 1; |
267 | else |
268 | t = t - 1; |
269 | |
270 | tmp = t * 2; |
271 | } else |
272 | tmp = 0; |
273 | *trim = tmp; |
274 | } |
275 | |
276 | return 0; |
277 | } |
278 | #endif |
279 | |
280 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) |
281 | { |
282 | return rs5c372_get_datetime(to_i2c_client(dev), tm); |
283 | } |
284 | |
285 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) |
286 | { |
287 | return rs5c372_set_datetime(to_i2c_client(dev), tm); |
288 | } |
289 | |
290 | |
291 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
292 | { |
293 | struct i2c_client *client = to_i2c_client(dev); |
294 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
295 | unsigned char buf; |
296 | int status, addr; |
297 | |
298 | buf = rs5c->regs[RS5C_REG_CTRL1]; |
299 | |
300 | if (!rs5c->has_irq) |
301 | return -EINVAL; |
302 | |
303 | status = rs5c_get_regs(rs5c); |
304 | if (status < 0) |
305 | return status; |
306 | |
307 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
308 | if (enabled) |
309 | buf |= RS5C_CTRL1_AALE; |
310 | else |
311 | buf &= ~RS5C_CTRL1_AALE; |
312 | |
313 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { |
314 | dev_warn(dev, "can't update alarm\n"); |
315 | status = -EIO; |
316 | } else |
317 | rs5c->regs[RS5C_REG_CTRL1] = buf; |
318 | |
319 | return status; |
320 | } |
321 | |
322 | |
323 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
324 | * which only exposes a polled programming interface; and since |
325 | * these calls map directly to those EFI requests; we don't demand |
326 | * we have an IRQ for this chip when we go through this API. |
327 | * |
328 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs |
329 | * though, managed through RTC_AIE_{ON,OFF} requests. |
330 | */ |
331 | |
332 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
333 | { |
334 | struct i2c_client *client = to_i2c_client(dev); |
335 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
336 | int status; |
337 | |
338 | status = rs5c_get_regs(rs5c); |
339 | if (status < 0) |
340 | return status; |
341 | |
342 | /* report alarm time */ |
343 | t->time.tm_sec = 0; |
344 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
345 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
346 | t->time.tm_mday = -1; |
347 | t->time.tm_mon = -1; |
348 | t->time.tm_year = -1; |
349 | t->time.tm_wday = -1; |
350 | t->time.tm_yday = -1; |
351 | t->time.tm_isdst = -1; |
352 | |
353 | /* ... and status */ |
354 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); |
355 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); |
356 | |
357 | return 0; |
358 | } |
359 | |
360 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
361 | { |
362 | struct i2c_client *client = to_i2c_client(dev); |
363 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
364 | int status, addr, i; |
365 | unsigned char buf[3]; |
366 | |
367 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ |
368 | if (t->time.tm_mday != -1 |
369 | || t->time.tm_mon != -1 |
370 | || t->time.tm_year != -1) |
371 | return -EINVAL; |
372 | |
373 | /* REVISIT: round up tm_sec */ |
374 | |
375 | /* if needed, disable irq (clears pending status) */ |
376 | status = rs5c_get_regs(rs5c); |
377 | if (status < 0) |
378 | return status; |
379 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { |
380 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
381 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; |
382 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { |
383 | dev_dbg(dev, "can't disable alarm\n"); |
384 | return -EIO; |
385 | } |
386 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
387 | } |
388 | |
389 | /* set alarm */ |
390 | buf[0] = bin2bcd(t->time.tm_min); |
391 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
392 | buf[2] = 0x7f; /* any/all days */ |
393 | |
394 | for (i = 0; i < sizeof(buf); i++) { |
395 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); |
396 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { |
397 | dev_dbg(dev, "can't set alarm time\n"); |
398 | return -EIO; |
399 | } |
400 | } |
401 | |
402 | /* ... and maybe enable its irq */ |
403 | if (t->enabled) { |
404 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
405 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; |
406 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) |
407 | dev_warn(dev, "can't enable alarm\n"); |
408 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
409 | } |
410 | |
411 | return 0; |
412 | } |
413 | |
414 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
415 | |
416 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
417 | { |
418 | int err, osc, trim; |
419 | |
420 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
421 | if (err == 0) { |
422 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
423 | osc / 1000, osc % 1000); |
424 | seq_printf(seq, "trim\t\t: %d\n", trim); |
425 | } |
426 | |
427 | return 0; |
428 | } |
429 | |
430 | #else |
431 | #define rs5c372_rtc_proc NULL |
432 | #endif |
433 | |
434 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
435 | .proc = rs5c372_rtc_proc, |
436 | .read_time = rs5c372_rtc_read_time, |
437 | .set_time = rs5c372_rtc_set_time, |
438 | .read_alarm = rs5c_read_alarm, |
439 | .set_alarm = rs5c_set_alarm, |
440 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
441 | }; |
442 | |
443 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
444 | |
445 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
446 | struct device_attribute *attr, char *buf) |
447 | { |
448 | int err, trim; |
449 | |
450 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
451 | if (err) |
452 | return err; |
453 | |
454 | return sprintf(buf, "%d\n", trim); |
455 | } |
456 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); |
457 | |
458 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, |
459 | struct device_attribute *attr, char *buf) |
460 | { |
461 | int err, osc; |
462 | |
463 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
464 | if (err) |
465 | return err; |
466 | |
467 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
468 | } |
469 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); |
470 | |
471 | static int rs5c_sysfs_register(struct device *dev) |
472 | { |
473 | int err; |
474 | |
475 | err = device_create_file(dev, &dev_attr_trim); |
476 | if (err) |
477 | return err; |
478 | err = device_create_file(dev, &dev_attr_osc); |
479 | if (err) |
480 | device_remove_file(dev, &dev_attr_trim); |
481 | |
482 | return err; |
483 | } |
484 | |
485 | static void rs5c_sysfs_unregister(struct device *dev) |
486 | { |
487 | device_remove_file(dev, &dev_attr_trim); |
488 | device_remove_file(dev, &dev_attr_osc); |
489 | } |
490 | |
491 | #else |
492 | static int rs5c_sysfs_register(struct device *dev) |
493 | { |
494 | return 0; |
495 | } |
496 | |
497 | static void rs5c_sysfs_unregister(struct device *dev) |
498 | { |
499 | /* nothing */ |
500 | } |
501 | #endif /* SYSFS */ |
502 | |
503 | static struct i2c_driver rs5c372_driver; |
504 | |
505 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
506 | { |
507 | unsigned char buf[2]; |
508 | int addr, i, ret = 0; |
509 | |
510 | if (rs5c372->type == rtc_r2025sd) { |
511 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) |
512 | return ret; |
513 | rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; |
514 | } else { |
515 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) |
516 | return ret; |
517 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; |
518 | } |
519 | |
520 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
521 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; |
522 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; |
523 | |
524 | /* use 24hr mode */ |
525 | switch (rs5c372->type) { |
526 | case rtc_rs5c372a: |
527 | case rtc_rs5c372b: |
528 | buf[1] |= RS5C372_CTRL2_24; |
529 | rs5c372->time24 = 1; |
530 | break; |
531 | case rtc_r2025sd: |
532 | case rtc_rv5c386: |
533 | case rtc_rv5c387a: |
534 | buf[0] |= RV5C387_CTRL1_24; |
535 | rs5c372->time24 = 1; |
536 | break; |
537 | default: |
538 | /* impossible */ |
539 | break; |
540 | } |
541 | |
542 | for (i = 0; i < sizeof(buf); i++) { |
543 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); |
544 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); |
545 | if (unlikely(ret < 0)) |
546 | return ret; |
547 | } |
548 | |
549 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; |
550 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; |
551 | |
552 | return 0; |
553 | } |
554 | |
555 | static int rs5c372_probe(struct i2c_client *client, |
556 | const struct i2c_device_id *id) |
557 | { |
558 | int err = 0; |
559 | int smbus_mode = 0; |
560 | struct rs5c372 *rs5c372; |
561 | struct rtc_time tm; |
562 | |
563 | dev_dbg(&client->dev, "%s\n", __func__); |
564 | |
565 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
566 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { |
567 | /* |
568 | * If we don't have any master mode adapter, try breaking |
569 | * it down in to the barest of capabilities. |
570 | */ |
571 | if (i2c_check_functionality(client->adapter, |
572 | I2C_FUNC_SMBUS_BYTE_DATA | |
573 | I2C_FUNC_SMBUS_I2C_BLOCK)) |
574 | smbus_mode = 1; |
575 | else { |
576 | /* Still no good, give up */ |
577 | err = -ENODEV; |
578 | goto exit; |
579 | } |
580 | } |
581 | |
582 | if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { |
583 | err = -ENOMEM; |
584 | goto exit; |
585 | } |
586 | |
587 | rs5c372->client = client; |
588 | i2c_set_clientdata(client, rs5c372); |
589 | rs5c372->type = id->driver_data; |
590 | |
591 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
592 | rs5c372->regs = &rs5c372->buf[1]; |
593 | rs5c372->smbus = smbus_mode; |
594 | |
595 | err = rs5c_get_regs(rs5c372); |
596 | if (err < 0) |
597 | goto exit_kfree; |
598 | |
599 | /* clock may be set for am/pm or 24 hr time */ |
600 | switch (rs5c372->type) { |
601 | case rtc_rs5c372a: |
602 | case rtc_rs5c372b: |
603 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. |
604 | * so does periodic irq, except some 327a modes. |
605 | */ |
606 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) |
607 | rs5c372->time24 = 1; |
608 | break; |
609 | case rtc_r2025sd: |
610 | case rtc_rv5c386: |
611 | case rtc_rv5c387a: |
612 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) |
613 | rs5c372->time24 = 1; |
614 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic |
615 | * irq, on both 386 and 387 |
616 | */ |
617 | break; |
618 | default: |
619 | dev_err(&client->dev, "unknown RTC type\n"); |
620 | goto exit_kfree; |
621 | } |
622 | |
623 | /* if the oscillator lost power and no other software (like |
624 | * the bootloader) set it up, do it here. |
625 | * |
626 | * The R2025S/D does this a little differently than the other |
627 | * parts, so we special case that.. |
628 | */ |
629 | err = rs5c_oscillator_setup(rs5c372); |
630 | if (unlikely(err < 0)) { |
631 | dev_err(&client->dev, "setup error\n"); |
632 | goto exit_kfree; |
633 | } |
634 | |
635 | if (rs5c372_get_datetime(client, &tm) < 0) |
636 | dev_warn(&client->dev, "clock needs to be set\n"); |
637 | |
638 | dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", |
639 | ({ char *s; switch (rs5c372->type) { |
640 | case rtc_r2025sd: s = "r2025sd"; break; |
641 | case rtc_rs5c372a: s = "rs5c372a"; break; |
642 | case rtc_rs5c372b: s = "rs5c372b"; break; |
643 | case rtc_rv5c386: s = "rv5c386"; break; |
644 | case rtc_rv5c387a: s = "rv5c387a"; break; |
645 | default: s = "chip"; break; |
646 | }; s;}), |
647 | rs5c372->time24 ? "24hr" : "am/pm" |
648 | ); |
649 | |
650 | /* REVISIT use client->irq to register alarm irq ... */ |
651 | |
652 | rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name, |
653 | &client->dev, &rs5c372_rtc_ops, THIS_MODULE); |
654 | |
655 | if (IS_ERR(rs5c372->rtc)) { |
656 | err = PTR_ERR(rs5c372->rtc); |
657 | goto exit_kfree; |
658 | } |
659 | |
660 | err = rs5c_sysfs_register(&client->dev); |
661 | if (err) |
662 | goto exit_devreg; |
663 | |
664 | return 0; |
665 | |
666 | exit_devreg: |
667 | rtc_device_unregister(rs5c372->rtc); |
668 | |
669 | exit_kfree: |
670 | kfree(rs5c372); |
671 | |
672 | exit: |
673 | return err; |
674 | } |
675 | |
676 | static int rs5c372_remove(struct i2c_client *client) |
677 | { |
678 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
679 | |
680 | rtc_device_unregister(rs5c372->rtc); |
681 | rs5c_sysfs_unregister(&client->dev); |
682 | kfree(rs5c372); |
683 | return 0; |
684 | } |
685 | |
686 | static struct i2c_driver rs5c372_driver = { |
687 | .driver = { |
688 | .name = "rtc-rs5c372", |
689 | }, |
690 | .probe = rs5c372_probe, |
691 | .remove = rs5c372_remove, |
692 | .id_table = rs5c372_id, |
693 | }; |
694 | |
695 | module_i2c_driver(rs5c372_driver); |
696 | |
697 | MODULE_AUTHOR( |
698 | "Pavel Mironchik <pmironchik@optifacio.net>, " |
699 | "Alessandro Zummo <a.zummo@towertech.it>, " |
700 | "Paul Mundt <lethal@linux-sh.org>"); |
701 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
702 | MODULE_LICENSE("GPL"); |
703 | MODULE_VERSION(DRV_VERSION); |
704 |
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