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1 | /* |
2 | * Disk Array driver for HP Smart Array SAS controllers |
3 | * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by |
7 | * the Free Software Foundation; version 2 of the License. |
8 | * |
9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
12 | * NON INFRINGEMENT. See the GNU General Public License for more details. |
13 | * |
14 | * You should have received a copy of the GNU General Public License |
15 | * along with this program; if not, write to the Free Software |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
17 | * |
18 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com |
19 | * |
20 | */ |
21 | #ifndef HPSA_CMD_H |
22 | #define HPSA_CMD_H |
23 | |
24 | /* general boundary defintions */ |
25 | #define SENSEINFOBYTES 32 /* may vary between hbas */ |
26 | #define SG_ENTRIES_IN_CMD 32 /* Max SG entries excluding chain blocks */ |
27 | #define HPSA_SG_CHAIN 0x80000000 |
28 | #define MAXREPLYQS 256 |
29 | |
30 | /* Command Status value */ |
31 | #define CMD_SUCCESS 0x0000 |
32 | #define CMD_TARGET_STATUS 0x0001 |
33 | #define CMD_DATA_UNDERRUN 0x0002 |
34 | #define CMD_DATA_OVERRUN 0x0003 |
35 | #define CMD_INVALID 0x0004 |
36 | #define CMD_PROTOCOL_ERR 0x0005 |
37 | #define CMD_HARDWARE_ERR 0x0006 |
38 | #define CMD_CONNECTION_LOST 0x0007 |
39 | #define CMD_ABORTED 0x0008 |
40 | #define CMD_ABORT_FAILED 0x0009 |
41 | #define CMD_UNSOLICITED_ABORT 0x000A |
42 | #define CMD_TIMEOUT 0x000B |
43 | #define CMD_UNABORTABLE 0x000C |
44 | |
45 | /* Unit Attentions ASC's as defined for the MSA2012sa */ |
46 | #define POWER_OR_RESET 0x29 |
47 | #define STATE_CHANGED 0x2a |
48 | #define UNIT_ATTENTION_CLEARED 0x2f |
49 | #define LUN_FAILED 0x3e |
50 | #define REPORT_LUNS_CHANGED 0x3f |
51 | |
52 | /* Unit Attentions ASCQ's as defined for the MSA2012sa */ |
53 | |
54 | /* These ASCQ's defined for ASC = POWER_OR_RESET */ |
55 | #define POWER_ON_RESET 0x00 |
56 | #define POWER_ON_REBOOT 0x01 |
57 | #define SCSI_BUS_RESET 0x02 |
58 | #define MSA_TARGET_RESET 0x03 |
59 | #define CONTROLLER_FAILOVER 0x04 |
60 | #define TRANSCEIVER_SE 0x05 |
61 | #define TRANSCEIVER_LVD 0x06 |
62 | |
63 | /* These ASCQ's defined for ASC = STATE_CHANGED */ |
64 | #define RESERVATION_PREEMPTED 0x03 |
65 | #define ASYM_ACCESS_CHANGED 0x06 |
66 | #define LUN_CAPACITY_CHANGED 0x09 |
67 | |
68 | /* transfer direction */ |
69 | #define XFER_NONE 0x00 |
70 | #define XFER_WRITE 0x01 |
71 | #define XFER_READ 0x02 |
72 | #define XFER_RSVD 0x03 |
73 | |
74 | /* task attribute */ |
75 | #define ATTR_UNTAGGED 0x00 |
76 | #define ATTR_SIMPLE 0x04 |
77 | #define ATTR_HEADOFQUEUE 0x05 |
78 | #define ATTR_ORDERED 0x06 |
79 | #define ATTR_ACA 0x07 |
80 | |
81 | /* cdb type */ |
82 | #define TYPE_CMD 0x00 |
83 | #define TYPE_MSG 0x01 |
84 | |
85 | /* Message Types */ |
86 | #define HPSA_TASK_MANAGEMENT 0x00 |
87 | #define HPSA_RESET 0x01 |
88 | #define HPSA_SCAN 0x02 |
89 | #define HPSA_NOOP 0x03 |
90 | |
91 | #define HPSA_CTLR_RESET_TYPE 0x00 |
92 | #define HPSA_BUS_RESET_TYPE 0x01 |
93 | #define HPSA_TARGET_RESET_TYPE 0x03 |
94 | #define HPSA_LUN_RESET_TYPE 0x04 |
95 | #define HPSA_NEXUS_RESET_TYPE 0x05 |
96 | |
97 | /* Task Management Functions */ |
98 | #define HPSA_TMF_ABORT_TASK 0x00 |
99 | #define HPSA_TMF_ABORT_TASK_SET 0x01 |
100 | #define HPSA_TMF_CLEAR_ACA 0x02 |
101 | #define HPSA_TMF_CLEAR_TASK_SET 0x03 |
102 | #define HPSA_TMF_QUERY_TASK 0x04 |
103 | #define HPSA_TMF_QUERY_TASK_SET 0x05 |
104 | #define HPSA_TMF_QUERY_ASYNCEVENT 0x06 |
105 | |
106 | |
107 | |
108 | /* config space register offsets */ |
109 | #define CFG_VENDORID 0x00 |
110 | #define CFG_DEVICEID 0x02 |
111 | #define CFG_I2OBAR 0x10 |
112 | #define CFG_MEM1BAR 0x14 |
113 | |
114 | /* i2o space register offsets */ |
115 | #define I2O_IBDB_SET 0x20 |
116 | #define I2O_IBDB_CLEAR 0x70 |
117 | #define I2O_INT_STATUS 0x30 |
118 | #define I2O_INT_MASK 0x34 |
119 | #define I2O_IBPOST_Q 0x40 |
120 | #define I2O_OBPOST_Q 0x44 |
121 | #define I2O_DMA1_CFG 0x214 |
122 | |
123 | /* Configuration Table */ |
124 | #define CFGTBL_ChangeReq 0x00000001l |
125 | #define CFGTBL_AccCmds 0x00000001l |
126 | #define DOORBELL_CTLR_RESET 0x00000004l |
127 | #define DOORBELL_CTLR_RESET2 0x00000020l |
128 | |
129 | #define CFGTBL_Trans_Simple 0x00000002l |
130 | #define CFGTBL_Trans_Performant 0x00000004l |
131 | #define CFGTBL_Trans_use_short_tags 0x20000000l |
132 | #define CFGTBL_Trans_enable_directed_msix (1 << 30) |
133 | |
134 | #define CFGTBL_BusType_Ultra2 0x00000001l |
135 | #define CFGTBL_BusType_Ultra3 0x00000002l |
136 | #define CFGTBL_BusType_Fibre1G 0x00000100l |
137 | #define CFGTBL_BusType_Fibre2G 0x00000200l |
138 | struct vals32 { |
139 | u32 lower; |
140 | u32 upper; |
141 | }; |
142 | |
143 | union u64bit { |
144 | struct vals32 val32; |
145 | u64 val; |
146 | }; |
147 | |
148 | /* FIXME this is a per controller value (barf!) */ |
149 | #define HPSA_MAX_LUN 1024 |
150 | #define HPSA_MAX_PHYS_LUN 1024 |
151 | #define MAX_EXT_TARGETS 32 |
152 | #define HPSA_MAX_DEVICES (HPSA_MAX_PHYS_LUN + HPSA_MAX_LUN + \ |
153 | MAX_EXT_TARGETS + 1) /* + 1 is for the controller itself */ |
154 | |
155 | /* SCSI-3 Commands */ |
156 | #pragma pack(1) |
157 | |
158 | #define HPSA_INQUIRY 0x12 |
159 | struct InquiryData { |
160 | u8 data_byte[36]; |
161 | }; |
162 | |
163 | #define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */ |
164 | #define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */ |
165 | struct ReportLUNdata { |
166 | u8 LUNListLength[4]; |
167 | u32 reserved; |
168 | u8 LUN[HPSA_MAX_LUN][8]; |
169 | }; |
170 | |
171 | struct ReportExtendedLUNdata { |
172 | u8 LUNListLength[4]; |
173 | u8 extended_response_flag; |
174 | u8 reserved[3]; |
175 | u8 LUN[HPSA_MAX_LUN][24]; |
176 | }; |
177 | |
178 | struct SenseSubsystem_info { |
179 | u8 reserved[36]; |
180 | u8 portname[8]; |
181 | u8 reserved1[1108]; |
182 | }; |
183 | |
184 | /* BMIC commands */ |
185 | #define BMIC_READ 0x26 |
186 | #define BMIC_WRITE 0x27 |
187 | #define BMIC_CACHE_FLUSH 0xc2 |
188 | #define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */ |
189 | #define BMIC_FLASH_FIRMWARE 0xF7 |
190 | |
191 | /* Command List Structure */ |
192 | union SCSI3Addr { |
193 | struct { |
194 | u8 Dev; |
195 | u8 Bus:6; |
196 | u8 Mode:2; /* b00 */ |
197 | } PeripDev; |
198 | struct { |
199 | u8 DevLSB; |
200 | u8 DevMSB:6; |
201 | u8 Mode:2; /* b01 */ |
202 | } LogDev; |
203 | struct { |
204 | u8 Dev:5; |
205 | u8 Bus:3; |
206 | u8 Targ:6; |
207 | u8 Mode:2; /* b10 */ |
208 | } LogUnit; |
209 | }; |
210 | |
211 | struct PhysDevAddr { |
212 | u32 TargetId:24; |
213 | u32 Bus:6; |
214 | u32 Mode:2; |
215 | /* 2 level target device addr */ |
216 | union SCSI3Addr Target[2]; |
217 | }; |
218 | |
219 | struct LogDevAddr { |
220 | u32 VolId:30; |
221 | u32 Mode:2; |
222 | u8 reserved[4]; |
223 | }; |
224 | |
225 | union LUNAddr { |
226 | u8 LunAddrBytes[8]; |
227 | union SCSI3Addr SCSI3Lun[4]; |
228 | struct PhysDevAddr PhysDev; |
229 | struct LogDevAddr LogDev; |
230 | }; |
231 | |
232 | struct CommandListHeader { |
233 | u8 ReplyQueue; |
234 | u8 SGList; |
235 | u16 SGTotal; |
236 | struct vals32 Tag; |
237 | union LUNAddr LUN; |
238 | }; |
239 | |
240 | struct RequestBlock { |
241 | u8 CDBLen; |
242 | struct { |
243 | u8 Type:3; |
244 | u8 Attribute:3; |
245 | u8 Direction:2; |
246 | } Type; |
247 | u16 Timeout; |
248 | u8 CDB[16]; |
249 | }; |
250 | |
251 | struct ErrDescriptor { |
252 | struct vals32 Addr; |
253 | u32 Len; |
254 | }; |
255 | |
256 | struct SGDescriptor { |
257 | struct vals32 Addr; |
258 | u32 Len; |
259 | u32 Ext; |
260 | }; |
261 | |
262 | union MoreErrInfo { |
263 | struct { |
264 | u8 Reserved[3]; |
265 | u8 Type; |
266 | u32 ErrorInfo; |
267 | } Common_Info; |
268 | struct { |
269 | u8 Reserved[2]; |
270 | u8 offense_size; /* size of offending entry */ |
271 | u8 offense_num; /* byte # of offense 0-base */ |
272 | u32 offense_value; |
273 | } Invalid_Cmd; |
274 | }; |
275 | struct ErrorInfo { |
276 | u8 ScsiStatus; |
277 | u8 SenseLen; |
278 | u16 CommandStatus; |
279 | u32 ResidualCnt; |
280 | union MoreErrInfo MoreErrInfo; |
281 | u8 SenseInfo[SENSEINFOBYTES]; |
282 | }; |
283 | /* Command types */ |
284 | #define CMD_IOCTL_PEND 0x01 |
285 | #define CMD_SCSI 0x03 |
286 | |
287 | #define DIRECT_LOOKUP_SHIFT 5 |
288 | #define DIRECT_LOOKUP_BIT 0x10 |
289 | #define DIRECT_LOOKUP_MASK (~((1 << DIRECT_LOOKUP_SHIFT) - 1)) |
290 | |
291 | #define HPSA_ERROR_BIT 0x02 |
292 | struct ctlr_info; /* defined in hpsa.h */ |
293 | /* The size of this structure needs to be divisible by 32 |
294 | * on all architectures because low 5 bits of the addresses |
295 | * are used as follows: |
296 | * |
297 | * bit 0: to device, used to indicate "performant mode" command |
298 | * from device, indidcates error status. |
299 | * bit 1-3: to device, indicates block fetch table entry for |
300 | * reducing DMA in fetching commands from host memory. |
301 | * bit 4: used to indicate whether tag is "direct lookup" (index), |
302 | * or a bus address. |
303 | */ |
304 | |
305 | struct CommandList { |
306 | struct CommandListHeader Header; |
307 | struct RequestBlock Request; |
308 | struct ErrDescriptor ErrDesc; |
309 | struct SGDescriptor SG[SG_ENTRIES_IN_CMD]; |
310 | /* information associated with the command */ |
311 | u32 busaddr; /* physical addr of this record */ |
312 | struct ErrorInfo *err_info; /* pointer to the allocated mem */ |
313 | struct ctlr_info *h; |
314 | int cmd_type; |
315 | long cmdindex; |
316 | struct list_head list; |
317 | struct request *rq; |
318 | struct completion *waiting; |
319 | void *scsi_cmd; |
320 | |
321 | /* on 64 bit architectures, to get this to be 32-byte-aligned |
322 | * it so happens we need PAD_64 bytes of padding, on 32 bit systems, |
323 | * we need PAD_32 bytes of padding (see below). This does that. |
324 | * If it happens that 64 bit and 32 bit systems need different |
325 | * padding, PAD_32 and PAD_64 can be set independently, and. |
326 | * the code below will do the right thing. |
327 | */ |
328 | #define IS_32_BIT ((8 - sizeof(long))/4) |
329 | #define IS_64_BIT (!IS_32_BIT) |
330 | #define PAD_32 (4) |
331 | #define PAD_64 (4) |
332 | #define COMMANDLIST_PAD (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64) |
333 | u8 pad[COMMANDLIST_PAD]; |
334 | }; |
335 | |
336 | /* Configuration Table Structure */ |
337 | struct HostWrite { |
338 | u32 TransportRequest; |
339 | u32 Reserved; |
340 | u32 CoalIntDelay; |
341 | u32 CoalIntCount; |
342 | }; |
343 | |
344 | #define SIMPLE_MODE 0x02 |
345 | #define PERFORMANT_MODE 0x04 |
346 | #define MEMQ_MODE 0x08 |
347 | |
348 | struct CfgTable { |
349 | u8 Signature[4]; |
350 | u32 SpecValence; |
351 | u32 TransportSupport; |
352 | u32 TransportActive; |
353 | struct HostWrite HostWrite; |
354 | u32 CmdsOutMax; |
355 | u32 BusTypes; |
356 | u32 TransMethodOffset; |
357 | u8 ServerName[16]; |
358 | u32 HeartBeat; |
359 | u32 SCSI_Prefetch; |
360 | u32 MaxScatterGatherElements; |
361 | u32 MaxLogicalUnits; |
362 | u32 MaxPhysicalDevices; |
363 | u32 MaxPhysicalDrivesPerLogicalUnit; |
364 | u32 MaxPerformantModeCommands; |
365 | u32 MaxBlockFetch; |
366 | u32 PowerConservationSupport; |
367 | u32 PowerConservationEnable; |
368 | u32 TMFSupportFlags; |
369 | u8 TMFTagMask[8]; |
370 | u8 reserved[0x78 - 0x70]; |
371 | u32 misc_fw_support; /* offset 0x78 */ |
372 | #define MISC_FW_DOORBELL_RESET (0x02) |
373 | #define MISC_FW_DOORBELL_RESET2 (0x010) |
374 | u8 driver_version[32]; |
375 | |
376 | }; |
377 | |
378 | #define NUM_BLOCKFETCH_ENTRIES 8 |
379 | struct TransTable_struct { |
380 | u32 BlockFetch[NUM_BLOCKFETCH_ENTRIES]; |
381 | u32 RepQSize; |
382 | u32 RepQCount; |
383 | u32 RepQCtrAddrLow32; |
384 | u32 RepQCtrAddrHigh32; |
385 | #define MAX_REPLY_QUEUES 8 |
386 | struct vals32 RepQAddr[MAX_REPLY_QUEUES]; |
387 | }; |
388 | |
389 | struct hpsa_pci_info { |
390 | unsigned char bus; |
391 | unsigned char dev_fn; |
392 | unsigned short domain; |
393 | u32 board_id; |
394 | }; |
395 | |
396 | #pragma pack() |
397 | #endif /* HPSA_CMD_H */ |
398 |
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