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1 | /* |
2 | * Xen event channels |
3 | * |
4 | * Xen models interrupts with abstract event channels. Because each |
5 | * domain gets 1024 event channels, but NR_IRQ is not that large, we |
6 | * must dynamically map irqs<->event channels. The event channels |
7 | * interface with the rest of the kernel by defining a xen interrupt |
8 | * chip. When an event is received, it is mapped to an irq and sent |
9 | * through the normal interrupt processing path. |
10 | * |
11 | * There are four kinds of events which can be mapped to an event |
12 | * channel: |
13 | * |
14 | * 1. Inter-domain notifications. This includes all the virtual |
15 | * device events, since they're driven by front-ends in another domain |
16 | * (typically dom0). |
17 | * 2. VIRQs, typically used for timers. These are per-cpu events. |
18 | * 3. IPIs. |
19 | * 4. PIRQs - Hardware interrupts. |
20 | * |
21 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 |
22 | */ |
23 | |
24 | #include <linux/linkage.h> |
25 | #include <linux/interrupt.h> |
26 | #include <linux/irq.h> |
27 | #include <linux/module.h> |
28 | #include <linux/string.h> |
29 | #include <linux/bootmem.h> |
30 | #include <linux/slab.h> |
31 | #include <linux/irqnr.h> |
32 | #include <linux/pci.h> |
33 | |
34 | #ifdef CONFIG_X86 |
35 | #include <asm/desc.h> |
36 | #include <asm/ptrace.h> |
37 | #include <asm/irq.h> |
38 | #include <asm/idle.h> |
39 | #include <asm/io_apic.h> |
40 | #include <asm/xen/page.h> |
41 | #include <asm/xen/pci.h> |
42 | #endif |
43 | #include <asm/sync_bitops.h> |
44 | #include <asm/xen/hypercall.h> |
45 | #include <asm/xen/hypervisor.h> |
46 | |
47 | #include <xen/xen.h> |
48 | #include <xen/hvm.h> |
49 | #include <xen/xen-ops.h> |
50 | #include <xen/events.h> |
51 | #include <xen/interface/xen.h> |
52 | #include <xen/interface/event_channel.h> |
53 | #include <xen/interface/hvm/hvm_op.h> |
54 | #include <xen/interface/hvm/params.h> |
55 | #include <xen/interface/physdev.h> |
56 | #include <xen/interface/sched.h> |
57 | #include <asm/hw_irq.h> |
58 | |
59 | /* |
60 | * This lock protects updates to the following mapping and reference-count |
61 | * arrays. The lock does not need to be acquired to read the mapping tables. |
62 | */ |
63 | static DEFINE_MUTEX(irq_mapping_update_lock); |
64 | |
65 | static LIST_HEAD(xen_irq_list_head); |
66 | |
67 | /* IRQ <-> VIRQ mapping. */ |
68 | static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1}; |
69 | |
70 | /* IRQ <-> IPI mapping */ |
71 | static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1}; |
72 | |
73 | /* Interrupt types. */ |
74 | enum xen_irq_type { |
75 | IRQT_UNBOUND = 0, |
76 | IRQT_PIRQ, |
77 | IRQT_VIRQ, |
78 | IRQT_IPI, |
79 | IRQT_EVTCHN |
80 | }; |
81 | |
82 | /* |
83 | * Packed IRQ information: |
84 | * type - enum xen_irq_type |
85 | * event channel - irq->event channel mapping |
86 | * cpu - cpu this event channel is bound to |
87 | * index - type-specific information: |
88 | * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM |
89 | * guest, or GSI (real passthrough IRQ) of the device. |
90 | * VIRQ - virq number |
91 | * IPI - IPI vector |
92 | * EVTCHN - |
93 | */ |
94 | struct irq_info { |
95 | struct list_head list; |
96 | int refcnt; |
97 | enum xen_irq_type type; /* type */ |
98 | unsigned irq; |
99 | unsigned short evtchn; /* event channel */ |
100 | unsigned short cpu; /* cpu bound */ |
101 | |
102 | union { |
103 | unsigned short virq; |
104 | enum ipi_vector ipi; |
105 | struct { |
106 | unsigned short pirq; |
107 | unsigned short gsi; |
108 | unsigned char vector; |
109 | unsigned char flags; |
110 | uint16_t domid; |
111 | } pirq; |
112 | } u; |
113 | }; |
114 | #define PIRQ_NEEDS_EOI (1 << 0) |
115 | #define PIRQ_SHAREABLE (1 << 1) |
116 | |
117 | static int *evtchn_to_irq; |
118 | #ifdef CONFIG_X86 |
119 | static unsigned long *pirq_eoi_map; |
120 | #endif |
121 | static bool (*pirq_needs_eoi)(unsigned irq); |
122 | |
123 | /* |
124 | * Note sizeof(xen_ulong_t) can be more than sizeof(unsigned long). Be |
125 | * careful to only use bitops which allow for this (e.g |
126 | * test_bit/find_first_bit and friends but not __ffs) and to pass |
127 | * BITS_PER_EVTCHN_WORD as the bitmask length. |
128 | */ |
129 | #define BITS_PER_EVTCHN_WORD (sizeof(xen_ulong_t)*8) |
130 | /* |
131 | * Make a bitmask (i.e. unsigned long *) of a xen_ulong_t |
132 | * array. Primarily to avoid long lines (hence the terse name). |
133 | */ |
134 | #define BM(x) (unsigned long *)(x) |
135 | /* Find the first set bit in a evtchn mask */ |
136 | #define EVTCHN_FIRST_BIT(w) find_first_bit(BM(&(w)), BITS_PER_EVTCHN_WORD) |
137 | |
138 | static DEFINE_PER_CPU(xen_ulong_t [NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD], |
139 | cpu_evtchn_mask); |
140 | |
141 | /* Xen will never allocate port zero for any purpose. */ |
142 | #define VALID_EVTCHN(chn) ((chn) != 0) |
143 | |
144 | static struct irq_chip xen_dynamic_chip; |
145 | static struct irq_chip xen_percpu_chip; |
146 | static struct irq_chip xen_pirq_chip; |
147 | static void enable_dynirq(struct irq_data *data); |
148 | static void disable_dynirq(struct irq_data *data); |
149 | |
150 | /* Get info for IRQ */ |
151 | static struct irq_info *info_for_irq(unsigned irq) |
152 | { |
153 | return irq_get_handler_data(irq); |
154 | } |
155 | |
156 | /* Constructors for packed IRQ information. */ |
157 | static void xen_irq_info_common_init(struct irq_info *info, |
158 | unsigned irq, |
159 | enum xen_irq_type type, |
160 | unsigned short evtchn, |
161 | unsigned short cpu) |
162 | { |
163 | |
164 | BUG_ON(info->type != IRQT_UNBOUND && info->type != type); |
165 | |
166 | info->type = type; |
167 | info->irq = irq; |
168 | info->evtchn = evtchn; |
169 | info->cpu = cpu; |
170 | |
171 | evtchn_to_irq[evtchn] = irq; |
172 | } |
173 | |
174 | static void xen_irq_info_evtchn_init(unsigned irq, |
175 | unsigned short evtchn) |
176 | { |
177 | struct irq_info *info = info_for_irq(irq); |
178 | |
179 | xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0); |
180 | } |
181 | |
182 | static void xen_irq_info_ipi_init(unsigned cpu, |
183 | unsigned irq, |
184 | unsigned short evtchn, |
185 | enum ipi_vector ipi) |
186 | { |
187 | struct irq_info *info = info_for_irq(irq); |
188 | |
189 | xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0); |
190 | |
191 | info->u.ipi = ipi; |
192 | |
193 | per_cpu(ipi_to_irq, cpu)[ipi] = irq; |
194 | } |
195 | |
196 | static void xen_irq_info_virq_init(unsigned cpu, |
197 | unsigned irq, |
198 | unsigned short evtchn, |
199 | unsigned short virq) |
200 | { |
201 | struct irq_info *info = info_for_irq(irq); |
202 | |
203 | xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0); |
204 | |
205 | info->u.virq = virq; |
206 | |
207 | per_cpu(virq_to_irq, cpu)[virq] = irq; |
208 | } |
209 | |
210 | static void xen_irq_info_pirq_init(unsigned irq, |
211 | unsigned short evtchn, |
212 | unsigned short pirq, |
213 | unsigned short gsi, |
214 | unsigned short vector, |
215 | uint16_t domid, |
216 | unsigned char flags) |
217 | { |
218 | struct irq_info *info = info_for_irq(irq); |
219 | |
220 | xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0); |
221 | |
222 | info->u.pirq.pirq = pirq; |
223 | info->u.pirq.gsi = gsi; |
224 | info->u.pirq.vector = vector; |
225 | info->u.pirq.domid = domid; |
226 | info->u.pirq.flags = flags; |
227 | } |
228 | |
229 | /* |
230 | * Accessors for packed IRQ information. |
231 | */ |
232 | static unsigned int evtchn_from_irq(unsigned irq) |
233 | { |
234 | if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq))) |
235 | return 0; |
236 | |
237 | return info_for_irq(irq)->evtchn; |
238 | } |
239 | |
240 | unsigned irq_from_evtchn(unsigned int evtchn) |
241 | { |
242 | return evtchn_to_irq[evtchn]; |
243 | } |
244 | EXPORT_SYMBOL_GPL(irq_from_evtchn); |
245 | |
246 | static enum ipi_vector ipi_from_irq(unsigned irq) |
247 | { |
248 | struct irq_info *info = info_for_irq(irq); |
249 | |
250 | BUG_ON(info == NULL); |
251 | BUG_ON(info->type != IRQT_IPI); |
252 | |
253 | return info->u.ipi; |
254 | } |
255 | |
256 | static unsigned virq_from_irq(unsigned irq) |
257 | { |
258 | struct irq_info *info = info_for_irq(irq); |
259 | |
260 | BUG_ON(info == NULL); |
261 | BUG_ON(info->type != IRQT_VIRQ); |
262 | |
263 | return info->u.virq; |
264 | } |
265 | |
266 | static unsigned pirq_from_irq(unsigned irq) |
267 | { |
268 | struct irq_info *info = info_for_irq(irq); |
269 | |
270 | BUG_ON(info == NULL); |
271 | BUG_ON(info->type != IRQT_PIRQ); |
272 | |
273 | return info->u.pirq.pirq; |
274 | } |
275 | |
276 | static enum xen_irq_type type_from_irq(unsigned irq) |
277 | { |
278 | return info_for_irq(irq)->type; |
279 | } |
280 | |
281 | static unsigned cpu_from_irq(unsigned irq) |
282 | { |
283 | return info_for_irq(irq)->cpu; |
284 | } |
285 | |
286 | static unsigned int cpu_from_evtchn(unsigned int evtchn) |
287 | { |
288 | int irq = evtchn_to_irq[evtchn]; |
289 | unsigned ret = 0; |
290 | |
291 | if (irq != -1) |
292 | ret = cpu_from_irq(irq); |
293 | |
294 | return ret; |
295 | } |
296 | |
297 | #ifdef CONFIG_X86 |
298 | static bool pirq_check_eoi_map(unsigned irq) |
299 | { |
300 | return test_bit(pirq_from_irq(irq), pirq_eoi_map); |
301 | } |
302 | #endif |
303 | |
304 | static bool pirq_needs_eoi_flag(unsigned irq) |
305 | { |
306 | struct irq_info *info = info_for_irq(irq); |
307 | BUG_ON(info->type != IRQT_PIRQ); |
308 | |
309 | return info->u.pirq.flags & PIRQ_NEEDS_EOI; |
310 | } |
311 | |
312 | static inline xen_ulong_t active_evtchns(unsigned int cpu, |
313 | struct shared_info *sh, |
314 | unsigned int idx) |
315 | { |
316 | return sh->evtchn_pending[idx] & |
317 | per_cpu(cpu_evtchn_mask, cpu)[idx] & |
318 | ~sh->evtchn_mask[idx]; |
319 | } |
320 | |
321 | static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu) |
322 | { |
323 | int irq = evtchn_to_irq[chn]; |
324 | |
325 | BUG_ON(irq == -1); |
326 | #ifdef CONFIG_SMP |
327 | cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu)); |
328 | #endif |
329 | |
330 | clear_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)))); |
331 | set_bit(chn, BM(per_cpu(cpu_evtchn_mask, cpu))); |
332 | |
333 | info_for_irq(irq)->cpu = cpu; |
334 | } |
335 | |
336 | static void init_evtchn_cpu_bindings(void) |
337 | { |
338 | int i; |
339 | #ifdef CONFIG_SMP |
340 | struct irq_info *info; |
341 | |
342 | /* By default all event channels notify CPU#0. */ |
343 | list_for_each_entry(info, &xen_irq_list_head, list) { |
344 | struct irq_desc *desc = irq_to_desc(info->irq); |
345 | cpumask_copy(desc->irq_data.affinity, cpumask_of(0)); |
346 | } |
347 | #endif |
348 | |
349 | for_each_possible_cpu(i) |
350 | memset(per_cpu(cpu_evtchn_mask, i), |
351 | (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i))); |
352 | } |
353 | |
354 | static inline void clear_evtchn(int port) |
355 | { |
356 | struct shared_info *s = HYPERVISOR_shared_info; |
357 | sync_clear_bit(port, BM(&s->evtchn_pending[0])); |
358 | } |
359 | |
360 | static inline void set_evtchn(int port) |
361 | { |
362 | struct shared_info *s = HYPERVISOR_shared_info; |
363 | sync_set_bit(port, BM(&s->evtchn_pending[0])); |
364 | } |
365 | |
366 | static inline int test_evtchn(int port) |
367 | { |
368 | struct shared_info *s = HYPERVISOR_shared_info; |
369 | return sync_test_bit(port, BM(&s->evtchn_pending[0])); |
370 | } |
371 | |
372 | |
373 | /** |
374 | * notify_remote_via_irq - send event to remote end of event channel via irq |
375 | * @irq: irq of event channel to send event to |
376 | * |
377 | * Unlike notify_remote_via_evtchn(), this is safe to use across |
378 | * save/restore. Notifications on a broken connection are silently |
379 | * dropped. |
380 | */ |
381 | void notify_remote_via_irq(int irq) |
382 | { |
383 | int evtchn = evtchn_from_irq(irq); |
384 | |
385 | if (VALID_EVTCHN(evtchn)) |
386 | notify_remote_via_evtchn(evtchn); |
387 | } |
388 | EXPORT_SYMBOL_GPL(notify_remote_via_irq); |
389 | |
390 | static void mask_evtchn(int port) |
391 | { |
392 | struct shared_info *s = HYPERVISOR_shared_info; |
393 | sync_set_bit(port, BM(&s->evtchn_mask[0])); |
394 | } |
395 | |
396 | static void unmask_evtchn(int port) |
397 | { |
398 | struct shared_info *s = HYPERVISOR_shared_info; |
399 | unsigned int cpu = get_cpu(); |
400 | int do_hypercall = 0, evtchn_pending = 0; |
401 | |
402 | BUG_ON(!irqs_disabled()); |
403 | |
404 | if (unlikely((cpu != cpu_from_evtchn(port)))) |
405 | do_hypercall = 1; |
406 | else { |
407 | /* |
408 | * Need to clear the mask before checking pending to |
409 | * avoid a race with an event becoming pending. |
410 | * |
411 | * EVTCHNOP_unmask will only trigger an upcall if the |
412 | * mask bit was set, so if a hypercall is needed |
413 | * remask the event. |
414 | */ |
415 | sync_clear_bit(port, BM(&s->evtchn_mask[0])); |
416 | evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0])); |
417 | |
418 | if (unlikely(evtchn_pending && xen_hvm_domain())) { |
419 | sync_set_bit(port, BM(&s->evtchn_mask[0])); |
420 | do_hypercall = 1; |
421 | } |
422 | } |
423 | |
424 | /* Slow path (hypercall) if this is a non-local port or if this is |
425 | * an hvm domain and an event is pending (hvm domains don't have |
426 | * their own implementation of irq_enable). */ |
427 | if (do_hypercall) { |
428 | struct evtchn_unmask unmask = { .port = port }; |
429 | (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask); |
430 | } else { |
431 | struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); |
432 | |
433 | /* |
434 | * The following is basically the equivalent of |
435 | * 'hw_resend_irq'. Just like a real IO-APIC we 'lose |
436 | * the interrupt edge' if the channel is masked. |
437 | */ |
438 | if (evtchn_pending && |
439 | !sync_test_and_set_bit(port / BITS_PER_EVTCHN_WORD, |
440 | BM(&vcpu_info->evtchn_pending_sel))) |
441 | vcpu_info->evtchn_upcall_pending = 1; |
442 | } |
443 | |
444 | put_cpu(); |
445 | } |
446 | |
447 | static void xen_irq_init(unsigned irq) |
448 | { |
449 | struct irq_info *info; |
450 | #ifdef CONFIG_SMP |
451 | struct irq_desc *desc = irq_to_desc(irq); |
452 | |
453 | /* By default all event channels notify CPU#0. */ |
454 | cpumask_copy(desc->irq_data.affinity, cpumask_of(0)); |
455 | #endif |
456 | |
457 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
458 | if (info == NULL) |
459 | panic("Unable to allocate metadata for IRQ%d\n", irq); |
460 | |
461 | info->type = IRQT_UNBOUND; |
462 | info->refcnt = -1; |
463 | |
464 | irq_set_handler_data(irq, info); |
465 | |
466 | list_add_tail(&info->list, &xen_irq_list_head); |
467 | } |
468 | |
469 | static int __must_check xen_allocate_irq_dynamic(void) |
470 | { |
471 | int first = 0; |
472 | int irq; |
473 | |
474 | #ifdef CONFIG_X86_IO_APIC |
475 | /* |
476 | * For an HVM guest or domain 0 which see "real" (emulated or |
477 | * actual respectively) GSIs we allocate dynamic IRQs |
478 | * e.g. those corresponding to event channels or MSIs |
479 | * etc. from the range above those "real" GSIs to avoid |
480 | * collisions. |
481 | */ |
482 | if (xen_initial_domain() || xen_hvm_domain()) |
483 | first = get_nr_irqs_gsi(); |
484 | #endif |
485 | |
486 | irq = irq_alloc_desc_from(first, -1); |
487 | |
488 | if (irq >= 0) |
489 | xen_irq_init(irq); |
490 | |
491 | return irq; |
492 | } |
493 | |
494 | static int __must_check xen_allocate_irq_gsi(unsigned gsi) |
495 | { |
496 | int irq; |
497 | |
498 | /* |
499 | * A PV guest has no concept of a GSI (since it has no ACPI |
500 | * nor access to/knowledge of the physical APICs). Therefore |
501 | * all IRQs are dynamically allocated from the entire IRQ |
502 | * space. |
503 | */ |
504 | if (xen_pv_domain() && !xen_initial_domain()) |
505 | return xen_allocate_irq_dynamic(); |
506 | |
507 | /* Legacy IRQ descriptors are already allocated by the arch. */ |
508 | if (gsi < NR_IRQS_LEGACY) |
509 | irq = gsi; |
510 | else |
511 | irq = irq_alloc_desc_at(gsi, -1); |
512 | |
513 | xen_irq_init(irq); |
514 | |
515 | return irq; |
516 | } |
517 | |
518 | static void xen_free_irq(unsigned irq) |
519 | { |
520 | struct irq_info *info = irq_get_handler_data(irq); |
521 | |
522 | list_del(&info->list); |
523 | |
524 | irq_set_handler_data(irq, NULL); |
525 | |
526 | WARN_ON(info->refcnt > 0); |
527 | |
528 | kfree(info); |
529 | |
530 | /* Legacy IRQ descriptors are managed by the arch. */ |
531 | if (irq < NR_IRQS_LEGACY) |
532 | return; |
533 | |
534 | irq_free_desc(irq); |
535 | } |
536 | |
537 | static void pirq_query_unmask(int irq) |
538 | { |
539 | struct physdev_irq_status_query irq_status; |
540 | struct irq_info *info = info_for_irq(irq); |
541 | |
542 | BUG_ON(info->type != IRQT_PIRQ); |
543 | |
544 | irq_status.irq = pirq_from_irq(irq); |
545 | if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) |
546 | irq_status.flags = 0; |
547 | |
548 | info->u.pirq.flags &= ~PIRQ_NEEDS_EOI; |
549 | if (irq_status.flags & XENIRQSTAT_needs_eoi) |
550 | info->u.pirq.flags |= PIRQ_NEEDS_EOI; |
551 | } |
552 | |
553 | static bool probing_irq(int irq) |
554 | { |
555 | struct irq_desc *desc = irq_to_desc(irq); |
556 | |
557 | return desc && desc->action == NULL; |
558 | } |
559 | |
560 | static void eoi_pirq(struct irq_data *data) |
561 | { |
562 | int evtchn = evtchn_from_irq(data->irq); |
563 | struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) }; |
564 | int rc = 0; |
565 | |
566 | irq_move_irq(data); |
567 | |
568 | if (VALID_EVTCHN(evtchn)) |
569 | clear_evtchn(evtchn); |
570 | |
571 | if (pirq_needs_eoi(data->irq)) { |
572 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi); |
573 | WARN_ON(rc); |
574 | } |
575 | } |
576 | |
577 | static void mask_ack_pirq(struct irq_data *data) |
578 | { |
579 | disable_dynirq(data); |
580 | eoi_pirq(data); |
581 | } |
582 | |
583 | static unsigned int __startup_pirq(unsigned int irq) |
584 | { |
585 | struct evtchn_bind_pirq bind_pirq; |
586 | struct irq_info *info = info_for_irq(irq); |
587 | int evtchn = evtchn_from_irq(irq); |
588 | int rc; |
589 | |
590 | BUG_ON(info->type != IRQT_PIRQ); |
591 | |
592 | if (VALID_EVTCHN(evtchn)) |
593 | goto out; |
594 | |
595 | bind_pirq.pirq = pirq_from_irq(irq); |
596 | /* NB. We are happy to share unless we are probing. */ |
597 | bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ? |
598 | BIND_PIRQ__WILL_SHARE : 0; |
599 | rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq); |
600 | if (rc != 0) { |
601 | if (!probing_irq(irq)) |
602 | printk(KERN_INFO "Failed to obtain physical IRQ %d\n", |
603 | irq); |
604 | return 0; |
605 | } |
606 | evtchn = bind_pirq.port; |
607 | |
608 | pirq_query_unmask(irq); |
609 | |
610 | evtchn_to_irq[evtchn] = irq; |
611 | bind_evtchn_to_cpu(evtchn, 0); |
612 | info->evtchn = evtchn; |
613 | |
614 | out: |
615 | unmask_evtchn(evtchn); |
616 | eoi_pirq(irq_get_irq_data(irq)); |
617 | |
618 | return 0; |
619 | } |
620 | |
621 | static unsigned int startup_pirq(struct irq_data *data) |
622 | { |
623 | return __startup_pirq(data->irq); |
624 | } |
625 | |
626 | static void shutdown_pirq(struct irq_data *data) |
627 | { |
628 | struct evtchn_close close; |
629 | unsigned int irq = data->irq; |
630 | struct irq_info *info = info_for_irq(irq); |
631 | int evtchn = evtchn_from_irq(irq); |
632 | |
633 | BUG_ON(info->type != IRQT_PIRQ); |
634 | |
635 | if (!VALID_EVTCHN(evtchn)) |
636 | return; |
637 | |
638 | mask_evtchn(evtchn); |
639 | |
640 | close.port = evtchn; |
641 | if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) |
642 | BUG(); |
643 | |
644 | bind_evtchn_to_cpu(evtchn, 0); |
645 | evtchn_to_irq[evtchn] = -1; |
646 | info->evtchn = 0; |
647 | } |
648 | |
649 | static void enable_pirq(struct irq_data *data) |
650 | { |
651 | startup_pirq(data); |
652 | } |
653 | |
654 | static void disable_pirq(struct irq_data *data) |
655 | { |
656 | disable_dynirq(data); |
657 | } |
658 | |
659 | int xen_irq_from_gsi(unsigned gsi) |
660 | { |
661 | struct irq_info *info; |
662 | |
663 | list_for_each_entry(info, &xen_irq_list_head, list) { |
664 | if (info->type != IRQT_PIRQ) |
665 | continue; |
666 | |
667 | if (info->u.pirq.gsi == gsi) |
668 | return info->irq; |
669 | } |
670 | |
671 | return -1; |
672 | } |
673 | EXPORT_SYMBOL_GPL(xen_irq_from_gsi); |
674 | |
675 | /* |
676 | * Do not make any assumptions regarding the relationship between the |
677 | * IRQ number returned here and the Xen pirq argument. |
678 | * |
679 | * Note: We don't assign an event channel until the irq actually started |
680 | * up. Return an existing irq if we've already got one for the gsi. |
681 | * |
682 | * Shareable implies level triggered, not shareable implies edge |
683 | * triggered here. |
684 | */ |
685 | int xen_bind_pirq_gsi_to_irq(unsigned gsi, |
686 | unsigned pirq, int shareable, char *name) |
687 | { |
688 | int irq = -1; |
689 | struct physdev_irq irq_op; |
690 | |
691 | mutex_lock(&irq_mapping_update_lock); |
692 | |
693 | irq = xen_irq_from_gsi(gsi); |
694 | if (irq != -1) { |
695 | printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n", |
696 | irq, gsi); |
697 | goto out; |
698 | } |
699 | |
700 | irq = xen_allocate_irq_gsi(gsi); |
701 | if (irq < 0) |
702 | goto out; |
703 | |
704 | irq_op.irq = irq; |
705 | irq_op.vector = 0; |
706 | |
707 | /* Only the privileged domain can do this. For non-priv, the pcifront |
708 | * driver provides a PCI bus that does the call to do exactly |
709 | * this in the priv domain. */ |
710 | if (xen_initial_domain() && |
711 | HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) { |
712 | xen_free_irq(irq); |
713 | irq = -ENOSPC; |
714 | goto out; |
715 | } |
716 | |
717 | xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF, |
718 | shareable ? PIRQ_SHAREABLE : 0); |
719 | |
720 | pirq_query_unmask(irq); |
721 | /* We try to use the handler with the appropriate semantic for the |
722 | * type of interrupt: if the interrupt is an edge triggered |
723 | * interrupt we use handle_edge_irq. |
724 | * |
725 | * On the other hand if the interrupt is level triggered we use |
726 | * handle_fasteoi_irq like the native code does for this kind of |
727 | * interrupts. |
728 | * |
729 | * Depending on the Xen version, pirq_needs_eoi might return true |
730 | * not only for level triggered interrupts but for edge triggered |
731 | * interrupts too. In any case Xen always honors the eoi mechanism, |
732 | * not injecting any more pirqs of the same kind if the first one |
733 | * hasn't received an eoi yet. Therefore using the fasteoi handler |
734 | * is the right choice either way. |
735 | */ |
736 | if (shareable) |
737 | irq_set_chip_and_handler_name(irq, &xen_pirq_chip, |
738 | handle_fasteoi_irq, name); |
739 | else |
740 | irq_set_chip_and_handler_name(irq, &xen_pirq_chip, |
741 | handle_edge_irq, name); |
742 | |
743 | out: |
744 | mutex_unlock(&irq_mapping_update_lock); |
745 | |
746 | return irq; |
747 | } |
748 | |
749 | #ifdef CONFIG_PCI_MSI |
750 | int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc) |
751 | { |
752 | int rc; |
753 | struct physdev_get_free_pirq op_get_free_pirq; |
754 | |
755 | op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI; |
756 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq); |
757 | |
758 | WARN_ONCE(rc == -ENOSYS, |
759 | "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n"); |
760 | |
761 | return rc ? -1 : op_get_free_pirq.pirq; |
762 | } |
763 | |
764 | int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc, |
765 | int pirq, int vector, const char *name, |
766 | domid_t domid) |
767 | { |
768 | int irq, ret; |
769 | |
770 | mutex_lock(&irq_mapping_update_lock); |
771 | |
772 | irq = xen_allocate_irq_dynamic(); |
773 | if (irq < 0) |
774 | goto out; |
775 | |
776 | irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq, |
777 | name); |
778 | |
779 | xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0); |
780 | ret = irq_set_msi_desc(irq, msidesc); |
781 | if (ret < 0) |
782 | goto error_irq; |
783 | out: |
784 | mutex_unlock(&irq_mapping_update_lock); |
785 | return irq; |
786 | error_irq: |
787 | mutex_unlock(&irq_mapping_update_lock); |
788 | xen_free_irq(irq); |
789 | return ret; |
790 | } |
791 | #endif |
792 | |
793 | int xen_destroy_irq(int irq) |
794 | { |
795 | struct irq_desc *desc; |
796 | struct physdev_unmap_pirq unmap_irq; |
797 | struct irq_info *info = info_for_irq(irq); |
798 | int rc = -ENOENT; |
799 | |
800 | mutex_lock(&irq_mapping_update_lock); |
801 | |
802 | desc = irq_to_desc(irq); |
803 | if (!desc) |
804 | goto out; |
805 | |
806 | if (xen_initial_domain()) { |
807 | unmap_irq.pirq = info->u.pirq.pirq; |
808 | unmap_irq.domid = info->u.pirq.domid; |
809 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq); |
810 | /* If another domain quits without making the pci_disable_msix |
811 | * call, the Xen hypervisor takes care of freeing the PIRQs |
812 | * (free_domain_pirqs). |
813 | */ |
814 | if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF)) |
815 | printk(KERN_INFO "domain %d does not have %d anymore\n", |
816 | info->u.pirq.domid, info->u.pirq.pirq); |
817 | else if (rc) { |
818 | printk(KERN_WARNING "unmap irq failed %d\n", rc); |
819 | goto out; |
820 | } |
821 | } |
822 | |
823 | xen_free_irq(irq); |
824 | |
825 | out: |
826 | mutex_unlock(&irq_mapping_update_lock); |
827 | return rc; |
828 | } |
829 | |
830 | int xen_irq_from_pirq(unsigned pirq) |
831 | { |
832 | int irq; |
833 | |
834 | struct irq_info *info; |
835 | |
836 | mutex_lock(&irq_mapping_update_lock); |
837 | |
838 | list_for_each_entry(info, &xen_irq_list_head, list) { |
839 | if (info->type != IRQT_PIRQ) |
840 | continue; |
841 | irq = info->irq; |
842 | if (info->u.pirq.pirq == pirq) |
843 | goto out; |
844 | } |
845 | irq = -1; |
846 | out: |
847 | mutex_unlock(&irq_mapping_update_lock); |
848 | |
849 | return irq; |
850 | } |
851 | |
852 | |
853 | int xen_pirq_from_irq(unsigned irq) |
854 | { |
855 | return pirq_from_irq(irq); |
856 | } |
857 | EXPORT_SYMBOL_GPL(xen_pirq_from_irq); |
858 | int bind_evtchn_to_irq(unsigned int evtchn) |
859 | { |
860 | int irq; |
861 | |
862 | mutex_lock(&irq_mapping_update_lock); |
863 | |
864 | irq = evtchn_to_irq[evtchn]; |
865 | |
866 | if (irq == -1) { |
867 | irq = xen_allocate_irq_dynamic(); |
868 | if (irq < 0) |
869 | goto out; |
870 | |
871 | irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, |
872 | handle_edge_irq, "event"); |
873 | |
874 | xen_irq_info_evtchn_init(irq, evtchn); |
875 | } else { |
876 | struct irq_info *info = info_for_irq(irq); |
877 | WARN_ON(info == NULL || info->type != IRQT_EVTCHN); |
878 | } |
879 | irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN); |
880 | |
881 | out: |
882 | mutex_unlock(&irq_mapping_update_lock); |
883 | |
884 | return irq; |
885 | } |
886 | EXPORT_SYMBOL_GPL(bind_evtchn_to_irq); |
887 | |
888 | static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu) |
889 | { |
890 | struct evtchn_bind_ipi bind_ipi; |
891 | int evtchn, irq; |
892 | |
893 | mutex_lock(&irq_mapping_update_lock); |
894 | |
895 | irq = per_cpu(ipi_to_irq, cpu)[ipi]; |
896 | |
897 | if (irq == -1) { |
898 | irq = xen_allocate_irq_dynamic(); |
899 | if (irq < 0) |
900 | goto out; |
901 | |
902 | irq_set_chip_and_handler_name(irq, &xen_percpu_chip, |
903 | handle_percpu_irq, "ipi"); |
904 | |
905 | bind_ipi.vcpu = cpu; |
906 | if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, |
907 | &bind_ipi) != 0) |
908 | BUG(); |
909 | evtchn = bind_ipi.port; |
910 | |
911 | xen_irq_info_ipi_init(cpu, irq, evtchn, ipi); |
912 | |
913 | bind_evtchn_to_cpu(evtchn, cpu); |
914 | } else { |
915 | struct irq_info *info = info_for_irq(irq); |
916 | WARN_ON(info == NULL || info->type != IRQT_IPI); |
917 | } |
918 | |
919 | out: |
920 | mutex_unlock(&irq_mapping_update_lock); |
921 | return irq; |
922 | } |
923 | |
924 | static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain, |
925 | unsigned int remote_port) |
926 | { |
927 | struct evtchn_bind_interdomain bind_interdomain; |
928 | int err; |
929 | |
930 | bind_interdomain.remote_dom = remote_domain; |
931 | bind_interdomain.remote_port = remote_port; |
932 | |
933 | err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain, |
934 | &bind_interdomain); |
935 | |
936 | return err ? : bind_evtchn_to_irq(bind_interdomain.local_port); |
937 | } |
938 | |
939 | static int find_virq(unsigned int virq, unsigned int cpu) |
940 | { |
941 | struct evtchn_status status; |
942 | int port, rc = -ENOENT; |
943 | |
944 | memset(&status, 0, sizeof(status)); |
945 | for (port = 0; port <= NR_EVENT_CHANNELS; port++) { |
946 | status.dom = DOMID_SELF; |
947 | status.port = port; |
948 | rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status); |
949 | if (rc < 0) |
950 | continue; |
951 | if (status.status != EVTCHNSTAT_virq) |
952 | continue; |
953 | if (status.u.virq == virq && status.vcpu == cpu) { |
954 | rc = port; |
955 | break; |
956 | } |
957 | } |
958 | return rc; |
959 | } |
960 | |
961 | int bind_virq_to_irq(unsigned int virq, unsigned int cpu) |
962 | { |
963 | struct evtchn_bind_virq bind_virq; |
964 | int evtchn, irq, ret; |
965 | |
966 | mutex_lock(&irq_mapping_update_lock); |
967 | |
968 | irq = per_cpu(virq_to_irq, cpu)[virq]; |
969 | |
970 | if (irq == -1) { |
971 | irq = xen_allocate_irq_dynamic(); |
972 | if (irq < 0) |
973 | goto out; |
974 | |
975 | irq_set_chip_and_handler_name(irq, &xen_percpu_chip, |
976 | handle_percpu_irq, "virq"); |
977 | |
978 | bind_virq.virq = virq; |
979 | bind_virq.vcpu = cpu; |
980 | ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, |
981 | &bind_virq); |
982 | if (ret == 0) |
983 | evtchn = bind_virq.port; |
984 | else { |
985 | if (ret == -EEXIST) |
986 | ret = find_virq(virq, cpu); |
987 | BUG_ON(ret < 0); |
988 | evtchn = ret; |
989 | } |
990 | |
991 | xen_irq_info_virq_init(cpu, irq, evtchn, virq); |
992 | |
993 | bind_evtchn_to_cpu(evtchn, cpu); |
994 | } else { |
995 | struct irq_info *info = info_for_irq(irq); |
996 | WARN_ON(info == NULL || info->type != IRQT_VIRQ); |
997 | } |
998 | |
999 | out: |
1000 | mutex_unlock(&irq_mapping_update_lock); |
1001 | |
1002 | return irq; |
1003 | } |
1004 | |
1005 | static void unbind_from_irq(unsigned int irq) |
1006 | { |
1007 | struct evtchn_close close; |
1008 | int evtchn = evtchn_from_irq(irq); |
1009 | struct irq_info *info = irq_get_handler_data(irq); |
1010 | |
1011 | mutex_lock(&irq_mapping_update_lock); |
1012 | |
1013 | if (info->refcnt > 0) { |
1014 | info->refcnt--; |
1015 | if (info->refcnt != 0) |
1016 | goto done; |
1017 | } |
1018 | |
1019 | if (VALID_EVTCHN(evtchn)) { |
1020 | close.port = evtchn; |
1021 | if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0) |
1022 | BUG(); |
1023 | |
1024 | switch (type_from_irq(irq)) { |
1025 | case IRQT_VIRQ: |
1026 | per_cpu(virq_to_irq, cpu_from_evtchn(evtchn)) |
1027 | [virq_from_irq(irq)] = -1; |
1028 | break; |
1029 | case IRQT_IPI: |
1030 | per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn)) |
1031 | [ipi_from_irq(irq)] = -1; |
1032 | break; |
1033 | default: |
1034 | break; |
1035 | } |
1036 | |
1037 | /* Closed ports are implicitly re-bound to VCPU0. */ |
1038 | bind_evtchn_to_cpu(evtchn, 0); |
1039 | |
1040 | evtchn_to_irq[evtchn] = -1; |
1041 | } |
1042 | |
1043 | BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND); |
1044 | |
1045 | xen_free_irq(irq); |
1046 | |
1047 | done: |
1048 | mutex_unlock(&irq_mapping_update_lock); |
1049 | } |
1050 | |
1051 | int bind_evtchn_to_irqhandler(unsigned int evtchn, |
1052 | irq_handler_t handler, |
1053 | unsigned long irqflags, |
1054 | const char *devname, void *dev_id) |
1055 | { |
1056 | int irq, retval; |
1057 | |
1058 | irq = bind_evtchn_to_irq(evtchn); |
1059 | if (irq < 0) |
1060 | return irq; |
1061 | retval = request_irq(irq, handler, irqflags, devname, dev_id); |
1062 | if (retval != 0) { |
1063 | unbind_from_irq(irq); |
1064 | return retval; |
1065 | } |
1066 | |
1067 | return irq; |
1068 | } |
1069 | EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler); |
1070 | |
1071 | int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain, |
1072 | unsigned int remote_port, |
1073 | irq_handler_t handler, |
1074 | unsigned long irqflags, |
1075 | const char *devname, |
1076 | void *dev_id) |
1077 | { |
1078 | int irq, retval; |
1079 | |
1080 | irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port); |
1081 | if (irq < 0) |
1082 | return irq; |
1083 | |
1084 | retval = request_irq(irq, handler, irqflags, devname, dev_id); |
1085 | if (retval != 0) { |
1086 | unbind_from_irq(irq); |
1087 | return retval; |
1088 | } |
1089 | |
1090 | return irq; |
1091 | } |
1092 | EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler); |
1093 | |
1094 | int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu, |
1095 | irq_handler_t handler, |
1096 | unsigned long irqflags, const char *devname, void *dev_id) |
1097 | { |
1098 | int irq, retval; |
1099 | |
1100 | irq = bind_virq_to_irq(virq, cpu); |
1101 | if (irq < 0) |
1102 | return irq; |
1103 | retval = request_irq(irq, handler, irqflags, devname, dev_id); |
1104 | if (retval != 0) { |
1105 | unbind_from_irq(irq); |
1106 | return retval; |
1107 | } |
1108 | |
1109 | return irq; |
1110 | } |
1111 | EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler); |
1112 | |
1113 | int bind_ipi_to_irqhandler(enum ipi_vector ipi, |
1114 | unsigned int cpu, |
1115 | irq_handler_t handler, |
1116 | unsigned long irqflags, |
1117 | const char *devname, |
1118 | void *dev_id) |
1119 | { |
1120 | int irq, retval; |
1121 | |
1122 | irq = bind_ipi_to_irq(ipi, cpu); |
1123 | if (irq < 0) |
1124 | return irq; |
1125 | |
1126 | irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME; |
1127 | retval = request_irq(irq, handler, irqflags, devname, dev_id); |
1128 | if (retval != 0) { |
1129 | unbind_from_irq(irq); |
1130 | return retval; |
1131 | } |
1132 | |
1133 | return irq; |
1134 | } |
1135 | |
1136 | void unbind_from_irqhandler(unsigned int irq, void *dev_id) |
1137 | { |
1138 | free_irq(irq, dev_id); |
1139 | unbind_from_irq(irq); |
1140 | } |
1141 | EXPORT_SYMBOL_GPL(unbind_from_irqhandler); |
1142 | |
1143 | int evtchn_make_refcounted(unsigned int evtchn) |
1144 | { |
1145 | int irq = evtchn_to_irq[evtchn]; |
1146 | struct irq_info *info; |
1147 | |
1148 | if (irq == -1) |
1149 | return -ENOENT; |
1150 | |
1151 | info = irq_get_handler_data(irq); |
1152 | |
1153 | if (!info) |
1154 | return -ENOENT; |
1155 | |
1156 | WARN_ON(info->refcnt != -1); |
1157 | |
1158 | info->refcnt = 1; |
1159 | |
1160 | return 0; |
1161 | } |
1162 | EXPORT_SYMBOL_GPL(evtchn_make_refcounted); |
1163 | |
1164 | int evtchn_get(unsigned int evtchn) |
1165 | { |
1166 | int irq; |
1167 | struct irq_info *info; |
1168 | int err = -ENOENT; |
1169 | |
1170 | if (evtchn >= NR_EVENT_CHANNELS) |
1171 | return -EINVAL; |
1172 | |
1173 | mutex_lock(&irq_mapping_update_lock); |
1174 | |
1175 | irq = evtchn_to_irq[evtchn]; |
1176 | if (irq == -1) |
1177 | goto done; |
1178 | |
1179 | info = irq_get_handler_data(irq); |
1180 | |
1181 | if (!info) |
1182 | goto done; |
1183 | |
1184 | err = -EINVAL; |
1185 | if (info->refcnt <= 0) |
1186 | goto done; |
1187 | |
1188 | info->refcnt++; |
1189 | err = 0; |
1190 | done: |
1191 | mutex_unlock(&irq_mapping_update_lock); |
1192 | |
1193 | return err; |
1194 | } |
1195 | EXPORT_SYMBOL_GPL(evtchn_get); |
1196 | |
1197 | void evtchn_put(unsigned int evtchn) |
1198 | { |
1199 | int irq = evtchn_to_irq[evtchn]; |
1200 | if (WARN_ON(irq == -1)) |
1201 | return; |
1202 | unbind_from_irq(irq); |
1203 | } |
1204 | EXPORT_SYMBOL_GPL(evtchn_put); |
1205 | |
1206 | void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector) |
1207 | { |
1208 | int irq = per_cpu(ipi_to_irq, cpu)[vector]; |
1209 | BUG_ON(irq < 0); |
1210 | notify_remote_via_irq(irq); |
1211 | } |
1212 | |
1213 | irqreturn_t xen_debug_interrupt(int irq, void *dev_id) |
1214 | { |
1215 | struct shared_info *sh = HYPERVISOR_shared_info; |
1216 | int cpu = smp_processor_id(); |
1217 | xen_ulong_t *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu); |
1218 | int i; |
1219 | unsigned long flags; |
1220 | static DEFINE_SPINLOCK(debug_lock); |
1221 | struct vcpu_info *v; |
1222 | |
1223 | spin_lock_irqsave(&debug_lock, flags); |
1224 | |
1225 | printk("\nvcpu %d\n ", cpu); |
1226 | |
1227 | for_each_online_cpu(i) { |
1228 | int pending; |
1229 | v = per_cpu(xen_vcpu, i); |
1230 | pending = (get_irq_regs() && i == cpu) |
1231 | ? xen_irqs_disabled(get_irq_regs()) |
1232 | : v->evtchn_upcall_mask; |
1233 | printk("%d: masked=%d pending=%d event_sel %0*"PRI_xen_ulong"\n ", i, |
1234 | pending, v->evtchn_upcall_pending, |
1235 | (int)(sizeof(v->evtchn_pending_sel)*2), |
1236 | v->evtchn_pending_sel); |
1237 | } |
1238 | v = per_cpu(xen_vcpu, cpu); |
1239 | |
1240 | printk("\npending:\n "); |
1241 | for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--) |
1242 | printk("%0*"PRI_xen_ulong"%s", |
1243 | (int)sizeof(sh->evtchn_pending[0])*2, |
1244 | sh->evtchn_pending[i], |
1245 | i % 8 == 0 ? "\n " : " "); |
1246 | printk("\nglobal mask:\n "); |
1247 | for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) |
1248 | printk("%0*"PRI_xen_ulong"%s", |
1249 | (int)(sizeof(sh->evtchn_mask[0])*2), |
1250 | sh->evtchn_mask[i], |
1251 | i % 8 == 0 ? "\n " : " "); |
1252 | |
1253 | printk("\nglobally unmasked:\n "); |
1254 | for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) |
1255 | printk("%0*"PRI_xen_ulong"%s", |
1256 | (int)(sizeof(sh->evtchn_mask[0])*2), |
1257 | sh->evtchn_pending[i] & ~sh->evtchn_mask[i], |
1258 | i % 8 == 0 ? "\n " : " "); |
1259 | |
1260 | printk("\nlocal cpu%d mask:\n ", cpu); |
1261 | for (i = (NR_EVENT_CHANNELS/BITS_PER_EVTCHN_WORD)-1; i >= 0; i--) |
1262 | printk("%0*"PRI_xen_ulong"%s", (int)(sizeof(cpu_evtchn[0])*2), |
1263 | cpu_evtchn[i], |
1264 | i % 8 == 0 ? "\n " : " "); |
1265 | |
1266 | printk("\nlocally unmasked:\n "); |
1267 | for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) { |
1268 | xen_ulong_t pending = sh->evtchn_pending[i] |
1269 | & ~sh->evtchn_mask[i] |
1270 | & cpu_evtchn[i]; |
1271 | printk("%0*"PRI_xen_ulong"%s", |
1272 | (int)(sizeof(sh->evtchn_mask[0])*2), |
1273 | pending, i % 8 == 0 ? "\n " : " "); |
1274 | } |
1275 | |
1276 | printk("\npending list:\n"); |
1277 | for (i = 0; i < NR_EVENT_CHANNELS; i++) { |
1278 | if (sync_test_bit(i, BM(sh->evtchn_pending))) { |
1279 | int word_idx = i / BITS_PER_EVTCHN_WORD; |
1280 | printk(" %d: event %d -> irq %d%s%s%s\n", |
1281 | cpu_from_evtchn(i), i, |
1282 | evtchn_to_irq[i], |
1283 | sync_test_bit(word_idx, BM(&v->evtchn_pending_sel)) |
1284 | ? "" : " l2-clear", |
1285 | !sync_test_bit(i, BM(sh->evtchn_mask)) |
1286 | ? "" : " globally-masked", |
1287 | sync_test_bit(i, BM(cpu_evtchn)) |
1288 | ? "" : " locally-masked"); |
1289 | } |
1290 | } |
1291 | |
1292 | spin_unlock_irqrestore(&debug_lock, flags); |
1293 | |
1294 | return IRQ_HANDLED; |
1295 | } |
1296 | |
1297 | static DEFINE_PER_CPU(unsigned, xed_nesting_count); |
1298 | static DEFINE_PER_CPU(unsigned int, current_word_idx); |
1299 | static DEFINE_PER_CPU(unsigned int, current_bit_idx); |
1300 | |
1301 | /* |
1302 | * Mask out the i least significant bits of w |
1303 | */ |
1304 | #define MASK_LSBS(w, i) (w & ((~((xen_ulong_t)0UL)) << i)) |
1305 | |
1306 | /* |
1307 | * Search the CPUs pending events bitmasks. For each one found, map |
1308 | * the event number to an irq, and feed it into do_IRQ() for |
1309 | * handling. |
1310 | * |
1311 | * Xen uses a two-level bitmap to speed searching. The first level is |
1312 | * a bitset of words which contain pending event bits. The second |
1313 | * level is a bitset of pending events themselves. |
1314 | */ |
1315 | static void __xen_evtchn_do_upcall(void) |
1316 | { |
1317 | int start_word_idx, start_bit_idx; |
1318 | int word_idx, bit_idx; |
1319 | int i, irq; |
1320 | int cpu = get_cpu(); |
1321 | struct shared_info *s = HYPERVISOR_shared_info; |
1322 | struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); |
1323 | unsigned count; |
1324 | |
1325 | do { |
1326 | xen_ulong_t pending_words; |
1327 | xen_ulong_t pending_bits; |
1328 | struct irq_desc *desc; |
1329 | |
1330 | vcpu_info->evtchn_upcall_pending = 0; |
1331 | |
1332 | if (__this_cpu_inc_return(xed_nesting_count) - 1) |
1333 | goto out; |
1334 | |
1335 | /* |
1336 | * Master flag must be cleared /before/ clearing |
1337 | * selector flag. xchg_xen_ulong must contain an |
1338 | * appropriate barrier. |
1339 | */ |
1340 | if ((irq = per_cpu(virq_to_irq, cpu)[VIRQ_TIMER]) != -1) { |
1341 | int evtchn = evtchn_from_irq(irq); |
1342 | word_idx = evtchn / BITS_PER_LONG; |
1343 | pending_bits = evtchn % BITS_PER_LONG; |
1344 | if (active_evtchns(cpu, s, word_idx) & (1ULL << pending_bits)) { |
1345 | desc = irq_to_desc(irq); |
1346 | if (desc) |
1347 | generic_handle_irq_desc(irq, desc); |
1348 | } |
1349 | } |
1350 | |
1351 | pending_words = xchg_xen_ulong(&vcpu_info->evtchn_pending_sel, 0); |
1352 | |
1353 | start_word_idx = __this_cpu_read(current_word_idx); |
1354 | start_bit_idx = __this_cpu_read(current_bit_idx); |
1355 | |
1356 | word_idx = start_word_idx; |
1357 | |
1358 | for (i = 0; pending_words != 0; i++) { |
1359 | xen_ulong_t words; |
1360 | |
1361 | words = MASK_LSBS(pending_words, word_idx); |
1362 | |
1363 | /* |
1364 | * If we masked out all events, wrap to beginning. |
1365 | */ |
1366 | if (words == 0) { |
1367 | word_idx = 0; |
1368 | bit_idx = 0; |
1369 | continue; |
1370 | } |
1371 | word_idx = EVTCHN_FIRST_BIT(words); |
1372 | |
1373 | pending_bits = active_evtchns(cpu, s, word_idx); |
1374 | bit_idx = 0; /* usually scan entire word from start */ |
1375 | if (word_idx == start_word_idx) { |
1376 | /* We scan the starting word in two parts */ |
1377 | if (i == 0) |
1378 | /* 1st time: start in the middle */ |
1379 | bit_idx = start_bit_idx; |
1380 | else |
1381 | /* 2nd time: mask bits done already */ |
1382 | bit_idx &= (1UL << start_bit_idx) - 1; |
1383 | } |
1384 | |
1385 | do { |
1386 | xen_ulong_t bits; |
1387 | int port; |
1388 | |
1389 | bits = MASK_LSBS(pending_bits, bit_idx); |
1390 | |
1391 | /* If we masked out all events, move on. */ |
1392 | if (bits == 0) |
1393 | break; |
1394 | |
1395 | bit_idx = EVTCHN_FIRST_BIT(bits); |
1396 | |
1397 | /* Process port. */ |
1398 | port = (word_idx * BITS_PER_EVTCHN_WORD) + bit_idx; |
1399 | irq = evtchn_to_irq[port]; |
1400 | |
1401 | if (irq != -1) { |
1402 | desc = irq_to_desc(irq); |
1403 | if (desc) |
1404 | generic_handle_irq_desc(irq, desc); |
1405 | } |
1406 | |
1407 | bit_idx = (bit_idx + 1) % BITS_PER_EVTCHN_WORD; |
1408 | |
1409 | /* Next caller starts at last processed + 1 */ |
1410 | __this_cpu_write(current_word_idx, |
1411 | bit_idx ? word_idx : |
1412 | (word_idx+1) % BITS_PER_EVTCHN_WORD); |
1413 | __this_cpu_write(current_bit_idx, bit_idx); |
1414 | } while (bit_idx != 0); |
1415 | |
1416 | /* Scan start_l1i twice; all others once. */ |
1417 | if ((word_idx != start_word_idx) || (i != 0)) |
1418 | pending_words &= ~(1UL << word_idx); |
1419 | |
1420 | word_idx = (word_idx + 1) % BITS_PER_EVTCHN_WORD; |
1421 | } |
1422 | |
1423 | BUG_ON(!irqs_disabled()); |
1424 | |
1425 | count = __this_cpu_read(xed_nesting_count); |
1426 | __this_cpu_write(xed_nesting_count, 0); |
1427 | } while (count != 1 || vcpu_info->evtchn_upcall_pending); |
1428 | |
1429 | out: |
1430 | |
1431 | put_cpu(); |
1432 | } |
1433 | |
1434 | void xen_evtchn_do_upcall(struct pt_regs *regs) |
1435 | { |
1436 | struct pt_regs *old_regs = set_irq_regs(regs); |
1437 | |
1438 | irq_enter(); |
1439 | #ifdef CONFIG_X86 |
1440 | exit_idle(); |
1441 | #endif |
1442 | |
1443 | __xen_evtchn_do_upcall(); |
1444 | |
1445 | irq_exit(); |
1446 | set_irq_regs(old_regs); |
1447 | } |
1448 | |
1449 | void xen_hvm_evtchn_do_upcall(void) |
1450 | { |
1451 | __xen_evtchn_do_upcall(); |
1452 | } |
1453 | EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall); |
1454 | |
1455 | /* Rebind a new event channel to an existing irq. */ |
1456 | void rebind_evtchn_irq(int evtchn, int irq) |
1457 | { |
1458 | struct irq_info *info = info_for_irq(irq); |
1459 | |
1460 | /* Make sure the irq is masked, since the new event channel |
1461 | will also be masked. */ |
1462 | disable_irq(irq); |
1463 | |
1464 | mutex_lock(&irq_mapping_update_lock); |
1465 | |
1466 | /* After resume the irq<->evtchn mappings are all cleared out */ |
1467 | BUG_ON(evtchn_to_irq[evtchn] != -1); |
1468 | /* Expect irq to have been bound before, |
1469 | so there should be a proper type */ |
1470 | BUG_ON(info->type == IRQT_UNBOUND); |
1471 | |
1472 | xen_irq_info_evtchn_init(irq, evtchn); |
1473 | |
1474 | mutex_unlock(&irq_mapping_update_lock); |
1475 | |
1476 | /* new event channels are always bound to cpu 0 */ |
1477 | irq_set_affinity(irq, cpumask_of(0)); |
1478 | |
1479 | /* Unmask the event channel. */ |
1480 | enable_irq(irq); |
1481 | } |
1482 | |
1483 | /* Rebind an evtchn so that it gets delivered to a specific cpu */ |
1484 | static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu) |
1485 | { |
1486 | struct evtchn_bind_vcpu bind_vcpu; |
1487 | int evtchn = evtchn_from_irq(irq); |
1488 | |
1489 | if (!VALID_EVTCHN(evtchn)) |
1490 | return -1; |
1491 | |
1492 | /* |
1493 | * Events delivered via platform PCI interrupts are always |
1494 | * routed to vcpu 0 and hence cannot be rebound. |
1495 | */ |
1496 | if (xen_hvm_domain() && !xen_have_vector_callback) |
1497 | return -1; |
1498 | |
1499 | /* Send future instances of this interrupt to other vcpu. */ |
1500 | bind_vcpu.port = evtchn; |
1501 | bind_vcpu.vcpu = tcpu; |
1502 | |
1503 | /* |
1504 | * If this fails, it usually just indicates that we're dealing with a |
1505 | * virq or IPI channel, which don't actually need to be rebound. Ignore |
1506 | * it, but don't do the xenlinux-level rebind in that case. |
1507 | */ |
1508 | if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0) |
1509 | bind_evtchn_to_cpu(evtchn, tcpu); |
1510 | |
1511 | return 0; |
1512 | } |
1513 | |
1514 | static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest, |
1515 | bool force) |
1516 | { |
1517 | unsigned tcpu = cpumask_first(dest); |
1518 | |
1519 | return rebind_irq_to_cpu(data->irq, tcpu); |
1520 | } |
1521 | |
1522 | int resend_irq_on_evtchn(unsigned int irq) |
1523 | { |
1524 | int masked, evtchn = evtchn_from_irq(irq); |
1525 | struct shared_info *s = HYPERVISOR_shared_info; |
1526 | |
1527 | if (!VALID_EVTCHN(evtchn)) |
1528 | return 1; |
1529 | |
1530 | masked = sync_test_and_set_bit(evtchn, BM(s->evtchn_mask)); |
1531 | sync_set_bit(evtchn, BM(s->evtchn_pending)); |
1532 | if (!masked) |
1533 | unmask_evtchn(evtchn); |
1534 | |
1535 | return 1; |
1536 | } |
1537 | |
1538 | static void enable_dynirq(struct irq_data *data) |
1539 | { |
1540 | int evtchn = evtchn_from_irq(data->irq); |
1541 | |
1542 | if (VALID_EVTCHN(evtchn)) |
1543 | unmask_evtchn(evtchn); |
1544 | } |
1545 | |
1546 | static void disable_dynirq(struct irq_data *data) |
1547 | { |
1548 | int evtchn = evtchn_from_irq(data->irq); |
1549 | |
1550 | if (VALID_EVTCHN(evtchn)) |
1551 | mask_evtchn(evtchn); |
1552 | } |
1553 | |
1554 | static void ack_dynirq(struct irq_data *data) |
1555 | { |
1556 | int evtchn = evtchn_from_irq(data->irq); |
1557 | |
1558 | irq_move_irq(data); |
1559 | |
1560 | if (VALID_EVTCHN(evtchn)) |
1561 | clear_evtchn(evtchn); |
1562 | } |
1563 | |
1564 | static void mask_ack_dynirq(struct irq_data *data) |
1565 | { |
1566 | disable_dynirq(data); |
1567 | ack_dynirq(data); |
1568 | } |
1569 | |
1570 | static int retrigger_dynirq(struct irq_data *data) |
1571 | { |
1572 | int evtchn = evtchn_from_irq(data->irq); |
1573 | struct shared_info *sh = HYPERVISOR_shared_info; |
1574 | int ret = 0; |
1575 | |
1576 | if (VALID_EVTCHN(evtchn)) { |
1577 | int masked; |
1578 | |
1579 | masked = sync_test_and_set_bit(evtchn, BM(sh->evtchn_mask)); |
1580 | sync_set_bit(evtchn, BM(sh->evtchn_pending)); |
1581 | if (!masked) |
1582 | unmask_evtchn(evtchn); |
1583 | ret = 1; |
1584 | } |
1585 | |
1586 | return ret; |
1587 | } |
1588 | |
1589 | static void restore_pirqs(void) |
1590 | { |
1591 | int pirq, rc, irq, gsi; |
1592 | struct physdev_map_pirq map_irq; |
1593 | struct irq_info *info; |
1594 | |
1595 | list_for_each_entry(info, &xen_irq_list_head, list) { |
1596 | if (info->type != IRQT_PIRQ) |
1597 | continue; |
1598 | |
1599 | pirq = info->u.pirq.pirq; |
1600 | gsi = info->u.pirq.gsi; |
1601 | irq = info->irq; |
1602 | |
1603 | /* save/restore of PT devices doesn't work, so at this point the |
1604 | * only devices present are GSI based emulated devices */ |
1605 | if (!gsi) |
1606 | continue; |
1607 | |
1608 | map_irq.domid = DOMID_SELF; |
1609 | map_irq.type = MAP_PIRQ_TYPE_GSI; |
1610 | map_irq.index = gsi; |
1611 | map_irq.pirq = pirq; |
1612 | |
1613 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); |
1614 | if (rc) { |
1615 | printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n", |
1616 | gsi, irq, pirq, rc); |
1617 | xen_free_irq(irq); |
1618 | continue; |
1619 | } |
1620 | |
1621 | printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); |
1622 | |
1623 | __startup_pirq(irq); |
1624 | } |
1625 | } |
1626 | |
1627 | static void restore_cpu_virqs(unsigned int cpu) |
1628 | { |
1629 | struct evtchn_bind_virq bind_virq; |
1630 | int virq, irq, evtchn; |
1631 | |
1632 | for (virq = 0; virq < NR_VIRQS; virq++) { |
1633 | if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) |
1634 | continue; |
1635 | |
1636 | BUG_ON(virq_from_irq(irq) != virq); |
1637 | |
1638 | /* Get a new binding from Xen. */ |
1639 | bind_virq.virq = virq; |
1640 | bind_virq.vcpu = cpu; |
1641 | if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq, |
1642 | &bind_virq) != 0) |
1643 | BUG(); |
1644 | evtchn = bind_virq.port; |
1645 | |
1646 | /* Record the new mapping. */ |
1647 | xen_irq_info_virq_init(cpu, irq, evtchn, virq); |
1648 | bind_evtchn_to_cpu(evtchn, cpu); |
1649 | } |
1650 | } |
1651 | |
1652 | static void restore_cpu_ipis(unsigned int cpu) |
1653 | { |
1654 | struct evtchn_bind_ipi bind_ipi; |
1655 | int ipi, irq, evtchn; |
1656 | |
1657 | for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) { |
1658 | if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) |
1659 | continue; |
1660 | |
1661 | BUG_ON(ipi_from_irq(irq) != ipi); |
1662 | |
1663 | /* Get a new binding from Xen. */ |
1664 | bind_ipi.vcpu = cpu; |
1665 | if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi, |
1666 | &bind_ipi) != 0) |
1667 | BUG(); |
1668 | evtchn = bind_ipi.port; |
1669 | |
1670 | /* Record the new mapping. */ |
1671 | xen_irq_info_ipi_init(cpu, irq, evtchn, ipi); |
1672 | bind_evtchn_to_cpu(evtchn, cpu); |
1673 | } |
1674 | } |
1675 | |
1676 | /* Clear an irq's pending state, in preparation for polling on it */ |
1677 | void xen_clear_irq_pending(int irq) |
1678 | { |
1679 | int evtchn = evtchn_from_irq(irq); |
1680 | |
1681 | if (VALID_EVTCHN(evtchn)) |
1682 | clear_evtchn(evtchn); |
1683 | } |
1684 | EXPORT_SYMBOL(xen_clear_irq_pending); |
1685 | void xen_set_irq_pending(int irq) |
1686 | { |
1687 | int evtchn = evtchn_from_irq(irq); |
1688 | |
1689 | if (VALID_EVTCHN(evtchn)) |
1690 | set_evtchn(evtchn); |
1691 | } |
1692 | |
1693 | bool xen_test_irq_pending(int irq) |
1694 | { |
1695 | int evtchn = evtchn_from_irq(irq); |
1696 | bool ret = false; |
1697 | |
1698 | if (VALID_EVTCHN(evtchn)) |
1699 | ret = test_evtchn(evtchn); |
1700 | |
1701 | return ret; |
1702 | } |
1703 | |
1704 | /* Poll waiting for an irq to become pending with timeout. In the usual case, |
1705 | * the irq will be disabled so it won't deliver an interrupt. */ |
1706 | void xen_poll_irq_timeout(int irq, u64 timeout) |
1707 | { |
1708 | evtchn_port_t evtchn = evtchn_from_irq(irq); |
1709 | |
1710 | if (VALID_EVTCHN(evtchn)) { |
1711 | struct sched_poll poll; |
1712 | |
1713 | poll.nr_ports = 1; |
1714 | poll.timeout = timeout; |
1715 | set_xen_guest_handle(poll.ports, &evtchn); |
1716 | |
1717 | if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0) |
1718 | BUG(); |
1719 | } |
1720 | } |
1721 | EXPORT_SYMBOL(xen_poll_irq_timeout); |
1722 | /* Poll waiting for an irq to become pending. In the usual case, the |
1723 | * irq will be disabled so it won't deliver an interrupt. */ |
1724 | void xen_poll_irq(int irq) |
1725 | { |
1726 | xen_poll_irq_timeout(irq, 0 /* no timeout */); |
1727 | } |
1728 | |
1729 | /* Check whether the IRQ line is shared with other guests. */ |
1730 | int xen_test_irq_shared(int irq) |
1731 | { |
1732 | struct irq_info *info = info_for_irq(irq); |
1733 | struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq }; |
1734 | |
1735 | if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status)) |
1736 | return 0; |
1737 | return !(irq_status.flags & XENIRQSTAT_shared); |
1738 | } |
1739 | EXPORT_SYMBOL_GPL(xen_test_irq_shared); |
1740 | |
1741 | void xen_irq_resume(void) |
1742 | { |
1743 | unsigned int cpu, evtchn; |
1744 | struct irq_info *info; |
1745 | |
1746 | init_evtchn_cpu_bindings(); |
1747 | |
1748 | /* New event-channel space is not 'live' yet. */ |
1749 | for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++) |
1750 | mask_evtchn(evtchn); |
1751 | |
1752 | /* No IRQ <-> event-channel mappings. */ |
1753 | list_for_each_entry(info, &xen_irq_list_head, list) |
1754 | info->evtchn = 0; /* zap event-channel binding */ |
1755 | |
1756 | for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++) |
1757 | evtchn_to_irq[evtchn] = -1; |
1758 | |
1759 | for_each_possible_cpu(cpu) { |
1760 | restore_cpu_virqs(cpu); |
1761 | restore_cpu_ipis(cpu); |
1762 | } |
1763 | |
1764 | restore_pirqs(); |
1765 | } |
1766 | |
1767 | static struct irq_chip xen_dynamic_chip __read_mostly = { |
1768 | .name = "xen-dyn", |
1769 | |
1770 | .irq_disable = disable_dynirq, |
1771 | .irq_mask = disable_dynirq, |
1772 | .irq_unmask = enable_dynirq, |
1773 | |
1774 | .irq_ack = ack_dynirq, |
1775 | .irq_mask_ack = mask_ack_dynirq, |
1776 | |
1777 | .irq_set_affinity = set_affinity_irq, |
1778 | .irq_retrigger = retrigger_dynirq, |
1779 | }; |
1780 | |
1781 | static struct irq_chip xen_pirq_chip __read_mostly = { |
1782 | .name = "xen-pirq", |
1783 | |
1784 | .irq_startup = startup_pirq, |
1785 | .irq_shutdown = shutdown_pirq, |
1786 | .irq_enable = enable_pirq, |
1787 | .irq_disable = disable_pirq, |
1788 | |
1789 | .irq_mask = disable_dynirq, |
1790 | .irq_unmask = enable_dynirq, |
1791 | |
1792 | .irq_ack = eoi_pirq, |
1793 | .irq_eoi = eoi_pirq, |
1794 | .irq_mask_ack = mask_ack_pirq, |
1795 | |
1796 | .irq_set_affinity = set_affinity_irq, |
1797 | |
1798 | .irq_retrigger = retrigger_dynirq, |
1799 | }; |
1800 | |
1801 | static struct irq_chip xen_percpu_chip __read_mostly = { |
1802 | .name = "xen-percpu", |
1803 | |
1804 | .irq_disable = disable_dynirq, |
1805 | .irq_mask = disable_dynirq, |
1806 | .irq_unmask = enable_dynirq, |
1807 | |
1808 | .irq_ack = ack_dynirq, |
1809 | }; |
1810 | |
1811 | int xen_set_callback_via(uint64_t via) |
1812 | { |
1813 | struct xen_hvm_param a; |
1814 | a.domid = DOMID_SELF; |
1815 | a.index = HVM_PARAM_CALLBACK_IRQ; |
1816 | a.value = via; |
1817 | return HYPERVISOR_hvm_op(HVMOP_set_param, &a); |
1818 | } |
1819 | EXPORT_SYMBOL_GPL(xen_set_callback_via); |
1820 | |
1821 | #ifdef CONFIG_XEN_PVHVM |
1822 | /* Vector callbacks are better than PCI interrupts to receive event |
1823 | * channel notifications because we can receive vector callbacks on any |
1824 | * vcpu and we don't need PCI support or APIC interactions. */ |
1825 | void xen_callback_vector(void) |
1826 | { |
1827 | int rc; |
1828 | uint64_t callback_via; |
1829 | if (xen_have_vector_callback) { |
1830 | callback_via = HVM_CALLBACK_VECTOR(HYPERVISOR_CALLBACK_VECTOR); |
1831 | rc = xen_set_callback_via(callback_via); |
1832 | if (rc) { |
1833 | printk(KERN_ERR "Request for Xen HVM callback vector" |
1834 | " failed.\n"); |
1835 | xen_have_vector_callback = 0; |
1836 | return; |
1837 | } |
1838 | printk(KERN_INFO "Xen HVM callback vector for event delivery is " |
1839 | "enabled\n"); |
1840 | /* in the restore case the vector has already been allocated */ |
1841 | if (!test_bit(HYPERVISOR_CALLBACK_VECTOR, used_vectors)) |
1842 | alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, |
1843 | xen_hvm_callback_vector); |
1844 | } |
1845 | } |
1846 | #else |
1847 | void xen_callback_vector(void) {} |
1848 | #endif |
1849 | |
1850 | void __init xen_init_IRQ(void) |
1851 | { |
1852 | int i; |
1853 | |
1854 | evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq), |
1855 | GFP_KERNEL); |
1856 | BUG_ON(!evtchn_to_irq); |
1857 | for (i = 0; i < NR_EVENT_CHANNELS; i++) |
1858 | evtchn_to_irq[i] = -1; |
1859 | |
1860 | init_evtchn_cpu_bindings(); |
1861 | |
1862 | /* No event channels are 'live' right now. */ |
1863 | for (i = 0; i < NR_EVENT_CHANNELS; i++) |
1864 | mask_evtchn(i); |
1865 | |
1866 | pirq_needs_eoi = pirq_needs_eoi_flag; |
1867 | |
1868 | #ifdef CONFIG_X86 |
1869 | if (xen_hvm_domain()) { |
1870 | xen_callback_vector(); |
1871 | native_init_IRQ(); |
1872 | /* pci_xen_hvm_init must be called after native_init_IRQ so that |
1873 | * __acpi_register_gsi can point at the right function */ |
1874 | pci_xen_hvm_init(); |
1875 | } else { |
1876 | int rc; |
1877 | struct physdev_pirq_eoi_gmfn eoi_gmfn; |
1878 | |
1879 | irq_ctx_init(smp_processor_id()); |
1880 | if (xen_initial_domain()) |
1881 | pci_xen_initial_domain(); |
1882 | |
1883 | pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO); |
1884 | eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map); |
1885 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn); |
1886 | if (rc != 0) { |
1887 | free_page((unsigned long) pirq_eoi_map); |
1888 | pirq_eoi_map = NULL; |
1889 | } else |
1890 | pirq_needs_eoi = pirq_check_eoi_map; |
1891 | } |
1892 | #endif |
1893 | } |
1894 |
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v2.6.34-rc5
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