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1 | /* |
2 | * Disk Array driver for HP Smart Array controllers. |
3 | * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P. |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by |
7 | * the Free Software Foundation; version 2 of the License. |
8 | * |
9 | * This program is distributed in the hope that it will be useful, |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | * General Public License for more details. |
13 | * |
14 | * You should have received a copy of the GNU General Public License |
15 | * along with this program; if not, write to the Free Software |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
17 | * 02111-1307, USA. |
18 | * |
19 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com |
20 | * |
21 | */ |
22 | |
23 | #include <linux/module.h> |
24 | #include <linux/interrupt.h> |
25 | #include <linux/types.h> |
26 | #include <linux/pci.h> |
27 | #include <linux/pci-aspm.h> |
28 | #include <linux/kernel.h> |
29 | #include <linux/slab.h> |
30 | #include <linux/delay.h> |
31 | #include <linux/major.h> |
32 | #include <linux/fs.h> |
33 | #include <linux/bio.h> |
34 | #include <linux/blkpg.h> |
35 | #include <linux/timer.h> |
36 | #include <linux/proc_fs.h> |
37 | #include <linux/seq_file.h> |
38 | #include <linux/init.h> |
39 | #include <linux/jiffies.h> |
40 | #include <linux/hdreg.h> |
41 | #include <linux/spinlock.h> |
42 | #include <linux/compat.h> |
43 | #include <linux/mutex.h> |
44 | #include <linux/bitmap.h> |
45 | #include <linux/io.h> |
46 | #include <asm/uaccess.h> |
47 | |
48 | #include <linux/dma-mapping.h> |
49 | #include <linux/blkdev.h> |
50 | #include <linux/genhd.h> |
51 | #include <linux/completion.h> |
52 | #include <scsi/scsi.h> |
53 | #include <scsi/sg.h> |
54 | #include <scsi/scsi_ioctl.h> |
55 | #include <linux/cdrom.h> |
56 | #include <linux/scatterlist.h> |
57 | #include <linux/kthread.h> |
58 | |
59 | #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) |
60 | #define DRIVER_NAME "HP CISS Driver (v 3.6.26)" |
61 | #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26) |
62 | |
63 | /* Embedded module documentation macros - see modules.h */ |
64 | MODULE_AUTHOR("Hewlett-Packard Company"); |
65 | MODULE_DESCRIPTION("Driver for HP Smart Array Controllers"); |
66 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); |
67 | MODULE_VERSION("3.6.26"); |
68 | MODULE_LICENSE("GPL"); |
69 | static int cciss_tape_cmds = 6; |
70 | module_param(cciss_tape_cmds, int, 0644); |
71 | MODULE_PARM_DESC(cciss_tape_cmds, |
72 | "number of commands to allocate for tape devices (default: 6)"); |
73 | static int cciss_simple_mode; |
74 | module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR); |
75 | MODULE_PARM_DESC(cciss_simple_mode, |
76 | "Use 'simple mode' rather than 'performant mode'"); |
77 | |
78 | static DEFINE_MUTEX(cciss_mutex); |
79 | static struct proc_dir_entry *proc_cciss; |
80 | |
81 | #include "cciss_cmd.h" |
82 | #include "cciss.h" |
83 | #include <linux/cciss_ioctl.h> |
84 | |
85 | /* define the PCI info for the cards we can control */ |
86 | static const struct pci_device_id cciss_pci_device_id[] = { |
87 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070}, |
88 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080}, |
89 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082}, |
90 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083}, |
91 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091}, |
92 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A}, |
93 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B}, |
94 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C}, |
95 | {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D}, |
96 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225}, |
97 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, |
98 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, |
99 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235}, |
100 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211}, |
101 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212}, |
102 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213}, |
103 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214}, |
104 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215}, |
105 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237}, |
106 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, |
107 | {0,} |
108 | }; |
109 | |
110 | MODULE_DEVICE_TABLE(pci, cciss_pci_device_id); |
111 | |
112 | /* board_id = Subsystem Device ID & Vendor ID |
113 | * product = Marketing Name for the board |
114 | * access = Address of the struct of function pointers |
115 | */ |
116 | static struct board_type products[] = { |
117 | {0x40700E11, "Smart Array 5300", &SA5_access}, |
118 | {0x40800E11, "Smart Array 5i", &SA5B_access}, |
119 | {0x40820E11, "Smart Array 532", &SA5B_access}, |
120 | {0x40830E11, "Smart Array 5312", &SA5B_access}, |
121 | {0x409A0E11, "Smart Array 641", &SA5_access}, |
122 | {0x409B0E11, "Smart Array 642", &SA5_access}, |
123 | {0x409C0E11, "Smart Array 6400", &SA5_access}, |
124 | {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, |
125 | {0x40910E11, "Smart Array 6i", &SA5_access}, |
126 | {0x3225103C, "Smart Array P600", &SA5_access}, |
127 | {0x3223103C, "Smart Array P800", &SA5_access}, |
128 | {0x3234103C, "Smart Array P400", &SA5_access}, |
129 | {0x3235103C, "Smart Array P400i", &SA5_access}, |
130 | {0x3211103C, "Smart Array E200i", &SA5_access}, |
131 | {0x3212103C, "Smart Array E200", &SA5_access}, |
132 | {0x3213103C, "Smart Array E200i", &SA5_access}, |
133 | {0x3214103C, "Smart Array E200i", &SA5_access}, |
134 | {0x3215103C, "Smart Array E200i", &SA5_access}, |
135 | {0x3237103C, "Smart Array E500", &SA5_access}, |
136 | {0x3223103C, "Smart Array P800", &SA5_access}, |
137 | {0x3234103C, "Smart Array P400", &SA5_access}, |
138 | {0x323D103C, "Smart Array P700m", &SA5_access}, |
139 | }; |
140 | |
141 | /* How long to wait (in milliseconds) for board to go into simple mode */ |
142 | #define MAX_CONFIG_WAIT 30000 |
143 | #define MAX_IOCTL_CONFIG_WAIT 1000 |
144 | |
145 | /*define how many times we will try a command because of bus resets */ |
146 | #define MAX_CMD_RETRIES 3 |
147 | |
148 | #define MAX_CTLR 32 |
149 | |
150 | /* Originally cciss driver only supports 8 major numbers */ |
151 | #define MAX_CTLR_ORIG 8 |
152 | |
153 | static ctlr_info_t *hba[MAX_CTLR]; |
154 | |
155 | static struct task_struct *cciss_scan_thread; |
156 | static DEFINE_MUTEX(scan_mutex); |
157 | static LIST_HEAD(scan_q); |
158 | |
159 | static void do_cciss_request(struct request_queue *q); |
160 | static irqreturn_t do_cciss_intx(int irq, void *dev_id); |
161 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id); |
162 | static int cciss_open(struct block_device *bdev, fmode_t mode); |
163 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode); |
164 | static int cciss_release(struct gendisk *disk, fmode_t mode); |
165 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
166 | unsigned int cmd, unsigned long arg); |
167 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
168 | unsigned int cmd, unsigned long arg); |
169 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo); |
170 | |
171 | static int cciss_revalidate(struct gendisk *disk); |
172 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl); |
173 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
174 | int clear_all, int via_ioctl); |
175 | |
176 | static void cciss_read_capacity(ctlr_info_t *h, int logvol, |
177 | sector_t *total_size, unsigned int *block_size); |
178 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
179 | sector_t *total_size, unsigned int *block_size); |
180 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
181 | sector_t total_size, |
182 | unsigned int block_size, InquiryData_struct *inq_buff, |
183 | drive_info_struct *drv); |
184 | static void cciss_interrupt_mode(ctlr_info_t *); |
185 | static int cciss_enter_simple_mode(struct ctlr_info *h); |
186 | static void start_io(ctlr_info_t *h); |
187 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
188 | __u8 page_code, unsigned char scsi3addr[], |
189 | int cmd_type); |
190 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, |
191 | int attempt_retry); |
192 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c); |
193 | |
194 | static int add_to_scan_list(struct ctlr_info *h); |
195 | static int scan_thread(void *data); |
196 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c); |
197 | static void cciss_hba_release(struct device *dev); |
198 | static void cciss_device_release(struct device *dev); |
199 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index); |
200 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index); |
201 | static inline u32 next_command(ctlr_info_t *h); |
202 | static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, |
203 | u32 *cfg_base_addr, u64 *cfg_base_addr_index, |
204 | u64 *cfg_offset); |
205 | static int cciss_pci_find_memory_BAR(struct pci_dev *pdev, |
206 | unsigned long *memory_bar); |
207 | static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag); |
208 | static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable); |
209 | |
210 | /* performant mode helper functions */ |
211 | static void calc_bucket_map(int *bucket, int num_buckets, int nsgs, |
212 | int *bucket_map); |
213 | static void cciss_put_controller_into_performant_mode(ctlr_info_t *h); |
214 | |
215 | #ifdef CONFIG_PROC_FS |
216 | static void cciss_procinit(ctlr_info_t *h); |
217 | #else |
218 | static void cciss_procinit(ctlr_info_t *h) |
219 | { |
220 | } |
221 | #endif /* CONFIG_PROC_FS */ |
222 | |
223 | #ifdef CONFIG_COMPAT |
224 | static int cciss_compat_ioctl(struct block_device *, fmode_t, |
225 | unsigned, unsigned long); |
226 | #endif |
227 | |
228 | static const struct block_device_operations cciss_fops = { |
229 | .owner = THIS_MODULE, |
230 | .open = cciss_unlocked_open, |
231 | .release = cciss_release, |
232 | .ioctl = do_ioctl, |
233 | .getgeo = cciss_getgeo, |
234 | #ifdef CONFIG_COMPAT |
235 | .compat_ioctl = cciss_compat_ioctl, |
236 | #endif |
237 | .revalidate_disk = cciss_revalidate, |
238 | }; |
239 | |
240 | /* set_performant_mode: Modify the tag for cciss performant |
241 | * set bit 0 for pull model, bits 3-1 for block fetch |
242 | * register number |
243 | */ |
244 | static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c) |
245 | { |
246 | if (likely(h->transMethod & CFGTBL_Trans_Performant)) |
247 | c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); |
248 | } |
249 | |
250 | /* |
251 | * Enqueuing and dequeuing functions for cmdlists. |
252 | */ |
253 | static inline void addQ(struct list_head *list, CommandList_struct *c) |
254 | { |
255 | list_add_tail(&c->list, list); |
256 | } |
257 | |
258 | static inline void removeQ(CommandList_struct *c) |
259 | { |
260 | /* |
261 | * After kexec/dump some commands might still |
262 | * be in flight, which the firmware will try |
263 | * to complete. Resetting the firmware doesn't work |
264 | * with old fw revisions, so we have to mark |
265 | * them off as 'stale' to prevent the driver from |
266 | * falling over. |
267 | */ |
268 | if (WARN_ON(list_empty(&c->list))) { |
269 | c->cmd_type = CMD_MSG_STALE; |
270 | return; |
271 | } |
272 | |
273 | list_del_init(&c->list); |
274 | } |
275 | |
276 | static void enqueue_cmd_and_start_io(ctlr_info_t *h, |
277 | CommandList_struct *c) |
278 | { |
279 | unsigned long flags; |
280 | set_performant_mode(h, c); |
281 | spin_lock_irqsave(&h->lock, flags); |
282 | addQ(&h->reqQ, c); |
283 | h->Qdepth++; |
284 | if (h->Qdepth > h->maxQsinceinit) |
285 | h->maxQsinceinit = h->Qdepth; |
286 | start_io(h); |
287 | spin_unlock_irqrestore(&h->lock, flags); |
288 | } |
289 | |
290 | static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list, |
291 | int nr_cmds) |
292 | { |
293 | int i; |
294 | |
295 | if (!cmd_sg_list) |
296 | return; |
297 | for (i = 0; i < nr_cmds; i++) { |
298 | kfree(cmd_sg_list[i]); |
299 | cmd_sg_list[i] = NULL; |
300 | } |
301 | kfree(cmd_sg_list); |
302 | } |
303 | |
304 | static SGDescriptor_struct **cciss_allocate_sg_chain_blocks( |
305 | ctlr_info_t *h, int chainsize, int nr_cmds) |
306 | { |
307 | int j; |
308 | SGDescriptor_struct **cmd_sg_list; |
309 | |
310 | if (chainsize <= 0) |
311 | return NULL; |
312 | |
313 | cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL); |
314 | if (!cmd_sg_list) |
315 | return NULL; |
316 | |
317 | /* Build up chain blocks for each command */ |
318 | for (j = 0; j < nr_cmds; j++) { |
319 | /* Need a block of chainsized s/g elements. */ |
320 | cmd_sg_list[j] = kmalloc((chainsize * |
321 | sizeof(*cmd_sg_list[j])), GFP_KERNEL); |
322 | if (!cmd_sg_list[j]) { |
323 | dev_err(&h->pdev->dev, "Cannot get memory " |
324 | "for s/g chains.\n"); |
325 | goto clean; |
326 | } |
327 | } |
328 | return cmd_sg_list; |
329 | clean: |
330 | cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds); |
331 | return NULL; |
332 | } |
333 | |
334 | static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c) |
335 | { |
336 | SGDescriptor_struct *chain_sg; |
337 | u64bit temp64; |
338 | |
339 | if (c->Header.SGTotal <= h->max_cmd_sgentries) |
340 | return; |
341 | |
342 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; |
343 | temp64.val32.lower = chain_sg->Addr.lower; |
344 | temp64.val32.upper = chain_sg->Addr.upper; |
345 | pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); |
346 | } |
347 | |
348 | static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c, |
349 | SGDescriptor_struct *chain_block, int len) |
350 | { |
351 | SGDescriptor_struct *chain_sg; |
352 | u64bit temp64; |
353 | |
354 | chain_sg = &c->SG[h->max_cmd_sgentries - 1]; |
355 | chain_sg->Ext = CCISS_SG_CHAIN; |
356 | chain_sg->Len = len; |
357 | temp64.val = pci_map_single(h->pdev, chain_block, len, |
358 | PCI_DMA_TODEVICE); |
359 | chain_sg->Addr.lower = temp64.val32.lower; |
360 | chain_sg->Addr.upper = temp64.val32.upper; |
361 | } |
362 | |
363 | #include "cciss_scsi.c" /* For SCSI tape support */ |
364 | |
365 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", |
366 | "UNKNOWN" |
367 | }; |
368 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1) |
369 | |
370 | #ifdef CONFIG_PROC_FS |
371 | |
372 | /* |
373 | * Report information about this controller. |
374 | */ |
375 | #define ENG_GIG 1000000000 |
376 | #define ENG_GIG_FACTOR (ENG_GIG/512) |
377 | #define ENGAGE_SCSI "engage scsi" |
378 | |
379 | static void cciss_seq_show_header(struct seq_file *seq) |
380 | { |
381 | ctlr_info_t *h = seq->private; |
382 | |
383 | seq_printf(seq, "%s: HP %s Controller\n" |
384 | "Board ID: 0x%08lx\n" |
385 | "Firmware Version: %c%c%c%c\n" |
386 | "IRQ: %d\n" |
387 | "Logical drives: %d\n" |
388 | "Current Q depth: %d\n" |
389 | "Current # commands on controller: %d\n" |
390 | "Max Q depth since init: %d\n" |
391 | "Max # commands on controller since init: %d\n" |
392 | "Max SG entries since init: %d\n", |
393 | h->devname, |
394 | h->product_name, |
395 | (unsigned long)h->board_id, |
396 | h->firm_ver[0], h->firm_ver[1], h->firm_ver[2], |
397 | h->firm_ver[3], (unsigned int)h->intr[h->intr_mode], |
398 | h->num_luns, |
399 | h->Qdepth, h->commands_outstanding, |
400 | h->maxQsinceinit, h->max_outstanding, h->maxSG); |
401 | |
402 | #ifdef CONFIG_CISS_SCSI_TAPE |
403 | cciss_seq_tape_report(seq, h); |
404 | #endif /* CONFIG_CISS_SCSI_TAPE */ |
405 | } |
406 | |
407 | static void *cciss_seq_start(struct seq_file *seq, loff_t *pos) |
408 | { |
409 | ctlr_info_t *h = seq->private; |
410 | unsigned long flags; |
411 | |
412 | /* prevent displaying bogus info during configuration |
413 | * or deconfiguration of a logical volume |
414 | */ |
415 | spin_lock_irqsave(&h->lock, flags); |
416 | if (h->busy_configuring) { |
417 | spin_unlock_irqrestore(&h->lock, flags); |
418 | return ERR_PTR(-EBUSY); |
419 | } |
420 | h->busy_configuring = 1; |
421 | spin_unlock_irqrestore(&h->lock, flags); |
422 | |
423 | if (*pos == 0) |
424 | cciss_seq_show_header(seq); |
425 | |
426 | return pos; |
427 | } |
428 | |
429 | static int cciss_seq_show(struct seq_file *seq, void *v) |
430 | { |
431 | sector_t vol_sz, vol_sz_frac; |
432 | ctlr_info_t *h = seq->private; |
433 | unsigned ctlr = h->ctlr; |
434 | loff_t *pos = v; |
435 | drive_info_struct *drv = h->drv[*pos]; |
436 | |
437 | if (*pos > h->highest_lun) |
438 | return 0; |
439 | |
440 | if (drv == NULL) /* it's possible for h->drv[] to have holes. */ |
441 | return 0; |
442 | |
443 | if (drv->heads == 0) |
444 | return 0; |
445 | |
446 | vol_sz = drv->nr_blocks; |
447 | vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR); |
448 | vol_sz_frac *= 100; |
449 | sector_div(vol_sz_frac, ENG_GIG_FACTOR); |
450 | |
451 | if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN) |
452 | drv->raid_level = RAID_UNKNOWN; |
453 | seq_printf(seq, "cciss/c%dd%d:" |
454 | "\t%4u.%02uGB\tRAID %s\n", |
455 | ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac, |
456 | raid_label[drv->raid_level]); |
457 | return 0; |
458 | } |
459 | |
460 | static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos) |
461 | { |
462 | ctlr_info_t *h = seq->private; |
463 | |
464 | if (*pos > h->highest_lun) |
465 | return NULL; |
466 | *pos += 1; |
467 | |
468 | return pos; |
469 | } |
470 | |
471 | static void cciss_seq_stop(struct seq_file *seq, void *v) |
472 | { |
473 | ctlr_info_t *h = seq->private; |
474 | |
475 | /* Only reset h->busy_configuring if we succeeded in setting |
476 | * it during cciss_seq_start. */ |
477 | if (v == ERR_PTR(-EBUSY)) |
478 | return; |
479 | |
480 | h->busy_configuring = 0; |
481 | } |
482 | |
483 | static const struct seq_operations cciss_seq_ops = { |
484 | .start = cciss_seq_start, |
485 | .show = cciss_seq_show, |
486 | .next = cciss_seq_next, |
487 | .stop = cciss_seq_stop, |
488 | }; |
489 | |
490 | static int cciss_seq_open(struct inode *inode, struct file *file) |
491 | { |
492 | int ret = seq_open(file, &cciss_seq_ops); |
493 | struct seq_file *seq = file->private_data; |
494 | |
495 | if (!ret) |
496 | seq->private = PDE(inode)->data; |
497 | |
498 | return ret; |
499 | } |
500 | |
501 | static ssize_t |
502 | cciss_proc_write(struct file *file, const char __user *buf, |
503 | size_t length, loff_t *ppos) |
504 | { |
505 | int err; |
506 | char *buffer; |
507 | |
508 | #ifndef CONFIG_CISS_SCSI_TAPE |
509 | return -EINVAL; |
510 | #endif |
511 | |
512 | if (!buf || length > PAGE_SIZE - 1) |
513 | return -EINVAL; |
514 | |
515 | buffer = (char *)__get_free_page(GFP_KERNEL); |
516 | if (!buffer) |
517 | return -ENOMEM; |
518 | |
519 | err = -EFAULT; |
520 | if (copy_from_user(buffer, buf, length)) |
521 | goto out; |
522 | buffer[length] = '\0'; |
523 | |
524 | #ifdef CONFIG_CISS_SCSI_TAPE |
525 | if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) { |
526 | struct seq_file *seq = file->private_data; |
527 | ctlr_info_t *h = seq->private; |
528 | |
529 | err = cciss_engage_scsi(h); |
530 | if (err == 0) |
531 | err = length; |
532 | } else |
533 | #endif /* CONFIG_CISS_SCSI_TAPE */ |
534 | err = -EINVAL; |
535 | /* might be nice to have "disengage" too, but it's not |
536 | safely possible. (only 1 module use count, lock issues.) */ |
537 | |
538 | out: |
539 | free_page((unsigned long)buffer); |
540 | return err; |
541 | } |
542 | |
543 | static const struct file_operations cciss_proc_fops = { |
544 | .owner = THIS_MODULE, |
545 | .open = cciss_seq_open, |
546 | .read = seq_read, |
547 | .llseek = seq_lseek, |
548 | .release = seq_release, |
549 | .write = cciss_proc_write, |
550 | }; |
551 | |
552 | static void cciss_procinit(ctlr_info_t *h) |
553 | { |
554 | struct proc_dir_entry *pde; |
555 | |
556 | if (proc_cciss == NULL) |
557 | proc_cciss = proc_mkdir("driver/cciss", NULL); |
558 | if (!proc_cciss) |
559 | return; |
560 | pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP | |
561 | S_IROTH, proc_cciss, |
562 | &cciss_proc_fops, h); |
563 | } |
564 | #endif /* CONFIG_PROC_FS */ |
565 | |
566 | #define MAX_PRODUCT_NAME_LEN 19 |
567 | |
568 | #define to_hba(n) container_of(n, struct ctlr_info, dev) |
569 | #define to_drv(n) container_of(n, drive_info_struct, dev) |
570 | |
571 | /* List of controllers which cannot be hard reset on kexec with reset_devices */ |
572 | static u32 unresettable_controller[] = { |
573 | 0x324a103C, /* Smart Array P712m */ |
574 | 0x324b103C, /* SmartArray P711m */ |
575 | 0x3223103C, /* Smart Array P800 */ |
576 | 0x3234103C, /* Smart Array P400 */ |
577 | 0x3235103C, /* Smart Array P400i */ |
578 | 0x3211103C, /* Smart Array E200i */ |
579 | 0x3212103C, /* Smart Array E200 */ |
580 | 0x3213103C, /* Smart Array E200i */ |
581 | 0x3214103C, /* Smart Array E200i */ |
582 | 0x3215103C, /* Smart Array E200i */ |
583 | 0x3237103C, /* Smart Array E500 */ |
584 | 0x323D103C, /* Smart Array P700m */ |
585 | 0x409C0E11, /* Smart Array 6400 */ |
586 | 0x409D0E11, /* Smart Array 6400 EM */ |
587 | }; |
588 | |
589 | /* List of controllers which cannot even be soft reset */ |
590 | static u32 soft_unresettable_controller[] = { |
591 | 0x409C0E11, /* Smart Array 6400 */ |
592 | 0x409D0E11, /* Smart Array 6400 EM */ |
593 | }; |
594 | |
595 | static int ctlr_is_hard_resettable(u32 board_id) |
596 | { |
597 | int i; |
598 | |
599 | for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) |
600 | if (unresettable_controller[i] == board_id) |
601 | return 0; |
602 | return 1; |
603 | } |
604 | |
605 | static int ctlr_is_soft_resettable(u32 board_id) |
606 | { |
607 | int i; |
608 | |
609 | for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) |
610 | if (soft_unresettable_controller[i] == board_id) |
611 | return 0; |
612 | return 1; |
613 | } |
614 | |
615 | static int ctlr_is_resettable(u32 board_id) |
616 | { |
617 | return ctlr_is_hard_resettable(board_id) || |
618 | ctlr_is_soft_resettable(board_id); |
619 | } |
620 | |
621 | static ssize_t host_show_resettable(struct device *dev, |
622 | struct device_attribute *attr, |
623 | char *buf) |
624 | { |
625 | struct ctlr_info *h = to_hba(dev); |
626 | |
627 | return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); |
628 | } |
629 | static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL); |
630 | |
631 | static ssize_t host_store_rescan(struct device *dev, |
632 | struct device_attribute *attr, |
633 | const char *buf, size_t count) |
634 | { |
635 | struct ctlr_info *h = to_hba(dev); |
636 | |
637 | add_to_scan_list(h); |
638 | wake_up_process(cciss_scan_thread); |
639 | wait_for_completion_interruptible(&h->scan_wait); |
640 | |
641 | return count; |
642 | } |
643 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); |
644 | |
645 | static ssize_t host_show_transport_mode(struct device *dev, |
646 | struct device_attribute *attr, |
647 | char *buf) |
648 | { |
649 | struct ctlr_info *h = to_hba(dev); |
650 | |
651 | return snprintf(buf, 20, "%s\n", |
652 | h->transMethod & CFGTBL_Trans_Performant ? |
653 | "performant" : "simple"); |
654 | } |
655 | static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL); |
656 | |
657 | static ssize_t dev_show_unique_id(struct device *dev, |
658 | struct device_attribute *attr, |
659 | char *buf) |
660 | { |
661 | drive_info_struct *drv = to_drv(dev); |
662 | struct ctlr_info *h = to_hba(drv->dev.parent); |
663 | __u8 sn[16]; |
664 | unsigned long flags; |
665 | int ret = 0; |
666 | |
667 | spin_lock_irqsave(&h->lock, flags); |
668 | if (h->busy_configuring) |
669 | ret = -EBUSY; |
670 | else |
671 | memcpy(sn, drv->serial_no, sizeof(sn)); |
672 | spin_unlock_irqrestore(&h->lock, flags); |
673 | |
674 | if (ret) |
675 | return ret; |
676 | else |
677 | return snprintf(buf, 16 * 2 + 2, |
678 | "%02X%02X%02X%02X%02X%02X%02X%02X" |
679 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", |
680 | sn[0], sn[1], sn[2], sn[3], |
681 | sn[4], sn[5], sn[6], sn[7], |
682 | sn[8], sn[9], sn[10], sn[11], |
683 | sn[12], sn[13], sn[14], sn[15]); |
684 | } |
685 | static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL); |
686 | |
687 | static ssize_t dev_show_vendor(struct device *dev, |
688 | struct device_attribute *attr, |
689 | char *buf) |
690 | { |
691 | drive_info_struct *drv = to_drv(dev); |
692 | struct ctlr_info *h = to_hba(drv->dev.parent); |
693 | char vendor[VENDOR_LEN + 1]; |
694 | unsigned long flags; |
695 | int ret = 0; |
696 | |
697 | spin_lock_irqsave(&h->lock, flags); |
698 | if (h->busy_configuring) |
699 | ret = -EBUSY; |
700 | else |
701 | memcpy(vendor, drv->vendor, VENDOR_LEN + 1); |
702 | spin_unlock_irqrestore(&h->lock, flags); |
703 | |
704 | if (ret) |
705 | return ret; |
706 | else |
707 | return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor); |
708 | } |
709 | static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL); |
710 | |
711 | static ssize_t dev_show_model(struct device *dev, |
712 | struct device_attribute *attr, |
713 | char *buf) |
714 | { |
715 | drive_info_struct *drv = to_drv(dev); |
716 | struct ctlr_info *h = to_hba(drv->dev.parent); |
717 | char model[MODEL_LEN + 1]; |
718 | unsigned long flags; |
719 | int ret = 0; |
720 | |
721 | spin_lock_irqsave(&h->lock, flags); |
722 | if (h->busy_configuring) |
723 | ret = -EBUSY; |
724 | else |
725 | memcpy(model, drv->model, MODEL_LEN + 1); |
726 | spin_unlock_irqrestore(&h->lock, flags); |
727 | |
728 | if (ret) |
729 | return ret; |
730 | else |
731 | return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model); |
732 | } |
733 | static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL); |
734 | |
735 | static ssize_t dev_show_rev(struct device *dev, |
736 | struct device_attribute *attr, |
737 | char *buf) |
738 | { |
739 | drive_info_struct *drv = to_drv(dev); |
740 | struct ctlr_info *h = to_hba(drv->dev.parent); |
741 | char rev[REV_LEN + 1]; |
742 | unsigned long flags; |
743 | int ret = 0; |
744 | |
745 | spin_lock_irqsave(&h->lock, flags); |
746 | if (h->busy_configuring) |
747 | ret = -EBUSY; |
748 | else |
749 | memcpy(rev, drv->rev, REV_LEN + 1); |
750 | spin_unlock_irqrestore(&h->lock, flags); |
751 | |
752 | if (ret) |
753 | return ret; |
754 | else |
755 | return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev); |
756 | } |
757 | static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL); |
758 | |
759 | static ssize_t cciss_show_lunid(struct device *dev, |
760 | struct device_attribute *attr, char *buf) |
761 | { |
762 | drive_info_struct *drv = to_drv(dev); |
763 | struct ctlr_info *h = to_hba(drv->dev.parent); |
764 | unsigned long flags; |
765 | unsigned char lunid[8]; |
766 | |
767 | spin_lock_irqsave(&h->lock, flags); |
768 | if (h->busy_configuring) { |
769 | spin_unlock_irqrestore(&h->lock, flags); |
770 | return -EBUSY; |
771 | } |
772 | if (!drv->heads) { |
773 | spin_unlock_irqrestore(&h->lock, flags); |
774 | return -ENOTTY; |
775 | } |
776 | memcpy(lunid, drv->LunID, sizeof(lunid)); |
777 | spin_unlock_irqrestore(&h->lock, flags); |
778 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", |
779 | lunid[0], lunid[1], lunid[2], lunid[3], |
780 | lunid[4], lunid[5], lunid[6], lunid[7]); |
781 | } |
782 | static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL); |
783 | |
784 | static ssize_t cciss_show_raid_level(struct device *dev, |
785 | struct device_attribute *attr, char *buf) |
786 | { |
787 | drive_info_struct *drv = to_drv(dev); |
788 | struct ctlr_info *h = to_hba(drv->dev.parent); |
789 | int raid; |
790 | unsigned long flags; |
791 | |
792 | spin_lock_irqsave(&h->lock, flags); |
793 | if (h->busy_configuring) { |
794 | spin_unlock_irqrestore(&h->lock, flags); |
795 | return -EBUSY; |
796 | } |
797 | raid = drv->raid_level; |
798 | spin_unlock_irqrestore(&h->lock, flags); |
799 | if (raid < 0 || raid > RAID_UNKNOWN) |
800 | raid = RAID_UNKNOWN; |
801 | |
802 | return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n", |
803 | raid_label[raid]); |
804 | } |
805 | static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL); |
806 | |
807 | static ssize_t cciss_show_usage_count(struct device *dev, |
808 | struct device_attribute *attr, char *buf) |
809 | { |
810 | drive_info_struct *drv = to_drv(dev); |
811 | struct ctlr_info *h = to_hba(drv->dev.parent); |
812 | unsigned long flags; |
813 | int count; |
814 | |
815 | spin_lock_irqsave(&h->lock, flags); |
816 | if (h->busy_configuring) { |
817 | spin_unlock_irqrestore(&h->lock, flags); |
818 | return -EBUSY; |
819 | } |
820 | count = drv->usage_count; |
821 | spin_unlock_irqrestore(&h->lock, flags); |
822 | return snprintf(buf, 20, "%d\n", count); |
823 | } |
824 | static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL); |
825 | |
826 | static struct attribute *cciss_host_attrs[] = { |
827 | &dev_attr_rescan.attr, |
828 | &dev_attr_resettable.attr, |
829 | &dev_attr_transport_mode.attr, |
830 | NULL |
831 | }; |
832 | |
833 | static struct attribute_group cciss_host_attr_group = { |
834 | .attrs = cciss_host_attrs, |
835 | }; |
836 | |
837 | static const struct attribute_group *cciss_host_attr_groups[] = { |
838 | &cciss_host_attr_group, |
839 | NULL |
840 | }; |
841 | |
842 | static struct device_type cciss_host_type = { |
843 | .name = "cciss_host", |
844 | .groups = cciss_host_attr_groups, |
845 | .release = cciss_hba_release, |
846 | }; |
847 | |
848 | static struct attribute *cciss_dev_attrs[] = { |
849 | &dev_attr_unique_id.attr, |
850 | &dev_attr_model.attr, |
851 | &dev_attr_vendor.attr, |
852 | &dev_attr_rev.attr, |
853 | &dev_attr_lunid.attr, |
854 | &dev_attr_raid_level.attr, |
855 | &dev_attr_usage_count.attr, |
856 | NULL |
857 | }; |
858 | |
859 | static struct attribute_group cciss_dev_attr_group = { |
860 | .attrs = cciss_dev_attrs, |
861 | }; |
862 | |
863 | static const struct attribute_group *cciss_dev_attr_groups[] = { |
864 | &cciss_dev_attr_group, |
865 | NULL |
866 | }; |
867 | |
868 | static struct device_type cciss_dev_type = { |
869 | .name = "cciss_device", |
870 | .groups = cciss_dev_attr_groups, |
871 | .release = cciss_device_release, |
872 | }; |
873 | |
874 | static struct bus_type cciss_bus_type = { |
875 | .name = "cciss", |
876 | }; |
877 | |
878 | /* |
879 | * cciss_hba_release is called when the reference count |
880 | * of h->dev goes to zero. |
881 | */ |
882 | static void cciss_hba_release(struct device *dev) |
883 | { |
884 | /* |
885 | * nothing to do, but need this to avoid a warning |
886 | * about not having a release handler from lib/kref.c. |
887 | */ |
888 | } |
889 | |
890 | /* |
891 | * Initialize sysfs entry for each controller. This sets up and registers |
892 | * the 'cciss#' directory for each individual controller under |
893 | * /sys/bus/pci/devices/<dev>/. |
894 | */ |
895 | static int cciss_create_hba_sysfs_entry(struct ctlr_info *h) |
896 | { |
897 | device_initialize(&h->dev); |
898 | h->dev.type = &cciss_host_type; |
899 | h->dev.bus = &cciss_bus_type; |
900 | dev_set_name(&h->dev, "%s", h->devname); |
901 | h->dev.parent = &h->pdev->dev; |
902 | |
903 | return device_add(&h->dev); |
904 | } |
905 | |
906 | /* |
907 | * Remove sysfs entries for an hba. |
908 | */ |
909 | static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h) |
910 | { |
911 | device_del(&h->dev); |
912 | put_device(&h->dev); /* final put. */ |
913 | } |
914 | |
915 | /* cciss_device_release is called when the reference count |
916 | * of h->drv[x]dev goes to zero. |
917 | */ |
918 | static void cciss_device_release(struct device *dev) |
919 | { |
920 | drive_info_struct *drv = to_drv(dev); |
921 | kfree(drv); |
922 | } |
923 | |
924 | /* |
925 | * Initialize sysfs for each logical drive. This sets up and registers |
926 | * the 'c#d#' directory for each individual logical drive under |
927 | * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from |
928 | * /sys/block/cciss!c#d# to this entry. |
929 | */ |
930 | static long cciss_create_ld_sysfs_entry(struct ctlr_info *h, |
931 | int drv_index) |
932 | { |
933 | struct device *dev; |
934 | |
935 | if (h->drv[drv_index]->device_initialized) |
936 | return 0; |
937 | |
938 | dev = &h->drv[drv_index]->dev; |
939 | device_initialize(dev); |
940 | dev->type = &cciss_dev_type; |
941 | dev->bus = &cciss_bus_type; |
942 | dev_set_name(dev, "c%dd%d", h->ctlr, drv_index); |
943 | dev->parent = &h->dev; |
944 | h->drv[drv_index]->device_initialized = 1; |
945 | return device_add(dev); |
946 | } |
947 | |
948 | /* |
949 | * Remove sysfs entries for a logical drive. |
950 | */ |
951 | static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index, |
952 | int ctlr_exiting) |
953 | { |
954 | struct device *dev = &h->drv[drv_index]->dev; |
955 | |
956 | /* special case for c*d0, we only destroy it on controller exit */ |
957 | if (drv_index == 0 && !ctlr_exiting) |
958 | return; |
959 | |
960 | device_del(dev); |
961 | put_device(dev); /* the "final" put. */ |
962 | h->drv[drv_index] = NULL; |
963 | } |
964 | |
965 | /* |
966 | * For operations that cannot sleep, a command block is allocated at init, |
967 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track |
968 | * which ones are free or in use. |
969 | */ |
970 | static CommandList_struct *cmd_alloc(ctlr_info_t *h) |
971 | { |
972 | CommandList_struct *c; |
973 | int i; |
974 | u64bit temp64; |
975 | dma_addr_t cmd_dma_handle, err_dma_handle; |
976 | |
977 | do { |
978 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); |
979 | if (i == h->nr_cmds) |
980 | return NULL; |
981 | } while (test_and_set_bit(i, h->cmd_pool_bits) != 0); |
982 | c = h->cmd_pool + i; |
983 | memset(c, 0, sizeof(CommandList_struct)); |
984 | cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct); |
985 | c->err_info = h->errinfo_pool + i; |
986 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
987 | err_dma_handle = h->errinfo_pool_dhandle |
988 | + i * sizeof(ErrorInfo_struct); |
989 | h->nr_allocs++; |
990 | |
991 | c->cmdindex = i; |
992 | |
993 | INIT_LIST_HEAD(&c->list); |
994 | c->busaddr = (__u32) cmd_dma_handle; |
995 | temp64.val = (__u64) err_dma_handle; |
996 | c->ErrDesc.Addr.lower = temp64.val32.lower; |
997 | c->ErrDesc.Addr.upper = temp64.val32.upper; |
998 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); |
999 | |
1000 | c->ctlr = h->ctlr; |
1001 | return c; |
1002 | } |
1003 | |
1004 | /* allocate a command using pci_alloc_consistent, used for ioctls, |
1005 | * etc., not for the main i/o path. |
1006 | */ |
1007 | static CommandList_struct *cmd_special_alloc(ctlr_info_t *h) |
1008 | { |
1009 | CommandList_struct *c; |
1010 | u64bit temp64; |
1011 | dma_addr_t cmd_dma_handle, err_dma_handle; |
1012 | |
1013 | c = (CommandList_struct *) pci_alloc_consistent(h->pdev, |
1014 | sizeof(CommandList_struct), &cmd_dma_handle); |
1015 | if (c == NULL) |
1016 | return NULL; |
1017 | memset(c, 0, sizeof(CommandList_struct)); |
1018 | |
1019 | c->cmdindex = -1; |
1020 | |
1021 | c->err_info = (ErrorInfo_struct *) |
1022 | pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct), |
1023 | &err_dma_handle); |
1024 | |
1025 | if (c->err_info == NULL) { |
1026 | pci_free_consistent(h->pdev, |
1027 | sizeof(CommandList_struct), c, cmd_dma_handle); |
1028 | return NULL; |
1029 | } |
1030 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
1031 | |
1032 | INIT_LIST_HEAD(&c->list); |
1033 | c->busaddr = (__u32) cmd_dma_handle; |
1034 | temp64.val = (__u64) err_dma_handle; |
1035 | c->ErrDesc.Addr.lower = temp64.val32.lower; |
1036 | c->ErrDesc.Addr.upper = temp64.val32.upper; |
1037 | c->ErrDesc.Len = sizeof(ErrorInfo_struct); |
1038 | |
1039 | c->ctlr = h->ctlr; |
1040 | return c; |
1041 | } |
1042 | |
1043 | static void cmd_free(ctlr_info_t *h, CommandList_struct *c) |
1044 | { |
1045 | int i; |
1046 | |
1047 | i = c - h->cmd_pool; |
1048 | clear_bit(i, h->cmd_pool_bits); |
1049 | h->nr_frees++; |
1050 | } |
1051 | |
1052 | static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c) |
1053 | { |
1054 | u64bit temp64; |
1055 | |
1056 | temp64.val32.lower = c->ErrDesc.Addr.lower; |
1057 | temp64.val32.upper = c->ErrDesc.Addr.upper; |
1058 | pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct), |
1059 | c->err_info, (dma_addr_t) temp64.val); |
1060 | pci_free_consistent(h->pdev, sizeof(CommandList_struct), c, |
1061 | (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr)); |
1062 | } |
1063 | |
1064 | static inline ctlr_info_t *get_host(struct gendisk *disk) |
1065 | { |
1066 | return disk->queue->queuedata; |
1067 | } |
1068 | |
1069 | static inline drive_info_struct *get_drv(struct gendisk *disk) |
1070 | { |
1071 | return disk->private_data; |
1072 | } |
1073 | |
1074 | /* |
1075 | * Open. Make sure the device is really there. |
1076 | */ |
1077 | static int cciss_open(struct block_device *bdev, fmode_t mode) |
1078 | { |
1079 | ctlr_info_t *h = get_host(bdev->bd_disk); |
1080 | drive_info_struct *drv = get_drv(bdev->bd_disk); |
1081 | |
1082 | dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name); |
1083 | if (drv->busy_configuring) |
1084 | return -EBUSY; |
1085 | /* |
1086 | * Root is allowed to open raw volume zero even if it's not configured |
1087 | * so array config can still work. Root is also allowed to open any |
1088 | * volume that has a LUN ID, so it can issue IOCTL to reread the |
1089 | * disk information. I don't think I really like this |
1090 | * but I'm already using way to many device nodes to claim another one |
1091 | * for "raw controller". |
1092 | */ |
1093 | if (drv->heads == 0) { |
1094 | if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */ |
1095 | /* if not node 0 make sure it is a partition = 0 */ |
1096 | if (MINOR(bdev->bd_dev) & 0x0f) { |
1097 | return -ENXIO; |
1098 | /* if it is, make sure we have a LUN ID */ |
1099 | } else if (memcmp(drv->LunID, CTLR_LUNID, |
1100 | sizeof(drv->LunID))) { |
1101 | return -ENXIO; |
1102 | } |
1103 | } |
1104 | if (!capable(CAP_SYS_ADMIN)) |
1105 | return -EPERM; |
1106 | } |
1107 | drv->usage_count++; |
1108 | h->usage_count++; |
1109 | return 0; |
1110 | } |
1111 | |
1112 | static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode) |
1113 | { |
1114 | int ret; |
1115 | |
1116 | mutex_lock(&cciss_mutex); |
1117 | ret = cciss_open(bdev, mode); |
1118 | mutex_unlock(&cciss_mutex); |
1119 | |
1120 | return ret; |
1121 | } |
1122 | |
1123 | /* |
1124 | * Close. Sync first. |
1125 | */ |
1126 | static int cciss_release(struct gendisk *disk, fmode_t mode) |
1127 | { |
1128 | ctlr_info_t *h; |
1129 | drive_info_struct *drv; |
1130 | |
1131 | mutex_lock(&cciss_mutex); |
1132 | h = get_host(disk); |
1133 | drv = get_drv(disk); |
1134 | dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name); |
1135 | drv->usage_count--; |
1136 | h->usage_count--; |
1137 | mutex_unlock(&cciss_mutex); |
1138 | return 0; |
1139 | } |
1140 | |
1141 | static int do_ioctl(struct block_device *bdev, fmode_t mode, |
1142 | unsigned cmd, unsigned long arg) |
1143 | { |
1144 | int ret; |
1145 | mutex_lock(&cciss_mutex); |
1146 | ret = cciss_ioctl(bdev, mode, cmd, arg); |
1147 | mutex_unlock(&cciss_mutex); |
1148 | return ret; |
1149 | } |
1150 | |
1151 | #ifdef CONFIG_COMPAT |
1152 | |
1153 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1154 | unsigned cmd, unsigned long arg); |
1155 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, |
1156 | unsigned cmd, unsigned long arg); |
1157 | |
1158 | static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode, |
1159 | unsigned cmd, unsigned long arg) |
1160 | { |
1161 | switch (cmd) { |
1162 | case CCISS_GETPCIINFO: |
1163 | case CCISS_GETINTINFO: |
1164 | case CCISS_SETINTINFO: |
1165 | case CCISS_GETNODENAME: |
1166 | case CCISS_SETNODENAME: |
1167 | case CCISS_GETHEARTBEAT: |
1168 | case CCISS_GETBUSTYPES: |
1169 | case CCISS_GETFIRMVER: |
1170 | case CCISS_GETDRIVVER: |
1171 | case CCISS_REVALIDVOLS: |
1172 | case CCISS_DEREGDISK: |
1173 | case CCISS_REGNEWDISK: |
1174 | case CCISS_REGNEWD: |
1175 | case CCISS_RESCANDISK: |
1176 | case CCISS_GETLUNINFO: |
1177 | return do_ioctl(bdev, mode, cmd, arg); |
1178 | |
1179 | case CCISS_PASSTHRU32: |
1180 | return cciss_ioctl32_passthru(bdev, mode, cmd, arg); |
1181 | case CCISS_BIG_PASSTHRU32: |
1182 | return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg); |
1183 | |
1184 | default: |
1185 | return -ENOIOCTLCMD; |
1186 | } |
1187 | } |
1188 | |
1189 | static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode, |
1190 | unsigned cmd, unsigned long arg) |
1191 | { |
1192 | IOCTL32_Command_struct __user *arg32 = |
1193 | (IOCTL32_Command_struct __user *) arg; |
1194 | IOCTL_Command_struct arg64; |
1195 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); |
1196 | int err; |
1197 | u32 cp; |
1198 | |
1199 | err = 0; |
1200 | err |= |
1201 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, |
1202 | sizeof(arg64.LUN_info)); |
1203 | err |= |
1204 | copy_from_user(&arg64.Request, &arg32->Request, |
1205 | sizeof(arg64.Request)); |
1206 | err |= |
1207 | copy_from_user(&arg64.error_info, &arg32->error_info, |
1208 | sizeof(arg64.error_info)); |
1209 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1210 | err |= get_user(cp, &arg32->buf); |
1211 | arg64.buf = compat_ptr(cp); |
1212 | err |= copy_to_user(p, &arg64, sizeof(arg64)); |
1213 | |
1214 | if (err) |
1215 | return -EFAULT; |
1216 | |
1217 | err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p); |
1218 | if (err) |
1219 | return err; |
1220 | err |= |
1221 | copy_in_user(&arg32->error_info, &p->error_info, |
1222 | sizeof(arg32->error_info)); |
1223 | if (err) |
1224 | return -EFAULT; |
1225 | return err; |
1226 | } |
1227 | |
1228 | static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode, |
1229 | unsigned cmd, unsigned long arg) |
1230 | { |
1231 | BIG_IOCTL32_Command_struct __user *arg32 = |
1232 | (BIG_IOCTL32_Command_struct __user *) arg; |
1233 | BIG_IOCTL_Command_struct arg64; |
1234 | BIG_IOCTL_Command_struct __user *p = |
1235 | compat_alloc_user_space(sizeof(arg64)); |
1236 | int err; |
1237 | u32 cp; |
1238 | |
1239 | memset(&arg64, 0, sizeof(arg64)); |
1240 | err = 0; |
1241 | err |= |
1242 | copy_from_user(&arg64.LUN_info, &arg32->LUN_info, |
1243 | sizeof(arg64.LUN_info)); |
1244 | err |= |
1245 | copy_from_user(&arg64.Request, &arg32->Request, |
1246 | sizeof(arg64.Request)); |
1247 | err |= |
1248 | copy_from_user(&arg64.error_info, &arg32->error_info, |
1249 | sizeof(arg64.error_info)); |
1250 | err |= get_user(arg64.buf_size, &arg32->buf_size); |
1251 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); |
1252 | err |= get_user(cp, &arg32->buf); |
1253 | arg64.buf = compat_ptr(cp); |
1254 | err |= copy_to_user(p, &arg64, sizeof(arg64)); |
1255 | |
1256 | if (err) |
1257 | return -EFAULT; |
1258 | |
1259 | err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p); |
1260 | if (err) |
1261 | return err; |
1262 | err |= |
1263 | copy_in_user(&arg32->error_info, &p->error_info, |
1264 | sizeof(arg32->error_info)); |
1265 | if (err) |
1266 | return -EFAULT; |
1267 | return err; |
1268 | } |
1269 | #endif |
1270 | |
1271 | static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo) |
1272 | { |
1273 | drive_info_struct *drv = get_drv(bdev->bd_disk); |
1274 | |
1275 | if (!drv->cylinders) |
1276 | return -ENXIO; |
1277 | |
1278 | geo->heads = drv->heads; |
1279 | geo->sectors = drv->sectors; |
1280 | geo->cylinders = drv->cylinders; |
1281 | return 0; |
1282 | } |
1283 | |
1284 | static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c) |
1285 | { |
1286 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && |
1287 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) |
1288 | (void)check_for_unit_attention(h, c); |
1289 | } |
1290 | |
1291 | static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp) |
1292 | { |
1293 | cciss_pci_info_struct pciinfo; |
1294 | |
1295 | if (!argp) |
1296 | return -EINVAL; |
1297 | pciinfo.domain = pci_domain_nr(h->pdev->bus); |
1298 | pciinfo.bus = h->pdev->bus->number; |
1299 | pciinfo.dev_fn = h->pdev->devfn; |
1300 | pciinfo.board_id = h->board_id; |
1301 | if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct))) |
1302 | return -EFAULT; |
1303 | return 0; |
1304 | } |
1305 | |
1306 | static int cciss_getintinfo(ctlr_info_t *h, void __user *argp) |
1307 | { |
1308 | cciss_coalint_struct intinfo; |
1309 | |
1310 | if (!argp) |
1311 | return -EINVAL; |
1312 | intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay); |
1313 | intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount); |
1314 | if (copy_to_user |
1315 | (argp, &intinfo, sizeof(cciss_coalint_struct))) |
1316 | return -EFAULT; |
1317 | return 0; |
1318 | } |
1319 | |
1320 | static int cciss_setintinfo(ctlr_info_t *h, void __user *argp) |
1321 | { |
1322 | cciss_coalint_struct intinfo; |
1323 | unsigned long flags; |
1324 | int i; |
1325 | |
1326 | if (!argp) |
1327 | return -EINVAL; |
1328 | if (!capable(CAP_SYS_ADMIN)) |
1329 | return -EPERM; |
1330 | if (copy_from_user(&intinfo, argp, sizeof(intinfo))) |
1331 | return -EFAULT; |
1332 | if ((intinfo.delay == 0) && (intinfo.count == 0)) |
1333 | return -EINVAL; |
1334 | spin_lock_irqsave(&h->lock, flags); |
1335 | /* Update the field, and then ring the doorbell */ |
1336 | writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay)); |
1337 | writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount)); |
1338 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
1339 | |
1340 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { |
1341 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) |
1342 | break; |
1343 | udelay(1000); /* delay and try again */ |
1344 | } |
1345 | spin_unlock_irqrestore(&h->lock, flags); |
1346 | if (i >= MAX_IOCTL_CONFIG_WAIT) |
1347 | return -EAGAIN; |
1348 | return 0; |
1349 | } |
1350 | |
1351 | static int cciss_getnodename(ctlr_info_t *h, void __user *argp) |
1352 | { |
1353 | NodeName_type NodeName; |
1354 | int i; |
1355 | |
1356 | if (!argp) |
1357 | return -EINVAL; |
1358 | for (i = 0; i < 16; i++) |
1359 | NodeName[i] = readb(&h->cfgtable->ServerName[i]); |
1360 | if (copy_to_user(argp, NodeName, sizeof(NodeName_type))) |
1361 | return -EFAULT; |
1362 | return 0; |
1363 | } |
1364 | |
1365 | static int cciss_setnodename(ctlr_info_t *h, void __user *argp) |
1366 | { |
1367 | NodeName_type NodeName; |
1368 | unsigned long flags; |
1369 | int i; |
1370 | |
1371 | if (!argp) |
1372 | return -EINVAL; |
1373 | if (!capable(CAP_SYS_ADMIN)) |
1374 | return -EPERM; |
1375 | if (copy_from_user(NodeName, argp, sizeof(NodeName_type))) |
1376 | return -EFAULT; |
1377 | spin_lock_irqsave(&h->lock, flags); |
1378 | /* Update the field, and then ring the doorbell */ |
1379 | for (i = 0; i < 16; i++) |
1380 | writeb(NodeName[i], &h->cfgtable->ServerName[i]); |
1381 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
1382 | for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) { |
1383 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) |
1384 | break; |
1385 | udelay(1000); /* delay and try again */ |
1386 | } |
1387 | spin_unlock_irqrestore(&h->lock, flags); |
1388 | if (i >= MAX_IOCTL_CONFIG_WAIT) |
1389 | return -EAGAIN; |
1390 | return 0; |
1391 | } |
1392 | |
1393 | static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp) |
1394 | { |
1395 | Heartbeat_type heartbeat; |
1396 | |
1397 | if (!argp) |
1398 | return -EINVAL; |
1399 | heartbeat = readl(&h->cfgtable->HeartBeat); |
1400 | if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type))) |
1401 | return -EFAULT; |
1402 | return 0; |
1403 | } |
1404 | |
1405 | static int cciss_getbustypes(ctlr_info_t *h, void __user *argp) |
1406 | { |
1407 | BusTypes_type BusTypes; |
1408 | |
1409 | if (!argp) |
1410 | return -EINVAL; |
1411 | BusTypes = readl(&h->cfgtable->BusTypes); |
1412 | if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type))) |
1413 | return -EFAULT; |
1414 | return 0; |
1415 | } |
1416 | |
1417 | static int cciss_getfirmver(ctlr_info_t *h, void __user *argp) |
1418 | { |
1419 | FirmwareVer_type firmware; |
1420 | |
1421 | if (!argp) |
1422 | return -EINVAL; |
1423 | memcpy(firmware, h->firm_ver, 4); |
1424 | |
1425 | if (copy_to_user |
1426 | (argp, firmware, sizeof(FirmwareVer_type))) |
1427 | return -EFAULT; |
1428 | return 0; |
1429 | } |
1430 | |
1431 | static int cciss_getdrivver(ctlr_info_t *h, void __user *argp) |
1432 | { |
1433 | DriverVer_type DriverVer = DRIVER_VERSION; |
1434 | |
1435 | if (!argp) |
1436 | return -EINVAL; |
1437 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) |
1438 | return -EFAULT; |
1439 | return 0; |
1440 | } |
1441 | |
1442 | static int cciss_getluninfo(ctlr_info_t *h, |
1443 | struct gendisk *disk, void __user *argp) |
1444 | { |
1445 | LogvolInfo_struct luninfo; |
1446 | drive_info_struct *drv = get_drv(disk); |
1447 | |
1448 | if (!argp) |
1449 | return -EINVAL; |
1450 | memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID)); |
1451 | luninfo.num_opens = drv->usage_count; |
1452 | luninfo.num_parts = 0; |
1453 | if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct))) |
1454 | return -EFAULT; |
1455 | return 0; |
1456 | } |
1457 | |
1458 | static int cciss_passthru(ctlr_info_t *h, void __user *argp) |
1459 | { |
1460 | IOCTL_Command_struct iocommand; |
1461 | CommandList_struct *c; |
1462 | char *buff = NULL; |
1463 | u64bit temp64; |
1464 | DECLARE_COMPLETION_ONSTACK(wait); |
1465 | |
1466 | if (!argp) |
1467 | return -EINVAL; |
1468 | |
1469 | if (!capable(CAP_SYS_RAWIO)) |
1470 | return -EPERM; |
1471 | |
1472 | if (copy_from_user |
1473 | (&iocommand, argp, sizeof(IOCTL_Command_struct))) |
1474 | return -EFAULT; |
1475 | if ((iocommand.buf_size < 1) && |
1476 | (iocommand.Request.Type.Direction != XFER_NONE)) { |
1477 | return -EINVAL; |
1478 | } |
1479 | if (iocommand.buf_size > 0) { |
1480 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); |
1481 | if (buff == NULL) |
1482 | return -EFAULT; |
1483 | } |
1484 | if (iocommand.Request.Type.Direction == XFER_WRITE) { |
1485 | /* Copy the data into the buffer we created */ |
1486 | if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { |
1487 | kfree(buff); |
1488 | return -EFAULT; |
1489 | } |
1490 | } else { |
1491 | memset(buff, 0, iocommand.buf_size); |
1492 | } |
1493 | c = cmd_special_alloc(h); |
1494 | if (!c) { |
1495 | kfree(buff); |
1496 | return -ENOMEM; |
1497 | } |
1498 | /* Fill in the command type */ |
1499 | c->cmd_type = CMD_IOCTL_PEND; |
1500 | /* Fill in Command Header */ |
1501 | c->Header.ReplyQueue = 0; /* unused in simple mode */ |
1502 | if (iocommand.buf_size > 0) { /* buffer to fill */ |
1503 | c->Header.SGList = 1; |
1504 | c->Header.SGTotal = 1; |
1505 | } else { /* no buffers to fill */ |
1506 | c->Header.SGList = 0; |
1507 | c->Header.SGTotal = 0; |
1508 | } |
1509 | c->Header.LUN = iocommand.LUN_info; |
1510 | /* use the kernel address the cmd block for tag */ |
1511 | c->Header.Tag.lower = c->busaddr; |
1512 | |
1513 | /* Fill in Request block */ |
1514 | c->Request = iocommand.Request; |
1515 | |
1516 | /* Fill in the scatter gather information */ |
1517 | if (iocommand.buf_size > 0) { |
1518 | temp64.val = pci_map_single(h->pdev, buff, |
1519 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); |
1520 | c->SG[0].Addr.lower = temp64.val32.lower; |
1521 | c->SG[0].Addr.upper = temp64.val32.upper; |
1522 | c->SG[0].Len = iocommand.buf_size; |
1523 | c->SG[0].Ext = 0; /* we are not chaining */ |
1524 | } |
1525 | c->waiting = &wait; |
1526 | |
1527 | enqueue_cmd_and_start_io(h, c); |
1528 | wait_for_completion(&wait); |
1529 | |
1530 | /* unlock the buffers from DMA */ |
1531 | temp64.val32.lower = c->SG[0].Addr.lower; |
1532 | temp64.val32.upper = c->SG[0].Addr.upper; |
1533 | pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size, |
1534 | PCI_DMA_BIDIRECTIONAL); |
1535 | check_ioctl_unit_attention(h, c); |
1536 | |
1537 | /* Copy the error information out */ |
1538 | iocommand.error_info = *(c->err_info); |
1539 | if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) { |
1540 | kfree(buff); |
1541 | cmd_special_free(h, c); |
1542 | return -EFAULT; |
1543 | } |
1544 | |
1545 | if (iocommand.Request.Type.Direction == XFER_READ) { |
1546 | /* Copy the data out of the buffer we created */ |
1547 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { |
1548 | kfree(buff); |
1549 | cmd_special_free(h, c); |
1550 | return -EFAULT; |
1551 | } |
1552 | } |
1553 | kfree(buff); |
1554 | cmd_special_free(h, c); |
1555 | return 0; |
1556 | } |
1557 | |
1558 | static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp) |
1559 | { |
1560 | BIG_IOCTL_Command_struct *ioc; |
1561 | CommandList_struct *c; |
1562 | unsigned char **buff = NULL; |
1563 | int *buff_size = NULL; |
1564 | u64bit temp64; |
1565 | BYTE sg_used = 0; |
1566 | int status = 0; |
1567 | int i; |
1568 | DECLARE_COMPLETION_ONSTACK(wait); |
1569 | __u32 left; |
1570 | __u32 sz; |
1571 | BYTE __user *data_ptr; |
1572 | |
1573 | if (!argp) |
1574 | return -EINVAL; |
1575 | if (!capable(CAP_SYS_RAWIO)) |
1576 | return -EPERM; |
1577 | ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); |
1578 | if (!ioc) { |
1579 | status = -ENOMEM; |
1580 | goto cleanup1; |
1581 | } |
1582 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { |
1583 | status = -EFAULT; |
1584 | goto cleanup1; |
1585 | } |
1586 | if ((ioc->buf_size < 1) && |
1587 | (ioc->Request.Type.Direction != XFER_NONE)) { |
1588 | status = -EINVAL; |
1589 | goto cleanup1; |
1590 | } |
1591 | /* Check kmalloc limits using all SGs */ |
1592 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { |
1593 | status = -EINVAL; |
1594 | goto cleanup1; |
1595 | } |
1596 | if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { |
1597 | status = -EINVAL; |
1598 | goto cleanup1; |
1599 | } |
1600 | buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); |
1601 | if (!buff) { |
1602 | status = -ENOMEM; |
1603 | goto cleanup1; |
1604 | } |
1605 | buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); |
1606 | if (!buff_size) { |
1607 | status = -ENOMEM; |
1608 | goto cleanup1; |
1609 | } |
1610 | left = ioc->buf_size; |
1611 | data_ptr = ioc->buf; |
1612 | while (left) { |
1613 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; |
1614 | buff_size[sg_used] = sz; |
1615 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); |
1616 | if (buff[sg_used] == NULL) { |
1617 | status = -ENOMEM; |
1618 | goto cleanup1; |
1619 | } |
1620 | if (ioc->Request.Type.Direction == XFER_WRITE) { |
1621 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { |
1622 | status = -EFAULT; |
1623 | goto cleanup1; |
1624 | } |
1625 | } else { |
1626 | memset(buff[sg_used], 0, sz); |
1627 | } |
1628 | left -= sz; |
1629 | data_ptr += sz; |
1630 | sg_used++; |
1631 | } |
1632 | c = cmd_special_alloc(h); |
1633 | if (!c) { |
1634 | status = -ENOMEM; |
1635 | goto cleanup1; |
1636 | } |
1637 | c->cmd_type = CMD_IOCTL_PEND; |
1638 | c->Header.ReplyQueue = 0; |
1639 | c->Header.SGList = sg_used; |
1640 | c->Header.SGTotal = sg_used; |
1641 | c->Header.LUN = ioc->LUN_info; |
1642 | c->Header.Tag.lower = c->busaddr; |
1643 | |
1644 | c->Request = ioc->Request; |
1645 | for (i = 0; i < sg_used; i++) { |
1646 | temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i], |
1647 | PCI_DMA_BIDIRECTIONAL); |
1648 | c->SG[i].Addr.lower = temp64.val32.lower; |
1649 | c->SG[i].Addr.upper = temp64.val32.upper; |
1650 | c->SG[i].Len = buff_size[i]; |
1651 | c->SG[i].Ext = 0; /* we are not chaining */ |
1652 | } |
1653 | c->waiting = &wait; |
1654 | enqueue_cmd_and_start_io(h, c); |
1655 | wait_for_completion(&wait); |
1656 | /* unlock the buffers from DMA */ |
1657 | for (i = 0; i < sg_used; i++) { |
1658 | temp64.val32.lower = c->SG[i].Addr.lower; |
1659 | temp64.val32.upper = c->SG[i].Addr.upper; |
1660 | pci_unmap_single(h->pdev, |
1661 | (dma_addr_t) temp64.val, buff_size[i], |
1662 | PCI_DMA_BIDIRECTIONAL); |
1663 | } |
1664 | check_ioctl_unit_attention(h, c); |
1665 | /* Copy the error information out */ |
1666 | ioc->error_info = *(c->err_info); |
1667 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { |
1668 | cmd_special_free(h, c); |
1669 | status = -EFAULT; |
1670 | goto cleanup1; |
1671 | } |
1672 | if (ioc->Request.Type.Direction == XFER_READ) { |
1673 | /* Copy the data out of the buffer we created */ |
1674 | BYTE __user *ptr = ioc->buf; |
1675 | for (i = 0; i < sg_used; i++) { |
1676 | if (copy_to_user(ptr, buff[i], buff_size[i])) { |
1677 | cmd_special_free(h, c); |
1678 | status = -EFAULT; |
1679 | goto cleanup1; |
1680 | } |
1681 | ptr += buff_size[i]; |
1682 | } |
1683 | } |
1684 | cmd_special_free(h, c); |
1685 | status = 0; |
1686 | cleanup1: |
1687 | if (buff) { |
1688 | for (i = 0; i < sg_used; i++) |
1689 | kfree(buff[i]); |
1690 | kfree(buff); |
1691 | } |
1692 | kfree(buff_size); |
1693 | kfree(ioc); |
1694 | return status; |
1695 | } |
1696 | |
1697 | static int cciss_ioctl(struct block_device *bdev, fmode_t mode, |
1698 | unsigned int cmd, unsigned long arg) |
1699 | { |
1700 | struct gendisk *disk = bdev->bd_disk; |
1701 | ctlr_info_t *h = get_host(disk); |
1702 | void __user *argp = (void __user *)arg; |
1703 | |
1704 | dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n", |
1705 | cmd, arg); |
1706 | switch (cmd) { |
1707 | case CCISS_GETPCIINFO: |
1708 | return cciss_getpciinfo(h, argp); |
1709 | case CCISS_GETINTINFO: |
1710 | return cciss_getintinfo(h, argp); |
1711 | case CCISS_SETINTINFO: |
1712 | return cciss_setintinfo(h, argp); |
1713 | case CCISS_GETNODENAME: |
1714 | return cciss_getnodename(h, argp); |
1715 | case CCISS_SETNODENAME: |
1716 | return cciss_setnodename(h, argp); |
1717 | case CCISS_GETHEARTBEAT: |
1718 | return cciss_getheartbeat(h, argp); |
1719 | case CCISS_GETBUSTYPES: |
1720 | return cciss_getbustypes(h, argp); |
1721 | case CCISS_GETFIRMVER: |
1722 | return cciss_getfirmver(h, argp); |
1723 | case CCISS_GETDRIVVER: |
1724 | return cciss_getdrivver(h, argp); |
1725 | case CCISS_DEREGDISK: |
1726 | case CCISS_REGNEWD: |
1727 | case CCISS_REVALIDVOLS: |
1728 | return rebuild_lun_table(h, 0, 1); |
1729 | case CCISS_GETLUNINFO: |
1730 | return cciss_getluninfo(h, disk, argp); |
1731 | case CCISS_PASSTHRU: |
1732 | return cciss_passthru(h, argp); |
1733 | case CCISS_BIG_PASSTHRU: |
1734 | return cciss_bigpassthru(h, argp); |
1735 | |
1736 | /* scsi_cmd_blk_ioctl handles these, below, though some are not */ |
1737 | /* very meaningful for cciss. SG_IO is the main one people want. */ |
1738 | |
1739 | case SG_GET_VERSION_NUM: |
1740 | case SG_SET_TIMEOUT: |
1741 | case SG_GET_TIMEOUT: |
1742 | case SG_GET_RESERVED_SIZE: |
1743 | case SG_SET_RESERVED_SIZE: |
1744 | case SG_EMULATED_HOST: |
1745 | case SG_IO: |
1746 | case SCSI_IOCTL_SEND_COMMAND: |
1747 | return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp); |
1748 | |
1749 | /* scsi_cmd_blk_ioctl would normally handle these, below, but */ |
1750 | /* they aren't a good fit for cciss, as CD-ROMs are */ |
1751 | /* not supported, and we don't have any bus/target/lun */ |
1752 | /* which we present to the kernel. */ |
1753 | |
1754 | case CDROM_SEND_PACKET: |
1755 | case CDROMCLOSETRAY: |
1756 | case CDROMEJECT: |
1757 | case SCSI_IOCTL_GET_IDLUN: |
1758 | case SCSI_IOCTL_GET_BUS_NUMBER: |
1759 | default: |
1760 | return -ENOTTY; |
1761 | } |
1762 | } |
1763 | |
1764 | static void cciss_check_queues(ctlr_info_t *h) |
1765 | { |
1766 | int start_queue = h->next_to_run; |
1767 | int i; |
1768 | |
1769 | /* check to see if we have maxed out the number of commands that can |
1770 | * be placed on the queue. If so then exit. We do this check here |
1771 | * in case the interrupt we serviced was from an ioctl and did not |
1772 | * free any new commands. |
1773 | */ |
1774 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) |
1775 | return; |
1776 | |
1777 | /* We have room on the queue for more commands. Now we need to queue |
1778 | * them up. We will also keep track of the next queue to run so |
1779 | * that every queue gets a chance to be started first. |
1780 | */ |
1781 | for (i = 0; i < h->highest_lun + 1; i++) { |
1782 | int curr_queue = (start_queue + i) % (h->highest_lun + 1); |
1783 | /* make sure the disk has been added and the drive is real |
1784 | * because this can be called from the middle of init_one. |
1785 | */ |
1786 | if (!h->drv[curr_queue]) |
1787 | continue; |
1788 | if (!(h->drv[curr_queue]->queue) || |
1789 | !(h->drv[curr_queue]->heads)) |
1790 | continue; |
1791 | blk_start_queue(h->gendisk[curr_queue]->queue); |
1792 | |
1793 | /* check to see if we have maxed out the number of commands |
1794 | * that can be placed on the queue. |
1795 | */ |
1796 | if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) { |
1797 | if (curr_queue == start_queue) { |
1798 | h->next_to_run = |
1799 | (start_queue + 1) % (h->highest_lun + 1); |
1800 | break; |
1801 | } else { |
1802 | h->next_to_run = curr_queue; |
1803 | break; |
1804 | } |
1805 | } |
1806 | } |
1807 | } |
1808 | |
1809 | static void cciss_softirq_done(struct request *rq) |
1810 | { |
1811 | CommandList_struct *c = rq->completion_data; |
1812 | ctlr_info_t *h = hba[c->ctlr]; |
1813 | SGDescriptor_struct *curr_sg = c->SG; |
1814 | u64bit temp64; |
1815 | unsigned long flags; |
1816 | int i, ddir; |
1817 | int sg_index = 0; |
1818 | |
1819 | if (c->Request.Type.Direction == XFER_READ) |
1820 | ddir = PCI_DMA_FROMDEVICE; |
1821 | else |
1822 | ddir = PCI_DMA_TODEVICE; |
1823 | |
1824 | /* command did not need to be retried */ |
1825 | /* unmap the DMA mapping for all the scatter gather elements */ |
1826 | for (i = 0; i < c->Header.SGList; i++) { |
1827 | if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) { |
1828 | cciss_unmap_sg_chain_block(h, c); |
1829 | /* Point to the next block */ |
1830 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
1831 | sg_index = 0; |
1832 | } |
1833 | temp64.val32.lower = curr_sg[sg_index].Addr.lower; |
1834 | temp64.val32.upper = curr_sg[sg_index].Addr.upper; |
1835 | pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len, |
1836 | ddir); |
1837 | ++sg_index; |
1838 | } |
1839 | |
1840 | dev_dbg(&h->pdev->dev, "Done with %p\n", rq); |
1841 | |
1842 | /* set the residual count for pc requests */ |
1843 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) |
1844 | rq->resid_len = c->err_info->ResidualCnt; |
1845 | |
1846 | blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO); |
1847 | |
1848 | spin_lock_irqsave(&h->lock, flags); |
1849 | cmd_free(h, c); |
1850 | cciss_check_queues(h); |
1851 | spin_unlock_irqrestore(&h->lock, flags); |
1852 | } |
1853 | |
1854 | static inline void log_unit_to_scsi3addr(ctlr_info_t *h, |
1855 | unsigned char scsi3addr[], uint32_t log_unit) |
1856 | { |
1857 | memcpy(scsi3addr, h->drv[log_unit]->LunID, |
1858 | sizeof(h->drv[log_unit]->LunID)); |
1859 | } |
1860 | |
1861 | /* This function gets the SCSI vendor, model, and revision of a logical drive |
1862 | * via the inquiry page 0. Model, vendor, and rev are set to empty strings if |
1863 | * they cannot be read. |
1864 | */ |
1865 | static void cciss_get_device_descr(ctlr_info_t *h, int logvol, |
1866 | char *vendor, char *model, char *rev) |
1867 | { |
1868 | int rc; |
1869 | InquiryData_struct *inq_buf; |
1870 | unsigned char scsi3addr[8]; |
1871 | |
1872 | *vendor = '\0'; |
1873 | *model = '\0'; |
1874 | *rev = '\0'; |
1875 | |
1876 | inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
1877 | if (!inq_buf) |
1878 | return; |
1879 | |
1880 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1881 | rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0, |
1882 | scsi3addr, TYPE_CMD); |
1883 | if (rc == IO_OK) { |
1884 | memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN); |
1885 | vendor[VENDOR_LEN] = '\0'; |
1886 | memcpy(model, &inq_buf->data_byte[16], MODEL_LEN); |
1887 | model[MODEL_LEN] = '\0'; |
1888 | memcpy(rev, &inq_buf->data_byte[32], REV_LEN); |
1889 | rev[REV_LEN] = '\0'; |
1890 | } |
1891 | |
1892 | kfree(inq_buf); |
1893 | return; |
1894 | } |
1895 | |
1896 | /* This function gets the serial number of a logical drive via |
1897 | * inquiry page 0x83. Serial no. is 16 bytes. If the serial |
1898 | * number cannot be had, for whatever reason, 16 bytes of 0xff |
1899 | * are returned instead. |
1900 | */ |
1901 | static void cciss_get_serial_no(ctlr_info_t *h, int logvol, |
1902 | unsigned char *serial_no, int buflen) |
1903 | { |
1904 | #define PAGE_83_INQ_BYTES 64 |
1905 | int rc; |
1906 | unsigned char *buf; |
1907 | unsigned char scsi3addr[8]; |
1908 | |
1909 | if (buflen > 16) |
1910 | buflen = 16; |
1911 | memset(serial_no, 0xff, buflen); |
1912 | buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL); |
1913 | if (!buf) |
1914 | return; |
1915 | memset(serial_no, 0, buflen); |
1916 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
1917 | rc = sendcmd_withirq(h, CISS_INQUIRY, buf, |
1918 | PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD); |
1919 | if (rc == IO_OK) |
1920 | memcpy(serial_no, &buf[8], buflen); |
1921 | kfree(buf); |
1922 | return; |
1923 | } |
1924 | |
1925 | /* |
1926 | * cciss_add_disk sets up the block device queue for a logical drive |
1927 | */ |
1928 | static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk, |
1929 | int drv_index) |
1930 | { |
1931 | disk->queue = blk_init_queue(do_cciss_request, &h->lock); |
1932 | if (!disk->queue) |
1933 | goto init_queue_failure; |
1934 | sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index); |
1935 | disk->major = h->major; |
1936 | disk->first_minor = drv_index << NWD_SHIFT; |
1937 | disk->fops = &cciss_fops; |
1938 | if (cciss_create_ld_sysfs_entry(h, drv_index)) |
1939 | goto cleanup_queue; |
1940 | disk->private_data = h->drv[drv_index]; |
1941 | disk->driverfs_dev = &h->drv[drv_index]->dev; |
1942 | |
1943 | /* Set up queue information */ |
1944 | blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask); |
1945 | |
1946 | /* This is a hardware imposed limit. */ |
1947 | blk_queue_max_segments(disk->queue, h->maxsgentries); |
1948 | |
1949 | blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors); |
1950 | |
1951 | blk_queue_softirq_done(disk->queue, cciss_softirq_done); |
1952 | |
1953 | disk->queue->queuedata = h; |
1954 | |
1955 | blk_queue_logical_block_size(disk->queue, |
1956 | h->drv[drv_index]->block_size); |
1957 | |
1958 | /* Make sure all queue data is written out before */ |
1959 | /* setting h->drv[drv_index]->queue, as setting this */ |
1960 | /* allows the interrupt handler to start the queue */ |
1961 | wmb(); |
1962 | h->drv[drv_index]->queue = disk->queue; |
1963 | add_disk(disk); |
1964 | return 0; |
1965 | |
1966 | cleanup_queue: |
1967 | blk_cleanup_queue(disk->queue); |
1968 | disk->queue = NULL; |
1969 | init_queue_failure: |
1970 | return -1; |
1971 | } |
1972 | |
1973 | /* This function will check the usage_count of the drive to be updated/added. |
1974 | * If the usage_count is zero and it is a heretofore unknown drive, or, |
1975 | * the drive's capacity, geometry, or serial number has changed, |
1976 | * then the drive information will be updated and the disk will be |
1977 | * re-registered with the kernel. If these conditions don't hold, |
1978 | * then it will be left alone for the next reboot. The exception to this |
1979 | * is disk 0 which will always be left registered with the kernel since it |
1980 | * is also the controller node. Any changes to disk 0 will show up on |
1981 | * the next reboot. |
1982 | */ |
1983 | static void cciss_update_drive_info(ctlr_info_t *h, int drv_index, |
1984 | int first_time, int via_ioctl) |
1985 | { |
1986 | struct gendisk *disk; |
1987 | InquiryData_struct *inq_buff = NULL; |
1988 | unsigned int block_size; |
1989 | sector_t total_size; |
1990 | unsigned long flags = 0; |
1991 | int ret = 0; |
1992 | drive_info_struct *drvinfo; |
1993 | |
1994 | /* Get information about the disk and modify the driver structure */ |
1995 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
1996 | drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL); |
1997 | if (inq_buff == NULL || drvinfo == NULL) |
1998 | goto mem_msg; |
1999 | |
2000 | /* testing to see if 16-byte CDBs are already being used */ |
2001 | if (h->cciss_read == CCISS_READ_16) { |
2002 | cciss_read_capacity_16(h, drv_index, |
2003 | &total_size, &block_size); |
2004 | |
2005 | } else { |
2006 | cciss_read_capacity(h, drv_index, &total_size, &block_size); |
2007 | /* if read_capacity returns all F's this volume is >2TB */ |
2008 | /* in size so we switch to 16-byte CDB's for all */ |
2009 | /* read/write ops */ |
2010 | if (total_size == 0xFFFFFFFFULL) { |
2011 | cciss_read_capacity_16(h, drv_index, |
2012 | &total_size, &block_size); |
2013 | h->cciss_read = CCISS_READ_16; |
2014 | h->cciss_write = CCISS_WRITE_16; |
2015 | } else { |
2016 | h->cciss_read = CCISS_READ_10; |
2017 | h->cciss_write = CCISS_WRITE_10; |
2018 | } |
2019 | } |
2020 | |
2021 | cciss_geometry_inquiry(h, drv_index, total_size, block_size, |
2022 | inq_buff, drvinfo); |
2023 | drvinfo->block_size = block_size; |
2024 | drvinfo->nr_blocks = total_size + 1; |
2025 | |
2026 | cciss_get_device_descr(h, drv_index, drvinfo->vendor, |
2027 | drvinfo->model, drvinfo->rev); |
2028 | cciss_get_serial_no(h, drv_index, drvinfo->serial_no, |
2029 | sizeof(drvinfo->serial_no)); |
2030 | /* Save the lunid in case we deregister the disk, below. */ |
2031 | memcpy(drvinfo->LunID, h->drv[drv_index]->LunID, |
2032 | sizeof(drvinfo->LunID)); |
2033 | |
2034 | /* Is it the same disk we already know, and nothing's changed? */ |
2035 | if (h->drv[drv_index]->raid_level != -1 && |
2036 | ((memcmp(drvinfo->serial_no, |
2037 | h->drv[drv_index]->serial_no, 16) == 0) && |
2038 | drvinfo->block_size == h->drv[drv_index]->block_size && |
2039 | drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks && |
2040 | drvinfo->heads == h->drv[drv_index]->heads && |
2041 | drvinfo->sectors == h->drv[drv_index]->sectors && |
2042 | drvinfo->cylinders == h->drv[drv_index]->cylinders)) |
2043 | /* The disk is unchanged, nothing to update */ |
2044 | goto freeret; |
2045 | |
2046 | /* If we get here it's not the same disk, or something's changed, |
2047 | * so we need to * deregister it, and re-register it, if it's not |
2048 | * in use. |
2049 | * If the disk already exists then deregister it before proceeding |
2050 | * (unless it's the first disk (for the controller node). |
2051 | */ |
2052 | if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) { |
2053 | dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index); |
2054 | spin_lock_irqsave(&h->lock, flags); |
2055 | h->drv[drv_index]->busy_configuring = 1; |
2056 | spin_unlock_irqrestore(&h->lock, flags); |
2057 | |
2058 | /* deregister_disk sets h->drv[drv_index]->queue = NULL |
2059 | * which keeps the interrupt handler from starting |
2060 | * the queue. |
2061 | */ |
2062 | ret = deregister_disk(h, drv_index, 0, via_ioctl); |
2063 | } |
2064 | |
2065 | /* If the disk is in use return */ |
2066 | if (ret) |
2067 | goto freeret; |
2068 | |
2069 | /* Save the new information from cciss_geometry_inquiry |
2070 | * and serial number inquiry. If the disk was deregistered |
2071 | * above, then h->drv[drv_index] will be NULL. |
2072 | */ |
2073 | if (h->drv[drv_index] == NULL) { |
2074 | drvinfo->device_initialized = 0; |
2075 | h->drv[drv_index] = drvinfo; |
2076 | drvinfo = NULL; /* so it won't be freed below. */ |
2077 | } else { |
2078 | /* special case for cxd0 */ |
2079 | h->drv[drv_index]->block_size = drvinfo->block_size; |
2080 | h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks; |
2081 | h->drv[drv_index]->heads = drvinfo->heads; |
2082 | h->drv[drv_index]->sectors = drvinfo->sectors; |
2083 | h->drv[drv_index]->cylinders = drvinfo->cylinders; |
2084 | h->drv[drv_index]->raid_level = drvinfo->raid_level; |
2085 | memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16); |
2086 | memcpy(h->drv[drv_index]->vendor, drvinfo->vendor, |
2087 | VENDOR_LEN + 1); |
2088 | memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1); |
2089 | memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1); |
2090 | } |
2091 | |
2092 | ++h->num_luns; |
2093 | disk = h->gendisk[drv_index]; |
2094 | set_capacity(disk, h->drv[drv_index]->nr_blocks); |
2095 | |
2096 | /* If it's not disk 0 (drv_index != 0) |
2097 | * or if it was disk 0, but there was previously |
2098 | * no actual corresponding configured logical drive |
2099 | * (raid_leve == -1) then we want to update the |
2100 | * logical drive's information. |
2101 | */ |
2102 | if (drv_index || first_time) { |
2103 | if (cciss_add_disk(h, disk, drv_index) != 0) { |
2104 | cciss_free_gendisk(h, drv_index); |
2105 | cciss_free_drive_info(h, drv_index); |
2106 | dev_warn(&h->pdev->dev, "could not update disk %d\n", |
2107 | drv_index); |
2108 | --h->num_luns; |
2109 | } |
2110 | } |
2111 | |
2112 | freeret: |
2113 | kfree(inq_buff); |
2114 | kfree(drvinfo); |
2115 | return; |
2116 | mem_msg: |
2117 | dev_err(&h->pdev->dev, "out of memory\n"); |
2118 | goto freeret; |
2119 | } |
2120 | |
2121 | /* This function will find the first index of the controllers drive array |
2122 | * that has a null drv pointer and allocate the drive info struct and |
2123 | * will return that index This is where new drives will be added. |
2124 | * If the index to be returned is greater than the highest_lun index for |
2125 | * the controller then highest_lun is set * to this new index. |
2126 | * If there are no available indexes or if tha allocation fails, then -1 |
2127 | * is returned. * "controller_node" is used to know if this is a real |
2128 | * logical drive, or just the controller node, which determines if this |
2129 | * counts towards highest_lun. |
2130 | */ |
2131 | static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node) |
2132 | { |
2133 | int i; |
2134 | drive_info_struct *drv; |
2135 | |
2136 | /* Search for an empty slot for our drive info */ |
2137 | for (i = 0; i < CISS_MAX_LUN; i++) { |
2138 | |
2139 | /* if not cxd0 case, and it's occupied, skip it. */ |
2140 | if (h->drv[i] && i != 0) |
2141 | continue; |
2142 | /* |
2143 | * If it's cxd0 case, and drv is alloc'ed already, and a |
2144 | * disk is configured there, skip it. |
2145 | */ |
2146 | if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1) |
2147 | continue; |
2148 | |
2149 | /* |
2150 | * We've found an empty slot. Update highest_lun |
2151 | * provided this isn't just the fake cxd0 controller node. |
2152 | */ |
2153 | if (i > h->highest_lun && !controller_node) |
2154 | h->highest_lun = i; |
2155 | |
2156 | /* If adding a real disk at cxd0, and it's already alloc'ed */ |
2157 | if (i == 0 && h->drv[i] != NULL) |
2158 | return i; |
2159 | |
2160 | /* |
2161 | * Found an empty slot, not already alloc'ed. Allocate it. |
2162 | * Mark it with raid_level == -1, so we know it's new later on. |
2163 | */ |
2164 | drv = kzalloc(sizeof(*drv), GFP_KERNEL); |
2165 | if (!drv) |
2166 | return -1; |
2167 | drv->raid_level = -1; /* so we know it's new */ |
2168 | h->drv[i] = drv; |
2169 | return i; |
2170 | } |
2171 | return -1; |
2172 | } |
2173 | |
2174 | static void cciss_free_drive_info(ctlr_info_t *h, int drv_index) |
2175 | { |
2176 | kfree(h->drv[drv_index]); |
2177 | h->drv[drv_index] = NULL; |
2178 | } |
2179 | |
2180 | static void cciss_free_gendisk(ctlr_info_t *h, int drv_index) |
2181 | { |
2182 | put_disk(h->gendisk[drv_index]); |
2183 | h->gendisk[drv_index] = NULL; |
2184 | } |
2185 | |
2186 | /* cciss_add_gendisk finds a free hba[]->drv structure |
2187 | * and allocates a gendisk if needed, and sets the lunid |
2188 | * in the drvinfo structure. It returns the index into |
2189 | * the ->drv[] array, or -1 if none are free. |
2190 | * is_controller_node indicates whether highest_lun should |
2191 | * count this disk, or if it's only being added to provide |
2192 | * a means to talk to the controller in case no logical |
2193 | * drives have yet been configured. |
2194 | */ |
2195 | static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[], |
2196 | int controller_node) |
2197 | { |
2198 | int drv_index; |
2199 | |
2200 | drv_index = cciss_alloc_drive_info(h, controller_node); |
2201 | if (drv_index == -1) |
2202 | return -1; |
2203 | |
2204 | /*Check if the gendisk needs to be allocated */ |
2205 | if (!h->gendisk[drv_index]) { |
2206 | h->gendisk[drv_index] = |
2207 | alloc_disk(1 << NWD_SHIFT); |
2208 | if (!h->gendisk[drv_index]) { |
2209 | dev_err(&h->pdev->dev, |
2210 | "could not allocate a new disk %d\n", |
2211 | drv_index); |
2212 | goto err_free_drive_info; |
2213 | } |
2214 | } |
2215 | memcpy(h->drv[drv_index]->LunID, lunid, |
2216 | sizeof(h->drv[drv_index]->LunID)); |
2217 | if (cciss_create_ld_sysfs_entry(h, drv_index)) |
2218 | goto err_free_disk; |
2219 | /* Don't need to mark this busy because nobody */ |
2220 | /* else knows about this disk yet to contend */ |
2221 | /* for access to it. */ |
2222 | h->drv[drv_index]->busy_configuring = 0; |
2223 | wmb(); |
2224 | return drv_index; |
2225 | |
2226 | err_free_disk: |
2227 | cciss_free_gendisk(h, drv_index); |
2228 | err_free_drive_info: |
2229 | cciss_free_drive_info(h, drv_index); |
2230 | return -1; |
2231 | } |
2232 | |
2233 | /* This is for the special case of a controller which |
2234 | * has no logical drives. In this case, we still need |
2235 | * to register a disk so the controller can be accessed |
2236 | * by the Array Config Utility. |
2237 | */ |
2238 | static void cciss_add_controller_node(ctlr_info_t *h) |
2239 | { |
2240 | struct gendisk *disk; |
2241 | int drv_index; |
2242 | |
2243 | if (h->gendisk[0] != NULL) /* already did this? Then bail. */ |
2244 | return; |
2245 | |
2246 | drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1); |
2247 | if (drv_index == -1) |
2248 | goto error; |
2249 | h->drv[drv_index]->block_size = 512; |
2250 | h->drv[drv_index]->nr_blocks = 0; |
2251 | h->drv[drv_index]->heads = 0; |
2252 | h->drv[drv_index]->sectors = 0; |
2253 | h->drv[drv_index]->cylinders = 0; |
2254 | h->drv[drv_index]->raid_level = -1; |
2255 | memset(h->drv[drv_index]->serial_no, 0, 16); |
2256 | disk = h->gendisk[drv_index]; |
2257 | if (cciss_add_disk(h, disk, drv_index) == 0) |
2258 | return; |
2259 | cciss_free_gendisk(h, drv_index); |
2260 | cciss_free_drive_info(h, drv_index); |
2261 | error: |
2262 | dev_warn(&h->pdev->dev, "could not add disk 0.\n"); |
2263 | return; |
2264 | } |
2265 | |
2266 | /* This function will add and remove logical drives from the Logical |
2267 | * drive array of the controller and maintain persistency of ordering |
2268 | * so that mount points are preserved until the next reboot. This allows |
2269 | * for the removal of logical drives in the middle of the drive array |
2270 | * without a re-ordering of those drives. |
2271 | * INPUT |
2272 | * h = The controller to perform the operations on |
2273 | */ |
2274 | static int rebuild_lun_table(ctlr_info_t *h, int first_time, |
2275 | int via_ioctl) |
2276 | { |
2277 | int num_luns; |
2278 | ReportLunData_struct *ld_buff = NULL; |
2279 | int return_code; |
2280 | int listlength = 0; |
2281 | int i; |
2282 | int drv_found; |
2283 | int drv_index = 0; |
2284 | unsigned char lunid[8] = CTLR_LUNID; |
2285 | unsigned long flags; |
2286 | |
2287 | if (!capable(CAP_SYS_RAWIO)) |
2288 | return -EPERM; |
2289 | |
2290 | /* Set busy_configuring flag for this operation */ |
2291 | spin_lock_irqsave(&h->lock, flags); |
2292 | if (h->busy_configuring) { |
2293 | spin_unlock_irqrestore(&h->lock, flags); |
2294 | return -EBUSY; |
2295 | } |
2296 | h->busy_configuring = 1; |
2297 | spin_unlock_irqrestore(&h->lock, flags); |
2298 | |
2299 | ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL); |
2300 | if (ld_buff == NULL) |
2301 | goto mem_msg; |
2302 | |
2303 | return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff, |
2304 | sizeof(ReportLunData_struct), |
2305 | 0, CTLR_LUNID, TYPE_CMD); |
2306 | |
2307 | if (return_code == IO_OK) |
2308 | listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength); |
2309 | else { /* reading number of logical volumes failed */ |
2310 | dev_warn(&h->pdev->dev, |
2311 | "report logical volume command failed\n"); |
2312 | listlength = 0; |
2313 | goto freeret; |
2314 | } |
2315 | |
2316 | num_luns = listlength / 8; /* 8 bytes per entry */ |
2317 | if (num_luns > CISS_MAX_LUN) { |
2318 | num_luns = CISS_MAX_LUN; |
2319 | dev_warn(&h->pdev->dev, "more luns configured" |
2320 | " on controller than can be handled by" |
2321 | " this driver.\n"); |
2322 | } |
2323 | |
2324 | if (num_luns == 0) |
2325 | cciss_add_controller_node(h); |
2326 | |
2327 | /* Compare controller drive array to driver's drive array |
2328 | * to see if any drives are missing on the controller due |
2329 | * to action of Array Config Utility (user deletes drive) |
2330 | * and deregister logical drives which have disappeared. |
2331 | */ |
2332 | for (i = 0; i <= h->highest_lun; i++) { |
2333 | int j; |
2334 | drv_found = 0; |
2335 | |
2336 | /* skip holes in the array from already deleted drives */ |
2337 | if (h->drv[i] == NULL) |
2338 | continue; |
2339 | |
2340 | for (j = 0; j < num_luns; j++) { |
2341 | memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid)); |
2342 | if (memcmp(h->drv[i]->LunID, lunid, |
2343 | sizeof(lunid)) == 0) { |
2344 | drv_found = 1; |
2345 | break; |
2346 | } |
2347 | } |
2348 | if (!drv_found) { |
2349 | /* Deregister it from the OS, it's gone. */ |
2350 | spin_lock_irqsave(&h->lock, flags); |
2351 | h->drv[i]->busy_configuring = 1; |
2352 | spin_unlock_irqrestore(&h->lock, flags); |
2353 | return_code = deregister_disk(h, i, 1, via_ioctl); |
2354 | if (h->drv[i] != NULL) |
2355 | h->drv[i]->busy_configuring = 0; |
2356 | } |
2357 | } |
2358 | |
2359 | /* Compare controller drive array to driver's drive array. |
2360 | * Check for updates in the drive information and any new drives |
2361 | * on the controller due to ACU adding logical drives, or changing |
2362 | * a logical drive's size, etc. Reregister any new/changed drives |
2363 | */ |
2364 | for (i = 0; i < num_luns; i++) { |
2365 | int j; |
2366 | |
2367 | drv_found = 0; |
2368 | |
2369 | memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid)); |
2370 | /* Find if the LUN is already in the drive array |
2371 | * of the driver. If so then update its info |
2372 | * if not in use. If it does not exist then find |
2373 | * the first free index and add it. |
2374 | */ |
2375 | for (j = 0; j <= h->highest_lun; j++) { |
2376 | if (h->drv[j] != NULL && |
2377 | memcmp(h->drv[j]->LunID, lunid, |
2378 | sizeof(h->drv[j]->LunID)) == 0) { |
2379 | drv_index = j; |
2380 | drv_found = 1; |
2381 | break; |
2382 | } |
2383 | } |
2384 | |
2385 | /* check if the drive was found already in the array */ |
2386 | if (!drv_found) { |
2387 | drv_index = cciss_add_gendisk(h, lunid, 0); |
2388 | if (drv_index == -1) |
2389 | goto freeret; |
2390 | } |
2391 | cciss_update_drive_info(h, drv_index, first_time, via_ioctl); |
2392 | } /* end for */ |
2393 | |
2394 | freeret: |
2395 | kfree(ld_buff); |
2396 | h->busy_configuring = 0; |
2397 | /* We return -1 here to tell the ACU that we have registered/updated |
2398 | * all of the drives that we can and to keep it from calling us |
2399 | * additional times. |
2400 | */ |
2401 | return -1; |
2402 | mem_msg: |
2403 | dev_err(&h->pdev->dev, "out of memory\n"); |
2404 | h->busy_configuring = 0; |
2405 | goto freeret; |
2406 | } |
2407 | |
2408 | static void cciss_clear_drive_info(drive_info_struct *drive_info) |
2409 | { |
2410 | /* zero out the disk size info */ |
2411 | drive_info->nr_blocks = 0; |
2412 | drive_info->block_size = 0; |
2413 | drive_info->heads = 0; |
2414 | drive_info->sectors = 0; |
2415 | drive_info->cylinders = 0; |
2416 | drive_info->raid_level = -1; |
2417 | memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no)); |
2418 | memset(drive_info->model, 0, sizeof(drive_info->model)); |
2419 | memset(drive_info->rev, 0, sizeof(drive_info->rev)); |
2420 | memset(drive_info->vendor, 0, sizeof(drive_info->vendor)); |
2421 | /* |
2422 | * don't clear the LUNID though, we need to remember which |
2423 | * one this one is. |
2424 | */ |
2425 | } |
2426 | |
2427 | /* This function will deregister the disk and it's queue from the |
2428 | * kernel. It must be called with the controller lock held and the |
2429 | * drv structures busy_configuring flag set. It's parameters are: |
2430 | * |
2431 | * disk = This is the disk to be deregistered |
2432 | * drv = This is the drive_info_struct associated with the disk to be |
2433 | * deregistered. It contains information about the disk used |
2434 | * by the driver. |
2435 | * clear_all = This flag determines whether or not the disk information |
2436 | * is going to be completely cleared out and the highest_lun |
2437 | * reset. Sometimes we want to clear out information about |
2438 | * the disk in preparation for re-adding it. In this case |
2439 | * the highest_lun should be left unchanged and the LunID |
2440 | * should not be cleared. |
2441 | * via_ioctl |
2442 | * This indicates whether we've reached this path via ioctl. |
2443 | * This affects the maximum usage count allowed for c0d0 to be messed with. |
2444 | * If this path is reached via ioctl(), then the max_usage_count will |
2445 | * be 1, as the process calling ioctl() has got to have the device open. |
2446 | * If we get here via sysfs, then the max usage count will be zero. |
2447 | */ |
2448 | static int deregister_disk(ctlr_info_t *h, int drv_index, |
2449 | int clear_all, int via_ioctl) |
2450 | { |
2451 | int i; |
2452 | struct gendisk *disk; |
2453 | drive_info_struct *drv; |
2454 | int recalculate_highest_lun; |
2455 | |
2456 | if (!capable(CAP_SYS_RAWIO)) |
2457 | return -EPERM; |
2458 | |
2459 | drv = h->drv[drv_index]; |
2460 | disk = h->gendisk[drv_index]; |
2461 | |
2462 | /* make sure logical volume is NOT is use */ |
2463 | if (clear_all || (h->gendisk[0] == disk)) { |
2464 | if (drv->usage_count > via_ioctl) |
2465 | return -EBUSY; |
2466 | } else if (drv->usage_count > 0) |
2467 | return -EBUSY; |
2468 | |
2469 | recalculate_highest_lun = (drv == h->drv[h->highest_lun]); |
2470 | |
2471 | /* invalidate the devices and deregister the disk. If it is disk |
2472 | * zero do not deregister it but just zero out it's values. This |
2473 | * allows us to delete disk zero but keep the controller registered. |
2474 | */ |
2475 | if (h->gendisk[0] != disk) { |
2476 | struct request_queue *q = disk->queue; |
2477 | if (disk->flags & GENHD_FL_UP) { |
2478 | cciss_destroy_ld_sysfs_entry(h, drv_index, 0); |
2479 | del_gendisk(disk); |
2480 | } |
2481 | if (q) |
2482 | blk_cleanup_queue(q); |
2483 | /* If clear_all is set then we are deleting the logical |
2484 | * drive, not just refreshing its info. For drives |
2485 | * other than disk 0 we will call put_disk. We do not |
2486 | * do this for disk 0 as we need it to be able to |
2487 | * configure the controller. |
2488 | */ |
2489 | if (clear_all){ |
2490 | /* This isn't pretty, but we need to find the |
2491 | * disk in our array and NULL our the pointer. |
2492 | * This is so that we will call alloc_disk if |
2493 | * this index is used again later. |
2494 | */ |
2495 | for (i=0; i < CISS_MAX_LUN; i++){ |
2496 | if (h->gendisk[i] == disk) { |
2497 | h->gendisk[i] = NULL; |
2498 | break; |
2499 | } |
2500 | } |
2501 | put_disk(disk); |
2502 | } |
2503 | } else { |
2504 | set_capacity(disk, 0); |
2505 | cciss_clear_drive_info(drv); |
2506 | } |
2507 | |
2508 | --h->num_luns; |
2509 | |
2510 | /* if it was the last disk, find the new hightest lun */ |
2511 | if (clear_all && recalculate_highest_lun) { |
2512 | int newhighest = -1; |
2513 | for (i = 0; i <= h->highest_lun; i++) { |
2514 | /* if the disk has size > 0, it is available */ |
2515 | if (h->drv[i] && h->drv[i]->heads) |
2516 | newhighest = i; |
2517 | } |
2518 | h->highest_lun = newhighest; |
2519 | } |
2520 | return 0; |
2521 | } |
2522 | |
2523 | static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff, |
2524 | size_t size, __u8 page_code, unsigned char *scsi3addr, |
2525 | int cmd_type) |
2526 | { |
2527 | u64bit buff_dma_handle; |
2528 | int status = IO_OK; |
2529 | |
2530 | c->cmd_type = CMD_IOCTL_PEND; |
2531 | c->Header.ReplyQueue = 0; |
2532 | if (buff != NULL) { |
2533 | c->Header.SGList = 1; |
2534 | c->Header.SGTotal = 1; |
2535 | } else { |
2536 | c->Header.SGList = 0; |
2537 | c->Header.SGTotal = 0; |
2538 | } |
2539 | c->Header.Tag.lower = c->busaddr; |
2540 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); |
2541 | |
2542 | c->Request.Type.Type = cmd_type; |
2543 | if (cmd_type == TYPE_CMD) { |
2544 | switch (cmd) { |
2545 | case CISS_INQUIRY: |
2546 | /* are we trying to read a vital product page */ |
2547 | if (page_code != 0) { |
2548 | c->Request.CDB[1] = 0x01; |
2549 | c->Request.CDB[2] = page_code; |
2550 | } |
2551 | c->Request.CDBLen = 6; |
2552 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2553 | c->Request.Type.Direction = XFER_READ; |
2554 | c->Request.Timeout = 0; |
2555 | c->Request.CDB[0] = CISS_INQUIRY; |
2556 | c->Request.CDB[4] = size & 0xFF; |
2557 | break; |
2558 | case CISS_REPORT_LOG: |
2559 | case CISS_REPORT_PHYS: |
2560 | /* Talking to controller so It's a physical command |
2561 | mode = 00 target = 0. Nothing to write. |
2562 | */ |
2563 | c->Request.CDBLen = 12; |
2564 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2565 | c->Request.Type.Direction = XFER_READ; |
2566 | c->Request.Timeout = 0; |
2567 | c->Request.CDB[0] = cmd; |
2568 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ |
2569 | c->Request.CDB[7] = (size >> 16) & 0xFF; |
2570 | c->Request.CDB[8] = (size >> 8) & 0xFF; |
2571 | c->Request.CDB[9] = size & 0xFF; |
2572 | break; |
2573 | |
2574 | case CCISS_READ_CAPACITY: |
2575 | c->Request.CDBLen = 10; |
2576 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2577 | c->Request.Type.Direction = XFER_READ; |
2578 | c->Request.Timeout = 0; |
2579 | c->Request.CDB[0] = cmd; |
2580 | break; |
2581 | case CCISS_READ_CAPACITY_16: |
2582 | c->Request.CDBLen = 16; |
2583 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2584 | c->Request.Type.Direction = XFER_READ; |
2585 | c->Request.Timeout = 0; |
2586 | c->Request.CDB[0] = cmd; |
2587 | c->Request.CDB[1] = 0x10; |
2588 | c->Request.CDB[10] = (size >> 24) & 0xFF; |
2589 | c->Request.CDB[11] = (size >> 16) & 0xFF; |
2590 | c->Request.CDB[12] = (size >> 8) & 0xFF; |
2591 | c->Request.CDB[13] = size & 0xFF; |
2592 | c->Request.Timeout = 0; |
2593 | c->Request.CDB[0] = cmd; |
2594 | break; |
2595 | case CCISS_CACHE_FLUSH: |
2596 | c->Request.CDBLen = 12; |
2597 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2598 | c->Request.Type.Direction = XFER_WRITE; |
2599 | c->Request.Timeout = 0; |
2600 | c->Request.CDB[0] = BMIC_WRITE; |
2601 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; |
2602 | c->Request.CDB[7] = (size >> 8) & 0xFF; |
2603 | c->Request.CDB[8] = size & 0xFF; |
2604 | break; |
2605 | case TEST_UNIT_READY: |
2606 | c->Request.CDBLen = 6; |
2607 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2608 | c->Request.Type.Direction = XFER_NONE; |
2609 | c->Request.Timeout = 0; |
2610 | break; |
2611 | default: |
2612 | dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd); |
2613 | return IO_ERROR; |
2614 | } |
2615 | } else if (cmd_type == TYPE_MSG) { |
2616 | switch (cmd) { |
2617 | case CCISS_ABORT_MSG: |
2618 | c->Request.CDBLen = 12; |
2619 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2620 | c->Request.Type.Direction = XFER_WRITE; |
2621 | c->Request.Timeout = 0; |
2622 | c->Request.CDB[0] = cmd; /* abort */ |
2623 | c->Request.CDB[1] = 0; /* abort a command */ |
2624 | /* buff contains the tag of the command to abort */ |
2625 | memcpy(&c->Request.CDB[4], buff, 8); |
2626 | break; |
2627 | case CCISS_RESET_MSG: |
2628 | c->Request.CDBLen = 16; |
2629 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2630 | c->Request.Type.Direction = XFER_NONE; |
2631 | c->Request.Timeout = 0; |
2632 | memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); |
2633 | c->Request.CDB[0] = cmd; /* reset */ |
2634 | c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET; |
2635 | break; |
2636 | case CCISS_NOOP_MSG: |
2637 | c->Request.CDBLen = 1; |
2638 | c->Request.Type.Attribute = ATTR_SIMPLE; |
2639 | c->Request.Type.Direction = XFER_WRITE; |
2640 | c->Request.Timeout = 0; |
2641 | c->Request.CDB[0] = cmd; |
2642 | break; |
2643 | default: |
2644 | dev_warn(&h->pdev->dev, |
2645 | "unknown message type %d\n", cmd); |
2646 | return IO_ERROR; |
2647 | } |
2648 | } else { |
2649 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); |
2650 | return IO_ERROR; |
2651 | } |
2652 | /* Fill in the scatter gather information */ |
2653 | if (size > 0) { |
2654 | buff_dma_handle.val = (__u64) pci_map_single(h->pdev, |
2655 | buff, size, |
2656 | PCI_DMA_BIDIRECTIONAL); |
2657 | c->SG[0].Addr.lower = buff_dma_handle.val32.lower; |
2658 | c->SG[0].Addr.upper = buff_dma_handle.val32.upper; |
2659 | c->SG[0].Len = size; |
2660 | c->SG[0].Ext = 0; /* we are not chaining */ |
2661 | } |
2662 | return status; |
2663 | } |
2664 | |
2665 | static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr, |
2666 | u8 reset_type) |
2667 | { |
2668 | CommandList_struct *c; |
2669 | int return_status; |
2670 | |
2671 | c = cmd_alloc(h); |
2672 | if (!c) |
2673 | return -ENOMEM; |
2674 | return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0, |
2675 | CTLR_LUNID, TYPE_MSG); |
2676 | c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ |
2677 | if (return_status != IO_OK) { |
2678 | cmd_special_free(h, c); |
2679 | return return_status; |
2680 | } |
2681 | c->waiting = NULL; |
2682 | enqueue_cmd_and_start_io(h, c); |
2683 | /* Don't wait for completion, the reset won't complete. Don't free |
2684 | * the command either. This is the last command we will send before |
2685 | * re-initializing everything, so it doesn't matter and won't leak. |
2686 | */ |
2687 | return 0; |
2688 | } |
2689 | |
2690 | static int check_target_status(ctlr_info_t *h, CommandList_struct *c) |
2691 | { |
2692 | switch (c->err_info->ScsiStatus) { |
2693 | case SAM_STAT_GOOD: |
2694 | return IO_OK; |
2695 | case SAM_STAT_CHECK_CONDITION: |
2696 | switch (0xf & c->err_info->SenseInfo[2]) { |
2697 | case 0: return IO_OK; /* no sense */ |
2698 | case 1: return IO_OK; /* recovered error */ |
2699 | default: |
2700 | if (check_for_unit_attention(h, c)) |
2701 | return IO_NEEDS_RETRY; |
2702 | dev_warn(&h->pdev->dev, "cmd 0x%02x " |
2703 | "check condition, sense key = 0x%02x\n", |
2704 | c->Request.CDB[0], c->err_info->SenseInfo[2]); |
2705 | } |
2706 | break; |
2707 | default: |
2708 | dev_warn(&h->pdev->dev, "cmd 0x%02x" |
2709 | "scsi status = 0x%02x\n", |
2710 | c->Request.CDB[0], c->err_info->ScsiStatus); |
2711 | break; |
2712 | } |
2713 | return IO_ERROR; |
2714 | } |
2715 | |
2716 | static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c) |
2717 | { |
2718 | int return_status = IO_OK; |
2719 | |
2720 | if (c->err_info->CommandStatus == CMD_SUCCESS) |
2721 | return IO_OK; |
2722 | |
2723 | switch (c->err_info->CommandStatus) { |
2724 | case CMD_TARGET_STATUS: |
2725 | return_status = check_target_status(h, c); |
2726 | break; |
2727 | case CMD_DATA_UNDERRUN: |
2728 | case CMD_DATA_OVERRUN: |
2729 | /* expected for inquiry and report lun commands */ |
2730 | break; |
2731 | case CMD_INVALID: |
2732 | dev_warn(&h->pdev->dev, "cmd 0x%02x is " |
2733 | "reported invalid\n", c->Request.CDB[0]); |
2734 | return_status = IO_ERROR; |
2735 | break; |
2736 | case CMD_PROTOCOL_ERR: |
2737 | dev_warn(&h->pdev->dev, "cmd 0x%02x has " |
2738 | "protocol error\n", c->Request.CDB[0]); |
2739 | return_status = IO_ERROR; |
2740 | break; |
2741 | case CMD_HARDWARE_ERR: |
2742 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
2743 | " hardware error\n", c->Request.CDB[0]); |
2744 | return_status = IO_ERROR; |
2745 | break; |
2746 | case CMD_CONNECTION_LOST: |
2747 | dev_warn(&h->pdev->dev, "cmd 0x%02x had " |
2748 | "connection lost\n", c->Request.CDB[0]); |
2749 | return_status = IO_ERROR; |
2750 | break; |
2751 | case CMD_ABORTED: |
2752 | dev_warn(&h->pdev->dev, "cmd 0x%02x was " |
2753 | "aborted\n", c->Request.CDB[0]); |
2754 | return_status = IO_ERROR; |
2755 | break; |
2756 | case CMD_ABORT_FAILED: |
2757 | dev_warn(&h->pdev->dev, "cmd 0x%02x reports " |
2758 | "abort failed\n", c->Request.CDB[0]); |
2759 | return_status = IO_ERROR; |
2760 | break; |
2761 | case CMD_UNSOLICITED_ABORT: |
2762 | dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n", |
2763 | c->Request.CDB[0]); |
2764 | return_status = IO_NEEDS_RETRY; |
2765 | break; |
2766 | case CMD_UNABORTABLE: |
2767 | dev_warn(&h->pdev->dev, "cmd unabortable\n"); |
2768 | return_status = IO_ERROR; |
2769 | break; |
2770 | default: |
2771 | dev_warn(&h->pdev->dev, "cmd 0x%02x returned " |
2772 | "unknown status %x\n", c->Request.CDB[0], |
2773 | c->err_info->CommandStatus); |
2774 | return_status = IO_ERROR; |
2775 | } |
2776 | return return_status; |
2777 | } |
2778 | |
2779 | static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c, |
2780 | int attempt_retry) |
2781 | { |
2782 | DECLARE_COMPLETION_ONSTACK(wait); |
2783 | u64bit buff_dma_handle; |
2784 | int return_status = IO_OK; |
2785 | |
2786 | resend_cmd2: |
2787 | c->waiting = &wait; |
2788 | enqueue_cmd_and_start_io(h, c); |
2789 | |
2790 | wait_for_completion(&wait); |
2791 | |
2792 | if (c->err_info->CommandStatus == 0 || !attempt_retry) |
2793 | goto command_done; |
2794 | |
2795 | return_status = process_sendcmd_error(h, c); |
2796 | |
2797 | if (return_status == IO_NEEDS_RETRY && |
2798 | c->retry_count < MAX_CMD_RETRIES) { |
2799 | dev_warn(&h->pdev->dev, "retrying 0x%02x\n", |
2800 | c->Request.CDB[0]); |
2801 | c->retry_count++; |
2802 | /* erase the old error information */ |
2803 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
2804 | return_status = IO_OK; |
2805 | INIT_COMPLETION(wait); |
2806 | goto resend_cmd2; |
2807 | } |
2808 | |
2809 | command_done: |
2810 | /* unlock the buffers from DMA */ |
2811 | buff_dma_handle.val32.lower = c->SG[0].Addr.lower; |
2812 | buff_dma_handle.val32.upper = c->SG[0].Addr.upper; |
2813 | pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val, |
2814 | c->SG[0].Len, PCI_DMA_BIDIRECTIONAL); |
2815 | return return_status; |
2816 | } |
2817 | |
2818 | static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size, |
2819 | __u8 page_code, unsigned char scsi3addr[], |
2820 | int cmd_type) |
2821 | { |
2822 | CommandList_struct *c; |
2823 | int return_status; |
2824 | |
2825 | c = cmd_special_alloc(h); |
2826 | if (!c) |
2827 | return -ENOMEM; |
2828 | return_status = fill_cmd(h, c, cmd, buff, size, page_code, |
2829 | scsi3addr, cmd_type); |
2830 | if (return_status == IO_OK) |
2831 | return_status = sendcmd_withirq_core(h, c, 1); |
2832 | |
2833 | cmd_special_free(h, c); |
2834 | return return_status; |
2835 | } |
2836 | |
2837 | static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol, |
2838 | sector_t total_size, |
2839 | unsigned int block_size, |
2840 | InquiryData_struct *inq_buff, |
2841 | drive_info_struct *drv) |
2842 | { |
2843 | int return_code; |
2844 | unsigned long t; |
2845 | unsigned char scsi3addr[8]; |
2846 | |
2847 | memset(inq_buff, 0, sizeof(InquiryData_struct)); |
2848 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2849 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, |
2850 | sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD); |
2851 | if (return_code == IO_OK) { |
2852 | if (inq_buff->data_byte[8] == 0xFF) { |
2853 | dev_warn(&h->pdev->dev, |
2854 | "reading geometry failed, volume " |
2855 | "does not support reading geometry\n"); |
2856 | drv->heads = 255; |
2857 | drv->sectors = 32; /* Sectors per track */ |
2858 | drv->cylinders = total_size + 1; |
2859 | drv->raid_level = RAID_UNKNOWN; |
2860 | } else { |
2861 | drv->heads = inq_buff->data_byte[6]; |
2862 | drv->sectors = inq_buff->data_byte[7]; |
2863 | drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8; |
2864 | drv->cylinders += inq_buff->data_byte[5]; |
2865 | drv->raid_level = inq_buff->data_byte[8]; |
2866 | } |
2867 | drv->block_size = block_size; |
2868 | drv->nr_blocks = total_size + 1; |
2869 | t = drv->heads * drv->sectors; |
2870 | if (t > 1) { |
2871 | sector_t real_size = total_size + 1; |
2872 | unsigned long rem = sector_div(real_size, t); |
2873 | if (rem) |
2874 | real_size++; |
2875 | drv->cylinders = real_size; |
2876 | } |
2877 | } else { /* Get geometry failed */ |
2878 | dev_warn(&h->pdev->dev, "reading geometry failed\n"); |
2879 | } |
2880 | } |
2881 | |
2882 | static void |
2883 | cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size, |
2884 | unsigned int *block_size) |
2885 | { |
2886 | ReadCapdata_struct *buf; |
2887 | int return_code; |
2888 | unsigned char scsi3addr[8]; |
2889 | |
2890 | buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL); |
2891 | if (!buf) { |
2892 | dev_warn(&h->pdev->dev, "out of memory\n"); |
2893 | return; |
2894 | } |
2895 | |
2896 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2897 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf, |
2898 | sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD); |
2899 | if (return_code == IO_OK) { |
2900 | *total_size = be32_to_cpu(*(__be32 *) buf->total_size); |
2901 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); |
2902 | } else { /* read capacity command failed */ |
2903 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
2904 | *total_size = 0; |
2905 | *block_size = BLOCK_SIZE; |
2906 | } |
2907 | kfree(buf); |
2908 | } |
2909 | |
2910 | static void cciss_read_capacity_16(ctlr_info_t *h, int logvol, |
2911 | sector_t *total_size, unsigned int *block_size) |
2912 | { |
2913 | ReadCapdata_struct_16 *buf; |
2914 | int return_code; |
2915 | unsigned char scsi3addr[8]; |
2916 | |
2917 | buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL); |
2918 | if (!buf) { |
2919 | dev_warn(&h->pdev->dev, "out of memory\n"); |
2920 | return; |
2921 | } |
2922 | |
2923 | log_unit_to_scsi3addr(h, scsi3addr, logvol); |
2924 | return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16, |
2925 | buf, sizeof(ReadCapdata_struct_16), |
2926 | 0, scsi3addr, TYPE_CMD); |
2927 | if (return_code == IO_OK) { |
2928 | *total_size = be64_to_cpu(*(__be64 *) buf->total_size); |
2929 | *block_size = be32_to_cpu(*(__be32 *) buf->block_size); |
2930 | } else { /* read capacity command failed */ |
2931 | dev_warn(&h->pdev->dev, "read capacity failed\n"); |
2932 | *total_size = 0; |
2933 | *block_size = BLOCK_SIZE; |
2934 | } |
2935 | dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n", |
2936 | (unsigned long long)*total_size+1, *block_size); |
2937 | kfree(buf); |
2938 | } |
2939 | |
2940 | static int cciss_revalidate(struct gendisk *disk) |
2941 | { |
2942 | ctlr_info_t *h = get_host(disk); |
2943 | drive_info_struct *drv = get_drv(disk); |
2944 | int logvol; |
2945 | int FOUND = 0; |
2946 | unsigned int block_size; |
2947 | sector_t total_size; |
2948 | InquiryData_struct *inq_buff = NULL; |
2949 | |
2950 | for (logvol = 0; logvol <= h->highest_lun; logvol++) { |
2951 | if (!h->drv[logvol]) |
2952 | continue; |
2953 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, |
2954 | sizeof(drv->LunID)) == 0) { |
2955 | FOUND = 1; |
2956 | break; |
2957 | } |
2958 | } |
2959 | |
2960 | if (!FOUND) |
2961 | return 1; |
2962 | |
2963 | inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
2964 | if (inq_buff == NULL) { |
2965 | dev_warn(&h->pdev->dev, "out of memory\n"); |
2966 | return 1; |
2967 | } |
2968 | if (h->cciss_read == CCISS_READ_10) { |
2969 | cciss_read_capacity(h, logvol, |
2970 | &total_size, &block_size); |
2971 | } else { |
2972 | cciss_read_capacity_16(h, logvol, |
2973 | &total_size, &block_size); |
2974 | } |
2975 | cciss_geometry_inquiry(h, logvol, total_size, block_size, |
2976 | inq_buff, drv); |
2977 | |
2978 | blk_queue_logical_block_size(drv->queue, drv->block_size); |
2979 | set_capacity(disk, drv->nr_blocks); |
2980 | |
2981 | kfree(inq_buff); |
2982 | return 0; |
2983 | } |
2984 | |
2985 | /* |
2986 | * Map (physical) PCI mem into (virtual) kernel space |
2987 | */ |
2988 | static void __iomem *remap_pci_mem(ulong base, ulong size) |
2989 | { |
2990 | ulong page_base = ((ulong) base) & PAGE_MASK; |
2991 | ulong page_offs = ((ulong) base) - page_base; |
2992 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); |
2993 | |
2994 | return page_remapped ? (page_remapped + page_offs) : NULL; |
2995 | } |
2996 | |
2997 | /* |
2998 | * Takes jobs of the Q and sends them to the hardware, then puts it on |
2999 | * the Q to wait for completion. |
3000 | */ |
3001 | static void start_io(ctlr_info_t *h) |
3002 | { |
3003 | CommandList_struct *c; |
3004 | |
3005 | while (!list_empty(&h->reqQ)) { |
3006 | c = list_entry(h->reqQ.next, CommandList_struct, list); |
3007 | /* can't do anything if fifo is full */ |
3008 | if ((h->access.fifo_full(h))) { |
3009 | dev_warn(&h->pdev->dev, "fifo full\n"); |
3010 | break; |
3011 | } |
3012 | |
3013 | /* Get the first entry from the Request Q */ |
3014 | removeQ(c); |
3015 | h->Qdepth--; |
3016 | |
3017 | /* Tell the controller execute command */ |
3018 | h->access.submit_command(h, c); |
3019 | |
3020 | /* Put job onto the completed Q */ |
3021 | addQ(&h->cmpQ, c); |
3022 | } |
3023 | } |
3024 | |
3025 | /* Assumes that h->lock is held. */ |
3026 | /* Zeros out the error record and then resends the command back */ |
3027 | /* to the controller */ |
3028 | static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c) |
3029 | { |
3030 | /* erase the old error information */ |
3031 | memset(c->err_info, 0, sizeof(ErrorInfo_struct)); |
3032 | |
3033 | /* add it to software queue and then send it to the controller */ |
3034 | addQ(&h->reqQ, c); |
3035 | h->Qdepth++; |
3036 | if (h->Qdepth > h->maxQsinceinit) |
3037 | h->maxQsinceinit = h->Qdepth; |
3038 | |
3039 | start_io(h); |
3040 | } |
3041 | |
3042 | static inline unsigned int make_status_bytes(unsigned int scsi_status_byte, |
3043 | unsigned int msg_byte, unsigned int host_byte, |
3044 | unsigned int driver_byte) |
3045 | { |
3046 | /* inverse of macros in scsi.h */ |
3047 | return (scsi_status_byte & 0xff) | |
3048 | ((msg_byte & 0xff) << 8) | |
3049 | ((host_byte & 0xff) << 16) | |
3050 | ((driver_byte & 0xff) << 24); |
3051 | } |
3052 | |
3053 | static inline int evaluate_target_status(ctlr_info_t *h, |
3054 | CommandList_struct *cmd, int *retry_cmd) |
3055 | { |
3056 | unsigned char sense_key; |
3057 | unsigned char status_byte, msg_byte, host_byte, driver_byte; |
3058 | int error_value; |
3059 | |
3060 | *retry_cmd = 0; |
3061 | /* If we get in here, it means we got "target status", that is, scsi status */ |
3062 | status_byte = cmd->err_info->ScsiStatus; |
3063 | driver_byte = DRIVER_OK; |
3064 | msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */ |
3065 | |
3066 | if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) |
3067 | host_byte = DID_PASSTHROUGH; |
3068 | else |
3069 | host_byte = DID_OK; |
3070 | |
3071 | error_value = make_status_bytes(status_byte, msg_byte, |
3072 | host_byte, driver_byte); |
3073 | |
3074 | if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) { |
3075 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) |
3076 | dev_warn(&h->pdev->dev, "cmd %p " |
3077 | "has SCSI Status 0x%x\n", |
3078 | cmd, cmd->err_info->ScsiStatus); |
3079 | return error_value; |
3080 | } |
3081 | |
3082 | /* check the sense key */ |
3083 | sense_key = 0xf & cmd->err_info->SenseInfo[2]; |
3084 | /* no status or recovered error */ |
3085 | if (((sense_key == 0x0) || (sense_key == 0x1)) && |
3086 | (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)) |
3087 | error_value = 0; |
3088 | |
3089 | if (check_for_unit_attention(h, cmd)) { |
3090 | *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC); |
3091 | return 0; |
3092 | } |
3093 | |
3094 | /* Not SG_IO or similar? */ |
3095 | if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) { |
3096 | if (error_value != 0) |
3097 | dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION" |
3098 | " sense key = 0x%x\n", cmd, sense_key); |
3099 | return error_value; |
3100 | } |
3101 | |
3102 | /* SG_IO or similar, copy sense data back */ |
3103 | if (cmd->rq->sense) { |
3104 | if (cmd->rq->sense_len > cmd->err_info->SenseLen) |
3105 | cmd->rq->sense_len = cmd->err_info->SenseLen; |
3106 | memcpy(cmd->rq->sense, cmd->err_info->SenseInfo, |
3107 | cmd->rq->sense_len); |
3108 | } else |
3109 | cmd->rq->sense_len = 0; |
3110 | |
3111 | return error_value; |
3112 | } |
3113 | |
3114 | /* checks the status of the job and calls complete buffers to mark all |
3115 | * buffers for the completed job. Note that this function does not need |
3116 | * to hold the hba/queue lock. |
3117 | */ |
3118 | static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd, |
3119 | int timeout) |
3120 | { |
3121 | int retry_cmd = 0; |
3122 | struct request *rq = cmd->rq; |
3123 | |
3124 | rq->errors = 0; |
3125 | |
3126 | if (timeout) |
3127 | rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT); |
3128 | |
3129 | if (cmd->err_info->CommandStatus == 0) /* no error has occurred */ |
3130 | goto after_error_processing; |
3131 | |
3132 | switch (cmd->err_info->CommandStatus) { |
3133 | case CMD_TARGET_STATUS: |
3134 | rq->errors = evaluate_target_status(h, cmd, &retry_cmd); |
3135 | break; |
3136 | case CMD_DATA_UNDERRUN: |
3137 | if (cmd->rq->cmd_type == REQ_TYPE_FS) { |
3138 | dev_warn(&h->pdev->dev, "cmd %p has" |
3139 | " completed with data underrun " |
3140 | "reported\n", cmd); |
3141 | cmd->rq->resid_len = cmd->err_info->ResidualCnt; |
3142 | } |
3143 | break; |
3144 | case CMD_DATA_OVERRUN: |
3145 | if (cmd->rq->cmd_type == REQ_TYPE_FS) |
3146 | dev_warn(&h->pdev->dev, "cciss: cmd %p has" |
3147 | " completed with data overrun " |
3148 | "reported\n", cmd); |
3149 | break; |
3150 | case CMD_INVALID: |
3151 | dev_warn(&h->pdev->dev, "cciss: cmd %p is " |
3152 | "reported invalid\n", cmd); |
3153 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3154 | cmd->err_info->CommandStatus, DRIVER_OK, |
3155 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3156 | DID_PASSTHROUGH : DID_ERROR); |
3157 | break; |
3158 | case CMD_PROTOCOL_ERR: |
3159 | dev_warn(&h->pdev->dev, "cciss: cmd %p has " |
3160 | "protocol error\n", cmd); |
3161 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3162 | cmd->err_info->CommandStatus, DRIVER_OK, |
3163 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3164 | DID_PASSTHROUGH : DID_ERROR); |
3165 | break; |
3166 | case CMD_HARDWARE_ERR: |
3167 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
3168 | " hardware error\n", cmd); |
3169 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3170 | cmd->err_info->CommandStatus, DRIVER_OK, |
3171 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3172 | DID_PASSTHROUGH : DID_ERROR); |
3173 | break; |
3174 | case CMD_CONNECTION_LOST: |
3175 | dev_warn(&h->pdev->dev, "cciss: cmd %p had " |
3176 | "connection lost\n", cmd); |
3177 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3178 | cmd->err_info->CommandStatus, DRIVER_OK, |
3179 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3180 | DID_PASSTHROUGH : DID_ERROR); |
3181 | break; |
3182 | case CMD_ABORTED: |
3183 | dev_warn(&h->pdev->dev, "cciss: cmd %p was " |
3184 | "aborted\n", cmd); |
3185 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3186 | cmd->err_info->CommandStatus, DRIVER_OK, |
3187 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3188 | DID_PASSTHROUGH : DID_ABORT); |
3189 | break; |
3190 | case CMD_ABORT_FAILED: |
3191 | dev_warn(&h->pdev->dev, "cciss: cmd %p reports " |
3192 | "abort failed\n", cmd); |
3193 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3194 | cmd->err_info->CommandStatus, DRIVER_OK, |
3195 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3196 | DID_PASSTHROUGH : DID_ERROR); |
3197 | break; |
3198 | case CMD_UNSOLICITED_ABORT: |
3199 | dev_warn(&h->pdev->dev, "cciss%d: unsolicited " |
3200 | "abort %p\n", h->ctlr, cmd); |
3201 | if (cmd->retry_count < MAX_CMD_RETRIES) { |
3202 | retry_cmd = 1; |
3203 | dev_warn(&h->pdev->dev, "retrying %p\n", cmd); |
3204 | cmd->retry_count++; |
3205 | } else |
3206 | dev_warn(&h->pdev->dev, |
3207 | "%p retried too many times\n", cmd); |
3208 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3209 | cmd->err_info->CommandStatus, DRIVER_OK, |
3210 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3211 | DID_PASSTHROUGH : DID_ABORT); |
3212 | break; |
3213 | case CMD_TIMEOUT: |
3214 | dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd); |
3215 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3216 | cmd->err_info->CommandStatus, DRIVER_OK, |
3217 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3218 | DID_PASSTHROUGH : DID_ERROR); |
3219 | break; |
3220 | case CMD_UNABORTABLE: |
3221 | dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd); |
3222 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3223 | cmd->err_info->CommandStatus, DRIVER_OK, |
3224 | cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ? |
3225 | DID_PASSTHROUGH : DID_ERROR); |
3226 | break; |
3227 | default: |
3228 | dev_warn(&h->pdev->dev, "cmd %p returned " |
3229 | "unknown status %x\n", cmd, |
3230 | cmd->err_info->CommandStatus); |
3231 | rq->errors = make_status_bytes(SAM_STAT_GOOD, |
3232 | cmd->err_info->CommandStatus, DRIVER_OK, |
3233 | (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ? |
3234 | DID_PASSTHROUGH : DID_ERROR); |
3235 | } |
3236 | |
3237 | after_error_processing: |
3238 | |
3239 | /* We need to return this command */ |
3240 | if (retry_cmd) { |
3241 | resend_cciss_cmd(h, cmd); |
3242 | return; |
3243 | } |
3244 | cmd->rq->completion_data = cmd; |
3245 | blk_complete_request(cmd->rq); |
3246 | } |
3247 | |
3248 | static inline u32 cciss_tag_contains_index(u32 tag) |
3249 | { |
3250 | #define DIRECT_LOOKUP_BIT 0x10 |
3251 | return tag & DIRECT_LOOKUP_BIT; |
3252 | } |
3253 | |
3254 | static inline u32 cciss_tag_to_index(u32 tag) |
3255 | { |
3256 | #define DIRECT_LOOKUP_SHIFT 5 |
3257 | return tag >> DIRECT_LOOKUP_SHIFT; |
3258 | } |
3259 | |
3260 | static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag) |
3261 | { |
3262 | #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) |
3263 | #define CCISS_SIMPLE_ERROR_BITS 0x03 |
3264 | if (likely(h->transMethod & CFGTBL_Trans_Performant)) |
3265 | return tag & ~CCISS_PERF_ERROR_BITS; |
3266 | return tag & ~CCISS_SIMPLE_ERROR_BITS; |
3267 | } |
3268 | |
3269 | static inline void cciss_mark_tag_indexed(u32 *tag) |
3270 | { |
3271 | *tag |= DIRECT_LOOKUP_BIT; |
3272 | } |
3273 | |
3274 | static inline void cciss_set_tag_index(u32 *tag, u32 index) |
3275 | { |
3276 | *tag |= (index << DIRECT_LOOKUP_SHIFT); |
3277 | } |
3278 | |
3279 | /* |
3280 | * Get a request and submit it to the controller. |
3281 | */ |
3282 | static void do_cciss_request(struct request_queue *q) |
3283 | { |
3284 | ctlr_info_t *h = q->queuedata; |
3285 | CommandList_struct *c; |
3286 | sector_t start_blk; |
3287 | int seg; |
3288 | struct request *creq; |
3289 | u64bit temp64; |
3290 | struct scatterlist *tmp_sg; |
3291 | SGDescriptor_struct *curr_sg; |
3292 | drive_info_struct *drv; |
3293 | int i, dir; |
3294 | int sg_index = 0; |
3295 | int chained = 0; |
3296 | |
3297 | queue: |
3298 | creq = blk_peek_request(q); |
3299 | if (!creq) |
3300 | goto startio; |
3301 | |
3302 | BUG_ON(creq->nr_phys_segments > h->maxsgentries); |
3303 | |
3304 | c = cmd_alloc(h); |
3305 | if (!c) |
3306 | goto full; |
3307 | |
3308 | blk_start_request(creq); |
3309 | |
3310 | tmp_sg = h->scatter_list[c->cmdindex]; |
3311 | spin_unlock_irq(q->queue_lock); |
3312 | |
3313 | c->cmd_type = CMD_RWREQ; |
3314 | c->rq = creq; |
3315 | |
3316 | /* fill in the request */ |
3317 | drv = creq->rq_disk->private_data; |
3318 | c->Header.ReplyQueue = 0; /* unused in simple mode */ |
3319 | /* got command from pool, so use the command block index instead */ |
3320 | /* for direct lookups. */ |
3321 | /* The first 2 bits are reserved for controller error reporting. */ |
3322 | cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex); |
3323 | cciss_mark_tag_indexed(&c->Header.Tag.lower); |
3324 | memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID)); |
3325 | c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */ |
3326 | c->Request.Type.Type = TYPE_CMD; /* It is a command. */ |
3327 | c->Request.Type.Attribute = ATTR_SIMPLE; |
3328 | c->Request.Type.Direction = |
3329 | (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE; |
3330 | c->Request.Timeout = 0; /* Don't time out */ |
3331 | c->Request.CDB[0] = |
3332 | (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write; |
3333 | start_blk = blk_rq_pos(creq); |
3334 | dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n", |
3335 | (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq)); |
3336 | sg_init_table(tmp_sg, h->maxsgentries); |
3337 | seg = blk_rq_map_sg(q, creq, tmp_sg); |
3338 | |
3339 | /* get the DMA records for the setup */ |
3340 | if (c->Request.Type.Direction == XFER_READ) |
3341 | dir = PCI_DMA_FROMDEVICE; |
3342 | else |
3343 | dir = PCI_DMA_TODEVICE; |
3344 | |
3345 | curr_sg = c->SG; |
3346 | sg_index = 0; |
3347 | chained = 0; |
3348 | |
3349 | for (i = 0; i < seg; i++) { |
3350 | if (((sg_index+1) == (h->max_cmd_sgentries)) && |
3351 | !chained && ((seg - i) > 1)) { |
3352 | /* Point to next chain block. */ |
3353 | curr_sg = h->cmd_sg_list[c->cmdindex]; |
3354 | sg_index = 0; |
3355 | chained = 1; |
3356 | } |
3357 | curr_sg[sg_index].Len = tmp_sg[i].length; |
3358 | temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]), |
3359 | tmp_sg[i].offset, |
3360 | tmp_sg[i].length, dir); |
3361 | curr_sg[sg_index].Addr.lower = temp64.val32.lower; |
3362 | curr_sg[sg_index].Addr.upper = temp64.val32.upper; |
3363 | curr_sg[sg_index].Ext = 0; /* we are not chaining */ |
3364 | ++sg_index; |
3365 | } |
3366 | if (chained) |
3367 | cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex], |
3368 | (seg - (h->max_cmd_sgentries - 1)) * |
3369 | sizeof(SGDescriptor_struct)); |
3370 | |
3371 | /* track how many SG entries we are using */ |
3372 | if (seg > h->maxSG) |
3373 | h->maxSG = seg; |
3374 | |
3375 | dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments " |
3376 | "chained[%d]\n", |
3377 | blk_rq_sectors(creq), seg, chained); |
3378 | |
3379 | c->Header.SGTotal = seg + chained; |
3380 | if (seg <= h->max_cmd_sgentries) |
3381 | c->Header.SGList = c->Header.SGTotal; |
3382 | else |
3383 | c->Header.SGList = h->max_cmd_sgentries; |
3384 | set_performant_mode(h, c); |
3385 | |
3386 | if (likely(creq->cmd_type == REQ_TYPE_FS)) { |
3387 | if(h->cciss_read == CCISS_READ_10) { |
3388 | c->Request.CDB[1] = 0; |
3389 | c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */ |
3390 | c->Request.CDB[3] = (start_blk >> 16) & 0xff; |
3391 | c->Request.CDB[4] = (start_blk >> 8) & 0xff; |
3392 | c->Request.CDB[5] = start_blk & 0xff; |
3393 | c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */ |
3394 | c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff; |
3395 | c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff; |
3396 | c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0; |
3397 | } else { |
3398 | u32 upper32 = upper_32_bits(start_blk); |
3399 | |
3400 | c->Request.CDBLen = 16; |
3401 | c->Request.CDB[1]= 0; |
3402 | c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */ |
3403 | c->Request.CDB[3]= (upper32 >> 16) & 0xff; |
3404 | c->Request.CDB[4]= (upper32 >> 8) & 0xff; |
3405 | c->Request.CDB[5]= upper32 & 0xff; |
3406 | c->Request.CDB[6]= (start_blk >> 24) & 0xff; |
3407 | c->Request.CDB[7]= (start_blk >> 16) & 0xff; |
3408 | c->Request.CDB[8]= (start_blk >> 8) & 0xff; |
3409 | c->Request.CDB[9]= start_blk & 0xff; |
3410 | c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff; |
3411 | c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff; |
3412 | c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff; |
3413 | c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff; |
3414 | c->Request.CDB[14] = c->Request.CDB[15] = 0; |
3415 | } |
3416 | } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) { |
3417 | c->Request.CDBLen = creq->cmd_len; |
3418 | memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB); |
3419 | } else { |
3420 | dev_warn(&h->pdev->dev, "bad request type %d\n", |
3421 | creq->cmd_type); |
3422 | BUG(); |
3423 | } |
3424 | |
3425 | spin_lock_irq(q->queue_lock); |
3426 | |
3427 | addQ(&h->reqQ, c); |
3428 | h->Qdepth++; |
3429 | if (h->Qdepth > h->maxQsinceinit) |
3430 | h->maxQsinceinit = h->Qdepth; |
3431 | |
3432 | goto queue; |
3433 | full: |
3434 | blk_stop_queue(q); |
3435 | startio: |
3436 | /* We will already have the driver lock here so not need |
3437 | * to lock it. |
3438 | */ |
3439 | start_io(h); |
3440 | } |
3441 | |
3442 | static inline unsigned long get_next_completion(ctlr_info_t *h) |
3443 | { |
3444 | return h->access.command_completed(h); |
3445 | } |
3446 | |
3447 | static inline int interrupt_pending(ctlr_info_t *h) |
3448 | { |
3449 | return h->access.intr_pending(h); |
3450 | } |
3451 | |
3452 | static inline long interrupt_not_for_us(ctlr_info_t *h) |
3453 | { |
3454 | return ((h->access.intr_pending(h) == 0) || |
3455 | (h->interrupts_enabled == 0)); |
3456 | } |
3457 | |
3458 | static inline int bad_tag(ctlr_info_t *h, u32 tag_index, |
3459 | u32 raw_tag) |
3460 | { |
3461 | if (unlikely(tag_index >= h->nr_cmds)) { |
3462 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); |
3463 | return 1; |
3464 | } |
3465 | return 0; |
3466 | } |
3467 | |
3468 | static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c, |
3469 | u32 raw_tag) |
3470 | { |
3471 | removeQ(c); |
3472 | if (likely(c->cmd_type == CMD_RWREQ)) |
3473 | complete_command(h, c, 0); |
3474 | else if (c->cmd_type == CMD_IOCTL_PEND) |
3475 | complete(c->waiting); |
3476 | #ifdef CONFIG_CISS_SCSI_TAPE |
3477 | else if (c->cmd_type == CMD_SCSI) |
3478 | complete_scsi_command(c, 0, raw_tag); |
3479 | #endif |
3480 | } |
3481 | |
3482 | static inline u32 next_command(ctlr_info_t *h) |
3483 | { |
3484 | u32 a; |
3485 | |
3486 | if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) |
3487 | return h->access.command_completed(h); |
3488 | |
3489 | if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) { |
3490 | a = *(h->reply_pool_head); /* Next cmd in ring buffer */ |
3491 | (h->reply_pool_head)++; |
3492 | h->commands_outstanding--; |
3493 | } else { |
3494 | a = FIFO_EMPTY; |
3495 | } |
3496 | /* Check for wraparound */ |
3497 | if (h->reply_pool_head == (h->reply_pool + h->max_commands)) { |
3498 | h->reply_pool_head = h->reply_pool; |
3499 | h->reply_pool_wraparound ^= 1; |
3500 | } |
3501 | return a; |
3502 | } |
3503 | |
3504 | /* process completion of an indexed ("direct lookup") command */ |
3505 | static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag) |
3506 | { |
3507 | u32 tag_index; |
3508 | CommandList_struct *c; |
3509 | |
3510 | tag_index = cciss_tag_to_index(raw_tag); |
3511 | if (bad_tag(h, tag_index, raw_tag)) |
3512 | return next_command(h); |
3513 | c = h->cmd_pool + tag_index; |
3514 | finish_cmd(h, c, raw_tag); |
3515 | return next_command(h); |
3516 | } |
3517 | |
3518 | /* process completion of a non-indexed command */ |
3519 | static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag) |
3520 | { |
3521 | CommandList_struct *c = NULL; |
3522 | __u32 busaddr_masked, tag_masked; |
3523 | |
3524 | tag_masked = cciss_tag_discard_error_bits(h, raw_tag); |
3525 | list_for_each_entry(c, &h->cmpQ, list) { |
3526 | busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr); |
3527 | if (busaddr_masked == tag_masked) { |
3528 | finish_cmd(h, c, raw_tag); |
3529 | return next_command(h); |
3530 | } |
3531 | } |
3532 | bad_tag(h, h->nr_cmds + 1, raw_tag); |
3533 | return next_command(h); |
3534 | } |
3535 | |
3536 | /* Some controllers, like p400, will give us one interrupt |
3537 | * after a soft reset, even if we turned interrupts off. |
3538 | * Only need to check for this in the cciss_xxx_discard_completions |
3539 | * functions. |
3540 | */ |
3541 | static int ignore_bogus_interrupt(ctlr_info_t *h) |
3542 | { |
3543 | if (likely(!reset_devices)) |
3544 | return 0; |
3545 | |
3546 | if (likely(h->interrupts_enabled)) |
3547 | return 0; |
3548 | |
3549 | dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " |
3550 | "(known firmware bug.) Ignoring.\n"); |
3551 | |
3552 | return 1; |
3553 | } |
3554 | |
3555 | static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id) |
3556 | { |
3557 | ctlr_info_t *h = dev_id; |
3558 | unsigned long flags; |
3559 | u32 raw_tag; |
3560 | |
3561 | if (ignore_bogus_interrupt(h)) |
3562 | return IRQ_NONE; |
3563 | |
3564 | if (interrupt_not_for_us(h)) |
3565 | return IRQ_NONE; |
3566 | spin_lock_irqsave(&h->lock, flags); |
3567 | while (interrupt_pending(h)) { |
3568 | raw_tag = get_next_completion(h); |
3569 | while (raw_tag != FIFO_EMPTY) |
3570 | raw_tag = next_command(h); |
3571 | } |
3572 | spin_unlock_irqrestore(&h->lock, flags); |
3573 | return IRQ_HANDLED; |
3574 | } |
3575 | |
3576 | static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id) |
3577 | { |
3578 | ctlr_info_t *h = dev_id; |
3579 | unsigned long flags; |
3580 | u32 raw_tag; |
3581 | |
3582 | if (ignore_bogus_interrupt(h)) |
3583 | return IRQ_NONE; |
3584 | |
3585 | spin_lock_irqsave(&h->lock, flags); |
3586 | raw_tag = get_next_completion(h); |
3587 | while (raw_tag != FIFO_EMPTY) |
3588 | raw_tag = next_command(h); |
3589 | spin_unlock_irqrestore(&h->lock, flags); |
3590 | return IRQ_HANDLED; |
3591 | } |
3592 | |
3593 | static irqreturn_t do_cciss_intx(int irq, void *dev_id) |
3594 | { |
3595 | ctlr_info_t *h = dev_id; |
3596 | unsigned long flags; |
3597 | u32 raw_tag; |
3598 | |
3599 | if (interrupt_not_for_us(h)) |
3600 | return IRQ_NONE; |
3601 | spin_lock_irqsave(&h->lock, flags); |
3602 | while (interrupt_pending(h)) { |
3603 | raw_tag = get_next_completion(h); |
3604 | while (raw_tag != FIFO_EMPTY) { |
3605 | if (cciss_tag_contains_index(raw_tag)) |
3606 | raw_tag = process_indexed_cmd(h, raw_tag); |
3607 | else |
3608 | raw_tag = process_nonindexed_cmd(h, raw_tag); |
3609 | } |
3610 | } |
3611 | spin_unlock_irqrestore(&h->lock, flags); |
3612 | return IRQ_HANDLED; |
3613 | } |
3614 | |
3615 | /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never |
3616 | * check the interrupt pending register because it is not set. |
3617 | */ |
3618 | static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id) |
3619 | { |
3620 | ctlr_info_t *h = dev_id; |
3621 | unsigned long flags; |
3622 | u32 raw_tag; |
3623 | |
3624 | spin_lock_irqsave(&h->lock, flags); |
3625 | raw_tag = get_next_completion(h); |
3626 | while (raw_tag != FIFO_EMPTY) { |
3627 | if (cciss_tag_contains_index(raw_tag)) |
3628 | raw_tag = process_indexed_cmd(h, raw_tag); |
3629 | else |
3630 | raw_tag = process_nonindexed_cmd(h, raw_tag); |
3631 | } |
3632 | spin_unlock_irqrestore(&h->lock, flags); |
3633 | return IRQ_HANDLED; |
3634 | } |
3635 | |
3636 | /** |
3637 | * add_to_scan_list() - add controller to rescan queue |
3638 | * @h: Pointer to the controller. |
3639 | * |
3640 | * Adds the controller to the rescan queue if not already on the queue. |
3641 | * |
3642 | * returns 1 if added to the queue, 0 if skipped (could be on the |
3643 | * queue already, or the controller could be initializing or shutting |
3644 | * down). |
3645 | **/ |
3646 | static int add_to_scan_list(struct ctlr_info *h) |
3647 | { |
3648 | struct ctlr_info *test_h; |
3649 | int found = 0; |
3650 | int ret = 0; |
3651 | |
3652 | if (h->busy_initializing) |
3653 | return 0; |
3654 | |
3655 | if (!mutex_trylock(&h->busy_shutting_down)) |
3656 | return 0; |
3657 | |
3658 | mutex_lock(&scan_mutex); |
3659 | list_for_each_entry(test_h, &scan_q, scan_list) { |
3660 | if (test_h == h) { |
3661 | found = 1; |
3662 | break; |
3663 | } |
3664 | } |
3665 | if (!found && !h->busy_scanning) { |
3666 | INIT_COMPLETION(h->scan_wait); |
3667 | list_add_tail(&h->scan_list, &scan_q); |
3668 | ret = 1; |
3669 | } |
3670 | mutex_unlock(&scan_mutex); |
3671 | mutex_unlock(&h->busy_shutting_down); |
3672 | |
3673 | return ret; |
3674 | } |
3675 | |
3676 | /** |
3677 | * remove_from_scan_list() - remove controller from rescan queue |
3678 | * @h: Pointer to the controller. |
3679 | * |
3680 | * Removes the controller from the rescan queue if present. Blocks if |
3681 | * the controller is currently conducting a rescan. The controller |
3682 | * can be in one of three states: |
3683 | * 1. Doesn't need a scan |
3684 | * 2. On the scan list, but not scanning yet (we remove it) |
3685 | * 3. Busy scanning (and not on the list). In this case we want to wait for |
3686 | * the scan to complete to make sure the scanning thread for this |
3687 | * controller is completely idle. |
3688 | **/ |
3689 | static void remove_from_scan_list(struct ctlr_info *h) |
3690 | { |
3691 | struct ctlr_info *test_h, *tmp_h; |
3692 | |
3693 | mutex_lock(&scan_mutex); |
3694 | list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) { |
3695 | if (test_h == h) { /* state 2. */ |
3696 | list_del(&h->scan_list); |
3697 | complete_all(&h->scan_wait); |
3698 | mutex_unlock(&scan_mutex); |
3699 | return; |
3700 | } |
3701 | } |
3702 | if (h->busy_scanning) { /* state 3. */ |
3703 | mutex_unlock(&scan_mutex); |
3704 | wait_for_completion(&h->scan_wait); |
3705 | } else { /* state 1, nothing to do. */ |
3706 | mutex_unlock(&scan_mutex); |
3707 | } |
3708 | } |
3709 | |
3710 | /** |
3711 | * scan_thread() - kernel thread used to rescan controllers |
3712 | * @data: Ignored. |
3713 | * |
3714 | * A kernel thread used scan for drive topology changes on |
3715 | * controllers. The thread processes only one controller at a time |
3716 | * using a queue. Controllers are added to the queue using |
3717 | * add_to_scan_list() and removed from the queue either after done |
3718 | * processing or using remove_from_scan_list(). |
3719 | * |
3720 | * returns 0. |
3721 | **/ |
3722 | static int scan_thread(void *data) |
3723 | { |
3724 | struct ctlr_info *h; |
3725 | |
3726 | while (1) { |
3727 | set_current_state(TASK_INTERRUPTIBLE); |
3728 | schedule(); |
3729 | if (kthread_should_stop()) |
3730 | break; |
3731 | |
3732 | while (1) { |
3733 | mutex_lock(&scan_mutex); |
3734 | if (list_empty(&scan_q)) { |
3735 | mutex_unlock(&scan_mutex); |
3736 | break; |
3737 | } |
3738 | |
3739 | h = list_entry(scan_q.next, |
3740 | struct ctlr_info, |
3741 | scan_list); |
3742 | list_del(&h->scan_list); |
3743 | h->busy_scanning = 1; |
3744 | mutex_unlock(&scan_mutex); |
3745 | |
3746 | rebuild_lun_table(h, 0, 0); |
3747 | complete_all(&h->scan_wait); |
3748 | mutex_lock(&scan_mutex); |
3749 | h->busy_scanning = 0; |
3750 | mutex_unlock(&scan_mutex); |
3751 | } |
3752 | } |
3753 | |
3754 | return 0; |
3755 | } |
3756 | |
3757 | static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c) |
3758 | { |
3759 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) |
3760 | return 0; |
3761 | |
3762 | switch (c->err_info->SenseInfo[12]) { |
3763 | case STATE_CHANGED: |
3764 | dev_warn(&h->pdev->dev, "a state change " |
3765 | "detected, command retried\n"); |
3766 | return 1; |
3767 | break; |
3768 | case LUN_FAILED: |
3769 | dev_warn(&h->pdev->dev, "LUN failure " |
3770 | "detected, action required\n"); |
3771 | return 1; |
3772 | break; |
3773 | case REPORT_LUNS_CHANGED: |
3774 | dev_warn(&h->pdev->dev, "report LUN data changed\n"); |
3775 | /* |
3776 | * Here, we could call add_to_scan_list and wake up the scan thread, |
3777 | * except that it's quite likely that we will get more than one |
3778 | * REPORT_LUNS_CHANGED condition in quick succession, which means |
3779 | * that those which occur after the first one will likely happen |
3780 | * *during* the scan_thread's rescan. And the rescan code is not |
3781 | * robust enough to restart in the middle, undoing what it has already |
3782 | * done, and it's not clear that it's even possible to do this, since |
3783 | * part of what it does is notify the block layer, which starts |
3784 | * doing it's own i/o to read partition tables and so on, and the |
3785 | * driver doesn't have visibility to know what might need undoing. |
3786 | * In any event, if possible, it is horribly complicated to get right |
3787 | * so we just don't do it for now. |
3788 | * |
3789 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. |
3790 | */ |
3791 | return 1; |
3792 | break; |
3793 | case POWER_OR_RESET: |
3794 | dev_warn(&h->pdev->dev, |
3795 | "a power on or device reset detected\n"); |
3796 | return 1; |
3797 | break; |
3798 | case UNIT_ATTENTION_CLEARED: |
3799 | dev_warn(&h->pdev->dev, |
3800 | "unit attention cleared by another initiator\n"); |
3801 | return 1; |
3802 | break; |
3803 | default: |
3804 | dev_warn(&h->pdev->dev, "unknown unit attention detected\n"); |
3805 | return 1; |
3806 | } |
3807 | } |
3808 | |
3809 | /* |
3810 | * We cannot read the structure directly, for portability we must use |
3811 | * the io functions. |
3812 | * This is for debug only. |
3813 | */ |
3814 | static void print_cfg_table(ctlr_info_t *h) |
3815 | { |
3816 | int i; |
3817 | char temp_name[17]; |
3818 | CfgTable_struct *tb = h->cfgtable; |
3819 | |
3820 | dev_dbg(&h->pdev->dev, "Controller Configuration information\n"); |
3821 | dev_dbg(&h->pdev->dev, "------------------------------------\n"); |
3822 | for (i = 0; i < 4; i++) |
3823 | temp_name[i] = readb(&(tb->Signature[i])); |
3824 | temp_name[4] = '\0'; |
3825 | dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name); |
3826 | dev_dbg(&h->pdev->dev, " Spec Number = %d\n", |
3827 | readl(&(tb->SpecValence))); |
3828 | dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n", |
3829 | readl(&(tb->TransportSupport))); |
3830 | dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n", |
3831 | readl(&(tb->TransportActive))); |
3832 | dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n", |
3833 | readl(&(tb->HostWrite.TransportRequest))); |
3834 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n", |
3835 | readl(&(tb->HostWrite.CoalIntDelay))); |
3836 | dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n", |
3837 | readl(&(tb->HostWrite.CoalIntCount))); |
3838 | dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n", |
3839 | readl(&(tb->CmdsOutMax))); |
3840 | dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n", |
3841 | readl(&(tb->BusTypes))); |
3842 | for (i = 0; i < 16; i++) |
3843 | temp_name[i] = readb(&(tb->ServerName[i])); |
3844 | temp_name[16] = '\0'; |
3845 | dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name); |
3846 | dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n", |
3847 | readl(&(tb->HeartBeat))); |
3848 | } |
3849 | |
3850 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) |
3851 | { |
3852 | int i, offset, mem_type, bar_type; |
3853 | if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ |
3854 | return 0; |
3855 | offset = 0; |
3856 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { |
3857 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; |
3858 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) |
3859 | offset += 4; |
3860 | else { |
3861 | mem_type = pci_resource_flags(pdev, i) & |
3862 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; |
3863 | switch (mem_type) { |
3864 | case PCI_BASE_ADDRESS_MEM_TYPE_32: |
3865 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: |
3866 | offset += 4; /* 32 bit */ |
3867 | break; |
3868 | case PCI_BASE_ADDRESS_MEM_TYPE_64: |
3869 | offset += 8; |
3870 | break; |
3871 | default: /* reserved in PCI 2.2 */ |
3872 | dev_warn(&pdev->dev, |
3873 | "Base address is invalid\n"); |
3874 | return -1; |
3875 | break; |
3876 | } |
3877 | } |
3878 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) |
3879 | return i + 1; |
3880 | } |
3881 | return -1; |
3882 | } |
3883 | |
3884 | /* Fill in bucket_map[], given nsgs (the max number of |
3885 | * scatter gather elements supported) and bucket[], |
3886 | * which is an array of 8 integers. The bucket[] array |
3887 | * contains 8 different DMA transfer sizes (in 16 |
3888 | * byte increments) which the controller uses to fetch |
3889 | * commands. This function fills in bucket_map[], which |
3890 | * maps a given number of scatter gather elements to one of |
3891 | * the 8 DMA transfer sizes. The point of it is to allow the |
3892 | * controller to only do as much DMA as needed to fetch the |
3893 | * command, with the DMA transfer size encoded in the lower |
3894 | * bits of the command address. |
3895 | */ |
3896 | static void calc_bucket_map(int bucket[], int num_buckets, |
3897 | int nsgs, int *bucket_map) |
3898 | { |
3899 | int i, j, b, size; |
3900 | |
3901 | /* even a command with 0 SGs requires 4 blocks */ |
3902 | #define MINIMUM_TRANSFER_BLOCKS 4 |
3903 | #define NUM_BUCKETS 8 |
3904 | /* Note, bucket_map must have nsgs+1 entries. */ |
3905 | for (i = 0; i <= nsgs; i++) { |
3906 | /* Compute size of a command with i SG entries */ |
3907 | size = i + MINIMUM_TRANSFER_BLOCKS; |
3908 | b = num_buckets; /* Assume the biggest bucket */ |
3909 | /* Find the bucket that is just big enough */ |
3910 | for (j = 0; j < 8; j++) { |
3911 | if (bucket[j] >= size) { |
3912 | b = j; |
3913 | break; |
3914 | } |
3915 | } |
3916 | /* for a command with i SG entries, use bucket b. */ |
3917 | bucket_map[i] = b; |
3918 | } |
3919 | } |
3920 | |
3921 | static void cciss_wait_for_mode_change_ack(ctlr_info_t *h) |
3922 | { |
3923 | int i; |
3924 | |
3925 | /* under certain very rare conditions, this can take awhile. |
3926 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right |
3927 | * as we enter this code.) */ |
3928 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { |
3929 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) |
3930 | break; |
3931 | usleep_range(10000, 20000); |
3932 | } |
3933 | } |
3934 | |
3935 | static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags) |
3936 | { |
3937 | /* This is a bit complicated. There are 8 registers on |
3938 | * the controller which we write to to tell it 8 different |
3939 | * sizes of commands which there may be. It's a way of |
3940 | * reducing the DMA done to fetch each command. Encoded into |
3941 | * each command's tag are 3 bits which communicate to the controller |
3942 | * which of the eight sizes that command fits within. The size of |
3943 | * each command depends on how many scatter gather entries there are. |
3944 | * Each SG entry requires 16 bytes. The eight registers are programmed |
3945 | * with the number of 16-byte blocks a command of that size requires. |
3946 | * The smallest command possible requires 5 such 16 byte blocks. |
3947 | * the largest command possible requires MAXSGENTRIES + 4 16-byte |
3948 | * blocks. Note, this only extends to the SG entries contained |
3949 | * within the command block, and does not extend to chained blocks |
3950 | * of SG elements. bft[] contains the eight values we write to |
3951 | * the registers. They are not evenly distributed, but have more |
3952 | * sizes for small commands, and fewer sizes for larger commands. |
3953 | */ |
3954 | __u32 trans_offset; |
3955 | int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4}; |
3956 | /* |
3957 | * 5 = 1 s/g entry or 4k |
3958 | * 6 = 2 s/g entry or 8k |
3959 | * 8 = 4 s/g entry or 16k |
3960 | * 10 = 6 s/g entry or 24k |
3961 | */ |
3962 | unsigned long register_value; |
3963 | BUILD_BUG_ON(28 > MAXSGENTRIES + 4); |
3964 | |
3965 | h->reply_pool_wraparound = 1; /* spec: init to 1 */ |
3966 | |
3967 | /* Controller spec: zero out this buffer. */ |
3968 | memset(h->reply_pool, 0, h->max_commands * sizeof(__u64)); |
3969 | h->reply_pool_head = h->reply_pool; |
3970 | |
3971 | trans_offset = readl(&(h->cfgtable->TransMethodOffset)); |
3972 | calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries, |
3973 | h->blockFetchTable); |
3974 | writel(bft[0], &h->transtable->BlockFetch0); |
3975 | writel(bft[1], &h->transtable->BlockFetch1); |
3976 | writel(bft[2], &h->transtable->BlockFetch2); |
3977 | writel(bft[3], &h->transtable->BlockFetch3); |
3978 | writel(bft[4], &h->transtable->BlockFetch4); |
3979 | writel(bft[5], &h->transtable->BlockFetch5); |
3980 | writel(bft[6], &h->transtable->BlockFetch6); |
3981 | writel(bft[7], &h->transtable->BlockFetch7); |
3982 | |
3983 | /* size of controller ring buffer */ |
3984 | writel(h->max_commands, &h->transtable->RepQSize); |
3985 | writel(1, &h->transtable->RepQCount); |
3986 | writel(0, &h->transtable->RepQCtrAddrLow32); |
3987 | writel(0, &h->transtable->RepQCtrAddrHigh32); |
3988 | writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32); |
3989 | writel(0, &h->transtable->RepQAddr0High32); |
3990 | writel(CFGTBL_Trans_Performant | use_short_tags, |
3991 | &(h->cfgtable->HostWrite.TransportRequest)); |
3992 | |
3993 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
3994 | cciss_wait_for_mode_change_ack(h); |
3995 | register_value = readl(&(h->cfgtable->TransportActive)); |
3996 | if (!(register_value & CFGTBL_Trans_Performant)) |
3997 | dev_warn(&h->pdev->dev, "cciss: unable to get board into" |
3998 | " performant mode\n"); |
3999 | } |
4000 | |
4001 | static void cciss_put_controller_into_performant_mode(ctlr_info_t *h) |
4002 | { |
4003 | __u32 trans_support; |
4004 | |
4005 | if (cciss_simple_mode) |
4006 | return; |
4007 | |
4008 | dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n"); |
4009 | /* Attempt to put controller into performant mode if supported */ |
4010 | /* Does board support performant mode? */ |
4011 | trans_support = readl(&(h->cfgtable->TransportSupport)); |
4012 | if (!(trans_support & PERFORMANT_MODE)) |
4013 | return; |
4014 | |
4015 | dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n"); |
4016 | /* Performant mode demands commands on a 32 byte boundary |
4017 | * pci_alloc_consistent aligns on page boundarys already. |
4018 | * Just need to check if divisible by 32 |
4019 | */ |
4020 | if ((sizeof(CommandList_struct) % 32) != 0) { |
4021 | dev_warn(&h->pdev->dev, "%s %d %s\n", |
4022 | "cciss info: command size[", |
4023 | (int)sizeof(CommandList_struct), |
4024 | "] not divisible by 32, no performant mode..\n"); |
4025 | return; |
4026 | } |
4027 | |
4028 | /* Performant mode ring buffer and supporting data structures */ |
4029 | h->reply_pool = (__u64 *)pci_alloc_consistent( |
4030 | h->pdev, h->max_commands * sizeof(__u64), |
4031 | &(h->reply_pool_dhandle)); |
4032 | |
4033 | /* Need a block fetch table for performant mode */ |
4034 | h->blockFetchTable = kmalloc(((h->maxsgentries+1) * |
4035 | sizeof(__u32)), GFP_KERNEL); |
4036 | |
4037 | if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL)) |
4038 | goto clean_up; |
4039 | |
4040 | cciss_enter_performant_mode(h, |
4041 | trans_support & CFGTBL_Trans_use_short_tags); |
4042 | |
4043 | /* Change the access methods to the performant access methods */ |
4044 | h->access = SA5_performant_access; |
4045 | h->transMethod = CFGTBL_Trans_Performant; |
4046 | |
4047 | return; |
4048 | clean_up: |
4049 | kfree(h->blockFetchTable); |
4050 | if (h->reply_pool) |
4051 | pci_free_consistent(h->pdev, |
4052 | h->max_commands * sizeof(__u64), |
4053 | h->reply_pool, |
4054 | h->reply_pool_dhandle); |
4055 | return; |
4056 | |
4057 | } /* cciss_put_controller_into_performant_mode */ |
4058 | |
4059 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on |
4060 | * controllers that are capable. If not, we use IO-APIC mode. |
4061 | */ |
4062 | |
4063 | static void cciss_interrupt_mode(ctlr_info_t *h) |
4064 | { |
4065 | #ifdef CONFIG_PCI_MSI |
4066 | int err; |
4067 | struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1}, |
4068 | {0, 2}, {0, 3} |
4069 | }; |
4070 | |
4071 | /* Some boards advertise MSI but don't really support it */ |
4072 | if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || |
4073 | (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) |
4074 | goto default_int_mode; |
4075 | |
4076 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { |
4077 | err = pci_enable_msix(h->pdev, cciss_msix_entries, 4); |
4078 | if (!err) { |
4079 | h->intr[0] = cciss_msix_entries[0].vector; |
4080 | h->intr[1] = cciss_msix_entries[1].vector; |
4081 | h->intr[2] = cciss_msix_entries[2].vector; |
4082 | h->intr[3] = cciss_msix_entries[3].vector; |
4083 | h->msix_vector = 1; |
4084 | return; |
4085 | } |
4086 | if (err > 0) { |
4087 | dev_warn(&h->pdev->dev, |
4088 | "only %d MSI-X vectors available\n", err); |
4089 | goto default_int_mode; |
4090 | } else { |
4091 | dev_warn(&h->pdev->dev, |
4092 | "MSI-X init failed %d\n", err); |
4093 | goto default_int_mode; |
4094 | } |
4095 | } |
4096 | if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { |
4097 | if (!pci_enable_msi(h->pdev)) |
4098 | h->msi_vector = 1; |
4099 | else |
4100 | dev_warn(&h->pdev->dev, "MSI init failed\n"); |
4101 | } |
4102 | default_int_mode: |
4103 | #endif /* CONFIG_PCI_MSI */ |
4104 | /* if we get here we're going to use the default interrupt mode */ |
4105 | h->intr[h->intr_mode] = h->pdev->irq; |
4106 | return; |
4107 | } |
4108 | |
4109 | static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id) |
4110 | { |
4111 | int i; |
4112 | u32 subsystem_vendor_id, subsystem_device_id; |
4113 | |
4114 | subsystem_vendor_id = pdev->subsystem_vendor; |
4115 | subsystem_device_id = pdev->subsystem_device; |
4116 | *board_id = ((subsystem_device_id << 16) & 0xffff0000) | |
4117 | subsystem_vendor_id; |
4118 | |
4119 | for (i = 0; i < ARRAY_SIZE(products); i++) |
4120 | if (*board_id == products[i].board_id) |
4121 | return i; |
4122 | dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n", |
4123 | *board_id); |
4124 | return -ENODEV; |
4125 | } |
4126 | |
4127 | static inline bool cciss_board_disabled(ctlr_info_t *h) |
4128 | { |
4129 | u16 command; |
4130 | |
4131 | (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command); |
4132 | return ((command & PCI_COMMAND_MEMORY) == 0); |
4133 | } |
4134 | |
4135 | static int cciss_pci_find_memory_BAR(struct pci_dev *pdev, |
4136 | unsigned long *memory_bar) |
4137 | { |
4138 | int i; |
4139 | |
4140 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) |
4141 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { |
4142 | /* addressing mode bits already removed */ |
4143 | *memory_bar = pci_resource_start(pdev, i); |
4144 | dev_dbg(&pdev->dev, "memory BAR = %lx\n", |
4145 | *memory_bar); |
4146 | return 0; |
4147 | } |
4148 | dev_warn(&pdev->dev, "no memory BAR found\n"); |
4149 | return -ENODEV; |
4150 | } |
4151 | |
4152 | static int cciss_wait_for_board_state(struct pci_dev *pdev, |
4153 | void __iomem *vaddr, int wait_for_ready) |
4154 | #define BOARD_READY 1 |
4155 | #define BOARD_NOT_READY 0 |
4156 | { |
4157 | int i, iterations; |
4158 | u32 scratchpad; |
4159 | |
4160 | if (wait_for_ready) |
4161 | iterations = CCISS_BOARD_READY_ITERATIONS; |
4162 | else |
4163 | iterations = CCISS_BOARD_NOT_READY_ITERATIONS; |
4164 | |
4165 | for (i = 0; i < iterations; i++) { |
4166 | scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); |
4167 | if (wait_for_ready) { |
4168 | if (scratchpad == CCISS_FIRMWARE_READY) |
4169 | return 0; |
4170 | } else { |
4171 | if (scratchpad != CCISS_FIRMWARE_READY) |
4172 | return 0; |
4173 | } |
4174 | msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS); |
4175 | } |
4176 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); |
4177 | return -ENODEV; |
4178 | } |
4179 | |
4180 | static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, |
4181 | u32 *cfg_base_addr, u64 *cfg_base_addr_index, |
4182 | u64 *cfg_offset) |
4183 | { |
4184 | *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); |
4185 | *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); |
4186 | *cfg_base_addr &= (u32) 0x0000ffff; |
4187 | *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); |
4188 | if (*cfg_base_addr_index == -1) { |
4189 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, " |
4190 | "*cfg_base_addr = 0x%08x\n", *cfg_base_addr); |
4191 | return -ENODEV; |
4192 | } |
4193 | return 0; |
4194 | } |
4195 | |
4196 | static int cciss_find_cfgtables(ctlr_info_t *h) |
4197 | { |
4198 | u64 cfg_offset; |
4199 | u32 cfg_base_addr; |
4200 | u64 cfg_base_addr_index; |
4201 | u32 trans_offset; |
4202 | int rc; |
4203 | |
4204 | rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, |
4205 | &cfg_base_addr_index, &cfg_offset); |
4206 | if (rc) |
4207 | return rc; |
4208 | h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, |
4209 | cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); |
4210 | if (!h->cfgtable) |
4211 | return -ENOMEM; |
4212 | rc = write_driver_ver_to_cfgtable(h->cfgtable); |
4213 | if (rc) |
4214 | return rc; |
4215 | /* Find performant mode table. */ |
4216 | trans_offset = readl(&h->cfgtable->TransMethodOffset); |
4217 | h->transtable = remap_pci_mem(pci_resource_start(h->pdev, |
4218 | cfg_base_addr_index)+cfg_offset+trans_offset, |
4219 | sizeof(*h->transtable)); |
4220 | if (!h->transtable) |
4221 | return -ENOMEM; |
4222 | return 0; |
4223 | } |
4224 | |
4225 | static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h) |
4226 | { |
4227 | h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); |
4228 | |
4229 | /* Limit commands in memory limited kdump scenario. */ |
4230 | if (reset_devices && h->max_commands > 32) |
4231 | h->max_commands = 32; |
4232 | |
4233 | if (h->max_commands < 16) { |
4234 | dev_warn(&h->pdev->dev, "Controller reports " |
4235 | "max supported commands of %d, an obvious lie. " |
4236 | "Using 16. Ensure that firmware is up to date.\n", |
4237 | h->max_commands); |
4238 | h->max_commands = 16; |
4239 | } |
4240 | } |
4241 | |
4242 | /* Interrogate the hardware for some limits: |
4243 | * max commands, max SG elements without chaining, and with chaining, |
4244 | * SG chain block size, etc. |
4245 | */ |
4246 | static void cciss_find_board_params(ctlr_info_t *h) |
4247 | { |
4248 | cciss_get_max_perf_mode_cmds(h); |
4249 | h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds; |
4250 | h->maxsgentries = readl(&(h->cfgtable->MaxSGElements)); |
4251 | /* |
4252 | * Limit in-command s/g elements to 32 save dma'able memory. |
4253 | * Howvever spec says if 0, use 31 |
4254 | */ |
4255 | h->max_cmd_sgentries = 31; |
4256 | if (h->maxsgentries > 512) { |
4257 | h->max_cmd_sgentries = 32; |
4258 | h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1; |
4259 | h->maxsgentries--; /* save one for chain pointer */ |
4260 | } else { |
4261 | h->maxsgentries = 31; /* default to traditional values */ |
4262 | h->chainsize = 0; |
4263 | } |
4264 | } |
4265 | |
4266 | static inline bool CISS_signature_present(ctlr_info_t *h) |
4267 | { |
4268 | if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { |
4269 | dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); |
4270 | return false; |
4271 | } |
4272 | return true; |
4273 | } |
4274 | |
4275 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ |
4276 | static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h) |
4277 | { |
4278 | #ifdef CONFIG_X86 |
4279 | u32 prefetch; |
4280 | |
4281 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); |
4282 | prefetch |= 0x100; |
4283 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); |
4284 | #endif |
4285 | } |
4286 | |
4287 | /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result |
4288 | * in a prefetch beyond physical memory. |
4289 | */ |
4290 | static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h) |
4291 | { |
4292 | u32 dma_prefetch; |
4293 | __u32 dma_refetch; |
4294 | |
4295 | if (h->board_id != 0x3225103C) |
4296 | return; |
4297 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); |
4298 | dma_prefetch |= 0x8000; |
4299 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); |
4300 | pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch); |
4301 | dma_refetch |= 0x1; |
4302 | pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch); |
4303 | } |
4304 | |
4305 | static int cciss_pci_init(ctlr_info_t *h) |
4306 | { |
4307 | int prod_index, err; |
4308 | |
4309 | prod_index = cciss_lookup_board_id(h->pdev, &h->board_id); |
4310 | if (prod_index < 0) |
4311 | return -ENODEV; |
4312 | h->product_name = products[prod_index].product_name; |
4313 | h->access = *(products[prod_index].access); |
4314 | |
4315 | if (cciss_board_disabled(h)) { |
4316 | dev_warn(&h->pdev->dev, "controller appears to be disabled\n"); |
4317 | return -ENODEV; |
4318 | } |
4319 | |
4320 | pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | |
4321 | PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); |
4322 | |
4323 | err = pci_enable_device(h->pdev); |
4324 | if (err) { |
4325 | dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n"); |
4326 | return err; |
4327 | } |
4328 | |
4329 | err = pci_request_regions(h->pdev, "cciss"); |
4330 | if (err) { |
4331 | dev_warn(&h->pdev->dev, |
4332 | "Cannot obtain PCI resources, aborting\n"); |
4333 | return err; |
4334 | } |
4335 | |
4336 | dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq); |
4337 | dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id); |
4338 | |
4339 | /* If the kernel supports MSI/MSI-X we will try to enable that functionality, |
4340 | * else we use the IO-APIC interrupt assigned to us by system ROM. |
4341 | */ |
4342 | cciss_interrupt_mode(h); |
4343 | err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr); |
4344 | if (err) |
4345 | goto err_out_free_res; |
4346 | h->vaddr = remap_pci_mem(h->paddr, 0x250); |
4347 | if (!h->vaddr) { |
4348 | err = -ENOMEM; |
4349 | goto err_out_free_res; |
4350 | } |
4351 | err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); |
4352 | if (err) |
4353 | goto err_out_free_res; |
4354 | err = cciss_find_cfgtables(h); |
4355 | if (err) |
4356 | goto err_out_free_res; |
4357 | print_cfg_table(h); |
4358 | cciss_find_board_params(h); |
4359 | |
4360 | if (!CISS_signature_present(h)) { |
4361 | err = -ENODEV; |
4362 | goto err_out_free_res; |
4363 | } |
4364 | cciss_enable_scsi_prefetch(h); |
4365 | cciss_p600_dma_prefetch_quirk(h); |
4366 | err = cciss_enter_simple_mode(h); |
4367 | if (err) |
4368 | goto err_out_free_res; |
4369 | cciss_put_controller_into_performant_mode(h); |
4370 | return 0; |
4371 | |
4372 | err_out_free_res: |
4373 | /* |
4374 | * Deliberately omit pci_disable_device(): it does something nasty to |
4375 | * Smart Array controllers that pci_enable_device does not undo |
4376 | */ |
4377 | if (h->transtable) |
4378 | iounmap(h->transtable); |
4379 | if (h->cfgtable) |
4380 | iounmap(h->cfgtable); |
4381 | if (h->vaddr) |
4382 | iounmap(h->vaddr); |
4383 | pci_release_regions(h->pdev); |
4384 | return err; |
4385 | } |
4386 | |
4387 | /* Function to find the first free pointer into our hba[] array |
4388 | * Returns -1 if no free entries are left. |
4389 | */ |
4390 | static int alloc_cciss_hba(struct pci_dev *pdev) |
4391 | { |
4392 | int i; |
4393 | |
4394 | for (i = 0; i < MAX_CTLR; i++) { |
4395 | if (!hba[i]) { |
4396 | ctlr_info_t *h; |
4397 | |
4398 | h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL); |
4399 | if (!h) |
4400 | goto Enomem; |
4401 | hba[i] = h; |
4402 | return i; |
4403 | } |
4404 | } |
4405 | dev_warn(&pdev->dev, "This driver supports a maximum" |
4406 | " of %d controllers.\n", MAX_CTLR); |
4407 | return -1; |
4408 | Enomem: |
4409 | dev_warn(&pdev->dev, "out of memory.\n"); |
4410 | return -1; |
4411 | } |
4412 | |
4413 | static void free_hba(ctlr_info_t *h) |
4414 | { |
4415 | int i; |
4416 | |
4417 | hba[h->ctlr] = NULL; |
4418 | for (i = 0; i < h->highest_lun + 1; i++) |
4419 | if (h->gendisk[i] != NULL) |
4420 | put_disk(h->gendisk[i]); |
4421 | kfree(h); |
4422 | } |
4423 | |
4424 | /* Send a message CDB to the firmware. */ |
4425 | static int cciss_message(struct pci_dev *pdev, unsigned char opcode, |
4426 | unsigned char type) |
4427 | { |
4428 | typedef struct { |
4429 | CommandListHeader_struct CommandHeader; |
4430 | RequestBlock_struct Request; |
4431 | ErrDescriptor_struct ErrorDescriptor; |
4432 | } Command; |
4433 | static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct); |
4434 | Command *cmd; |
4435 | dma_addr_t paddr64; |
4436 | uint32_t paddr32, tag; |
4437 | void __iomem *vaddr; |
4438 | int i, err; |
4439 | |
4440 | vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); |
4441 | if (vaddr == NULL) |
4442 | return -ENOMEM; |
4443 | |
4444 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the |
4445 | CCISS commands, so they must be allocated from the lower 4GiB of |
4446 | memory. */ |
4447 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
4448 | if (err) { |
4449 | iounmap(vaddr); |
4450 | return -ENOMEM; |
4451 | } |
4452 | |
4453 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); |
4454 | if (cmd == NULL) { |
4455 | iounmap(vaddr); |
4456 | return -ENOMEM; |
4457 | } |
4458 | |
4459 | /* This must fit, because of the 32-bit consistent DMA mask. Also, |
4460 | although there's no guarantee, we assume that the address is at |
4461 | least 4-byte aligned (most likely, it's page-aligned). */ |
4462 | paddr32 = paddr64; |
4463 | |
4464 | cmd->CommandHeader.ReplyQueue = 0; |
4465 | cmd->CommandHeader.SGList = 0; |
4466 | cmd->CommandHeader.SGTotal = 0; |
4467 | cmd->CommandHeader.Tag.lower = paddr32; |
4468 | cmd->CommandHeader.Tag.upper = 0; |
4469 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); |
4470 | |
4471 | cmd->Request.CDBLen = 16; |
4472 | cmd->Request.Type.Type = TYPE_MSG; |
4473 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; |
4474 | cmd->Request.Type.Direction = XFER_NONE; |
4475 | cmd->Request.Timeout = 0; /* Don't time out */ |
4476 | cmd->Request.CDB[0] = opcode; |
4477 | cmd->Request.CDB[1] = type; |
4478 | memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */ |
4479 | |
4480 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command); |
4481 | cmd->ErrorDescriptor.Addr.upper = 0; |
4482 | cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct); |
4483 | |
4484 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); |
4485 | |
4486 | for (i = 0; i < 10; i++) { |
4487 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); |
4488 | if ((tag & ~3) == paddr32) |
4489 | break; |
4490 | msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS); |
4491 | } |
4492 | |
4493 | iounmap(vaddr); |
4494 | |
4495 | /* we leak the DMA buffer here ... no choice since the controller could |
4496 | still complete the command. */ |
4497 | if (i == 10) { |
4498 | dev_err(&pdev->dev, |
4499 | "controller message %02x:%02x timed out\n", |
4500 | opcode, type); |
4501 | return -ETIMEDOUT; |
4502 | } |
4503 | |
4504 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); |
4505 | |
4506 | if (tag & 2) { |
4507 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", |
4508 | opcode, type); |
4509 | return -EIO; |
4510 | } |
4511 | |
4512 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", |
4513 | opcode, type); |
4514 | return 0; |
4515 | } |
4516 | |
4517 | #define cciss_noop(p) cciss_message(p, 3, 0) |
4518 | |
4519 | static int cciss_controller_hard_reset(struct pci_dev *pdev, |
4520 | void * __iomem vaddr, u32 use_doorbell) |
4521 | { |
4522 | u16 pmcsr; |
4523 | int pos; |
4524 | |
4525 | if (use_doorbell) { |
4526 | /* For everything after the P600, the PCI power state method |
4527 | * of resetting the controller doesn't work, so we have this |
4528 | * other way using the doorbell register. |
4529 | */ |
4530 | dev_info(&pdev->dev, "using doorbell to reset controller\n"); |
4531 | writel(use_doorbell, vaddr + SA5_DOORBELL); |
4532 | } else { /* Try to do it the PCI power state way */ |
4533 | |
4534 | /* Quoting from the Open CISS Specification: "The Power |
4535 | * Management Control/Status Register (CSR) controls the power |
4536 | * state of the device. The normal operating state is D0, |
4537 | * CSR=00h. The software off state is D3, CSR=03h. To reset |
4538 | * the controller, place the interface device in D3 then to D0, |
4539 | * this causes a secondary PCI reset which will reset the |
4540 | * controller." */ |
4541 | |
4542 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); |
4543 | if (pos == 0) { |
4544 | dev_err(&pdev->dev, |
4545 | "cciss_controller_hard_reset: " |
4546 | "PCI PM not supported\n"); |
4547 | return -ENODEV; |
4548 | } |
4549 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); |
4550 | /* enter the D3hot power management state */ |
4551 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); |
4552 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; |
4553 | pmcsr |= PCI_D3hot; |
4554 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); |
4555 | |
4556 | msleep(500); |
4557 | |
4558 | /* enter the D0 power management state */ |
4559 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; |
4560 | pmcsr |= PCI_D0; |
4561 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); |
4562 | |
4563 | /* |
4564 | * The P600 requires a small delay when changing states. |
4565 | * Otherwise we may think the board did not reset and we bail. |
4566 | * This for kdump only and is particular to the P600. |
4567 | */ |
4568 | msleep(500); |
4569 | } |
4570 | return 0; |
4571 | } |
4572 | |
4573 | static void init_driver_version(char *driver_version, int len) |
4574 | { |
4575 | memset(driver_version, 0, len); |
4576 | strncpy(driver_version, "cciss " DRIVER_NAME, len - 1); |
4577 | } |
4578 | |
4579 | static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable) |
4580 | { |
4581 | char *driver_version; |
4582 | int i, size = sizeof(cfgtable->driver_version); |
4583 | |
4584 | driver_version = kmalloc(size, GFP_KERNEL); |
4585 | if (!driver_version) |
4586 | return -ENOMEM; |
4587 | |
4588 | init_driver_version(driver_version, size); |
4589 | for (i = 0; i < size; i++) |
4590 | writeb(driver_version[i], &cfgtable->driver_version[i]); |
4591 | kfree(driver_version); |
4592 | return 0; |
4593 | } |
4594 | |
4595 | static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable, |
4596 | unsigned char *driver_ver) |
4597 | { |
4598 | int i; |
4599 | |
4600 | for (i = 0; i < sizeof(cfgtable->driver_version); i++) |
4601 | driver_ver[i] = readb(&cfgtable->driver_version[i]); |
4602 | } |
4603 | |
4604 | static int controller_reset_failed(CfgTable_struct __iomem *cfgtable) |
4605 | { |
4606 | |
4607 | char *driver_ver, *old_driver_ver; |
4608 | int rc, size = sizeof(cfgtable->driver_version); |
4609 | |
4610 | old_driver_ver = kmalloc(2 * size, GFP_KERNEL); |
4611 | if (!old_driver_ver) |
4612 | return -ENOMEM; |
4613 | driver_ver = old_driver_ver + size; |
4614 | |
4615 | /* After a reset, the 32 bytes of "driver version" in the cfgtable |
4616 | * should have been changed, otherwise we know the reset failed. |
4617 | */ |
4618 | init_driver_version(old_driver_ver, size); |
4619 | read_driver_ver_from_cfgtable(cfgtable, driver_ver); |
4620 | rc = !memcmp(driver_ver, old_driver_ver, size); |
4621 | kfree(old_driver_ver); |
4622 | return rc; |
4623 | } |
4624 | |
4625 | /* This does a hard reset of the controller using PCI power management |
4626 | * states or using the doorbell register. */ |
4627 | static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev) |
4628 | { |
4629 | u64 cfg_offset; |
4630 | u32 cfg_base_addr; |
4631 | u64 cfg_base_addr_index; |
4632 | void __iomem *vaddr; |
4633 | unsigned long paddr; |
4634 | u32 misc_fw_support; |
4635 | int rc; |
4636 | CfgTable_struct __iomem *cfgtable; |
4637 | u32 use_doorbell; |
4638 | u32 board_id; |
4639 | u16 command_register; |
4640 | |
4641 | /* For controllers as old a the p600, this is very nearly |
4642 | * the same thing as |
4643 | * |
4644 | * pci_save_state(pci_dev); |
4645 | * pci_set_power_state(pci_dev, PCI_D3hot); |
4646 | * pci_set_power_state(pci_dev, PCI_D0); |
4647 | * pci_restore_state(pci_dev); |
4648 | * |
4649 | * For controllers newer than the P600, the pci power state |
4650 | * method of resetting doesn't work so we have another way |
4651 | * using the doorbell register. |
4652 | */ |
4653 | |
4654 | /* Exclude 640x boards. These are two pci devices in one slot |
4655 | * which share a battery backed cache module. One controls the |
4656 | * cache, the other accesses the cache through the one that controls |
4657 | * it. If we reset the one controlling the cache, the other will |
4658 | * likely not be happy. Just forbid resetting this conjoined mess. |
4659 | */ |
4660 | cciss_lookup_board_id(pdev, &board_id); |
4661 | if (!ctlr_is_resettable(board_id)) { |
4662 | dev_warn(&pdev->dev, "Cannot reset Smart Array 640x " |
4663 | "due to shared cache module."); |
4664 | return -ENODEV; |
4665 | } |
4666 | |
4667 | /* if controller is soft- but not hard resettable... */ |
4668 | if (!ctlr_is_hard_resettable(board_id)) |
4669 | return -ENOTSUPP; /* try soft reset later. */ |
4670 | |
4671 | /* Save the PCI command register */ |
4672 | pci_read_config_word(pdev, 4, &command_register); |
4673 | /* Turn the board off. This is so that later pci_restore_state() |
4674 | * won't turn the board on before the rest of config space is ready. |
4675 | */ |
4676 | pci_disable_device(pdev); |
4677 | pci_save_state(pdev); |
4678 | |
4679 | /* find the first memory BAR, so we can find the cfg table */ |
4680 | rc = cciss_pci_find_memory_BAR(pdev, &paddr); |
4681 | if (rc) |
4682 | return rc; |
4683 | vaddr = remap_pci_mem(paddr, 0x250); |
4684 | if (!vaddr) |
4685 | return -ENOMEM; |
4686 | |
4687 | /* find cfgtable in order to check if reset via doorbell is supported */ |
4688 | rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, |
4689 | &cfg_base_addr_index, &cfg_offset); |
4690 | if (rc) |
4691 | goto unmap_vaddr; |
4692 | cfgtable = remap_pci_mem(pci_resource_start(pdev, |
4693 | cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); |
4694 | if (!cfgtable) { |
4695 | rc = -ENOMEM; |
4696 | goto unmap_vaddr; |
4697 | } |
4698 | rc = write_driver_ver_to_cfgtable(cfgtable); |
4699 | if (rc) |
4700 | goto unmap_vaddr; |
4701 | |
4702 | /* If reset via doorbell register is supported, use that. |
4703 | * There are two such methods. Favor the newest method. |
4704 | */ |
4705 | misc_fw_support = readl(&cfgtable->misc_fw_support); |
4706 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; |
4707 | if (use_doorbell) { |
4708 | use_doorbell = DOORBELL_CTLR_RESET2; |
4709 | } else { |
4710 | use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; |
4711 | if (use_doorbell) { |
4712 | dev_warn(&pdev->dev, "Controller claims that " |
4713 | "'Bit 2 doorbell reset' is " |
4714 | "supported, but not 'bit 5 doorbell reset'. " |
4715 | "Firmware update is recommended.\n"); |
4716 | rc = -ENOTSUPP; /* use the soft reset */ |
4717 | goto unmap_cfgtable; |
4718 | } |
4719 | } |
4720 | |
4721 | rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell); |
4722 | if (rc) |
4723 | goto unmap_cfgtable; |
4724 | pci_restore_state(pdev); |
4725 | rc = pci_enable_device(pdev); |
4726 | if (rc) { |
4727 | dev_warn(&pdev->dev, "failed to enable device.\n"); |
4728 | goto unmap_cfgtable; |
4729 | } |
4730 | pci_write_config_word(pdev, 4, command_register); |
4731 | |
4732 | /* Some devices (notably the HP Smart Array 5i Controller) |
4733 | need a little pause here */ |
4734 | msleep(CCISS_POST_RESET_PAUSE_MSECS); |
4735 | |
4736 | /* Wait for board to become not ready, then ready. */ |
4737 | dev_info(&pdev->dev, "Waiting for board to reset.\n"); |
4738 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); |
4739 | if (rc) { |
4740 | dev_warn(&pdev->dev, "Failed waiting for board to hard reset." |
4741 | " Will try soft reset.\n"); |
4742 | rc = -ENOTSUPP; /* Not expected, but try soft reset later */ |
4743 | goto unmap_cfgtable; |
4744 | } |
4745 | rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY); |
4746 | if (rc) { |
4747 | dev_warn(&pdev->dev, |
4748 | "failed waiting for board to become ready " |
4749 | "after hard reset\n"); |
4750 | goto unmap_cfgtable; |
4751 | } |
4752 | |
4753 | rc = controller_reset_failed(vaddr); |
4754 | if (rc < 0) |
4755 | goto unmap_cfgtable; |
4756 | if (rc) { |
4757 | dev_warn(&pdev->dev, "Unable to successfully hard reset " |
4758 | "controller. Will try soft reset.\n"); |
4759 | rc = -ENOTSUPP; /* Not expected, but try soft reset later */ |
4760 | } else { |
4761 | dev_info(&pdev->dev, "Board ready after hard reset.\n"); |
4762 | } |
4763 | |
4764 | unmap_cfgtable: |
4765 | iounmap(cfgtable); |
4766 | |
4767 | unmap_vaddr: |
4768 | iounmap(vaddr); |
4769 | return rc; |
4770 | } |
4771 | |
4772 | static int cciss_init_reset_devices(struct pci_dev *pdev) |
4773 | { |
4774 | int rc, i; |
4775 | |
4776 | if (!reset_devices) |
4777 | return 0; |
4778 | |
4779 | /* Reset the controller with a PCI power-cycle or via doorbell */ |
4780 | rc = cciss_kdump_hard_reset_controller(pdev); |
4781 | |
4782 | /* -ENOTSUPP here means we cannot reset the controller |
4783 | * but it's already (and still) up and running in |
4784 | * "performant mode". Or, it might be 640x, which can't reset |
4785 | * due to concerns about shared bbwc between 6402/6404 pair. |
4786 | */ |
4787 | if (rc == -ENOTSUPP) |
4788 | return rc; /* just try to do the kdump anyhow. */ |
4789 | if (rc) |
4790 | return -ENODEV; |
4791 | |
4792 | /* Now try to get the controller to respond to a no-op */ |
4793 | dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); |
4794 | for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) { |
4795 | if (cciss_noop(pdev) == 0) |
4796 | break; |
4797 | else |
4798 | dev_warn(&pdev->dev, "no-op failed%s\n", |
4799 | (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ? |
4800 | "; re-trying" : "")); |
4801 | msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS); |
4802 | } |
4803 | return 0; |
4804 | } |
4805 | |
4806 | static int cciss_allocate_cmd_pool(ctlr_info_t *h) |
4807 | { |
4808 | h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) * |
4809 | sizeof(unsigned long), GFP_KERNEL); |
4810 | h->cmd_pool = pci_alloc_consistent(h->pdev, |
4811 | h->nr_cmds * sizeof(CommandList_struct), |
4812 | &(h->cmd_pool_dhandle)); |
4813 | h->errinfo_pool = pci_alloc_consistent(h->pdev, |
4814 | h->nr_cmds * sizeof(ErrorInfo_struct), |
4815 | &(h->errinfo_pool_dhandle)); |
4816 | if ((h->cmd_pool_bits == NULL) |
4817 | || (h->cmd_pool == NULL) |
4818 | || (h->errinfo_pool == NULL)) { |
4819 | dev_err(&h->pdev->dev, "out of memory"); |
4820 | return -ENOMEM; |
4821 | } |
4822 | return 0; |
4823 | } |
4824 | |
4825 | static int cciss_allocate_scatterlists(ctlr_info_t *h) |
4826 | { |
4827 | int i; |
4828 | |
4829 | /* zero it, so that on free we need not know how many were alloc'ed */ |
4830 | h->scatter_list = kzalloc(h->max_commands * |
4831 | sizeof(struct scatterlist *), GFP_KERNEL); |
4832 | if (!h->scatter_list) |
4833 | return -ENOMEM; |
4834 | |
4835 | for (i = 0; i < h->nr_cmds; i++) { |
4836 | h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) * |
4837 | h->maxsgentries, GFP_KERNEL); |
4838 | if (h->scatter_list[i] == NULL) { |
4839 | dev_err(&h->pdev->dev, "could not allocate " |
4840 | "s/g lists\n"); |
4841 | return -ENOMEM; |
4842 | } |
4843 | } |
4844 | return 0; |
4845 | } |
4846 | |
4847 | static void cciss_free_scatterlists(ctlr_info_t *h) |
4848 | { |
4849 | int i; |
4850 | |
4851 | if (h->scatter_list) { |
4852 | for (i = 0; i < h->nr_cmds; i++) |
4853 | kfree(h->scatter_list[i]); |
4854 | kfree(h->scatter_list); |
4855 | } |
4856 | } |
4857 | |
4858 | static void cciss_free_cmd_pool(ctlr_info_t *h) |
4859 | { |
4860 | kfree(h->cmd_pool_bits); |
4861 | if (h->cmd_pool) |
4862 | pci_free_consistent(h->pdev, |
4863 | h->nr_cmds * sizeof(CommandList_struct), |
4864 | h->cmd_pool, h->cmd_pool_dhandle); |
4865 | if (h->errinfo_pool) |
4866 | pci_free_consistent(h->pdev, |
4867 | h->nr_cmds * sizeof(ErrorInfo_struct), |
4868 | h->errinfo_pool, h->errinfo_pool_dhandle); |
4869 | } |
4870 | |
4871 | static int cciss_request_irq(ctlr_info_t *h, |
4872 | irqreturn_t (*msixhandler)(int, void *), |
4873 | irqreturn_t (*intxhandler)(int, void *)) |
4874 | { |
4875 | if (h->msix_vector || h->msi_vector) { |
4876 | if (!request_irq(h->intr[h->intr_mode], msixhandler, |
4877 | 0, h->devname, h)) |
4878 | return 0; |
4879 | dev_err(&h->pdev->dev, "Unable to get msi irq %d" |
4880 | " for %s\n", h->intr[h->intr_mode], |
4881 | h->devname); |
4882 | return -1; |
4883 | } |
4884 | |
4885 | if (!request_irq(h->intr[h->intr_mode], intxhandler, |
4886 | IRQF_SHARED, h->devname, h)) |
4887 | return 0; |
4888 | dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n", |
4889 | h->intr[h->intr_mode], h->devname); |
4890 | return -1; |
4891 | } |
4892 | |
4893 | static int cciss_kdump_soft_reset(ctlr_info_t *h) |
4894 | { |
4895 | if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) { |
4896 | dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); |
4897 | return -EIO; |
4898 | } |
4899 | |
4900 | dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); |
4901 | if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { |
4902 | dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); |
4903 | return -1; |
4904 | } |
4905 | |
4906 | dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); |
4907 | if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { |
4908 | dev_warn(&h->pdev->dev, "Board failed to become ready " |
4909 | "after soft reset.\n"); |
4910 | return -1; |
4911 | } |
4912 | |
4913 | return 0; |
4914 | } |
4915 | |
4916 | static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h) |
4917 | { |
4918 | int ctlr = h->ctlr; |
4919 | |
4920 | free_irq(h->intr[h->intr_mode], h); |
4921 | #ifdef CONFIG_PCI_MSI |
4922 | if (h->msix_vector) |
4923 | pci_disable_msix(h->pdev); |
4924 | else if (h->msi_vector) |
4925 | pci_disable_msi(h->pdev); |
4926 | #endif /* CONFIG_PCI_MSI */ |
4927 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); |
4928 | cciss_free_scatterlists(h); |
4929 | cciss_free_cmd_pool(h); |
4930 | kfree(h->blockFetchTable); |
4931 | if (h->reply_pool) |
4932 | pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64), |
4933 | h->reply_pool, h->reply_pool_dhandle); |
4934 | if (h->transtable) |
4935 | iounmap(h->transtable); |
4936 | if (h->cfgtable) |
4937 | iounmap(h->cfgtable); |
4938 | if (h->vaddr) |
4939 | iounmap(h->vaddr); |
4940 | unregister_blkdev(h->major, h->devname); |
4941 | cciss_destroy_hba_sysfs_entry(h); |
4942 | pci_release_regions(h->pdev); |
4943 | kfree(h); |
4944 | hba[ctlr] = NULL; |
4945 | } |
4946 | |
4947 | /* |
4948 | * This is it. Find all the controllers and register them. I really hate |
4949 | * stealing all these major device numbers. |
4950 | * returns the number of block devices registered. |
4951 | */ |
4952 | static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
4953 | { |
4954 | int i; |
4955 | int j = 0; |
4956 | int rc; |
4957 | int try_soft_reset = 0; |
4958 | int dac, return_code; |
4959 | InquiryData_struct *inq_buff; |
4960 | ctlr_info_t *h; |
4961 | unsigned long flags; |
4962 | |
4963 | rc = cciss_init_reset_devices(pdev); |
4964 | if (rc) { |
4965 | if (rc != -ENOTSUPP) |
4966 | return rc; |
4967 | /* If the reset fails in a particular way (it has no way to do |
4968 | * a proper hard reset, so returns -ENOTSUPP) we can try to do |
4969 | * a soft reset once we get the controller configured up to the |
4970 | * point that it can accept a command. |
4971 | */ |
4972 | try_soft_reset = 1; |
4973 | rc = 0; |
4974 | } |
4975 | |
4976 | reinit_after_soft_reset: |
4977 | |
4978 | i = alloc_cciss_hba(pdev); |
4979 | if (i < 0) |
4980 | return -1; |
4981 | |
4982 | h = hba[i]; |
4983 | h->pdev = pdev; |
4984 | h->busy_initializing = 1; |
4985 | h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; |
4986 | INIT_LIST_HEAD(&h->cmpQ); |
4987 | INIT_LIST_HEAD(&h->reqQ); |
4988 | mutex_init(&h->busy_shutting_down); |
4989 | |
4990 | if (cciss_pci_init(h) != 0) |
4991 | goto clean_no_release_regions; |
4992 | |
4993 | sprintf(h->devname, "cciss%d", i); |
4994 | h->ctlr = i; |
4995 | |
4996 | if (cciss_tape_cmds < 2) |
4997 | cciss_tape_cmds = 2; |
4998 | if (cciss_tape_cmds > 16) |
4999 | cciss_tape_cmds = 16; |
5000 | |
5001 | init_completion(&h->scan_wait); |
5002 | |
5003 | if (cciss_create_hba_sysfs_entry(h)) |
5004 | goto clean0; |
5005 | |
5006 | /* configure PCI DMA stuff */ |
5007 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
5008 | dac = 1; |
5009 | else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
5010 | dac = 0; |
5011 | else { |
5012 | dev_err(&h->pdev->dev, "no suitable DMA available\n"); |
5013 | goto clean1; |
5014 | } |
5015 | |
5016 | /* |
5017 | * register with the major number, or get a dynamic major number |
5018 | * by passing 0 as argument. This is done for greater than |
5019 | * 8 controller support. |
5020 | */ |
5021 | if (i < MAX_CTLR_ORIG) |
5022 | h->major = COMPAQ_CISS_MAJOR + i; |
5023 | rc = register_blkdev(h->major, h->devname); |
5024 | if (rc == -EBUSY || rc == -EINVAL) { |
5025 | dev_err(&h->pdev->dev, |
5026 | "Unable to get major number %d for %s " |
5027 | "on hba %d\n", h->major, h->devname, i); |
5028 | goto clean1; |
5029 | } else { |
5030 | if (i >= MAX_CTLR_ORIG) |
5031 | h->major = rc; |
5032 | } |
5033 | |
5034 | /* make sure the board interrupts are off */ |
5035 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5036 | rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx); |
5037 | if (rc) |
5038 | goto clean2; |
5039 | |
5040 | dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", |
5041 | h->devname, pdev->device, pci_name(pdev), |
5042 | h->intr[h->intr_mode], dac ? "" : " not"); |
5043 | |
5044 | if (cciss_allocate_cmd_pool(h)) |
5045 | goto clean4; |
5046 | |
5047 | if (cciss_allocate_scatterlists(h)) |
5048 | goto clean4; |
5049 | |
5050 | h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h, |
5051 | h->chainsize, h->nr_cmds); |
5052 | if (!h->cmd_sg_list && h->chainsize > 0) |
5053 | goto clean4; |
5054 | |
5055 | spin_lock_init(&h->lock); |
5056 | |
5057 | /* Initialize the pdev driver private data. |
5058 | have it point to h. */ |
5059 | pci_set_drvdata(pdev, h); |
5060 | /* command and error info recs zeroed out before |
5061 | they are used */ |
5062 | bitmap_zero(h->cmd_pool_bits, h->nr_cmds); |
5063 | |
5064 | h->num_luns = 0; |
5065 | h->highest_lun = -1; |
5066 | for (j = 0; j < CISS_MAX_LUN; j++) { |
5067 | h->drv[j] = NULL; |
5068 | h->gendisk[j] = NULL; |
5069 | } |
5070 | |
5071 | /* At this point, the controller is ready to take commands. |
5072 | * Now, if reset_devices and the hard reset didn't work, try |
5073 | * the soft reset and see if that works. |
5074 | */ |
5075 | if (try_soft_reset) { |
5076 | |
5077 | /* This is kind of gross. We may or may not get a completion |
5078 | * from the soft reset command, and if we do, then the value |
5079 | * from the fifo may or may not be valid. So, we wait 10 secs |
5080 | * after the reset throwing away any completions we get during |
5081 | * that time. Unregister the interrupt handler and register |
5082 | * fake ones to scoop up any residual completions. |
5083 | */ |
5084 | spin_lock_irqsave(&h->lock, flags); |
5085 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5086 | spin_unlock_irqrestore(&h->lock, flags); |
5087 | free_irq(h->intr[h->intr_mode], h); |
5088 | rc = cciss_request_irq(h, cciss_msix_discard_completions, |
5089 | cciss_intx_discard_completions); |
5090 | if (rc) { |
5091 | dev_warn(&h->pdev->dev, "Failed to request_irq after " |
5092 | "soft reset.\n"); |
5093 | goto clean4; |
5094 | } |
5095 | |
5096 | rc = cciss_kdump_soft_reset(h); |
5097 | if (rc) { |
5098 | dev_warn(&h->pdev->dev, "Soft reset failed.\n"); |
5099 | goto clean4; |
5100 | } |
5101 | |
5102 | dev_info(&h->pdev->dev, "Board READY.\n"); |
5103 | dev_info(&h->pdev->dev, |
5104 | "Waiting for stale completions to drain.\n"); |
5105 | h->access.set_intr_mask(h, CCISS_INTR_ON); |
5106 | msleep(10000); |
5107 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5108 | |
5109 | rc = controller_reset_failed(h->cfgtable); |
5110 | if (rc) |
5111 | dev_info(&h->pdev->dev, |
5112 | "Soft reset appears to have failed.\n"); |
5113 | |
5114 | /* since the controller's reset, we have to go back and re-init |
5115 | * everything. Easiest to just forget what we've done and do it |
5116 | * all over again. |
5117 | */ |
5118 | cciss_undo_allocations_after_kdump_soft_reset(h); |
5119 | try_soft_reset = 0; |
5120 | if (rc) |
5121 | /* don't go to clean4, we already unallocated */ |
5122 | return -ENODEV; |
5123 | |
5124 | goto reinit_after_soft_reset; |
5125 | } |
5126 | |
5127 | cciss_scsi_setup(h); |
5128 | |
5129 | /* Turn the interrupts on so we can service requests */ |
5130 | h->access.set_intr_mask(h, CCISS_INTR_ON); |
5131 | |
5132 | /* Get the firmware version */ |
5133 | inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL); |
5134 | if (inq_buff == NULL) { |
5135 | dev_err(&h->pdev->dev, "out of memory\n"); |
5136 | goto clean4; |
5137 | } |
5138 | |
5139 | return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff, |
5140 | sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD); |
5141 | if (return_code == IO_OK) { |
5142 | h->firm_ver[0] = inq_buff->data_byte[32]; |
5143 | h->firm_ver[1] = inq_buff->data_byte[33]; |
5144 | h->firm_ver[2] = inq_buff->data_byte[34]; |
5145 | h->firm_ver[3] = inq_buff->data_byte[35]; |
5146 | } else { /* send command failed */ |
5147 | dev_warn(&h->pdev->dev, "unable to determine firmware" |
5148 | " version of controller\n"); |
5149 | } |
5150 | kfree(inq_buff); |
5151 | |
5152 | cciss_procinit(h); |
5153 | |
5154 | h->cciss_max_sectors = 8192; |
5155 | |
5156 | rebuild_lun_table(h, 1, 0); |
5157 | cciss_engage_scsi(h); |
5158 | h->busy_initializing = 0; |
5159 | return 1; |
5160 | |
5161 | clean4: |
5162 | cciss_free_cmd_pool(h); |
5163 | cciss_free_scatterlists(h); |
5164 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); |
5165 | free_irq(h->intr[h->intr_mode], h); |
5166 | clean2: |
5167 | unregister_blkdev(h->major, h->devname); |
5168 | clean1: |
5169 | cciss_destroy_hba_sysfs_entry(h); |
5170 | clean0: |
5171 | pci_release_regions(pdev); |
5172 | clean_no_release_regions: |
5173 | h->busy_initializing = 0; |
5174 | |
5175 | /* |
5176 | * Deliberately omit pci_disable_device(): it does something nasty to |
5177 | * Smart Array controllers that pci_enable_device does not undo |
5178 | */ |
5179 | pci_set_drvdata(pdev, NULL); |
5180 | free_hba(h); |
5181 | return -1; |
5182 | } |
5183 | |
5184 | static void cciss_shutdown(struct pci_dev *pdev) |
5185 | { |
5186 | ctlr_info_t *h; |
5187 | char *flush_buf; |
5188 | int return_code; |
5189 | |
5190 | h = pci_get_drvdata(pdev); |
5191 | flush_buf = kzalloc(4, GFP_KERNEL); |
5192 | if (!flush_buf) { |
5193 | dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n"); |
5194 | return; |
5195 | } |
5196 | /* write all data in the battery backed cache to disk */ |
5197 | return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf, |
5198 | 4, 0, CTLR_LUNID, TYPE_CMD); |
5199 | kfree(flush_buf); |
5200 | if (return_code != IO_OK) |
5201 | dev_warn(&h->pdev->dev, "Error flushing cache\n"); |
5202 | h->access.set_intr_mask(h, CCISS_INTR_OFF); |
5203 | free_irq(h->intr[h->intr_mode], h); |
5204 | } |
5205 | |
5206 | static int cciss_enter_simple_mode(struct ctlr_info *h) |
5207 | { |
5208 | u32 trans_support; |
5209 | |
5210 | trans_support = readl(&(h->cfgtable->TransportSupport)); |
5211 | if (!(trans_support & SIMPLE_MODE)) |
5212 | return -ENOTSUPP; |
5213 | |
5214 | h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); |
5215 | writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); |
5216 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); |
5217 | cciss_wait_for_mode_change_ack(h); |
5218 | print_cfg_table(h); |
5219 | if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { |
5220 | dev_warn(&h->pdev->dev, "unable to get board into simple mode\n"); |
5221 | return -ENODEV; |
5222 | } |
5223 | h->transMethod = CFGTBL_Trans_Simple; |
5224 | return 0; |
5225 | } |
5226 | |
5227 | |
5228 | static void cciss_remove_one(struct pci_dev *pdev) |
5229 | { |
5230 | ctlr_info_t *h; |
5231 | int i, j; |
5232 | |
5233 | if (pci_get_drvdata(pdev) == NULL) { |
5234 | dev_err(&pdev->dev, "Unable to remove device\n"); |
5235 | return; |
5236 | } |
5237 | |
5238 | h = pci_get_drvdata(pdev); |
5239 | i = h->ctlr; |
5240 | if (hba[i] == NULL) { |
5241 | dev_err(&pdev->dev, "device appears to already be removed\n"); |
5242 | return; |
5243 | } |
5244 | |
5245 | mutex_lock(&h->busy_shutting_down); |
5246 | |
5247 | remove_from_scan_list(h); |
5248 | remove_proc_entry(h->devname, proc_cciss); |
5249 | unregister_blkdev(h->major, h->devname); |
5250 | |
5251 | /* remove it from the disk list */ |
5252 | for (j = 0; j < CISS_MAX_LUN; j++) { |
5253 | struct gendisk *disk = h->gendisk[j]; |
5254 | if (disk) { |
5255 | struct request_queue *q = disk->queue; |
5256 | |
5257 | if (disk->flags & GENHD_FL_UP) { |
5258 | cciss_destroy_ld_sysfs_entry(h, j, 1); |
5259 | del_gendisk(disk); |
5260 | } |
5261 | if (q) |
5262 | blk_cleanup_queue(q); |
5263 | } |
5264 | } |
5265 | |
5266 | #ifdef CONFIG_CISS_SCSI_TAPE |
5267 | cciss_unregister_scsi(h); /* unhook from SCSI subsystem */ |
5268 | #endif |
5269 | |
5270 | cciss_shutdown(pdev); |
5271 | |
5272 | #ifdef CONFIG_PCI_MSI |
5273 | if (h->msix_vector) |
5274 | pci_disable_msix(h->pdev); |
5275 | else if (h->msi_vector) |
5276 | pci_disable_msi(h->pdev); |
5277 | #endif /* CONFIG_PCI_MSI */ |
5278 | |
5279 | iounmap(h->transtable); |
5280 | iounmap(h->cfgtable); |
5281 | iounmap(h->vaddr); |
5282 | |
5283 | cciss_free_cmd_pool(h); |
5284 | /* Free up sg elements */ |
5285 | for (j = 0; j < h->nr_cmds; j++) |
5286 | kfree(h->scatter_list[j]); |
5287 | kfree(h->scatter_list); |
5288 | cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds); |
5289 | kfree(h->blockFetchTable); |
5290 | if (h->reply_pool) |
5291 | pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64), |
5292 | h->reply_pool, h->reply_pool_dhandle); |
5293 | /* |
5294 | * Deliberately omit pci_disable_device(): it does something nasty to |
5295 | * Smart Array controllers that pci_enable_device does not undo |
5296 | */ |
5297 | pci_release_regions(pdev); |
5298 | pci_set_drvdata(pdev, NULL); |
5299 | cciss_destroy_hba_sysfs_entry(h); |
5300 | mutex_unlock(&h->busy_shutting_down); |
5301 | free_hba(h); |
5302 | } |
5303 | |
5304 | static struct pci_driver cciss_pci_driver = { |
5305 | .name = "cciss", |
5306 | .probe = cciss_init_one, |
5307 | .remove = cciss_remove_one, |
5308 | .id_table = cciss_pci_device_id, /* id_table */ |
5309 | .shutdown = cciss_shutdown, |
5310 | }; |
5311 | |
5312 | /* |
5313 | * This is it. Register the PCI driver information for the cards we control |
5314 | * the OS will call our registered routines when it finds one of our cards. |
5315 | */ |
5316 | static int __init cciss_init(void) |
5317 | { |
5318 | int err; |
5319 | |
5320 | /* |
5321 | * The hardware requires that commands are aligned on a 64-bit |
5322 | * boundary. Given that we use pci_alloc_consistent() to allocate an |
5323 | * array of them, the size must be a multiple of 8 bytes. |
5324 | */ |
5325 | BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT); |
5326 | printk(KERN_INFO DRIVER_NAME "\n"); |
5327 | |
5328 | err = bus_register(&cciss_bus_type); |
5329 | if (err) |
5330 | return err; |
5331 | |
5332 | /* Start the scan thread */ |
5333 | cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan"); |
5334 | if (IS_ERR(cciss_scan_thread)) { |
5335 | err = PTR_ERR(cciss_scan_thread); |
5336 | goto err_bus_unregister; |
5337 | } |
5338 | |
5339 | /* Register for our PCI devices */ |
5340 | err = pci_register_driver(&cciss_pci_driver); |
5341 | if (err) |
5342 | goto err_thread_stop; |
5343 | |
5344 | return err; |
5345 | |
5346 | err_thread_stop: |
5347 | kthread_stop(cciss_scan_thread); |
5348 | err_bus_unregister: |
5349 | bus_unregister(&cciss_bus_type); |
5350 | |
5351 | return err; |
5352 | } |
5353 | |
5354 | static void __exit cciss_cleanup(void) |
5355 | { |
5356 | int i; |
5357 | |
5358 | pci_unregister_driver(&cciss_pci_driver); |
5359 | /* double check that all controller entrys have been removed */ |
5360 | for (i = 0; i < MAX_CTLR; i++) { |
5361 | if (hba[i] != NULL) { |
5362 | dev_warn(&hba[i]->pdev->dev, |
5363 | "had to remove controller\n"); |
5364 | cciss_remove_one(hba[i]->pdev); |
5365 | } |
5366 | } |
5367 | kthread_stop(cciss_scan_thread); |
5368 | if (proc_cciss) |
5369 | remove_proc_entry("driver/cciss", NULL); |
5370 | bus_unregister(&cciss_bus_type); |
5371 | } |
5372 | |
5373 | module_init(cciss_init); |
5374 | module_exit(cciss_cleanup); |
5375 |
Branches:
ben-wpan
ben-wpan-stefan
javiroman/ks7010
jz-2.6.34
jz-2.6.34-rc5
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Tags:
od-2011-09-04
od-2011-09-18
v2.6.34-rc5
v2.6.34-rc6
v2.6.34-rc7
v3.9