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1 | /* linux/drivers/char/pc8736x_gpio.c |
2 | |
3 | National Semiconductor PC8736x GPIO driver. Allows a user space |
4 | process to play with the GPIO pins. |
5 | |
6 | Copyright (c) 2005,2006 Jim Cromie <jim.cromie@gmail.com> |
7 | |
8 | adapted from linux/drivers/char/scx200_gpio.c |
9 | Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>, |
10 | */ |
11 | |
12 | #include <linux/fs.h> |
13 | #include <linux/module.h> |
14 | #include <linux/errno.h> |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> |
17 | #include <linux/cdev.h> |
18 | #include <linux/io.h> |
19 | #include <linux/ioport.h> |
20 | #include <linux/mutex.h> |
21 | #include <linux/nsc_gpio.h> |
22 | #include <linux/platform_device.h> |
23 | #include <asm/uaccess.h> |
24 | |
25 | #define DEVNAME "pc8736x_gpio" |
26 | |
27 | MODULE_AUTHOR("Jim Cromie <jim.cromie@gmail.com>"); |
28 | MODULE_DESCRIPTION("NatSemi/Winbond PC-8736x GPIO Pin Driver"); |
29 | MODULE_LICENSE("GPL"); |
30 | |
31 | static int major; /* default to dynamic major */ |
32 | module_param(major, int, 0); |
33 | MODULE_PARM_DESC(major, "Major device number"); |
34 | |
35 | static DEFINE_MUTEX(pc8736x_gpio_config_lock); |
36 | static unsigned pc8736x_gpio_base; |
37 | static u8 pc8736x_gpio_shadow[4]; |
38 | |
39 | #define SIO_BASE1 0x2E /* 1st command-reg to check */ |
40 | #define SIO_BASE2 0x4E /* alt command-reg to check */ |
41 | |
42 | #define SIO_SID 0x20 /* SuperI/O ID Register */ |
43 | #define SIO_SID_PC87365 0xe5 /* Expected value in ID Register for PC87365 */ |
44 | #define SIO_SID_PC87366 0xe9 /* Expected value in ID Register for PC87366 */ |
45 | |
46 | #define SIO_CF1 0x21 /* chip config, bit0 is chip enable */ |
47 | |
48 | #define PC8736X_GPIO_RANGE 16 /* ioaddr range */ |
49 | #define PC8736X_GPIO_CT 32 /* minors matching 4 8 bit ports */ |
50 | |
51 | #define SIO_UNIT_SEL 0x7 /* unit select reg */ |
52 | #define SIO_UNIT_ACT 0x30 /* unit enable */ |
53 | #define SIO_GPIO_UNIT 0x7 /* unit number of GPIO */ |
54 | #define SIO_VLM_UNIT 0x0D |
55 | #define SIO_TMS_UNIT 0x0E |
56 | |
57 | /* config-space addrs to read/write each unit's runtime addr */ |
58 | #define SIO_BASE_HADDR 0x60 |
59 | #define SIO_BASE_LADDR 0x61 |
60 | |
61 | /* GPIO config-space pin-control addresses */ |
62 | #define SIO_GPIO_PIN_SELECT 0xF0 |
63 | #define SIO_GPIO_PIN_CONFIG 0xF1 |
64 | #define SIO_GPIO_PIN_EVENT 0xF2 |
65 | |
66 | static unsigned char superio_cmd = 0; |
67 | static unsigned char selected_device = 0xFF; /* bogus start val */ |
68 | |
69 | /* GPIO port runtime access, functionality */ |
70 | static int port_offset[] = { 0, 4, 8, 10 }; /* non-uniform offsets ! */ |
71 | /* static int event_capable[] = { 1, 1, 0, 0 }; ports 2,3 are hobbled */ |
72 | |
73 | #define PORT_OUT 0 |
74 | #define PORT_IN 1 |
75 | #define PORT_EVT_EN 2 |
76 | #define PORT_EVT_STST 3 |
77 | |
78 | static struct platform_device *pdev; /* use in dev_*() */ |
79 | |
80 | static inline void superio_outb(int addr, int val) |
81 | { |
82 | outb_p(addr, superio_cmd); |
83 | outb_p(val, superio_cmd + 1); |
84 | } |
85 | |
86 | static inline int superio_inb(int addr) |
87 | { |
88 | outb_p(addr, superio_cmd); |
89 | return inb_p(superio_cmd + 1); |
90 | } |
91 | |
92 | static int pc8736x_superio_present(void) |
93 | { |
94 | int id; |
95 | |
96 | /* try the 2 possible values, read a hardware reg to verify */ |
97 | superio_cmd = SIO_BASE1; |
98 | id = superio_inb(SIO_SID); |
99 | if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366) |
100 | return superio_cmd; |
101 | |
102 | superio_cmd = SIO_BASE2; |
103 | id = superio_inb(SIO_SID); |
104 | if (id == SIO_SID_PC87365 || id == SIO_SID_PC87366) |
105 | return superio_cmd; |
106 | |
107 | return 0; |
108 | } |
109 | |
110 | static void device_select(unsigned devldn) |
111 | { |
112 | superio_outb(SIO_UNIT_SEL, devldn); |
113 | selected_device = devldn; |
114 | } |
115 | |
116 | static void select_pin(unsigned iminor) |
117 | { |
118 | /* select GPIO port/pin from device minor number */ |
119 | device_select(SIO_GPIO_UNIT); |
120 | superio_outb(SIO_GPIO_PIN_SELECT, |
121 | ((iminor << 1) & 0xF0) | (iminor & 0x7)); |
122 | } |
123 | |
124 | static inline u32 pc8736x_gpio_configure_fn(unsigned index, u32 mask, u32 bits, |
125 | u32 func_slct) |
126 | { |
127 | u32 config, new_config; |
128 | |
129 | mutex_lock(&pc8736x_gpio_config_lock); |
130 | |
131 | device_select(SIO_GPIO_UNIT); |
132 | select_pin(index); |
133 | |
134 | /* read current config value */ |
135 | config = superio_inb(func_slct); |
136 | |
137 | /* set new config */ |
138 | new_config = (config & mask) | bits; |
139 | superio_outb(func_slct, new_config); |
140 | |
141 | mutex_unlock(&pc8736x_gpio_config_lock); |
142 | |
143 | return config; |
144 | } |
145 | |
146 | static u32 pc8736x_gpio_configure(unsigned index, u32 mask, u32 bits) |
147 | { |
148 | return pc8736x_gpio_configure_fn(index, mask, bits, |
149 | SIO_GPIO_PIN_CONFIG); |
150 | } |
151 | |
152 | static int pc8736x_gpio_get(unsigned minor) |
153 | { |
154 | int port, bit, val; |
155 | |
156 | port = minor >> 3; |
157 | bit = minor & 7; |
158 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); |
159 | val >>= bit; |
160 | val &= 1; |
161 | |
162 | dev_dbg(&pdev->dev, "_gpio_get(%d from %x bit %d) == val %d\n", |
163 | minor, pc8736x_gpio_base + port_offset[port] + PORT_IN, bit, |
164 | val); |
165 | |
166 | return val; |
167 | } |
168 | |
169 | static void pc8736x_gpio_set(unsigned minor, int val) |
170 | { |
171 | int port, bit, curval; |
172 | |
173 | minor &= 0x1f; |
174 | port = minor >> 3; |
175 | bit = minor & 7; |
176 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
177 | |
178 | dev_dbg(&pdev->dev, "addr:%x cur:%x bit-pos:%d cur-bit:%x + new:%d -> bit-new:%d\n", |
179 | pc8736x_gpio_base + port_offset[port] + PORT_OUT, |
180 | curval, bit, (curval & ~(1 << bit)), val, (val << bit)); |
181 | |
182 | val = (curval & ~(1 << bit)) | (val << bit); |
183 | |
184 | dev_dbg(&pdev->dev, "gpio_set(minor:%d port:%d bit:%d)" |
185 | " %2x -> %2x\n", minor, port, bit, curval, val); |
186 | |
187 | outb_p(val, pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
188 | |
189 | curval = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_OUT); |
190 | val = inb_p(pc8736x_gpio_base + port_offset[port] + PORT_IN); |
191 | |
192 | dev_dbg(&pdev->dev, "wrote %x, read: %x\n", curval, val); |
193 | pc8736x_gpio_shadow[port] = val; |
194 | } |
195 | |
196 | static int pc8736x_gpio_current(unsigned minor) |
197 | { |
198 | int port, bit; |
199 | minor &= 0x1f; |
200 | port = minor >> 3; |
201 | bit = minor & 7; |
202 | return ((pc8736x_gpio_shadow[port] >> bit) & 0x01); |
203 | } |
204 | |
205 | static void pc8736x_gpio_change(unsigned index) |
206 | { |
207 | pc8736x_gpio_set(index, !pc8736x_gpio_current(index)); |
208 | } |
209 | |
210 | static struct nsc_gpio_ops pc8736x_gpio_ops = { |
211 | .owner = THIS_MODULE, |
212 | .gpio_config = pc8736x_gpio_configure, |
213 | .gpio_dump = nsc_gpio_dump, |
214 | .gpio_get = pc8736x_gpio_get, |
215 | .gpio_set = pc8736x_gpio_set, |
216 | .gpio_change = pc8736x_gpio_change, |
217 | .gpio_current = pc8736x_gpio_current |
218 | }; |
219 | |
220 | static int pc8736x_gpio_open(struct inode *inode, struct file *file) |
221 | { |
222 | unsigned m = iminor(inode); |
223 | file->private_data = &pc8736x_gpio_ops; |
224 | |
225 | dev_dbg(&pdev->dev, "open %d\n", m); |
226 | |
227 | if (m >= PC8736X_GPIO_CT) |
228 | return -EINVAL; |
229 | return nonseekable_open(inode, file); |
230 | } |
231 | |
232 | static const struct file_operations pc8736x_gpio_fileops = { |
233 | .owner = THIS_MODULE, |
234 | .open = pc8736x_gpio_open, |
235 | .write = nsc_gpio_write, |
236 | .read = nsc_gpio_read, |
237 | .llseek = no_llseek, |
238 | }; |
239 | |
240 | static void __init pc8736x_init_shadow(void) |
241 | { |
242 | int port; |
243 | |
244 | /* read the current values driven on the GPIO signals */ |
245 | for (port = 0; port < 4; ++port) |
246 | pc8736x_gpio_shadow[port] |
247 | = inb_p(pc8736x_gpio_base + port_offset[port] |
248 | + PORT_OUT); |
249 | |
250 | } |
251 | |
252 | static struct cdev pc8736x_gpio_cdev; |
253 | |
254 | static int __init pc8736x_gpio_init(void) |
255 | { |
256 | int rc; |
257 | dev_t devid; |
258 | |
259 | pdev = platform_device_alloc(DEVNAME, 0); |
260 | if (!pdev) |
261 | return -ENOMEM; |
262 | |
263 | rc = platform_device_add(pdev); |
264 | if (rc) { |
265 | rc = -ENODEV; |
266 | goto undo_platform_dev_alloc; |
267 | } |
268 | dev_info(&pdev->dev, "NatSemi pc8736x GPIO Driver Initializing\n"); |
269 | |
270 | if (!pc8736x_superio_present()) { |
271 | rc = -ENODEV; |
272 | dev_err(&pdev->dev, "no device found\n"); |
273 | goto undo_platform_dev_add; |
274 | } |
275 | pc8736x_gpio_ops.dev = &pdev->dev; |
276 | |
277 | /* Verify that chip and it's GPIO unit are both enabled. |
278 | My BIOS does this, so I take minimum action here |
279 | */ |
280 | rc = superio_inb(SIO_CF1); |
281 | if (!(rc & 0x01)) { |
282 | rc = -ENODEV; |
283 | dev_err(&pdev->dev, "device not enabled\n"); |
284 | goto undo_platform_dev_add; |
285 | } |
286 | device_select(SIO_GPIO_UNIT); |
287 | if (!superio_inb(SIO_UNIT_ACT)) { |
288 | rc = -ENODEV; |
289 | dev_err(&pdev->dev, "GPIO unit not enabled\n"); |
290 | goto undo_platform_dev_add; |
291 | } |
292 | |
293 | /* read the GPIO unit base addr that chip responds to */ |
294 | pc8736x_gpio_base = (superio_inb(SIO_BASE_HADDR) << 8 |
295 | | superio_inb(SIO_BASE_LADDR)); |
296 | |
297 | if (!request_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE, DEVNAME)) { |
298 | rc = -ENODEV; |
299 | dev_err(&pdev->dev, "GPIO ioport %x busy\n", |
300 | pc8736x_gpio_base); |
301 | goto undo_platform_dev_add; |
302 | } |
303 | dev_info(&pdev->dev, "GPIO ioport %x reserved\n", pc8736x_gpio_base); |
304 | |
305 | if (major) { |
306 | devid = MKDEV(major, 0); |
307 | rc = register_chrdev_region(devid, PC8736X_GPIO_CT, DEVNAME); |
308 | } else { |
309 | rc = alloc_chrdev_region(&devid, 0, PC8736X_GPIO_CT, DEVNAME); |
310 | major = MAJOR(devid); |
311 | } |
312 | |
313 | if (rc < 0) { |
314 | dev_err(&pdev->dev, "register-chrdev failed: %d\n", rc); |
315 | goto undo_request_region; |
316 | } |
317 | if (!major) { |
318 | major = rc; |
319 | dev_dbg(&pdev->dev, "got dynamic major %d\n", major); |
320 | } |
321 | |
322 | pc8736x_init_shadow(); |
323 | |
324 | /* ignore minor errs, and succeed */ |
325 | cdev_init(&pc8736x_gpio_cdev, &pc8736x_gpio_fileops); |
326 | cdev_add(&pc8736x_gpio_cdev, devid, PC8736X_GPIO_CT); |
327 | |
328 | return 0; |
329 | |
330 | undo_request_region: |
331 | release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE); |
332 | undo_platform_dev_add: |
333 | platform_device_del(pdev); |
334 | undo_platform_dev_alloc: |
335 | platform_device_put(pdev); |
336 | |
337 | return rc; |
338 | } |
339 | |
340 | static void __exit pc8736x_gpio_cleanup(void) |
341 | { |
342 | dev_dbg(&pdev->dev, "cleanup\n"); |
343 | |
344 | cdev_del(&pc8736x_gpio_cdev); |
345 | unregister_chrdev_region(MKDEV(major,0), PC8736X_GPIO_CT); |
346 | release_region(pc8736x_gpio_base, PC8736X_GPIO_RANGE); |
347 | |
348 | platform_device_unregister(pdev); |
349 | } |
350 | |
351 | module_init(pc8736x_gpio_init); |
352 | module_exit(pc8736x_gpio_cleanup); |
353 |
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