Root/
1 | /* |
2 | * Support for common PCI multi-I/O cards (which is most of them) |
3 | * |
4 | * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com> |
5 | * |
6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License |
8 | * as published by the Free Software Foundation; either version |
9 | * 2 of the License, or (at your option) any later version. |
10 | * |
11 | * |
12 | * Multi-function PCI cards are supposed to present separate logical |
13 | * devices on the bus. A common thing to do seems to be to just use |
14 | * one logical device with lots of base address registers for both |
15 | * parallel ports and serial ports. This driver is for dealing with |
16 | * that. |
17 | * |
18 | */ |
19 | |
20 | #include <linux/types.h> |
21 | #include <linux/module.h> |
22 | #include <linux/init.h> |
23 | #include <linux/slab.h> |
24 | #include <linux/pci.h> |
25 | #include <linux/interrupt.h> |
26 | #include <linux/parport.h> |
27 | #include <linux/parport_pc.h> |
28 | #include <linux/8250_pci.h> |
29 | |
30 | enum parport_pc_pci_cards { |
31 | titan_110l = 0, |
32 | titan_210l, |
33 | netmos_9xx5_combo, |
34 | netmos_9855, |
35 | netmos_9855_2p, |
36 | netmos_9900, |
37 | netmos_9900_2p, |
38 | netmos_99xx_1p, |
39 | avlab_1s1p, |
40 | avlab_1s2p, |
41 | avlab_2s1p, |
42 | siig_1s1p_10x, |
43 | siig_2s1p_10x, |
44 | siig_2p1s_20x, |
45 | siig_1s1p_20x, |
46 | siig_2s1p_20x, |
47 | timedia_4078a, |
48 | timedia_4079h, |
49 | timedia_4085h, |
50 | timedia_4088a, |
51 | timedia_4089a, |
52 | timedia_4095a, |
53 | timedia_4096a, |
54 | timedia_4078u, |
55 | timedia_4079a, |
56 | timedia_4085u, |
57 | timedia_4079r, |
58 | timedia_4079s, |
59 | timedia_4079d, |
60 | timedia_4079e, |
61 | timedia_4079f, |
62 | timedia_9079a, |
63 | timedia_9079b, |
64 | timedia_9079c, |
65 | wch_ch353_2s1p, |
66 | sunix_2s1p, |
67 | }; |
68 | |
69 | /* each element directly indexed from enum list, above */ |
70 | struct parport_pc_pci { |
71 | int numports; |
72 | struct { /* BAR (base address registers) numbers in the config |
73 | space header */ |
74 | int lo; |
75 | int hi; /* -1 if not there, >6 for offset-method (max |
76 | BAR is 6) */ |
77 | } addr[4]; |
78 | |
79 | /* If set, this is called immediately after pci_enable_device. |
80 | * If it returns non-zero, no probing will take place and the |
81 | * ports will not be used. */ |
82 | int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card, |
83 | int autoirq, int autodma); |
84 | |
85 | /* If set, this is called after probing for ports. If 'failed' |
86 | * is non-zero we couldn't use any of the ports. */ |
87 | void (*postinit_hook) (struct pci_dev *pdev, |
88 | struct parport_pc_pci *card, int failed); |
89 | }; |
90 | |
91 | static int netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par, |
92 | int autoirq, int autodma) |
93 | { |
94 | /* the rule described below doesn't hold for this device */ |
95 | if (dev->device == PCI_DEVICE_ID_NETMOS_9835 && |
96 | dev->subsystem_vendor == PCI_VENDOR_ID_IBM && |
97 | dev->subsystem_device == 0x0299) |
98 | return -ENODEV; |
99 | |
100 | if (dev->device == PCI_DEVICE_ID_NETMOS_9912) { |
101 | par->numports = 1; |
102 | } else { |
103 | /* |
104 | * Netmos uses the subdevice ID to indicate the number of parallel |
105 | * and serial ports. The form is 0x00PS, where <P> is the number of |
106 | * parallel ports and <S> is the number of serial ports. |
107 | */ |
108 | par->numports = (dev->subsystem_device & 0xf0) >> 4; |
109 | if (par->numports > ARRAY_SIZE(par->addr)) |
110 | par->numports = ARRAY_SIZE(par->addr); |
111 | } |
112 | |
113 | return 0; |
114 | } |
115 | |
116 | static struct parport_pc_pci cards[] = { |
117 | /* titan_110l */ { 1, { { 3, -1 }, } }, |
118 | /* titan_210l */ { 1, { { 3, -1 }, } }, |
119 | /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init }, |
120 | /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init }, |
121 | /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } }, |
122 | /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init }, |
123 | /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } }, |
124 | /* netmos_99xx_1p */ {1, { { 0, 1 }, } }, |
125 | /* avlab_1s1p */ { 1, { { 1, 2}, } }, |
126 | /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} }, |
127 | /* avlab_2s1p */ { 1, { { 2, 3}, } }, |
128 | /* siig_1s1p_10x */ { 1, { { 3, 4 }, } }, |
129 | /* siig_2s1p_10x */ { 1, { { 4, 5 }, } }, |
130 | /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } }, |
131 | /* siig_1s1p_20x */ { 1, { { 1, 2 }, } }, |
132 | /* siig_2s1p_20x */ { 1, { { 2, 3 }, } }, |
133 | /* timedia_4078a */ { 1, { { 2, -1 }, } }, |
134 | /* timedia_4079h */ { 1, { { 2, 3 }, } }, |
135 | /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
136 | /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
137 | /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
138 | /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
139 | /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, |
140 | /* timedia_4078u */ { 1, { { 2, -1 }, } }, |
141 | /* timedia_4079a */ { 1, { { 2, 3 }, } }, |
142 | /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, |
143 | /* timedia_4079r */ { 1, { { 2, 3 }, } }, |
144 | /* timedia_4079s */ { 1, { { 2, 3 }, } }, |
145 | /* timedia_4079d */ { 1, { { 2, 3 }, } }, |
146 | /* timedia_4079e */ { 1, { { 2, 3 }, } }, |
147 | /* timedia_4079f */ { 1, { { 2, 3 }, } }, |
148 | /* timedia_9079a */ { 1, { { 2, 3 }, } }, |
149 | /* timedia_9079b */ { 1, { { 2, 3 }, } }, |
150 | /* timedia_9079c */ { 1, { { 2, 3 }, } }, |
151 | /* wch_ch353_2s1p*/ { 1, { { 2, -1}, } }, |
152 | /* sunix_2s1p */ { 1, { { 3, -1 }, } }, |
153 | }; |
154 | |
155 | #define PCI_VENDOR_ID_SUNIX 0x1fd4 |
156 | #define PCI_DEVICE_ID_SUNIX_1999 0x1999 |
157 | |
158 | static struct pci_device_id parport_serial_pci_tbl[] = { |
159 | /* PCI cards */ |
160 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L, |
161 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l }, |
162 | { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L, |
163 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l }, |
164 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735, |
165 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
166 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745, |
167 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
168 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, |
169 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
170 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845, |
171 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, |
172 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
173 | 0x1000, 0x0020, 0, 0, netmos_9855_2p }, |
174 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
175 | 0x1000, 0x0022, 0, 0, netmos_9855_2p }, |
176 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, |
177 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 }, |
178 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
179 | 0xA000, 0x3011, 0, 0, netmos_9900 }, |
180 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
181 | 0xA000, 0x3012, 0, 0, netmos_9900 }, |
182 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, |
183 | 0xA000, 0x3020, 0, 0, netmos_9900_2p }, |
184 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912, |
185 | 0xA000, 0x2000, 0, 0, netmos_99xx_1p }, |
186 | /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ |
187 | { PCI_VENDOR_ID_AFAVLAB, 0x2110, |
188 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
189 | { PCI_VENDOR_ID_AFAVLAB, 0x2111, |
190 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
191 | { PCI_VENDOR_ID_AFAVLAB, 0x2112, |
192 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, |
193 | { PCI_VENDOR_ID_AFAVLAB, 0x2140, |
194 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
195 | { PCI_VENDOR_ID_AFAVLAB, 0x2141, |
196 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
197 | { PCI_VENDOR_ID_AFAVLAB, 0x2142, |
198 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, |
199 | { PCI_VENDOR_ID_AFAVLAB, 0x2160, |
200 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
201 | { PCI_VENDOR_ID_AFAVLAB, 0x2161, |
202 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
203 | { PCI_VENDOR_ID_AFAVLAB, 0x2162, |
204 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, |
205 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550, |
206 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
207 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650, |
208 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
209 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850, |
210 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, |
211 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550, |
212 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
213 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650, |
214 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
215 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850, |
216 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, |
217 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550, |
218 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
219 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650, |
220 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
221 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850, |
222 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, |
223 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550, |
224 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
225 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650, |
226 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, |
227 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850, |
228 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, |
229 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550, |
230 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
231 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650, |
232 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
233 | { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850, |
234 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, |
235 | /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ |
236 | { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, |
237 | { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, |
238 | { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, |
239 | { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, |
240 | { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, |
241 | { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, |
242 | { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, |
243 | { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, |
244 | { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, |
245 | { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, |
246 | { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, |
247 | { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, |
248 | { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, |
249 | { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, |
250 | { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, |
251 | { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, |
252 | { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, |
253 | { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, |
254 | |
255 | /* WCH CARDS */ |
256 | { 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p}, |
257 | |
258 | /* |
259 | * More SUNIX variations. At least one of these has part number |
260 | * '5079A but subdevice 0x102. That board reports 0x0708 as |
261 | * its PCI Class. |
262 | */ |
263 | { PCI_VENDOR_ID_SUNIX, PCI_DEVICE_ID_SUNIX_1999, PCI_VENDOR_ID_SUNIX, |
264 | 0x0102, 0, 0, sunix_2s1p }, |
265 | |
266 | { 0, } /* terminate list */ |
267 | }; |
268 | MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl); |
269 | |
270 | /* |
271 | * This table describes the serial "geometry" of these boards. Any |
272 | * quirks for these can be found in drivers/serial/8250_pci.c |
273 | * |
274 | * Cards not tested are marked n/t |
275 | * If you have one of these cards and it works for you, please tell me.. |
276 | */ |
277 | static struct pciserial_board pci_parport_serial_boards[] = { |
278 | [titan_110l] = { |
279 | .flags = FL_BASE1 | FL_BASE_BARS, |
280 | .num_ports = 1, |
281 | .base_baud = 921600, |
282 | .uart_offset = 8, |
283 | }, |
284 | [titan_210l] = { |
285 | .flags = FL_BASE1 | FL_BASE_BARS, |
286 | .num_ports = 2, |
287 | .base_baud = 921600, |
288 | .uart_offset = 8, |
289 | }, |
290 | [netmos_9xx5_combo] = { |
291 | .flags = FL_BASE0 | FL_BASE_BARS, |
292 | .num_ports = 1, |
293 | .base_baud = 115200, |
294 | .uart_offset = 8, |
295 | }, |
296 | [netmos_9855] = { |
297 | .flags = FL_BASE2 | FL_BASE_BARS, |
298 | .num_ports = 1, |
299 | .base_baud = 115200, |
300 | .uart_offset = 8, |
301 | }, |
302 | [netmos_9855_2p] = { |
303 | .flags = FL_BASE4 | FL_BASE_BARS, |
304 | .num_ports = 1, |
305 | .base_baud = 115200, |
306 | .uart_offset = 8, |
307 | }, |
308 | [netmos_9900] = { /* n/t */ |
309 | .flags = FL_BASE0 | FL_BASE_BARS, |
310 | .num_ports = 1, |
311 | .base_baud = 115200, |
312 | .uart_offset = 8, |
313 | }, |
314 | [netmos_9900_2p] = { /* parallel only */ /* n/t */ |
315 | .flags = FL_BASE0, |
316 | .num_ports = 0, |
317 | .base_baud = 115200, |
318 | .uart_offset = 8, |
319 | }, |
320 | [netmos_99xx_1p] = { /* parallel only */ /* n/t */ |
321 | .flags = FL_BASE0, |
322 | .num_ports = 0, |
323 | .base_baud = 115200, |
324 | .uart_offset = 8, |
325 | }, |
326 | [avlab_1s1p] = { /* n/t */ |
327 | .flags = FL_BASE0 | FL_BASE_BARS, |
328 | .num_ports = 1, |
329 | .base_baud = 115200, |
330 | .uart_offset = 8, |
331 | }, |
332 | [avlab_1s2p] = { /* n/t */ |
333 | .flags = FL_BASE0 | FL_BASE_BARS, |
334 | .num_ports = 1, |
335 | .base_baud = 115200, |
336 | .uart_offset = 8, |
337 | }, |
338 | [avlab_2s1p] = { /* n/t */ |
339 | .flags = FL_BASE0 | FL_BASE_BARS, |
340 | .num_ports = 2, |
341 | .base_baud = 115200, |
342 | .uart_offset = 8, |
343 | }, |
344 | [siig_1s1p_10x] = { |
345 | .flags = FL_BASE2, |
346 | .num_ports = 1, |
347 | .base_baud = 460800, |
348 | .uart_offset = 8, |
349 | }, |
350 | [siig_2s1p_10x] = { |
351 | .flags = FL_BASE2, |
352 | .num_ports = 1, |
353 | .base_baud = 921600, |
354 | .uart_offset = 8, |
355 | }, |
356 | [siig_2p1s_20x] = { |
357 | .flags = FL_BASE0, |
358 | .num_ports = 1, |
359 | .base_baud = 921600, |
360 | .uart_offset = 8, |
361 | }, |
362 | [siig_1s1p_20x] = { |
363 | .flags = FL_BASE0, |
364 | .num_ports = 1, |
365 | .base_baud = 921600, |
366 | .uart_offset = 8, |
367 | }, |
368 | [siig_2s1p_20x] = { |
369 | .flags = FL_BASE0, |
370 | .num_ports = 1, |
371 | .base_baud = 921600, |
372 | .uart_offset = 8, |
373 | }, |
374 | [timedia_4078a] = { |
375 | .flags = FL_BASE0|FL_BASE_BARS, |
376 | .num_ports = 1, |
377 | .base_baud = 921600, |
378 | .uart_offset = 8, |
379 | }, |
380 | [timedia_4079h] = { |
381 | .flags = FL_BASE0|FL_BASE_BARS, |
382 | .num_ports = 1, |
383 | .base_baud = 921600, |
384 | .uart_offset = 8, |
385 | }, |
386 | [timedia_4085h] = { |
387 | .flags = FL_BASE0|FL_BASE_BARS, |
388 | .num_ports = 1, |
389 | .base_baud = 921600, |
390 | .uart_offset = 8, |
391 | }, |
392 | [timedia_4088a] = { |
393 | .flags = FL_BASE0|FL_BASE_BARS, |
394 | .num_ports = 1, |
395 | .base_baud = 921600, |
396 | .uart_offset = 8, |
397 | }, |
398 | [timedia_4089a] = { |
399 | .flags = FL_BASE0|FL_BASE_BARS, |
400 | .num_ports = 1, |
401 | .base_baud = 921600, |
402 | .uart_offset = 8, |
403 | }, |
404 | [timedia_4095a] = { |
405 | .flags = FL_BASE0|FL_BASE_BARS, |
406 | .num_ports = 1, |
407 | .base_baud = 921600, |
408 | .uart_offset = 8, |
409 | }, |
410 | [timedia_4096a] = { |
411 | .flags = FL_BASE0|FL_BASE_BARS, |
412 | .num_ports = 1, |
413 | .base_baud = 921600, |
414 | .uart_offset = 8, |
415 | }, |
416 | [timedia_4078u] = { |
417 | .flags = FL_BASE0|FL_BASE_BARS, |
418 | .num_ports = 1, |
419 | .base_baud = 921600, |
420 | .uart_offset = 8, |
421 | }, |
422 | [timedia_4079a] = { |
423 | .flags = FL_BASE0|FL_BASE_BARS, |
424 | .num_ports = 1, |
425 | .base_baud = 921600, |
426 | .uart_offset = 8, |
427 | }, |
428 | [timedia_4085u] = { |
429 | .flags = FL_BASE0|FL_BASE_BARS, |
430 | .num_ports = 1, |
431 | .base_baud = 921600, |
432 | .uart_offset = 8, |
433 | }, |
434 | [timedia_4079r] = { |
435 | .flags = FL_BASE0|FL_BASE_BARS, |
436 | .num_ports = 1, |
437 | .base_baud = 921600, |
438 | .uart_offset = 8, |
439 | }, |
440 | [timedia_4079s] = { |
441 | .flags = FL_BASE0|FL_BASE_BARS, |
442 | .num_ports = 1, |
443 | .base_baud = 921600, |
444 | .uart_offset = 8, |
445 | }, |
446 | [timedia_4079d] = { |
447 | .flags = FL_BASE0|FL_BASE_BARS, |
448 | .num_ports = 1, |
449 | .base_baud = 921600, |
450 | .uart_offset = 8, |
451 | }, |
452 | [timedia_4079e] = { |
453 | .flags = FL_BASE0|FL_BASE_BARS, |
454 | .num_ports = 1, |
455 | .base_baud = 921600, |
456 | .uart_offset = 8, |
457 | }, |
458 | [timedia_4079f] = { |
459 | .flags = FL_BASE0|FL_BASE_BARS, |
460 | .num_ports = 1, |
461 | .base_baud = 921600, |
462 | .uart_offset = 8, |
463 | }, |
464 | [timedia_9079a] = { |
465 | .flags = FL_BASE0|FL_BASE_BARS, |
466 | .num_ports = 1, |
467 | .base_baud = 921600, |
468 | .uart_offset = 8, |
469 | }, |
470 | [timedia_9079b] = { |
471 | .flags = FL_BASE0|FL_BASE_BARS, |
472 | .num_ports = 1, |
473 | .base_baud = 921600, |
474 | .uart_offset = 8, |
475 | }, |
476 | [timedia_9079c] = { |
477 | .flags = FL_BASE0|FL_BASE_BARS, |
478 | .num_ports = 1, |
479 | .base_baud = 921600, |
480 | .uart_offset = 8, |
481 | }, |
482 | [wch_ch353_2s1p] = { |
483 | .flags = FL_BASE0|FL_BASE_BARS, |
484 | .num_ports = 2, |
485 | .base_baud = 115200, |
486 | .uart_offset = 8, |
487 | }, |
488 | [sunix_2s1p] = { |
489 | .flags = FL_BASE0|FL_BASE_BARS, |
490 | .num_ports = 2, |
491 | .base_baud = 921600, |
492 | .uart_offset = 8, |
493 | }, |
494 | }; |
495 | |
496 | struct parport_serial_private { |
497 | struct serial_private *serial; |
498 | int num_par; |
499 | struct parport *port[PARPORT_MAX]; |
500 | struct parport_pc_pci par; |
501 | }; |
502 | |
503 | /* Register the serial port(s) of a PCI card. */ |
504 | static int serial_register(struct pci_dev *dev, const struct pci_device_id *id) |
505 | { |
506 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
507 | struct pciserial_board *board; |
508 | struct serial_private *serial; |
509 | |
510 | board = &pci_parport_serial_boards[id->driver_data]; |
511 | |
512 | if (board->num_ports == 0) |
513 | return 0; |
514 | |
515 | serial = pciserial_init_ports(dev, board); |
516 | |
517 | if (IS_ERR(serial)) |
518 | return PTR_ERR(serial); |
519 | |
520 | priv->serial = serial; |
521 | return 0; |
522 | } |
523 | |
524 | /* Register the parallel port(s) of a PCI card. */ |
525 | static int parport_register(struct pci_dev *dev, const struct pci_device_id *id) |
526 | { |
527 | struct parport_pc_pci *card; |
528 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
529 | int n, success = 0; |
530 | |
531 | priv->par = cards[id->driver_data]; |
532 | card = &priv->par; |
533 | if (card->preinit_hook && |
534 | card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) |
535 | return -ENODEV; |
536 | |
537 | for (n = 0; n < card->numports; n++) { |
538 | struct parport *port; |
539 | int lo = card->addr[n].lo; |
540 | int hi = card->addr[n].hi; |
541 | unsigned long io_lo, io_hi; |
542 | int irq; |
543 | |
544 | if (priv->num_par == ARRAY_SIZE (priv->port)) { |
545 | printk (KERN_WARNING |
546 | "parport_serial: %s: only %zu parallel ports " |
547 | "supported (%d reported)\n", pci_name (dev), |
548 | ARRAY_SIZE(priv->port), card->numports); |
549 | break; |
550 | } |
551 | |
552 | io_lo = pci_resource_start (dev, lo); |
553 | io_hi = 0; |
554 | if ((hi >= 0) && (hi <= 6)) |
555 | io_hi = pci_resource_start (dev, hi); |
556 | else if (hi > 6) |
557 | io_lo += hi; /* Reinterpret the meaning of |
558 | "hi" as an offset (see SYBA |
559 | def.) */ |
560 | /* TODO: test if sharing interrupts works */ |
561 | irq = dev->irq; |
562 | if (irq == IRQ_NONE) { |
563 | dev_dbg(&dev->dev, |
564 | "PCI parallel port detected: I/O at %#lx(%#lx)\n", |
565 | io_lo, io_hi); |
566 | irq = PARPORT_IRQ_NONE; |
567 | } else { |
568 | dev_dbg(&dev->dev, |
569 | "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n", |
570 | io_lo, io_hi, irq); |
571 | } |
572 | port = parport_pc_probe_port (io_lo, io_hi, irq, |
573 | PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED); |
574 | if (port) { |
575 | priv->port[priv->num_par++] = port; |
576 | success = 1; |
577 | } |
578 | } |
579 | |
580 | if (card->postinit_hook) |
581 | card->postinit_hook (dev, card, !success); |
582 | |
583 | return 0; |
584 | } |
585 | |
586 | static int parport_serial_pci_probe(struct pci_dev *dev, |
587 | const struct pci_device_id *id) |
588 | { |
589 | struct parport_serial_private *priv; |
590 | int err; |
591 | |
592 | priv = kzalloc (sizeof *priv, GFP_KERNEL); |
593 | if (!priv) |
594 | return -ENOMEM; |
595 | pci_set_drvdata (dev, priv); |
596 | |
597 | err = pci_enable_device (dev); |
598 | if (err) { |
599 | pci_set_drvdata (dev, NULL); |
600 | kfree (priv); |
601 | return err; |
602 | } |
603 | |
604 | if (parport_register (dev, id)) { |
605 | pci_set_drvdata (dev, NULL); |
606 | kfree (priv); |
607 | return -ENODEV; |
608 | } |
609 | |
610 | if (serial_register (dev, id)) { |
611 | int i; |
612 | for (i = 0; i < priv->num_par; i++) |
613 | parport_pc_unregister_port (priv->port[i]); |
614 | pci_set_drvdata (dev, NULL); |
615 | kfree (priv); |
616 | return -ENODEV; |
617 | } |
618 | |
619 | return 0; |
620 | } |
621 | |
622 | static void parport_serial_pci_remove(struct pci_dev *dev) |
623 | { |
624 | struct parport_serial_private *priv = pci_get_drvdata (dev); |
625 | int i; |
626 | |
627 | pci_set_drvdata(dev, NULL); |
628 | |
629 | // Serial ports |
630 | if (priv->serial) |
631 | pciserial_remove_ports(priv->serial); |
632 | |
633 | // Parallel ports |
634 | for (i = 0; i < priv->num_par; i++) |
635 | parport_pc_unregister_port (priv->port[i]); |
636 | |
637 | kfree (priv); |
638 | return; |
639 | } |
640 | |
641 | #ifdef CONFIG_PM |
642 | static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state) |
643 | { |
644 | struct parport_serial_private *priv = pci_get_drvdata(dev); |
645 | |
646 | if (priv->serial) |
647 | pciserial_suspend_ports(priv->serial); |
648 | |
649 | /* FIXME: What about parport? */ |
650 | |
651 | pci_save_state(dev); |
652 | pci_set_power_state(dev, pci_choose_state(dev, state)); |
653 | return 0; |
654 | } |
655 | |
656 | static int parport_serial_pci_resume(struct pci_dev *dev) |
657 | { |
658 | struct parport_serial_private *priv = pci_get_drvdata(dev); |
659 | int err; |
660 | |
661 | pci_set_power_state(dev, PCI_D0); |
662 | pci_restore_state(dev); |
663 | |
664 | /* |
665 | * The device may have been disabled. Re-enable it. |
666 | */ |
667 | err = pci_enable_device(dev); |
668 | if (err) { |
669 | printk(KERN_ERR "parport_serial: %s: error enabling " |
670 | "device for resume (%d)\n", pci_name(dev), err); |
671 | return err; |
672 | } |
673 | |
674 | if (priv->serial) |
675 | pciserial_resume_ports(priv->serial); |
676 | |
677 | /* FIXME: What about parport? */ |
678 | |
679 | return 0; |
680 | } |
681 | #endif |
682 | |
683 | static struct pci_driver parport_serial_pci_driver = { |
684 | .name = "parport_serial", |
685 | .id_table = parport_serial_pci_tbl, |
686 | .probe = parport_serial_pci_probe, |
687 | .remove = parport_serial_pci_remove, |
688 | #ifdef CONFIG_PM |
689 | .suspend = parport_serial_pci_suspend, |
690 | .resume = parport_serial_pci_resume, |
691 | #endif |
692 | }; |
693 | |
694 | |
695 | static int __init parport_serial_init (void) |
696 | { |
697 | return pci_register_driver (&parport_serial_pci_driver); |
698 | } |
699 | |
700 | static void __exit parport_serial_exit (void) |
701 | { |
702 | pci_unregister_driver (&parport_serial_pci_driver); |
703 | return; |
704 | } |
705 | |
706 | MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>"); |
707 | MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards"); |
708 | MODULE_LICENSE("GPL"); |
709 | |
710 | module_init(parport_serial_init); |
711 | module_exit(parport_serial_exit); |
712 |
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