Root/drivers/tty/serial/arc_uart.c

1/*
2 * ARC On-Chip(fpga) UART Driver
3 *
4 * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * vineetg: July 10th 2012
11 * -Decoupled the driver from arch/arc
12 * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
13 * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
14 *
15 * Vineetg: Aug 21st 2010
16 * -Is uart_tx_stopped() not done in tty write path as it has already been
17 * taken care of, in serial core
18 *
19 * Vineetg: Aug 18th 2010
20 * -New Serial Core based ARC UART driver
21 * -Derived largely from blackfin driver albiet with some major tweaks
22 *
23 * TODO:
24 * -check if sysreq works
25 */
26
27#if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28#define SUPPORT_SYSRQ
29#endif
30
31#include <linux/module.h>
32#include <linux/serial.h>
33#include <linux/console.h>
34#include <linux/sysrq.h>
35#include <linux/platform_device.h>
36#include <linux/tty.h>
37#include <linux/tty_flip.h>
38#include <linux/serial_core.h>
39#include <linux/io.h>
40#include <linux/of.h>
41#include <linux/of_platform.h>
42
43/*************************************
44 * ARC UART Hardware Specs
45 ************************************/
46#define ARC_UART_TX_FIFO_SIZE 1
47
48/*
49 * UART Register set (this is not a Standards Compliant IP)
50 * Also each reg is Word aligned, but only 8 bits wide
51 */
52#define R_ID0 0
53#define R_ID1 4
54#define R_ID2 8
55#define R_ID3 12
56#define R_DATA 16
57#define R_STS 20
58#define R_BAUDL 24
59#define R_BAUDH 28
60
61/* Bits for UART Status Reg (R/W) */
62#define RXIENB 0x04 /* Receive Interrupt Enable */
63#define TXIENB 0x40 /* Transmit Interrupt Enable */
64
65#define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
66#define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
67
68#define RXFULL 0x08 /* Receive FIFO full */
69#define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
70
71#define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
72#define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
73
74/* Uart bit fiddling helpers: lowest level */
75#define RBASE(uart, reg) (uart->port.membase + reg)
76#define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
77#define UART_REG_GET(u, r) readb(RBASE(u, r))
78
79#define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
80#define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
81
82/* Uart bit fiddling helpers: API level */
83#define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
84#define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
85
86#define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
87#define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
88
89#define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
90#define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
91
92#define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
93#define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
94#define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
95
96#define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
97#define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
98#define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
99
100#define ARC_SERIAL_DEV_NAME "ttyARC"
101
102struct arc_uart_port {
103    struct uart_port port;
104    unsigned long baud;
105    int is_emulated; /* H/w vs. Instruction Set Simulator */
106};
107
108#define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
109
110static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
111
112#ifdef CONFIG_SERIAL_ARC_CONSOLE
113static struct console arc_console;
114#endif
115
116#define DRIVER_NAME "arc-uart"
117
118static struct uart_driver arc_uart_driver = {
119    .owner = THIS_MODULE,
120    .driver_name = DRIVER_NAME,
121    .dev_name = ARC_SERIAL_DEV_NAME,
122    .major = 0,
123    .minor = 0,
124    .nr = CONFIG_SERIAL_ARC_NR_PORTS,
125#ifdef CONFIG_SERIAL_ARC_CONSOLE
126    .cons = &arc_console,
127#endif
128};
129
130static void arc_serial_stop_rx(struct uart_port *port)
131{
132    struct arc_uart_port *uart = to_arc_port(port);
133
134    UART_RX_IRQ_DISABLE(uart);
135}
136
137static void arc_serial_stop_tx(struct uart_port *port)
138{
139    struct arc_uart_port *uart = to_arc_port(port);
140
141    while (!(UART_GET_STATUS(uart) & TXEMPTY))
142        cpu_relax();
143
144    UART_TX_IRQ_DISABLE(uart);
145}
146
147/*
148 * Return TIOCSER_TEMT when transmitter is not busy.
149 */
150static unsigned int arc_serial_tx_empty(struct uart_port *port)
151{
152    struct arc_uart_port *uart = to_arc_port(port);
153    unsigned int stat;
154
155    stat = UART_GET_STATUS(uart);
156    if (stat & TXEMPTY)
157        return TIOCSER_TEMT;
158
159    return 0;
160}
161
162/*
163 * Driver internal routine, used by both tty(serial core) as well as tx-isr
164 * -Called under spinlock in either cases
165 * -also tty->stopped / tty->hw_stopped has already been checked
166 * = by uart_start( ) before calling us
167 * = tx_ist checks that too before calling
168 */
169static void arc_serial_tx_chars(struct arc_uart_port *uart)
170{
171    struct circ_buf *xmit = &uart->port.state->xmit;
172    int sent = 0;
173    unsigned char ch;
174
175    if (unlikely(uart->port.x_char)) {
176        UART_SET_DATA(uart, uart->port.x_char);
177        uart->port.icount.tx++;
178        uart->port.x_char = 0;
179        sent = 1;
180    } else if (xmit->tail != xmit->head) { /* TODO: uart_circ_empty */
181        ch = xmit->buf[xmit->tail];
182        xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
183        uart->port.icount.tx++;
184        while (!(UART_GET_STATUS(uart) & TXEMPTY))
185            cpu_relax();
186        UART_SET_DATA(uart, ch);
187        sent = 1;
188    }
189
190    /*
191     * If num chars in xmit buffer are too few, ask tty layer for more.
192     * By Hard ISR to schedule processing in software interrupt part
193     */
194    if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
195        uart_write_wakeup(&uart->port);
196
197    if (sent)
198        UART_TX_IRQ_ENABLE(uart);
199}
200
201/*
202 * port is locked and interrupts are disabled
203 * uart_start( ) calls us under the port spinlock irqsave
204 */
205static void arc_serial_start_tx(struct uart_port *port)
206{
207    struct arc_uart_port *uart = to_arc_port(port);
208
209    arc_serial_tx_chars(uart);
210}
211
212static void arc_serial_rx_chars(struct arc_uart_port *uart)
213{
214    unsigned int status, ch, flg = 0;
215
216    /*
217     * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
218     * is very subtle. Here's how ...
219     * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
220     * driver reads the DATA Reg and keeps doing that in a loop, until
221     * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
222     * before RX-EMPTY=0, implies some sort of buffering going on in the
223     * controller, which is indeed the Rx-FIFO.
224     */
225    while (!((status = UART_GET_STATUS(uart)) & RXEMPTY)) {
226
227        ch = UART_GET_DATA(uart);
228        uart->port.icount.rx++;
229
230        if (unlikely(status & (RXOERR | RXFERR))) {
231            if (status & RXOERR) {
232                uart->port.icount.overrun++;
233                flg = TTY_OVERRUN;
234                UART_CLR_STATUS(uart, RXOERR);
235            }
236
237            if (status & RXFERR) {
238                uart->port.icount.frame++;
239                flg = TTY_FRAME;
240                UART_CLR_STATUS(uart, RXFERR);
241            }
242        } else
243            flg = TTY_NORMAL;
244
245        if (unlikely(uart_handle_sysrq_char(&uart->port, ch)))
246            goto done;
247
248        uart_insert_char(&uart->port, status, RXOERR, ch, flg);
249
250done:
251        tty_flip_buffer_push(&uart->port.state->port);
252    }
253}
254
255/*
256 * A note on the Interrupt handling state machine of this driver
257 *
258 * kernel printk writes funnel thru the console driver framework and in order
259 * to keep things simple as well as efficient, it writes to UART in polled
260 * mode, in one shot, and exits.
261 *
262 * OTOH, Userland output (via tty layer), uses interrupt based writes as there
263 * can be undeterministic delay between char writes.
264 *
265 * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
266 * disabled.
267 *
268 * When tty has some data to send out, serial core calls driver's start_tx
269 * which
270 * -checks-if-tty-buffer-has-char-to-send
271 * -writes-data-to-uart
272 * -enable-tx-intr
273 *
274 * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
275 * The first thing Tx ISR does is disable further Tx interrupts (as this could
276 * be the last char to send, before settling down into the quiet polled mode).
277 * It then calls the exact routine used by tty layer write to send out any
278 * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
279 * of no data, it remains disabled.
280 * This is how the transmit state machine is dynamically switched on/off
281 */
282
283static irqreturn_t arc_serial_isr(int irq, void *dev_id)
284{
285    struct arc_uart_port *uart = dev_id;
286    unsigned int status;
287
288    status = UART_GET_STATUS(uart);
289
290    /*
291     * Single IRQ for both Rx (data available) Tx (room available) Interrupt
292     * notifications from the UART Controller.
293     * To demultiplex between the two, we check the relevant bits
294     */
295    if ((status & RXIENB) && !(status & RXEMPTY)) {
296
297        /* already in ISR, no need of xx_irqsave */
298        spin_lock(&uart->port.lock);
299        arc_serial_rx_chars(uart);
300        spin_unlock(&uart->port.lock);
301    }
302
303    if ((status & TXIENB) && (status & TXEMPTY)) {
304
305        /* Unconditionally disable further Tx-Interrupts.
306         * will be enabled by tx_chars() if needed.
307         */
308        UART_TX_IRQ_DISABLE(uart);
309
310        spin_lock(&uart->port.lock);
311
312        if (!uart_tx_stopped(&uart->port))
313            arc_serial_tx_chars(uart);
314
315        spin_unlock(&uart->port.lock);
316    }
317
318    return IRQ_HANDLED;
319}
320
321static unsigned int arc_serial_get_mctrl(struct uart_port *port)
322{
323    /*
324     * Pretend we have a Modem status reg and following bits are
325     * always set, to satify the serial core state machine
326     * (DSR) Data Set Ready
327     * (CTS) Clear To Send
328     * (CAR) Carrier Detect
329     */
330    return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
331}
332
333static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
334{
335    /* MCR not present */
336}
337
338/* Enable Modem Status Interrupts */
339
340static void arc_serial_enable_ms(struct uart_port *port)
341{
342    /* MSR not present */
343}
344
345static void arc_serial_break_ctl(struct uart_port *port, int break_state)
346{
347    /* ARC UART doesn't support sending Break signal */
348}
349
350static int arc_serial_startup(struct uart_port *port)
351{
352    struct arc_uart_port *uart = to_arc_port(port);
353
354    /* Before we hook up the ISR, Disable all UART Interrupts */
355    UART_ALL_IRQ_DISABLE(uart);
356
357    if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx",
358            uart)) {
359        dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n");
360        return -EBUSY;
361    }
362
363    UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */
364
365    return 0;
366}
367
368/* This is not really needed */
369static void arc_serial_shutdown(struct uart_port *port)
370{
371    struct arc_uart_port *uart = to_arc_port(port);
372    free_irq(uart->port.irq, uart);
373}
374
375static void
376arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
377               struct ktermios *old)
378{
379    struct arc_uart_port *uart = to_arc_port(port);
380    unsigned int baud, uartl, uarth, hw_val;
381    unsigned long flags;
382
383    /*
384     * Use the generic handler so that any specially encoded baud rates
385     * such as SPD_xx flags or "%B0" can be handled
386     * Max Baud I suppose will not be more than current 115K * 4
387     * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
388     * spread over two 8-bit registers
389     */
390    baud = uart_get_baud_rate(port, new, old, 0, 460800);
391
392    hw_val = port->uartclk / (uart->baud * 4) - 1;
393    uartl = hw_val & 0xFF;
394    uarth = (hw_val >> 8) & 0xFF;
395
396    /*
397     * UART ISS(Instruction Set simulator) emulation has a subtle bug:
398     * A existing value of Baudh = 0 is used as a indication to startup
399     * it's internal state machine.
400     * Thus if baudh is set to 0, 2 times, it chokes.
401     * This happens with BAUD=115200 and the formaula above
402     * Until that is fixed, when running on ISS, we will set baudh to !0
403     */
404    if (uart->is_emulated)
405        uarth = 1;
406
407    spin_lock_irqsave(&port->lock, flags);
408
409    UART_ALL_IRQ_DISABLE(uart);
410
411    UART_SET_BAUDL(uart, uartl);
412    UART_SET_BAUDH(uart, uarth);
413
414    UART_RX_IRQ_ENABLE(uart);
415
416    /*
417     * UART doesn't support Parity/Hardware Flow Control;
418     * Only supports 8N1 character size
419     */
420    new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
421    new->c_cflag |= CS8;
422
423    if (old)
424        tty_termios_copy_hw(new, old);
425
426    /* Don't rewrite B0 */
427    if (tty_termios_baud_rate(new))
428        tty_termios_encode_baud_rate(new, baud, baud);
429
430    uart_update_timeout(port, new->c_cflag, baud);
431
432    spin_unlock_irqrestore(&port->lock, flags);
433}
434
435static const char *arc_serial_type(struct uart_port *port)
436{
437    struct arc_uart_port *uart = to_arc_port(port);
438
439    return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL;
440}
441
442static void arc_serial_release_port(struct uart_port *port)
443{
444}
445
446static int arc_serial_request_port(struct uart_port *port)
447{
448    return 0;
449}
450
451/*
452 * Verify the new serial_struct (for TIOCSSERIAL).
453 */
454static int
455arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
456{
457    if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
458        return -EINVAL;
459
460    return 0;
461}
462
463/*
464 * Configure/autoconfigure the port.
465 */
466static void arc_serial_config_port(struct uart_port *port, int flags)
467{
468    struct arc_uart_port *uart = to_arc_port(port);
469
470    if (flags & UART_CONFIG_TYPE)
471        uart->port.type = PORT_ARC;
472}
473
474#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE)
475
476static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
477{
478    struct arc_uart_port *uart = to_arc_port(port);
479
480    while (!(UART_GET_STATUS(uart) & TXEMPTY))
481        cpu_relax();
482
483    UART_SET_DATA(uart, chr);
484}
485#endif
486
487#ifdef CONFIG_CONSOLE_POLL
488static int arc_serial_poll_getchar(struct uart_port *port)
489{
490    struct arc_uart_port *uart = to_arc_port(port);
491    unsigned char chr;
492
493    while (!(UART_GET_STATUS(uart) & RXEMPTY))
494        cpu_relax();
495
496    chr = UART_GET_DATA(uart);
497    return chr;
498}
499#endif
500
501static struct uart_ops arc_serial_pops = {
502    .tx_empty = arc_serial_tx_empty,
503    .set_mctrl = arc_serial_set_mctrl,
504    .get_mctrl = arc_serial_get_mctrl,
505    .stop_tx = arc_serial_stop_tx,
506    .start_tx = arc_serial_start_tx,
507    .stop_rx = arc_serial_stop_rx,
508    .enable_ms = arc_serial_enable_ms,
509    .break_ctl = arc_serial_break_ctl,
510    .startup = arc_serial_startup,
511    .shutdown = arc_serial_shutdown,
512    .set_termios = arc_serial_set_termios,
513    .type = arc_serial_type,
514    .release_port = arc_serial_release_port,
515    .request_port = arc_serial_request_port,
516    .config_port = arc_serial_config_port,
517    .verify_port = arc_serial_verify_port,
518#ifdef CONFIG_CONSOLE_POLL
519    .poll_put_char = arc_serial_poll_putchar,
520    .poll_get_char = arc_serial_poll_getchar,
521#endif
522};
523
524static int
525arc_uart_init_one(struct platform_device *pdev, int dev_id)
526{
527    struct resource *res, *res2;
528    unsigned long *plat_data;
529    struct arc_uart_port *uart = &arc_uart_ports[dev_id];
530
531    plat_data = ((unsigned long *)(pdev->dev.platform_data));
532    if (!plat_data)
533        return -ENODEV;
534
535    uart->is_emulated = !!plat_data[0]; /* workaround ISS bug */
536
537    if (is_early_platform_device(pdev)) {
538        uart->port.uartclk = plat_data[1];
539        uart->baud = plat_data[2];
540    } else {
541        struct device_node *np = pdev->dev.of_node;
542        u32 val;
543
544        if (of_property_read_u32(np, "clock-frequency", &val)) {
545            dev_err(&pdev->dev, "clock-frequency property NOTset\n");
546            return -EINVAL;
547        }
548        uart->port.uartclk = val;
549
550        if (of_property_read_u32(np, "current-speed", &val)) {
551            dev_err(&pdev->dev, "current-speed property NOT set\n");
552            return -EINVAL;
553        }
554        uart->baud = val;
555    }
556
557    res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
558    if (!res)
559        return -ENODEV;
560
561    res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
562    if (!res2)
563        return -ENODEV;
564
565    uart->port.mapbase = res->start;
566    uart->port.membase = ioremap_nocache(res->start, resource_size(res));
567    if (!uart->port.membase)
568        /* No point of dev_err since UART itself is hosed here */
569        return -ENXIO;
570
571    uart->port.irq = res2->start;
572    uart->port.dev = &pdev->dev;
573    uart->port.iotype = UPIO_MEM;
574    uart->port.flags = UPF_BOOT_AUTOCONF;
575    uart->port.line = dev_id;
576    uart->port.ops = &arc_serial_pops;
577
578    uart->port.fifosize = ARC_UART_TX_FIFO_SIZE;
579
580    /*
581     * uart_insert_char( ) uses it in decideding whether to ignore a
582     * char or not. Explicitly setting it here, removes the subtelty
583     */
584    uart->port.ignore_status_mask = 0;
585
586    return 0;
587}
588
589#ifdef CONFIG_SERIAL_ARC_CONSOLE
590
591static int arc_serial_console_setup(struct console *co, char *options)
592{
593    struct uart_port *port;
594    int baud = 115200;
595    int bits = 8;
596    int parity = 'n';
597    int flow = 'n';
598
599    if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
600        return -ENODEV;
601
602    /*
603     * The uart port backing the console (e.g. ttyARC1) might not have been
604     * init yet. If so, defer the console setup to after the port.
605     */
606    port = &arc_uart_ports[co->index].port;
607    if (!port->membase)
608        return -ENODEV;
609
610    if (options)
611        uart_parse_options(options, &baud, &parity, &bits, &flow);
612
613    /*
614     * Serial core will call port->ops->set_termios( )
615     * which will set the baud reg
616     */
617    return uart_set_options(port, co, baud, parity, bits, flow);
618}
619
620static void arc_serial_console_putchar(struct uart_port *port, int ch)
621{
622    arc_serial_poll_putchar(port, (unsigned char)ch);
623}
624
625/*
626 * Interrupts are disabled on entering
627 */
628static void arc_serial_console_write(struct console *co, const char *s,
629                     unsigned int count)
630{
631    struct uart_port *port = &arc_uart_ports[co->index].port;
632    unsigned long flags;
633
634    spin_lock_irqsave(&port->lock, flags);
635    uart_console_write(port, s, count, arc_serial_console_putchar);
636    spin_unlock_irqrestore(&port->lock, flags);
637}
638
639static struct console arc_console = {
640    .name = ARC_SERIAL_DEV_NAME,
641    .write = arc_serial_console_write,
642    .device = uart_console_device,
643    .setup = arc_serial_console_setup,
644    .flags = CON_PRINTBUFFER,
645    .index = -1,
646    .data = &arc_uart_driver
647};
648
649static __init void early_serial_write(struct console *con, const char *s,
650                    unsigned int n)
651{
652    struct uart_port *port = &arc_uart_ports[con->index].port;
653    unsigned int i;
654
655    for (i = 0; i < n; i++, s++) {
656        if (*s == '\n')
657            arc_serial_poll_putchar(port, '\r');
658        arc_serial_poll_putchar(port, *s);
659    }
660}
661
662static struct console arc_early_serial_console __initdata = {
663    .name = "early_ARCuart",
664    .write = early_serial_write,
665    .flags = CON_PRINTBUFFER | CON_BOOT,
666    .index = -1
667};
668
669static int __init arc_serial_probe_earlyprintk(struct platform_device *pdev)
670{
671    int dev_id = pdev->id < 0 ? 0 : pdev->id;
672    int rc;
673
674    arc_early_serial_console.index = dev_id;
675
676    rc = arc_uart_init_one(pdev, dev_id);
677    if (rc)
678        panic("early console init failed\n");
679
680    arc_serial_console_setup(&arc_early_serial_console, NULL);
681
682    register_console(&arc_early_serial_console);
683    return 0;
684}
685#endif /* CONFIG_SERIAL_ARC_CONSOLE */
686
687static int arc_serial_probe(struct platform_device *pdev)
688{
689    int rc, dev_id;
690    struct device_node *np = pdev->dev.of_node;
691
692    /* no device tree device */
693    if (!np)
694        return -ENODEV;
695
696    dev_id = of_alias_get_id(np, "serial");
697    if (dev_id < 0)
698        dev_id = 0;
699
700    rc = arc_uart_init_one(pdev, dev_id);
701    if (rc)
702        return rc;
703
704    rc = uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port);
705    return rc;
706}
707
708static int arc_serial_remove(struct platform_device *pdev)
709{
710    /* This will never be called */
711    return 0;
712}
713
714static const struct of_device_id arc_uart_dt_ids[] = {
715    { .compatible = "snps,arc-uart" },
716    { /* Sentinel */ }
717};
718MODULE_DEVICE_TABLE(of, arc_uart_dt_ids);
719
720static struct platform_driver arc_platform_driver = {
721    .probe = arc_serial_probe,
722    .remove = arc_serial_remove,
723    .driver = {
724        .name = DRIVER_NAME,
725        .owner = THIS_MODULE,
726        .of_match_table = arc_uart_dt_ids,
727     },
728};
729
730#ifdef CONFIG_SERIAL_ARC_CONSOLE
731
732static struct platform_driver early_arc_platform_driver __initdata = {
733    .probe = arc_serial_probe_earlyprintk,
734    .remove = arc_serial_remove,
735    .driver = {
736        .name = DRIVER_NAME,
737        .owner = THIS_MODULE,
738     },
739};
740/*
741 * Register an early platform driver of "earlyprintk" class.
742 * ARCH platform code installs the driver and probes the early devices
743 * The installation could rely on user specifying earlyprintk=xyx in cmd line
744 * or it could be done independently, for all "earlyprintk" class drivers.
745 * [see arch/arc/plat-arcfpga/platform.c]
746 */
747early_platform_init("earlyprintk", &early_arc_platform_driver);
748
749#endif /* CONFIG_SERIAL_ARC_CONSOLE */
750
751static int __init arc_serial_init(void)
752{
753    int ret;
754
755    ret = uart_register_driver(&arc_uart_driver);
756    if (ret)
757        return ret;
758
759    ret = platform_driver_register(&arc_platform_driver);
760    if (ret)
761        uart_unregister_driver(&arc_uart_driver);
762
763    return ret;
764}
765
766static void __exit arc_serial_exit(void)
767{
768    platform_driver_unregister(&arc_platform_driver);
769    uart_unregister_driver(&arc_uart_driver);
770}
771
772module_init(arc_serial_init);
773module_exit(arc_serial_exit);
774
775MODULE_LICENSE("GPL");
776MODULE_ALIAS("plat-arcfpga/uart");
777MODULE_AUTHOR("Vineet Gupta");
778MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");
779

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