Root/Documentation/scsi/aic7xxx.txt

1====================================================================
2= Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0 =
3= README for =
4= The Linux Operating System =
5====================================================================
6
7The following information is available in this file:
8
9  1. Supported Hardware
10  2. Version History
11  3. Command Line Options
12  4. Contacting Adaptec
13
141. Supported Hardware
15
16   The following Adaptec SCSI Chips and Host Adapters are supported by
17   the aic7xxx driver.
18
19   Chip MIPS Host Bus MaxSync MaxWidth SCBs Notes
20   ---------------------------------------------------------------
21   aic7770 10 EISA/VL 10MHz 16Bit 4 1
22   aic7850 10 PCI/32 10MHz 8Bit 3
23   aic7855 10 PCI/32 10MHz 8Bit 3
24   aic7856 10 PCI/32 10MHz 8Bit 3
25   aic7859 10 PCI/32 20MHz 8Bit 3
26   aic7860 10 PCI/32 20MHz 8Bit 3
27   aic7870 10 PCI/32 10MHz 16Bit 16
28   aic7880 10 PCI/32 20MHz 16Bit 16
29   aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
30   aic7891 20 PCI/64 40MHz 16Bit 16 3 4 5 6 7 8
31   aic7892 20 PCI/64-66 80MHz 16Bit 16 3 4 5 6 7 8
32   aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5
33   aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8
34   aic7896 20 PCI/32 40MHz 16Bit 16 2 3 4 5 6 7 8
35   aic7897 20 PCI/64 40MHz 16Bit 16 2 3 4 5 6 7 8
36   aic7899 20 PCI/64-66 80MHz 16Bit 16 2 3 4 5 6 7 8
37
38   1. Multiplexed Twin Channel Device - One controller servicing two
39        busses.
40   2. Multi-function Twin Channel Device - Two controllers on one chip.
41   3. Command Channel Secondary DMA Engine - Allows scatter gather list
42        and SCB prefetch.
43   4. 64 Byte SCB Support - Allows disconnected, untagged request table
44        for all possible target/lun combinations.
45   5. Block Move Instruction Support - Doubles the speed of certain
46        sequencer operations.
47   6. `Bayonet' style Scatter Gather Engine - Improves S/G prefetch
48        performance.
49   7. Queuing Registers - Allows queuing of new transactions without
50        pausing the sequencer.
51   8. Multiple Target IDs - Allows the controller to respond to selection
52        as a target on multiple SCSI IDs.
53
54   Controller Chip Host-Bus Int-Connectors Ext-Connectors Notes
55   --------------------------------------------------------------------------
56   AHA-274X[A] aic7770 EISA SE-50M SE-HD50F
57   AHA-274X[A]W aic7770 EISA SE-HD68F SE-HD68F
58                                         SE-50M
59   AHA-274X[A]T aic7770 EISA 2 X SE-50M SE-HD50F
60   AHA-2842 aic7770 VL SE-50M SE-HD50F
61   AHA-2940AU aic7860 PCI/32 SE-50M SE-HD50F
62   AVA-2902I aic7860 PCI/32 SE-50M
63   AVA-2902E aic7860 PCI/32 SE-50M
64   AVA-2906 aic7856 PCI/32 SE-50M SE-DB25F
65   APC-7850 aic7850 PCI/32 SE-50M 1
66   AVA-2940 aic7860 PCI/32 SE-50M
67   AHA-2920B aic7860 PCI/32 SE-50M
68   AHA-2930B aic7860 PCI/32 SE-50M
69   AHA-2920C aic7856 PCI/32 SE-50M SE-HD50F
70   AHA-2930C aic7860 PCI/32 SE-50M
71   AHA-2930C aic7860 PCI/32 SE-50M
72   AHA-2910C aic7860 PCI/32 SE-50M
73   AHA-2915C aic7860 PCI/32 SE-50M
74   AHA-2940AU/CN aic7860 PCI/32 SE-50M SE-HD50F
75   AHA-2944W aic7870 PCI/32 HVD-HD68F HVD-HD68F
76                                        HVD-50M
77   AHA-3940W aic7870 PCI/32 2 X SE-HD68F SE-HD68F 2
78   AHA-2940UW aic7880 PCI/32 SE-HD68F
79                                         SE-50M SE-HD68F
80   AHA-2940U aic7880 PCI/32 SE-50M SE-HD50F
81   AHA-2940D aic7880 PCI/32
82   aHA-2940 A/T aic7880 PCI/32
83   AHA-2940D A/T aic7880 PCI/32
84   AHA-3940UW aic7880 PCI/32 2 X SE-HD68F SE-HD68F 3
85   AHA-3940UWD aic7880 PCI/32 2 X SE-HD68F 2 X SE-VHD68F 3
86   AHA-3940U aic7880 PCI/32 2 X SE-50M SE-HD50F 3
87   AHA-2944UW aic7880 PCI/32 HVD-HD68F HVD-HD68F
88                                         HVD-50M
89   AHA-3944UWD aic7880 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F 3
90   AHA-4944UW aic7880 PCI/32
91   AHA-2930UW aic7880 PCI/32
92   AHA-2940UW Pro aic7880 PCI/32 SE-HD68F SE-HD68F 4
93                                         SE-50M
94   AHA-2940UW/CN aic7880 PCI/32
95   AHA-2940UDual aic7895 PCI/32
96   AHA-2940UWDual aic7895 PCI/32
97   AHA-3940UWD aic7895 PCI/32
98   AHA-3940AUW aic7895 PCI/32
99   AHA-3940AUWD aic7895 PCI/32
100   AHA-3940AU aic7895 PCI/32
101   AHA-3944AUWD aic7895 PCI/32 2 X HVD-HD68F 2 X HVD-VHD68F
102   AHA-2940U2B aic7890 PCI/32 LVD-HD68F LVD-HD68F
103   AHA-2940U2 OEM aic7891 PCI/64
104   AHA-2940U2W aic7890 PCI/32 LVD-HD68F LVD-HD68F
105                                        SE-HD68F
106                                         SE-50M
107   AHA-2950U2B aic7891 PCI/64 LVD-HD68F LVD-HD68F
108   AHA-2930U2 aic7890 PCI/32 LVD-HD68F SE-HD50F
109                                         SE-50M
110   AHA-3950U2B aic7897 PCI/64
111   AHA-3950U2D aic7897 PCI/64
112   AHA-29160 aic7892 PCI/64-66
113   AHA-29160 CPQ aic7892 PCI/64-66
114   AHA-29160N aic7892 PCI/32 LVD-HD68F SE-HD50F
115                                         SE-50M
116   AHA-29160LP aic7892 PCI/64-66
117   AHA-19160 aic7892 PCI/64-66
118   AHA-29150LP aic7892 PCI/64-66
119   AHA-29130LP aic7892 PCI/64-66
120   AHA-3960D aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
121                                         LVD-50M
122   AHA-3960D CPQ aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
123                                         LVD-50M
124   AHA-39160 aic7899 PCI/64-66 2 X LVD-HD68F 2 X LVD-VHD68F
125                                         LVD-50M
126
127   1. No BIOS support
128   2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus
129   3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus
130   4. All three SCSI connectors may be used simultaneously without
131      SCSI "stub" effects.
132
1332. Version History
134   7.0 (4th August, 2005)
135    - Updated driver to use SCSI transport class infrastructure
136    - Upported sequencer and core fixes from last adaptec released
137      version of the driver.
138   6.2.36 (June 3rd, 2003)
139        - Correct code that disables PCI parity error checking.
140        - Correct and simplify handling of the ignore wide residue
141          message. The previous code would fail to report a residual
142          if the transaction data length was even and we received
143          an IWR message.
144        - Add support for the 2.5.X EISA framework.
145        - Update for change in 2.5.X SCSI proc FS interface.
146        - Correct Domain Validation command-line option parsing.
147        - When negotiation async via an 8bit WDTR message, send
148          an SDTR with an offset of 0 to be sure the target
149          knows we are async. This works around a firmware defect
150          in the Quantum Atlas 10K.
151        - Clear PCI error state during driver attach so that we
152          don't disable memory mapped I/O due to a stray write
153          by some other driver probe that occurred before we
154          claimed the controller.
155
156   6.2.35 (May 14th, 2003)
157        - Fix a few GCC 3.3 compiler warnings.
158        - Correct operation on EISA Twin Channel controller.
159        - Add support for 2.5.X's scsi_report_device_reset().
160
161   6.2.34 (May 5th, 2003)
162        - Fix locking regression introduced in 6.2.29 that
163          could cause a lock order reversal between the io_request_lock
164          and our per-softc lock. This was only possible on RH9,
165          SuSE, and kernel.org 2.4.X kernels.
166
167   6.2.33 (April 30th, 2003)
168        - Dynamically disable PCI parity error reporting after
169          10 errors are reported to the user. These errors are
170          the result of some other device issuing PCI transactions
171          with bad parity. Once the user has been informed of the
172          problem, continuing to report the errors just degrades
173          our performance.
174
175   6.2.32 (March 28th, 2003)
176        - Dynamically sized S/G lists to avoid SCSI malloc
177          pool fragmentation and SCSI mid-layer deadlock.
178
179   6.2.28 (January 20th, 2003)
180        - Domain Validation Fixes
181        - Add ability to disable PCI parity error checking.
182        - Enhanced Memory Mapped I/O probe
183
184   6.2.20 (November 7th, 2002)
185        - Added Domain Validation.
186
1873. Command Line Options
188
189        WARNING: ALTERING OR ADDING THESE DRIVER PARAMETERS
190                 INCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.
191                 USE THEM WITH CAUTION.
192
193   Edit the file "modprobe.conf" in the directory /etc and add/edit a
194   line containing 'options aic7xxx aic7xxx=[command[,command...]]' where
195   'command' is one or more of the following:
196   -----------------------------------------------------------------
197              Option: verbose
198          Definition: enable additional informative messages during
199                      driver operation.
200     Possible Values: This option is a flag
201       Default Value: disabled
202   -----------------------------------------------------------------
203              Option: debug:[value]
204          Definition: Enables various levels of debugging information
205     Possible Values: 0x0000 = no debugging, 0xffff = full debugging
206       Default Value: 0x0000
207   -----------------------------------------------------------------
208              Option: no_probe
209              Option: probe_eisa_vl
210          Definition: Do not probe for EISA/VLB controllers.
211                      This is a toggle. If the driver is compiled
212                      to not probe EISA/VLB controllers by default,
213                      specifying "no_probe" will enable this probing.
214                      If the driver is compiled to probe EISA/VLB
215                      controllers by default, specifying "no_probe"
216                      will disable this probing.
217     Possible Values: This option is a toggle
218       Default Value: EISA/VLB probing is disabled by default.
219   -----------------------------------------------------------------
220              Option: pci_parity
221          Definition: Toggles the detection of PCI parity errors.
222                      On many motherboards with VIA chipsets,
223                      PCI parity is not generated correctly on the
224                      PCI bus. It is impossible for the hardware to
225                      differentiate between these "spurious" parity
226                      errors and real parity errors. The symptom of
227                      this problem is a stream of the message:
228    "scsi0: Data Parity Error Detected during address or write data phase"
229                      output by the driver.
230     Possible Values: This option is a toggle
231       Default Value: PCI Parity Error reporting is disabled
232   -----------------------------------------------------------------
233              Option: no_reset
234          Definition: Do not reset the bus during the initial probe
235                      phase
236     Possible Values: This option is a flag
237       Default Value: disabled
238   -----------------------------------------------------------------
239              Option: extended
240          Definition: Force extended translation on the controller
241     Possible Values: This option is a flag
242       Default Value: disabled
243   -----------------------------------------------------------------
244              Option: periodic_otag
245          Definition: Send an ordered tag periodically to prevent
246                      tag starvation. Needed for some older devices
247     Possible Values: This option is a flag
248       Default Value: disabled
249   -----------------------------------------------------------------
250              Option: reverse_scan
251          Definition: Probe the scsi bus in reverse order, starting
252                      with target 15
253     Possible Values: This option is a flag
254       Default Value: disabled
255   -----------------------------------------------------------------
256              Option: global_tag_depth:[value]
257          Definition: Global tag depth for all targets on all busses.
258                      This option sets the default tag depth which
259                      may be selectively overridden vi the tag_info
260                      option.
261     Possible Values: 1 - 253
262       Default Value: 32
263   -----------------------------------------------------------------
264              Option: tag_info:{{value[,value...]}[,{value[,value...]}...]}
265          Definition: Set the per-target tagged queue depth on a
266                      per controller basis. Both controllers and targets
267                      may be omitted indicating that they should retain
268                      the default tag depth.
269            Examples: tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}
270                        On Controller 0
271                          specifies a tag depth of 16 for target 0
272                          specifies a tag depth of 64 for target 3
273                          specifies a tag depth of 8 for targets 4 and 5
274                          leaves target 6 at the default
275                          specifies a tag depth of 32 for targets 1,2,7-15
276                        All other targets retain the default depth.
277
278                      tag_info:{{},{32,,32}}
279                        On Controller 1
280                          specifies a tag depth of 32 for targets 0 and 2
281                        All other targets retain the default depth.
282                        
283     Possible Values: 1 - 253
284       Default Value: 32
285   -----------------------------------------------------------------
286              Option: seltime:[value]
287          Definition: Specifies the selection timeout value
288     Possible Values: 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
289       Default Value: 0
290   -----------------------------------------------------------------
291              Option: dv: {value[,value...]}
292          Definition: Set Domain Validation Policy on a per-controller basis.
293                      Controllers may be omitted indicating that
294                      they should retain the default read streaming setting.
295             Example: dv:{-1,0,,1,1,0}
296                        On Controller 0 leave DV at its default setting.
297                        On Controller 1 disable DV.
298                        Skip configuration on Controller 2.
299                        On Controllers 3 and 4 enable DV.
300                        On Controller 5 disable DV.
301
302     Possible Values: < 0 Use setting from serial EEPROM.
303                      0 Disable DV
304                      > 0 Enable DV
305
306       Default Value: SCSI-Select setting on controllers with a SCSI Select
307                      option for DV. Otherwise, on for controllers supporting
308                      U160 speeds and off for all other controller types.
309   -----------------------------------------------------------------
310
311   Example:
312   'options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1'
313        enables verbose logging, Disable EISA/VLB probing,
314        and set tag depth on Controller 1/Target 2 to 10 tags.
315
3164. Adaptec Customer Support
317
318   A Technical Support Identification (TSID) Number is required for
319   Adaptec technical support.
320    - The 12-digit TSID can be found on the white barcode-type label
321      included inside the box with your product. The TSID helps us
322      provide more efficient service by accurately identifying your
323      product and support status.
324
325   Support Options
326    - Search the Adaptec Support Knowledgebase (ASK) at
327      http://ask.adaptec.com for articles, troubleshooting tips, and
328      frequently asked questions about your product.
329    - For support via Email, submit your question to Adaptec's
330      Technical Support Specialists at http://ask.adaptec.com/.
331     
332   North America
333    - Visit our Web site at http://www.adaptec.com/.
334    - For information about Adaptec's support options, call
335      408-957-2550, 24 hours a day, 7 days a week.
336    - To speak with a Technical Support Specialist,
337      * For hardware products, call 408-934-7274,
338        Monday to Friday, 3:00 am to 5:00 pm, PDT.
339      * For RAID and Fibre Channel products, call 321-207-2000,
340        Monday to Friday, 3:00 am to 5:00 pm, PDT.
341      To expedite your service, have your computer with you.
342    - To order Adaptec products, including accessories and cables,
343      call 408-957-7274. To order cables online go to
344      http://www.adaptec.com/buy-cables/.
345
346   Europe
347    - Visit our Web site at http://www.adaptec.com/en-US/_common/world_index.
348    - To speak with a Technical Support Specialist, call, or email,
349      * German: +49 89 4366 5522, Monday-Friday, 9:00-17:00 CET,
350        http://ask-de.adaptec.com/.
351      * French: +49 89 4366 5533, Monday-Friday, 9:00-17:00 CET,
352    http://ask-fr.adaptec.com/.
353      * English: +49 89 4366 5544, Monday-Friday, 9:00-17:00 GMT,
354    http://ask.adaptec.com/.
355    - You can order Adaptec cables online at
356      http://www.adaptec.com/buy-cables/.
357
358   Japan
359    - Visit our web site at http://www.adaptec.co.jp/.
360    - To speak with a Technical Support Specialist, call
361      +81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,
362      1:00 p.m. to 6:00 p.m.
363
364-------------------------------------------------------------------
365/*
366 * Copyright (c) 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA.
367 * All rights reserved.
368 *
369 * You are permitted to redistribute, use and modify this README file in whole
370 * or in part in conjunction with redistribution of software governed by the
371 * General Public License, provided that the following conditions are met:
372 * 1. Redistributions of README file must retain the above copyright
373 * notice, this list of conditions, and the following disclaimer,
374 * without modification.
375 * 2. The name of the author may not be used to endorse or promote products
376 * derived from this software without specific prior written permission.
377 * 3. Modifications or new contributions must be attributed in a copyright
378 * notice identifying the author ("Contributor") and added below the
379 * original copyright notice. The copyright notice is for purposes of
380 * identifying contributors and should not be deemed as permission to alter
381 * the permissions given by Adaptec.
382 *
383 * THIS README FILE IS PROVIDED BY ADAPTEC AND CONTRIBUTORS ``AS IS'' AND
384 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ANY
385 * WARRANTIES OF NON-INFRINGEMENT OR THE IMPLIED WARRANTIES OF MERCHANTABILITY
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389 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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