Root/arch/arm/Kconfig

1config ARM
2    bool
3    default y
4    select HAVE_AOUT
5    select HAVE_IDE
6    select HAVE_MEMBLOCK
7    select RTC_LIB
8    select SYS_SUPPORTS_APM_EMULATION
9    select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
10    select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
11    select HAVE_ARCH_KGDB
12    select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
13    select HAVE_KRETPROBES if (HAVE_KPROBES)
14    select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
15    select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
16    select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
17    select HAVE_GENERIC_DMA_COHERENT
18    select HAVE_KERNEL_GZIP
19    select HAVE_KERNEL_LZO
20    select HAVE_KERNEL_LZMA
21    select HAVE_IRQ_WORK
22    select HAVE_PERF_EVENTS
23    select PERF_USE_VMALLOC
24    select HAVE_REGS_AND_STACK_ACCESS_API
25    select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
26    help
27      The ARM series is a line of low-power-consumption RISC chip designs
28      licensed by ARM Ltd and targeted at embedded applications and
29      handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
30      manufactured, but legacy ARM-based PC hardware remains popular in
31      Europe. There is an ARM Linux project with a web page at
32      <http://www.arm.linux.org.uk/>.
33
34config HAVE_PWM
35    bool
36
37config SYS_SUPPORTS_APM_EMULATION
38    bool
39
40config GENERIC_GPIO
41    bool
42
43config ARCH_USES_GETTIMEOFFSET
44    bool
45    default n
46
47config GENERIC_CLOCKEVENTS
48    bool
49
50config GENERIC_CLOCKEVENTS_BROADCAST
51    bool
52    depends on GENERIC_CLOCKEVENTS
53    default y if SMP
54
55config HAVE_TCM
56    bool
57    select GENERIC_ALLOCATOR
58
59config HAVE_PROC_CPU
60    bool
61
62config NO_IOPORT
63    bool
64
65config EISA
66    bool
67    ---help---
68      The Extended Industry Standard Architecture (EISA) bus was
69      developed as an open alternative to the IBM MicroChannel bus.
70
71      The EISA bus provided some of the features of the IBM MicroChannel
72      bus while maintaining backward compatibility with cards made for
73      the older ISA bus. The EISA bus saw limited use between 1988 and
74      1995 when it was made obsolete by the PCI bus.
75
76      Say Y here if you are building a kernel for an EISA-based machine.
77
78      Otherwise, say N.
79
80config SBUS
81    bool
82
83config MCA
84    bool
85    help
86      MicroChannel Architecture is found in some IBM PS/2 machines and
87      laptops. It is a bus system similar to PCI or ISA. See
88      <file:Documentation/mca.txt> (and especially the web page given
89      there) before attempting to build an MCA bus kernel.
90
91config GENERIC_HARDIRQS
92    bool
93    default y
94
95config STACKTRACE_SUPPORT
96    bool
97    default y
98
99config HAVE_LATENCYTOP_SUPPORT
100    bool
101    depends on !SMP
102    default y
103
104config LOCKDEP_SUPPORT
105    bool
106    default y
107
108config TRACE_IRQFLAGS_SUPPORT
109    bool
110    default y
111
112config HARDIRQS_SW_RESEND
113    bool
114    default y
115
116config GENERIC_IRQ_PROBE
117    bool
118    default y
119
120config GENERIC_LOCKBREAK
121    bool
122    default y
123    depends on SMP && PREEMPT
124
125config RWSEM_GENERIC_SPINLOCK
126    bool
127    default y
128
129config RWSEM_XCHGADD_ALGORITHM
130    bool
131
132config ARCH_HAS_ILOG2_U32
133    bool
134
135config ARCH_HAS_ILOG2_U64
136    bool
137
138config ARCH_HAS_CPUFREQ
139    bool
140    help
141      Internal node to signify that the ARCH has CPUFREQ support
142      and that the relevant menu configurations are displayed for
143      it.
144
145config ARCH_HAS_CPU_IDLE_WAIT
146       def_bool y
147
148config GENERIC_HWEIGHT
149    bool
150    default y
151
152config GENERIC_CALIBRATE_DELAY
153    bool
154    default y
155
156config ARCH_MAY_HAVE_PC_FDC
157    bool
158
159config ZONE_DMA
160    bool
161
162config NEED_DMA_MAP_STATE
163       def_bool y
164
165config GENERIC_ISA_DMA
166    bool
167
168config FIQ
169    bool
170
171config ARCH_MTD_XIP
172    bool
173
174config GENERIC_HARDIRQS_NO__DO_IRQ
175    def_bool y
176
177config ARM_L1_CACHE_SHIFT_6
178    bool
179    help
180      Setting ARM L1 cache line size to 64 Bytes.
181
182config VECTORS_BASE
183    hex
184    default 0xffff0000 if MMU || CPU_HIGH_VECTOR
185    default DRAM_BASE if REMAP_VECTORS_TO_RAM
186    default 0x00000000
187    help
188      The base address of exception vectors.
189
190source "init/Kconfig"
191
192source "kernel/Kconfig.freezer"
193
194menu "System Type"
195
196config MMU
197    bool "MMU-based Paged Memory Management Support"
198    default y
199    help
200      Select if you want MMU-based virtualised addressing space
201      support by paged memory management. If unsure, say 'Y'.
202
203#
204# The "ARM system type" choice list is ordered alphabetically by option
205# text. Please add new entries in the option alphabetic order.
206#
207choice
208    prompt "ARM system type"
209    default ARCH_VERSATILE
210
211config ARCH_AAEC2000
212    bool "Agilent AAEC-2000 based"
213    select CPU_ARM920T
214    select ARM_AMBA
215    select HAVE_CLK
216    select ARCH_USES_GETTIMEOFFSET
217    help
218      This enables support for systems based on the Agilent AAEC-2000
219
220config ARCH_INTEGRATOR
221    bool "ARM Ltd. Integrator family"
222    select ARM_AMBA
223    select ARCH_HAS_CPUFREQ
224    select COMMON_CLKDEV
225    select ICST
226    select GENERIC_CLOCKEVENTS
227    select PLAT_VERSATILE
228    help
229      Support for ARM's Integrator platform.
230
231config ARCH_REALVIEW
232    bool "ARM Ltd. RealView family"
233    select ARM_AMBA
234    select COMMON_CLKDEV
235    select ICST
236    select GENERIC_CLOCKEVENTS
237    select ARCH_WANT_OPTIONAL_GPIOLIB
238    select PLAT_VERSATILE
239    select ARM_TIMER_SP804
240    select GPIO_PL061 if GPIOLIB
241    help
242      This enables support for ARM Ltd RealView boards.
243
244config ARCH_VERSATILE
245    bool "ARM Ltd. Versatile family"
246    select ARM_AMBA
247    select ARM_VIC
248    select COMMON_CLKDEV
249    select ICST
250    select GENERIC_CLOCKEVENTS
251    select ARCH_WANT_OPTIONAL_GPIOLIB
252    select PLAT_VERSATILE
253    select ARM_TIMER_SP804
254    help
255      This enables support for ARM Ltd Versatile board.
256
257config ARCH_VEXPRESS
258    bool "ARM Ltd. Versatile Express family"
259    select ARCH_WANT_OPTIONAL_GPIOLIB
260    select ARM_AMBA
261    select ARM_TIMER_SP804
262    select COMMON_CLKDEV
263    select GENERIC_CLOCKEVENTS
264    select HAVE_CLK
265    select ICST
266    select PLAT_VERSATILE
267    help
268      This enables support for the ARM Ltd Versatile Express boards.
269
270config ARCH_AT91
271    bool "Atmel AT91"
272    select ARCH_REQUIRE_GPIOLIB
273    select HAVE_CLK
274    help
275      This enables support for systems based on the Atmel AT91RM9200,
276      AT91SAM9 and AT91CAP9 processors.
277
278config ARCH_BCMRING
279    bool "Broadcom BCMRING"
280    depends on MMU
281    select CPU_V6
282    select ARM_AMBA
283    select COMMON_CLKDEV
284    select GENERIC_CLOCKEVENTS
285    select ARCH_WANT_OPTIONAL_GPIOLIB
286    help
287      Support for Broadcom's BCMRing platform.
288
289config ARCH_CLPS711X
290    bool "Cirrus Logic CLPS711x/EP721x-based"
291    select CPU_ARM720T
292    select ARCH_USES_GETTIMEOFFSET
293    help
294      Support for Cirrus Logic 711x/721x based boards.
295
296config ARCH_CNS3XXX
297    bool "Cavium Networks CNS3XXX family"
298    select CPU_V6
299    select GENERIC_CLOCKEVENTS
300    select ARM_GIC
301    select PCI_DOMAINS if PCI
302    help
303      Support for Cavium Networks CNS3XXX platform.
304
305config ARCH_GEMINI
306    bool "Cortina Systems Gemini"
307    select CPU_FA526
308    select ARCH_REQUIRE_GPIOLIB
309    select ARCH_USES_GETTIMEOFFSET
310    help
311      Support for the Cortina Systems Gemini family SoCs
312
313config ARCH_EBSA110
314    bool "EBSA-110"
315    select CPU_SA110
316    select ISA
317    select NO_IOPORT
318    select ARCH_USES_GETTIMEOFFSET
319    help
320      This is an evaluation board for the StrongARM processor available
321      from Digital. It has limited hardware on-board, including an
322      Ethernet interface, two PCMCIA sockets, two serial ports and a
323      parallel port.
324
325config ARCH_EP93XX
326    bool "EP93xx-based"
327    select CPU_ARM920T
328    select ARM_AMBA
329    select ARM_VIC
330    select COMMON_CLKDEV
331    select ARCH_REQUIRE_GPIOLIB
332    select ARCH_HAS_HOLES_MEMORYMODEL
333    select ARCH_USES_GETTIMEOFFSET
334    help
335      This enables support for the Cirrus EP93xx series of CPUs.
336
337config ARCH_FOOTBRIDGE
338    bool "FootBridge"
339    select CPU_SA110
340    select FOOTBRIDGE
341    select ARCH_USES_GETTIMEOFFSET
342    help
343      Support for systems based on the DC21285 companion chip
344      ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
345
346config ARCH_MXC
347    bool "Freescale MXC/iMX-based"
348    select GENERIC_CLOCKEVENTS
349    select ARCH_REQUIRE_GPIOLIB
350    select COMMON_CLKDEV
351    help
352      Support for Freescale MXC/iMX-based family of processors
353
354config ARCH_STMP3XXX
355    bool "Freescale STMP3xxx"
356    select CPU_ARM926T
357    select COMMON_CLKDEV
358    select ARCH_REQUIRE_GPIOLIB
359    select GENERIC_CLOCKEVENTS
360    select USB_ARCH_HAS_EHCI
361    help
362      Support for systems based on the Freescale 3xxx CPUs.
363
364config ARCH_NETX
365    bool "Hilscher NetX based"
366    select CPU_ARM926T
367    select ARM_VIC
368    select GENERIC_CLOCKEVENTS
369    help
370      This enables support for systems based on the Hilscher NetX Soc
371
372config ARCH_H720X
373    bool "Hynix HMS720x-based"
374    select CPU_ARM720T
375    select ISA_DMA_API
376    select ARCH_USES_GETTIMEOFFSET
377    help
378      This enables support for systems based on the Hynix HMS720x
379
380config ARCH_IOP13XX
381    bool "IOP13xx-based"
382    depends on MMU
383    select CPU_XSC3
384    select PLAT_IOP
385    select PCI
386    select ARCH_SUPPORTS_MSI
387    select VMSPLIT_1G
388    help
389      Support for Intel's IOP13XX (XScale) family of processors.
390
391config ARCH_IOP32X
392    bool "IOP32x-based"
393    depends on MMU
394    select CPU_XSCALE
395    select PLAT_IOP
396    select PCI
397    select ARCH_REQUIRE_GPIOLIB
398    help
399      Support for Intel's 80219 and IOP32X (XScale) family of
400      processors.
401
402config ARCH_IOP33X
403    bool "IOP33x-based"
404    depends on MMU
405    select CPU_XSCALE
406    select PLAT_IOP
407    select PCI
408    select ARCH_REQUIRE_GPIOLIB
409    help
410      Support for Intel's IOP33X (XScale) family of processors.
411
412config ARCH_IXP23XX
413     bool "IXP23XX-based"
414    depends on MMU
415    select CPU_XSC3
416     select PCI
417    select ARCH_USES_GETTIMEOFFSET
418    help
419      Support for Intel's IXP23xx (XScale) family of processors.
420
421config ARCH_IXP2000
422    bool "IXP2400/2800-based"
423    depends on MMU
424    select CPU_XSCALE
425    select PCI
426    select ARCH_USES_GETTIMEOFFSET
427    help
428      Support for Intel's IXP2400/2800 (XScale) family of processors.
429
430config ARCH_IXP4XX
431    bool "IXP4xx-based"
432    depends on MMU
433    select CPU_XSCALE
434    select GENERIC_GPIO
435    select GENERIC_CLOCKEVENTS
436    select DMABOUNCE if PCI
437    help
438      Support for Intel's IXP4XX (XScale) family of processors.
439
440config ARCH_DOVE
441    bool "Marvell Dove"
442    select PCI
443    select ARCH_REQUIRE_GPIOLIB
444    select GENERIC_CLOCKEVENTS
445    select PLAT_ORION
446    help
447      Support for the Marvell Dove SoC 88AP510
448
449config ARCH_KIRKWOOD
450    bool "Marvell Kirkwood"
451    select CPU_FEROCEON
452    select PCI
453    select ARCH_REQUIRE_GPIOLIB
454    select GENERIC_CLOCKEVENTS
455    select PLAT_ORION
456    help
457      Support for the following Marvell Kirkwood series SoCs:
458      88F6180, 88F6192 and 88F6281.
459
460config ARCH_LOKI
461    bool "Marvell Loki (88RC8480)"
462    select CPU_FEROCEON
463    select GENERIC_CLOCKEVENTS
464    select PLAT_ORION
465    help
466      Support for the Marvell Loki (88RC8480) SoC.
467
468config ARCH_LPC32XX
469    bool "NXP LPC32XX"
470    select CPU_ARM926T
471    select ARCH_REQUIRE_GPIOLIB
472    select HAVE_IDE
473    select ARM_AMBA
474    select USB_ARCH_HAS_OHCI
475    select COMMON_CLKDEV
476    select GENERIC_TIME
477    select GENERIC_CLOCKEVENTS
478    help
479      Support for the NXP LPC32XX family of processors
480
481config ARCH_MV78XX0
482    bool "Marvell MV78xx0"
483    select CPU_FEROCEON
484    select PCI
485    select ARCH_REQUIRE_GPIOLIB
486    select GENERIC_CLOCKEVENTS
487    select PLAT_ORION
488    help
489      Support for the following Marvell MV78xx0 series SoCs:
490      MV781x0, MV782x0.
491
492config ARCH_ORION5X
493    bool "Marvell Orion"
494    depends on MMU
495    select CPU_FEROCEON
496    select PCI
497    select ARCH_REQUIRE_GPIOLIB
498    select GENERIC_CLOCKEVENTS
499    select PLAT_ORION
500    help
501      Support for the following Marvell Orion 5x series SoCs:
502      Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
503      Orion-2 (5281), Orion-1-90 (6183).
504
505config ARCH_MMP
506    bool "Marvell PXA168/910/MMP2"
507    depends on MMU
508    select ARCH_REQUIRE_GPIOLIB
509    select COMMON_CLKDEV
510    select GENERIC_CLOCKEVENTS
511    select TICK_ONESHOT
512    select PLAT_PXA
513    select SPARSE_IRQ
514    help
515      Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
516
517config ARCH_KS8695
518    bool "Micrel/Kendin KS8695"
519    select CPU_ARM922T
520    select ARCH_REQUIRE_GPIOLIB
521    select ARCH_USES_GETTIMEOFFSET
522    help
523      Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
524      System-on-Chip devices.
525
526config ARCH_NS9XXX
527    bool "NetSilicon NS9xxx"
528    select CPU_ARM926T
529    select GENERIC_GPIO
530    select GENERIC_CLOCKEVENTS
531    select HAVE_CLK
532    help
533      Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
534      System.
535
536      <http://www.digi.com/products/microprocessors/index.jsp>
537
538config ARCH_W90X900
539    bool "Nuvoton W90X900 CPU"
540    select CPU_ARM926T
541    select ARCH_REQUIRE_GPIOLIB
542    select COMMON_CLKDEV
543    select GENERIC_CLOCKEVENTS
544    help
545      Support for Nuvoton (Winbond logic dept.) ARM9 processor,
546      At present, the w90x900 has been renamed nuc900, regarding
547      the ARM series product line, you can login the following
548      link address to know more.
549
550      <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
551        ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
552
553config ARCH_NUC93X
554    bool "Nuvoton NUC93X CPU"
555    select CPU_ARM926T
556    select COMMON_CLKDEV
557    help
558      Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
559      low-power and high performance MPEG-4/JPEG multimedia controller chip.
560
561config ARCH_TEGRA
562    bool "NVIDIA Tegra"
563    select GENERIC_TIME
564    select GENERIC_CLOCKEVENTS
565    select GENERIC_GPIO
566    select HAVE_CLK
567    select COMMON_CLKDEV
568    select ARCH_HAS_BARRIERS if CACHE_L2X0
569    select ARCH_HAS_CPUFREQ
570    help
571      This enables support for NVIDIA Tegra based systems (Tegra APX,
572      Tegra 6xx and Tegra 2 series).
573
574config ARCH_PNX4008
575    bool "Philips Nexperia PNX4008 Mobile"
576    select CPU_ARM926T
577    select COMMON_CLKDEV
578    select ARCH_USES_GETTIMEOFFSET
579    help
580      This enables support for Philips PNX4008 mobile platform.
581
582config ARCH_PXA
583    bool "PXA2xx/PXA3xx-based"
584    depends on MMU
585    select ARCH_MTD_XIP
586    select ARCH_HAS_CPUFREQ
587    select COMMON_CLKDEV
588    select ARCH_REQUIRE_GPIOLIB
589    select GENERIC_CLOCKEVENTS
590    select TICK_ONESHOT
591    select PLAT_PXA
592    select SPARSE_IRQ
593    help
594      Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
595
596config ARCH_MSM
597    bool "Qualcomm MSM"
598    select HAVE_CLK
599    select GENERIC_CLOCKEVENTS
600    select ARCH_REQUIRE_GPIOLIB
601    help
602      Support for Qualcomm MSM/QSD based systems. This runs on the
603      apps processor of the MSM/QSD and depends on a shared memory
604      interface to the modem processor which runs the baseband
605      stack and controls some vital subsystems
606      (clock and power control, etc).
607
608config ARCH_SHMOBILE
609    bool "Renesas SH-Mobile"
610    help
611      Support for Renesas's SH-Mobile ARM platforms
612
613config ARCH_RPC
614    bool "RiscPC"
615    select ARCH_ACORN
616    select FIQ
617    select TIMER_ACORN
618    select ARCH_MAY_HAVE_PC_FDC
619    select HAVE_PATA_PLATFORM
620    select ISA_DMA_API
621    select NO_IOPORT
622    select ARCH_SPARSEMEM_ENABLE
623    select ARCH_USES_GETTIMEOFFSET
624    help
625      On the Acorn Risc-PC, Linux can support the internal IDE disk and
626      CD-ROM interface, serial and parallel port, and the floppy drive.
627
628config ARCH_SA1100
629    bool "SA1100-based"
630    select CPU_SA1100
631    select ISA
632    select ARCH_SPARSEMEM_ENABLE
633    select ARCH_MTD_XIP
634    select ARCH_HAS_CPUFREQ
635    select CPU_FREQ
636    select GENERIC_CLOCKEVENTS
637    select HAVE_CLK
638    select TICK_ONESHOT
639    select ARCH_REQUIRE_GPIOLIB
640    help
641      Support for StrongARM 11x0 based boards.
642
643config ARCH_S3C2410
644    bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
645    select GENERIC_GPIO
646    select ARCH_HAS_CPUFREQ
647    select HAVE_CLK
648    select ARCH_USES_GETTIMEOFFSET
649    select HAVE_S3C2410_I2C if I2C
650    help
651      Samsung S3C2410X CPU based systems, such as the Simtec Electronics
652      BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
653      the Samsung SMDK2410 development board (and derivatives).
654
655      Note, the S3C2416 and the S3C2450 are so close that they even share
656      the same SoC ID code. This means that there is no seperate machine
657      directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
658
659config ARCH_S3C64XX
660    bool "Samsung S3C64XX"
661    select PLAT_SAMSUNG
662    select CPU_V6
663    select ARM_VIC
664    select HAVE_CLK
665    select NO_IOPORT
666    select ARCH_USES_GETTIMEOFFSET
667    select ARCH_HAS_CPUFREQ
668    select ARCH_REQUIRE_GPIOLIB
669    select SAMSUNG_CLKSRC
670    select SAMSUNG_IRQ_VIC_TIMER
671    select SAMSUNG_IRQ_UART
672    select S3C_GPIO_TRACK
673    select S3C_GPIO_PULL_UPDOWN
674    select S3C_GPIO_CFG_S3C24XX
675    select S3C_GPIO_CFG_S3C64XX
676    select S3C_DEV_NAND
677    select USB_ARCH_HAS_OHCI
678    select SAMSUNG_GPIOLIB_4BIT
679    select HAVE_S3C2410_I2C if I2C
680    select HAVE_S3C2410_WATCHDOG if WATCHDOG
681    help
682      Samsung S3C64XX series based systems
683
684config ARCH_S5P64X0
685    bool "Samsung S5P6440 S5P6450"
686    select CPU_V6
687    select GENERIC_GPIO
688    select HAVE_CLK
689    select HAVE_S3C2410_WATCHDOG if WATCHDOG
690    select ARCH_USES_GETTIMEOFFSET
691    select HAVE_S3C2410_I2C if I2C
692    select HAVE_S3C_RTC if RTC_CLASS
693    help
694      Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
695      SMDK6450.
696
697config ARCH_S5P6442
698    bool "Samsung S5P6442"
699    select CPU_V6
700    select GENERIC_GPIO
701    select HAVE_CLK
702    select ARCH_USES_GETTIMEOFFSET
703    select HAVE_S3C2410_WATCHDOG if WATCHDOG
704    help
705      Samsung S5P6442 CPU based systems
706
707config ARCH_S5PC100
708    bool "Samsung S5PC100"
709    select GENERIC_GPIO
710    select HAVE_CLK
711    select CPU_V7
712    select ARM_L1_CACHE_SHIFT_6
713    select ARCH_USES_GETTIMEOFFSET
714    select HAVE_S3C2410_I2C if I2C
715    select HAVE_S3C_RTC if RTC_CLASS
716    select HAVE_S3C2410_WATCHDOG if WATCHDOG
717    help
718      Samsung S5PC100 series based systems
719
720config ARCH_S5PV210
721    bool "Samsung S5PV210/S5PC110"
722    select CPU_V7
723    select ARCH_SPARSEMEM_ENABLE
724    select GENERIC_GPIO
725    select HAVE_CLK
726    select ARM_L1_CACHE_SHIFT_6
727    select ARCH_HAS_CPUFREQ
728    select ARCH_USES_GETTIMEOFFSET
729    select HAVE_S3C2410_I2C if I2C
730    select HAVE_S3C_RTC if RTC_CLASS
731    select HAVE_S3C2410_WATCHDOG if WATCHDOG
732    help
733      Samsung S5PV210/S5PC110 series based systems
734
735config ARCH_S5PV310
736    bool "Samsung S5PV310/S5PC210"
737    select CPU_V7
738    select ARCH_SPARSEMEM_ENABLE
739    select GENERIC_GPIO
740    select HAVE_CLK
741    select GENERIC_CLOCKEVENTS
742    select HAVE_S3C_RTC if RTC_CLASS
743    select HAVE_S3C2410_I2C if I2C
744    select HAVE_S3C2410_WATCHDOG if WATCHDOG
745    help
746      Samsung S5PV310 series based systems
747
748config ARCH_SHARK
749    bool "Shark"
750    select CPU_SA110
751    select ISA
752    select ISA_DMA
753    select ZONE_DMA
754    select PCI
755    select ARCH_USES_GETTIMEOFFSET
756    help
757      Support for the StrongARM based Digital DNARD machine, also known
758      as "Shark" (<http://www.shark-linux.de/shark.html>).
759
760config ARCH_TCC_926
761    bool "Telechips TCC ARM926-based systems"
762    select CPU_ARM926T
763    select HAVE_CLK
764    select COMMON_CLKDEV
765    select GENERIC_CLOCKEVENTS
766    help
767      Support for Telechips TCC ARM926-based systems.
768
769config ARCH_LH7A40X
770    bool "Sharp LH7A40X"
771    select CPU_ARM922T
772    select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
773    select ARCH_USES_GETTIMEOFFSET
774    help
775      Say Y here for systems based on one of the Sharp LH7A40X
776      System on a Chip processors. These CPUs include an ARM922T
777      core with a wide array of integrated devices for
778      hand-held and low-power applications.
779
780config ARCH_U300
781    bool "ST-Ericsson U300 Series"
782    depends on MMU
783    select CPU_ARM926T
784    select HAVE_TCM
785    select ARM_AMBA
786    select ARM_VIC
787    select GENERIC_CLOCKEVENTS
788    select COMMON_CLKDEV
789    select GENERIC_GPIO
790    help
791      Support for ST-Ericsson U300 series mobile platforms.
792
793config ARCH_U8500
794    bool "ST-Ericsson U8500 Series"
795    select CPU_V7
796    select ARM_AMBA
797    select GENERIC_CLOCKEVENTS
798    select COMMON_CLKDEV
799    select ARCH_REQUIRE_GPIOLIB
800    help
801      Support for ST-Ericsson's Ux500 architecture
802
803config ARCH_NOMADIK
804    bool "STMicroelectronics Nomadik"
805    select ARM_AMBA
806    select ARM_VIC
807    select CPU_ARM926T
808    select COMMON_CLKDEV
809    select GENERIC_CLOCKEVENTS
810    select ARCH_REQUIRE_GPIOLIB
811    help
812      Support for the Nomadik platform by ST-Ericsson
813
814config ARCH_DAVINCI
815    bool "TI DaVinci"
816    select GENERIC_CLOCKEVENTS
817    select ARCH_REQUIRE_GPIOLIB
818    select ZONE_DMA
819    select HAVE_IDE
820    select COMMON_CLKDEV
821    select GENERIC_ALLOCATOR
822    select ARCH_HAS_HOLES_MEMORYMODEL
823    help
824      Support for TI's DaVinci platform.
825
826config ARCH_OMAP
827    bool "TI OMAP"
828    select HAVE_CLK
829    select ARCH_REQUIRE_GPIOLIB
830    select ARCH_HAS_CPUFREQ
831    select GENERIC_CLOCKEVENTS
832    select ARCH_HAS_HOLES_MEMORYMODEL
833    help
834      Support for TI's OMAP platform (OMAP1/2/3/4).
835
836config PLAT_SPEAR
837    bool "ST SPEAr"
838    select ARM_AMBA
839    select ARCH_REQUIRE_GPIOLIB
840    select COMMON_CLKDEV
841    select GENERIC_CLOCKEVENTS
842    select HAVE_CLK
843    help
844      Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
845
846endchoice
847
848#
849# This is sorted alphabetically by mach-* pathname. However, plat-*
850# Kconfigs may be included either alphabetically (according to the
851# plat- suffix) or along side the corresponding mach-* source.
852#
853source "arch/arm/mach-aaec2000/Kconfig"
854
855source "arch/arm/mach-at91/Kconfig"
856
857source "arch/arm/mach-bcmring/Kconfig"
858
859source "arch/arm/mach-clps711x/Kconfig"
860
861source "arch/arm/mach-cns3xxx/Kconfig"
862
863source "arch/arm/mach-davinci/Kconfig"
864
865source "arch/arm/mach-dove/Kconfig"
866
867source "arch/arm/mach-ep93xx/Kconfig"
868
869source "arch/arm/mach-footbridge/Kconfig"
870
871source "arch/arm/mach-gemini/Kconfig"
872
873source "arch/arm/mach-h720x/Kconfig"
874
875source "arch/arm/mach-integrator/Kconfig"
876
877source "arch/arm/mach-iop32x/Kconfig"
878
879source "arch/arm/mach-iop33x/Kconfig"
880
881source "arch/arm/mach-iop13xx/Kconfig"
882
883source "arch/arm/mach-ixp4xx/Kconfig"
884
885source "arch/arm/mach-ixp2000/Kconfig"
886
887source "arch/arm/mach-ixp23xx/Kconfig"
888
889source "arch/arm/mach-kirkwood/Kconfig"
890
891source "arch/arm/mach-ks8695/Kconfig"
892
893source "arch/arm/mach-lh7a40x/Kconfig"
894
895source "arch/arm/mach-loki/Kconfig"
896
897source "arch/arm/mach-lpc32xx/Kconfig"
898
899source "arch/arm/mach-msm/Kconfig"
900
901source "arch/arm/mach-mv78xx0/Kconfig"
902
903source "arch/arm/plat-mxc/Kconfig"
904
905source "arch/arm/mach-netx/Kconfig"
906
907source "arch/arm/mach-nomadik/Kconfig"
908source "arch/arm/plat-nomadik/Kconfig"
909
910source "arch/arm/mach-ns9xxx/Kconfig"
911
912source "arch/arm/mach-nuc93x/Kconfig"
913
914source "arch/arm/plat-omap/Kconfig"
915
916source "arch/arm/mach-omap1/Kconfig"
917
918source "arch/arm/mach-omap2/Kconfig"
919
920source "arch/arm/mach-orion5x/Kconfig"
921
922source "arch/arm/mach-pxa/Kconfig"
923source "arch/arm/plat-pxa/Kconfig"
924
925source "arch/arm/mach-mmp/Kconfig"
926
927source "arch/arm/mach-realview/Kconfig"
928
929source "arch/arm/mach-sa1100/Kconfig"
930
931source "arch/arm/plat-samsung/Kconfig"
932source "arch/arm/plat-s3c24xx/Kconfig"
933source "arch/arm/plat-s5p/Kconfig"
934
935source "arch/arm/plat-spear/Kconfig"
936
937source "arch/arm/plat-tcc/Kconfig"
938
939if ARCH_S3C2410
940source "arch/arm/mach-s3c2400/Kconfig"
941source "arch/arm/mach-s3c2410/Kconfig"
942source "arch/arm/mach-s3c2412/Kconfig"
943source "arch/arm/mach-s3c2416/Kconfig"
944source "arch/arm/mach-s3c2440/Kconfig"
945source "arch/arm/mach-s3c2443/Kconfig"
946endif
947
948if ARCH_S3C64XX
949source "arch/arm/mach-s3c64xx/Kconfig"
950endif
951
952source "arch/arm/mach-s5p64x0/Kconfig"
953
954source "arch/arm/mach-s5p6442/Kconfig"
955
956source "arch/arm/mach-s5pc100/Kconfig"
957
958source "arch/arm/mach-s5pv210/Kconfig"
959
960source "arch/arm/mach-s5pv310/Kconfig"
961
962source "arch/arm/mach-shmobile/Kconfig"
963
964source "arch/arm/plat-stmp3xxx/Kconfig"
965
966source "arch/arm/mach-tegra/Kconfig"
967
968source "arch/arm/mach-u300/Kconfig"
969
970source "arch/arm/mach-ux500/Kconfig"
971
972source "arch/arm/mach-versatile/Kconfig"
973
974source "arch/arm/mach-vexpress/Kconfig"
975
976source "arch/arm/mach-w90x900/Kconfig"
977
978# Definitions to make life easier
979config ARCH_ACORN
980    bool
981
982config PLAT_IOP
983    bool
984    select GENERIC_CLOCKEVENTS
985
986config PLAT_ORION
987    bool
988
989config PLAT_PXA
990    bool
991
992config PLAT_VERSATILE
993    bool
994
995config ARM_TIMER_SP804
996    bool
997
998source arch/arm/mm/Kconfig
999
1000config IWMMXT
1001    bool "Enable iWMMXt support"
1002    depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
1003    default y if PXA27x || PXA3xx || ARCH_MMP
1004    help
1005      Enable support for iWMMXt context switching at run time if
1006      running on a CPU that supports it.
1007
1008# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1009config XSCALE_PMU
1010    bool
1011    depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1012    default y
1013
1014config CPU_HAS_PMU
1015    depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1016           (!ARCH_OMAP3 || OMAP3_EMU)
1017    default y
1018    bool
1019
1020if !MMU
1021source "arch/arm/Kconfig-nommu"
1022endif
1023
1024config ARM_ERRATA_411920
1025    bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
1026    depends on CPU_V6
1027    help
1028      Invalidation of the Instruction Cache operation can
1029      fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1030      It does not affect the MPCore. This option enables the ARM Ltd.
1031      recommended workaround.
1032
1033config ARM_ERRATA_430973
1034    bool "ARM errata: Stale prediction on replaced interworking branch"
1035    depends on CPU_V7
1036    help
1037      This option enables the workaround for the 430973 Cortex-A8
1038      (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1039      interworking branch is replaced with another code sequence at the
1040      same virtual address, whether due to self-modifying code or virtual
1041      to physical address re-mapping, Cortex-A8 does not recover from the
1042      stale interworking branch prediction. This results in Cortex-A8
1043      executing the new code sequence in the incorrect ARM or Thumb state.
1044      The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1045      and also flushes the branch target cache at every context switch.
1046      Note that setting specific bits in the ACTLR register may not be
1047      available in non-secure mode.
1048
1049config ARM_ERRATA_458693
1050    bool "ARM errata: Processor deadlock when a false hazard is created"
1051    depends on CPU_V7
1052    help
1053      This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1054      erratum. For very specific sequences of memory operations, it is
1055      possible for a hazard condition intended for a cache line to instead
1056      be incorrectly associated with a different cache line. This false
1057      hazard might then cause a processor deadlock. The workaround enables
1058      the L1 caching of the NEON accesses and disables the PLD instruction
1059      in the ACTLR register. Note that setting specific bits in the ACTLR
1060      register may not be available in non-secure mode.
1061
1062config ARM_ERRATA_460075
1063    bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1064    depends on CPU_V7
1065    help
1066      This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1067      erratum. Any asynchronous access to the L2 cache may encounter a
1068      situation in which recent store transactions to the L2 cache are lost
1069      and overwritten with stale memory contents from external memory. The
1070      workaround disables the write-allocate mode for the L2 cache via the
1071      ACTLR register. Note that setting specific bits in the ACTLR register
1072      may not be available in non-secure mode.
1073
1074config ARM_ERRATA_742230
1075    bool "ARM errata: DMB operation may be faulty"
1076    depends on CPU_V7 && SMP
1077    help
1078      This option enables the workaround for the 742230 Cortex-A9
1079      (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1080      between two write operations may not ensure the correct visibility
1081      ordering of the two writes. This workaround sets a specific bit in
1082      the diagnostic register of the Cortex-A9 which causes the DMB
1083      instruction to behave as a DSB, ensuring the correct behaviour of
1084      the two writes.
1085
1086config ARM_ERRATA_742231
1087    bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1088    depends on CPU_V7 && SMP
1089    help
1090      This option enables the workaround for the 742231 Cortex-A9
1091      (r2p0..r2p2) erratum. Under certain conditions, specific to the
1092      Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1093      accessing some data located in the same cache line, may get corrupted
1094      data due to bad handling of the address hazard when the line gets
1095      replaced from one of the CPUs at the same time as another CPU is
1096      accessing it. This workaround sets specific bits in the diagnostic
1097      register of the Cortex-A9 which reduces the linefill issuing
1098      capabilities of the processor.
1099
1100config PL310_ERRATA_588369
1101    bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1102    depends on CACHE_L2X0 && ARCH_OMAP4
1103    help
1104       The PL310 L2 cache controller implements three types of Clean &
1105       Invalidate maintenance operations: by Physical Address
1106       (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1107       They are architecturally defined to behave as the execution of a
1108       clean operation followed immediately by an invalidate operation,
1109       both performing to the same memory location. This functionality
1110       is not correctly implemented in PL310 as clean lines are not
1111       invalidated as a result of these operations. Note that this errata
1112       uses Texas Instrument's secure monitor api.
1113
1114config ARM_ERRATA_720789
1115    bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1116    depends on CPU_V7 && SMP
1117    help
1118      This option enables the workaround for the 720789 Cortex-A9 (prior to
1119      r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1120      broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1121      As a consequence of this erratum, some TLB entries which should be
1122      invalidated are not, resulting in an incoherency in the system page
1123      tables. The workaround changes the TLB flushing routines to invalidate
1124      entries regardless of the ASID.
1125
1126config ARM_ERRATA_743622
1127    bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1128    depends on CPU_V7
1129    help
1130      This option enables the workaround for the 743622 Cortex-A9
1131      (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1132      optimisation in the Cortex-A9 Store Buffer may lead to data
1133      corruption. This workaround sets a specific bit in the diagnostic
1134      register of the Cortex-A9 which disables the Store Buffer
1135      optimisation, preventing the defect from occurring. This has no
1136      visible impact on the overall performance or power consumption of the
1137      processor.
1138
1139endmenu
1140
1141source "arch/arm/common/Kconfig"
1142
1143menu "Bus support"
1144
1145config ARM_AMBA
1146    bool
1147
1148config ISA
1149    bool
1150    help
1151      Find out whether you have ISA slots on your motherboard. ISA is the
1152      name of a bus system, i.e. the way the CPU talks to the other stuff
1153      inside your box. Other bus systems are PCI, EISA, MicroChannel
1154      (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1155      newer boards don't support it. If you have ISA, say Y, otherwise N.
1156
1157# Select ISA DMA controller support
1158config ISA_DMA
1159    bool
1160    select ISA_DMA_API
1161
1162# Select ISA DMA interface
1163config ISA_DMA_API
1164    bool
1165
1166config PCI
1167    bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
1168    help
1169      Find out whether you have a PCI motherboard. PCI is the name of a
1170      bus system, i.e. the way the CPU talks to the other stuff inside
1171      your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1172      VESA. If you have PCI, say Y, otherwise N.
1173
1174config PCI_DOMAINS
1175    bool
1176    depends on PCI
1177
1178config PCI_SYSCALL
1179    def_bool PCI
1180
1181# Select the host bridge type
1182config PCI_HOST_VIA82C505
1183    bool
1184    depends on PCI && ARCH_SHARK
1185    default y
1186
1187config PCI_HOST_ITE8152
1188    bool
1189    depends on PCI && MACH_ARMCORE
1190    default y
1191    select DMABOUNCE
1192
1193source "drivers/pci/Kconfig"
1194
1195source "drivers/pcmcia/Kconfig"
1196
1197endmenu
1198
1199menu "Kernel Features"
1200
1201source "kernel/time/Kconfig"
1202
1203config SMP
1204    bool "Symmetric Multi-Processing (EXPERIMENTAL)"
1205    depends on EXPERIMENTAL
1206    depends on GENERIC_CLOCKEVENTS
1207    depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
1208         MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
1209         ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
1210    select USE_GENERIC_SMP_HELPERS
1211    select HAVE_ARM_SCU
1212    help
1213      This enables support for systems with more than one CPU. If you have
1214      a system with only one CPU, like most personal computers, say N. If
1215      you have a system with more than one CPU, say Y.
1216
1217      If you say N here, the kernel will run on single and multiprocessor
1218      machines, but will use only one CPU of a multiprocessor machine. If
1219      you say Y here, the kernel will run on many, but not all, single
1220      processor machines. On a single processor machine, the kernel will
1221      run faster if you say N here.
1222
1223      See also <file:Documentation/i386/IO-APIC.txt>,
1224      <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
1225      <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1226
1227      If you don't know what to do here, say N.
1228
1229config SMP_ON_UP
1230    bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1231    depends on EXPERIMENTAL
1232    depends on SMP && !XIP && !THUMB2_KERNEL
1233    default y
1234    help
1235      SMP kernels contain instructions which fail on non-SMP processors.
1236      Enabling this option allows the kernel to modify itself to make
1237      these instructions safe. Disabling it allows about 1K of space
1238      savings.
1239
1240      If you don't know what to do here, say Y.
1241
1242config HAVE_ARM_SCU
1243    bool
1244    depends on SMP
1245    help
1246      This option enables support for the ARM system coherency unit
1247
1248config HAVE_ARM_TWD
1249    bool
1250    depends on SMP
1251    help
1252      This options enables support for the ARM timer and watchdog unit
1253
1254choice
1255    prompt "Memory split"
1256    default VMSPLIT_3G
1257    help
1258      Select the desired split between kernel and user memory.
1259
1260      If you are not absolutely sure what you are doing, leave this
1261      option alone!
1262
1263    config VMSPLIT_3G
1264        bool "3G/1G user/kernel split"
1265    config VMSPLIT_2G
1266        bool "2G/2G user/kernel split"
1267    config VMSPLIT_1G
1268        bool "1G/3G user/kernel split"
1269endchoice
1270
1271config PAGE_OFFSET
1272    hex
1273    default 0x40000000 if VMSPLIT_1G
1274    default 0x80000000 if VMSPLIT_2G
1275    default 0xC0000000
1276
1277config NR_CPUS
1278    int "Maximum number of CPUs (2-32)"
1279    range 2 32
1280    depends on SMP
1281    default "4"
1282
1283config HOTPLUG_CPU
1284    bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1285    depends on SMP && HOTPLUG && EXPERIMENTAL
1286    help
1287      Say Y here to experiment with turning CPUs off and on. CPUs
1288      can be controlled through /sys/devices/system/cpu.
1289
1290config LOCAL_TIMERS
1291    bool "Use local timer interrupts"
1292    depends on SMP
1293    default y
1294    select HAVE_ARM_TWD
1295    help
1296      Enable support for local timers on SMP platforms, rather then the
1297      legacy IPI broadcast method. Local timers allows the system
1298      accounting to be spread across the timer interval, preventing a
1299      "thundering herd" at every timer tick.
1300
1301source kernel/Kconfig.preempt
1302
1303config HZ
1304    int
1305    default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
1306        ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
1307    default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
1308    default AT91_TIMER_HZ if ARCH_AT91
1309    default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
1310    default 100
1311
1312config THUMB2_KERNEL
1313    bool "Compile the kernel in Thumb-2 mode"
1314    depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1315    select AEABI
1316    select ARM_ASM_UNIFIED
1317    help
1318      By enabling this option, the kernel will be compiled in
1319      Thumb-2 mode. A compiler/assembler that understand the unified
1320      ARM-Thumb syntax is needed.
1321
1322      If unsure, say N.
1323
1324config ARM_ASM_UNIFIED
1325    bool
1326
1327config AEABI
1328    bool "Use the ARM EABI to compile the kernel"
1329    help
1330      This option allows for the kernel to be compiled using the latest
1331      ARM ABI (aka EABI). This is only useful if you are using a user
1332      space environment that is also compiled with EABI.
1333
1334      Since there are major incompatibilities between the legacy ABI and
1335      EABI, especially with regard to structure member alignment, this
1336      option also changes the kernel syscall calling convention to
1337      disambiguate both ABIs and allow for backward compatibility support
1338      (selected with CONFIG_OABI_COMPAT).
1339
1340      To use this you need GCC version 4.0.0 or later.
1341
1342config OABI_COMPAT
1343    bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1344    depends on AEABI && EXPERIMENTAL
1345    default y
1346    help
1347      This option preserves the old syscall interface along with the
1348      new (ARM EABI) one. It also provides a compatibility layer to
1349      intercept syscalls that have structure arguments which layout
1350      in memory differs between the legacy ABI and the new ARM EABI
1351      (only for non "thumb" binaries). This option adds a tiny
1352      overhead to all syscalls and produces a slightly larger kernel.
1353      If you know you'll be using only pure EABI user space then you
1354      can say N here. If this option is not selected and you attempt
1355      to execute a legacy ABI binary then the result will be
1356      UNPREDICTABLE (in fact it can be predicted that it won't work
1357      at all). If in doubt say Y.
1358
1359config ARCH_HAS_HOLES_MEMORYMODEL
1360    bool
1361
1362config ARCH_SPARSEMEM_ENABLE
1363    bool
1364
1365config ARCH_SPARSEMEM_DEFAULT
1366    def_bool ARCH_SPARSEMEM_ENABLE
1367
1368config ARCH_SELECT_MEMORY_MODEL
1369    def_bool ARCH_SPARSEMEM_ENABLE
1370
1371config HIGHMEM
1372    bool "High Memory Support (EXPERIMENTAL)"
1373    depends on MMU && EXPERIMENTAL
1374    help
1375      The address space of ARM processors is only 4 Gigabytes large
1376      and it has to accommodate user address space, kernel address
1377      space as well as some memory mapped IO. That means that, if you
1378      have a large amount of physical memory and/or IO, not all of the
1379      memory can be "permanently mapped" by the kernel. The physical
1380      memory that is not permanently mapped is called "high memory".
1381
1382      Depending on the selected kernel/user memory split, minimum
1383      vmalloc space and actual amount of RAM, you may not need this
1384      option which should result in a slightly faster kernel.
1385
1386      If unsure, say n.
1387
1388config HIGHPTE
1389    bool "Allocate 2nd-level pagetables from highmem"
1390    depends on HIGHMEM
1391    depends on !OUTER_CACHE
1392
1393config HW_PERF_EVENTS
1394    bool "Enable hardware performance counter support for perf events"
1395    depends on PERF_EVENTS && CPU_HAS_PMU
1396    default y
1397    help
1398      Enable hardware performance counter support for perf events. If
1399      disabled, perf events will use software events only.
1400
1401config SPARSE_IRQ
1402    def_bool n
1403    help
1404      This enables support for sparse irqs. This is useful in general
1405      as most CPUs have a fairly sparse array of IRQ vectors, which
1406      the irq_desc then maps directly on to. Systems with a high
1407      number of off-chip IRQs will want to treat this as
1408      experimental until they have been independently verified.
1409
1410source "mm/Kconfig"
1411
1412config FORCE_MAX_ZONEORDER
1413    int "Maximum zone order" if ARCH_SHMOBILE
1414    range 11 64 if ARCH_SHMOBILE
1415    default "9" if SA1111
1416    default "11"
1417    help
1418      The kernel memory allocator divides physically contiguous memory
1419      blocks into "zones", where each zone is a power of two number of
1420      pages. This option selects the largest power of two that the kernel
1421      keeps in the memory allocator. If you need to allocate very large
1422      blocks of physically contiguous memory, then you may need to
1423      increase this value.
1424
1425      This config option is actually maximum order plus one. For example,
1426      a value of 11 means that the largest free memory block is 2^10 pages.
1427
1428config LEDS
1429    bool "Timer and CPU usage LEDs"
1430    depends on ARCH_CDB89712 || ARCH_EBSA110 || \
1431           ARCH_EBSA285 || ARCH_INTEGRATOR || \
1432           ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1433           ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
1434           ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
1435           ARCH_AT91 || ARCH_DAVINCI || \
1436           ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1437    help
1438      If you say Y here, the LEDs on your machine will be used
1439      to provide useful information about your current system status.
1440
1441      If you are compiling a kernel for a NetWinder or EBSA-285, you will
1442      be able to select which LEDs are active using the options below. If
1443      you are compiling a kernel for the EBSA-110 or the LART however, the
1444      red LED will simply flash regularly to indicate that the system is
1445      still functional. It is safe to say Y here if you have a CATS
1446      system, but the driver will do nothing.
1447
1448config LEDS_TIMER
1449    bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
1450                OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1451                || MACH_OMAP_PERSEUS2
1452    depends on LEDS
1453    depends on !GENERIC_CLOCKEVENTS
1454    default y if ARCH_EBSA110
1455    help
1456      If you say Y here, one of the system LEDs (the green one on the
1457      NetWinder, the amber one on the EBSA285, or the red one on the LART)
1458      will flash regularly to indicate that the system is still
1459      operational. This is mainly useful to kernel hackers who are
1460      debugging unstable kernels.
1461
1462      The LART uses the same LED for both Timer LED and CPU usage LED
1463      functions. You may choose to use both, but the Timer LED function
1464      will overrule the CPU usage LED.
1465
1466config LEDS_CPU
1467    bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
1468            !ARCH_OMAP) \
1469            || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1470            || MACH_OMAP_PERSEUS2
1471    depends on LEDS
1472    help
1473      If you say Y here, the red LED will be used to give a good real
1474      time indication of CPU usage, by lighting whenever the idle task
1475      is not currently executing.
1476
1477      The LART uses the same LED for both Timer LED and CPU usage LED
1478      functions. You may choose to use both, but the Timer LED function
1479      will overrule the CPU usage LED.
1480
1481config ALIGNMENT_TRAP
1482    bool
1483    depends on CPU_CP15_MMU
1484    default y if !ARCH_EBSA110
1485    select HAVE_PROC_CPU if PROC_FS
1486    help
1487      ARM processors cannot fetch/store information which is not
1488      naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1489      address divisible by 4. On 32-bit ARM processors, these non-aligned
1490      fetch/store instructions will be emulated in software if you say
1491      here, which has a severe performance impact. This is necessary for
1492      correct operation of some network protocols. With an IP-only
1493      configuration it is safe to say N, otherwise say Y.
1494
1495config UACCESS_WITH_MEMCPY
1496    bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1497    depends on MMU && EXPERIMENTAL
1498    default y if CPU_FEROCEON
1499    help
1500      Implement faster copy_to_user and clear_user methods for CPU
1501      cores where a 8-word STM instruction give significantly higher
1502      memory write throughput than a sequence of individual 32bit stores.
1503
1504      A possible side effect is a slight increase in scheduling latency
1505      between threads sharing the same address space if they invoke
1506      such copy operations with large buffers.
1507
1508      However, if the CPU data cache is using a write-allocate mode,
1509      this option is unlikely to provide any performance gain.
1510
1511config SECCOMP
1512    bool
1513    prompt "Enable seccomp to safely compute untrusted bytecode"
1514    ---help---
1515      This kernel feature is useful for number crunching applications
1516      that may need to compute untrusted bytecode during their
1517      execution. By using pipes or other transports made available to
1518      the process as file descriptors supporting the read/write
1519      syscalls, it's possible to isolate those applications in
1520      their own address space using seccomp. Once seccomp is
1521      enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1522      and the task is only allowed to execute a few safe syscalls
1523      defined by each seccomp mode.
1524
1525config CC_STACKPROTECTOR
1526    bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
1527    help
1528      This option turns on the -fstack-protector GCC feature. This
1529      feature puts, at the beginning of functions, a canary value on
1530      the stack just before the return address, and validates
1531      the value just before actually returning. Stack based buffer
1532      overflows (that need to overwrite this return address) now also
1533      overwrite the canary, which gets detected and the attack is then
1534      neutralized via a kernel panic.
1535      This feature requires gcc version 4.2 or above.
1536
1537config DEPRECATED_PARAM_STRUCT
1538    bool "Provide old way to pass kernel parameters"
1539    help
1540      This was deprecated in 2001 and announced to live on for 5 years.
1541      Some old boot loaders still use this way.
1542
1543endmenu
1544
1545menu "Boot options"
1546
1547# Compressed boot loader in ROM. Yes, we really want to ask about
1548# TEXT and BSS so we preserve their values in the config files.
1549config ZBOOT_ROM_TEXT
1550    hex "Compressed ROM boot loader base address"
1551    default "0"
1552    help
1553      The physical address at which the ROM-able zImage is to be
1554      placed in the target. Platforms which normally make use of
1555      ROM-able zImage formats normally set this to a suitable
1556      value in their defconfig file.
1557
1558      If ZBOOT_ROM is not enabled, this has no effect.
1559
1560config ZBOOT_ROM_BSS
1561    hex "Compressed ROM boot loader BSS address"
1562    default "0"
1563    help
1564      The base address of an area of read/write memory in the target
1565      for the ROM-able zImage which must be available while the
1566      decompressor is running. It must be large enough to hold the
1567      entire decompressed kernel plus an additional 128 KiB.
1568      Platforms which normally make use of ROM-able zImage formats
1569      normally set this to a suitable value in their defconfig file.
1570
1571      If ZBOOT_ROM is not enabled, this has no effect.
1572
1573config ZBOOT_ROM
1574    bool "Compressed boot loader in ROM/flash"
1575    depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1576    help
1577      Say Y here if you intend to execute your compressed kernel image
1578      (zImage) directly from ROM or flash. If unsure, say N.
1579
1580config CMDLINE
1581    string "Default kernel command string"
1582    default ""
1583    help
1584      On some architectures (EBSA110 and CATS), there is currently no way
1585      for the boot loader to pass arguments to the kernel. For these
1586      architectures, you should supply some command-line options at build
1587      time by entering them here. As a minimum, you should specify the
1588      memory size and the root device (e.g., mem=64M root=/dev/nfs).
1589
1590config CMDLINE_FORCE
1591    bool "Always use the default kernel command string"
1592    depends on CMDLINE != ""
1593    help
1594      Always use the default kernel command string, even if the boot
1595      loader passes other arguments to the kernel.
1596      This is useful if you cannot or don't want to change the
1597      command-line options your boot loader passes to the kernel.
1598
1599      If unsure, say N.
1600
1601config XIP_KERNEL
1602    bool "Kernel Execute-In-Place from ROM"
1603    depends on !ZBOOT_ROM
1604    help
1605      Execute-In-Place allows the kernel to run from non-volatile storage
1606      directly addressable by the CPU, such as NOR flash. This saves RAM
1607      space since the text section of the kernel is not loaded from flash
1608      to RAM. Read-write sections, such as the data section and stack,
1609      are still copied to RAM. The XIP kernel is not compressed since
1610      it has to run directly from flash, so it will take more space to
1611      store it. The flash address used to link the kernel object files,
1612      and for storing it, is configuration dependent. Therefore, if you
1613      say Y here, you must know the proper physical address where to
1614      store the kernel image depending on your own flash memory usage.
1615
1616      Also note that the make target becomes "make xipImage" rather than
1617      "make zImage" or "make Image". The final kernel binary to put in
1618      ROM memory will be arch/arm/boot/xipImage.
1619
1620      If unsure, say N.
1621
1622config XIP_PHYS_ADDR
1623    hex "XIP Kernel Physical Location"
1624    depends on XIP_KERNEL
1625    default "0x00080000"
1626    help
1627      This is the physical address in your flash memory the kernel will
1628      be linked for and stored to. This address is dependent on your
1629      own flash usage.
1630
1631config KEXEC
1632    bool "Kexec system call (EXPERIMENTAL)"
1633    depends on EXPERIMENTAL
1634    help
1635      kexec is a system call that implements the ability to shutdown your
1636      current kernel, and to start another kernel. It is like a reboot
1637      but it is independent of the system firmware. And like a reboot
1638      you can start any kernel with it, not just Linux.
1639
1640      It is an ongoing process to be certain the hardware in a machine
1641      is properly shutdown, so do not be surprised if this code does not
1642      initially work for you. It may help to enable device hotplugging
1643      support.
1644
1645config ATAGS_PROC
1646    bool "Export atags in procfs"
1647    depends on KEXEC
1648    default y
1649    help
1650      Should the atags used to boot the kernel be exported in an "atags"
1651      file in procfs. Useful with kexec.
1652
1653config AUTO_ZRELADDR
1654    bool "Auto calculation of the decompressed kernel image address"
1655    depends on !ZBOOT_ROM && !ARCH_U300
1656    help
1657      ZRELADDR is the physical address where the decompressed kernel
1658      image will be placed. If AUTO_ZRELADDR is selected, the address
1659      will be determined at run-time by masking the current IP with
1660      0xf8000000. This assumes the zImage being placed in the first 128MB
1661      from start of memory.
1662
1663endmenu
1664
1665menu "CPU Power Management"
1666
1667if ARCH_HAS_CPUFREQ
1668
1669source "drivers/cpufreq/Kconfig"
1670
1671config CPU_FREQ_IMX
1672    tristate "CPUfreq driver for i.MX CPUs"
1673    depends on ARCH_MXC && CPU_FREQ
1674    help
1675      This enables the CPUfreq driver for i.MX CPUs.
1676
1677config CPU_FREQ_SA1100
1678    bool
1679
1680config CPU_FREQ_SA1110
1681    bool
1682
1683config CPU_FREQ_INTEGRATOR
1684    tristate "CPUfreq driver for ARM Integrator CPUs"
1685    depends on ARCH_INTEGRATOR && CPU_FREQ
1686    default y
1687    help
1688      This enables the CPUfreq driver for ARM Integrator CPUs.
1689
1690      For details, take a look at <file:Documentation/cpu-freq>.
1691
1692      If in doubt, say Y.
1693
1694config CPU_FREQ_PXA
1695    bool
1696    depends on CPU_FREQ && ARCH_PXA && PXA25x
1697    default y
1698    select CPU_FREQ_DEFAULT_GOV_USERSPACE
1699
1700config CPU_FREQ_S3C64XX
1701    bool "CPUfreq support for Samsung S3C64XX CPUs"
1702    depends on CPU_FREQ && CPU_S3C6410
1703
1704config CPU_FREQ_S3C
1705    bool
1706    help
1707      Internal configuration node for common cpufreq on Samsung SoC
1708
1709config CPU_FREQ_S3C24XX
1710    bool "CPUfreq driver for Samsung S3C24XX series CPUs"
1711    depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1712    select CPU_FREQ_S3C
1713    help
1714      This enables the CPUfreq driver for the Samsung S3C24XX family
1715      of CPUs.
1716
1717      For details, take a look at <file:Documentation/cpu-freq>.
1718
1719      If in doubt, say N.
1720
1721config CPU_FREQ_S3C24XX_PLL
1722    bool "Support CPUfreq changing of PLL frequency"
1723    depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1724    help
1725      Compile in support for changing the PLL frequency from the
1726      S3C24XX series CPUfreq driver. The PLL takes time to settle
1727      after a frequency change, so by default it is not enabled.
1728
1729      This also means that the PLL tables for the selected CPU(s) will
1730      be built which may increase the size of the kernel image.
1731
1732config CPU_FREQ_S3C24XX_DEBUG
1733    bool "Debug CPUfreq Samsung driver core"
1734    depends on CPU_FREQ_S3C24XX
1735    help
1736      Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1737
1738config CPU_FREQ_S3C24XX_IODEBUG
1739    bool "Debug CPUfreq Samsung driver IO timing"
1740    depends on CPU_FREQ_S3C24XX
1741    help
1742      Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1743
1744config CPU_FREQ_S3C24XX_DEBUGFS
1745    bool "Export debugfs for CPUFreq"
1746    depends on CPU_FREQ_S3C24XX && DEBUG_FS
1747    help
1748      Export status information via debugfs.
1749
1750endif
1751
1752source "drivers/cpuidle/Kconfig"
1753
1754endmenu
1755
1756menu "Floating point emulation"
1757
1758comment "At least one emulation must be selected"
1759
1760config FPE_NWFPE
1761    bool "NWFPE math emulation"
1762    depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1763    ---help---
1764      Say Y to include the NWFPE floating point emulator in the kernel.
1765      This is necessary to run most binaries. Linux does not currently
1766      support floating point hardware so you need to say Y here even if
1767      your machine has an FPA or floating point co-processor podule.
1768
1769      You may say N here if you are going to load the Acorn FPEmulator
1770      early in the bootup.
1771
1772config FPE_NWFPE_XP
1773    bool "Support extended precision"
1774    depends on FPE_NWFPE
1775    help
1776      Say Y to include 80-bit support in the kernel floating-point
1777      emulator. Otherwise, only 32 and 64-bit support is compiled in.
1778      Note that gcc does not generate 80-bit operations by default,
1779      so in most cases this option only enlarges the size of the
1780      floating point emulator without any good reason.
1781
1782      You almost surely want to say N here.
1783
1784config FPE_FASTFPE
1785    bool "FastFPE math emulation (EXPERIMENTAL)"
1786    depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1787    ---help---
1788      Say Y here to include the FAST floating point emulator in the kernel.
1789      This is an experimental much faster emulator which now also has full
1790      precision for the mantissa. It does not support any exceptions.
1791      It is very simple, and approximately 3-6 times faster than NWFPE.
1792
1793      It should be sufficient for most programs. It may be not suitable
1794      for scientific calculations, but you have to check this for yourself.
1795      If you do not feel you need a faster FP emulation you should better
1796      choose NWFPE.
1797
1798config VFP
1799    bool "VFP-format floating point maths"
1800    depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1801    help
1802      Say Y to include VFP support code in the kernel. This is needed
1803      if your hardware includes a VFP unit.
1804
1805      Please see <file:Documentation/arm/VFP/release-notes.txt> for
1806      release notes and additional status information.
1807
1808      Say N if your target does not have VFP hardware.
1809
1810config VFPv3
1811    bool
1812    depends on VFP
1813    default y if CPU_V7
1814
1815config NEON
1816    bool "Advanced SIMD (NEON) Extension support"
1817    depends on VFPv3 && CPU_V7
1818    help
1819      Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1820      Extension.
1821
1822endmenu
1823
1824menu "Userspace binary formats"
1825
1826source "fs/Kconfig.binfmt"
1827
1828config ARTHUR
1829    tristate "RISC OS personality"
1830    depends on !AEABI
1831    help
1832      Say Y here to include the kernel code necessary if you want to run
1833      Acorn RISC OS/Arthur binaries under Linux. This code is still very
1834      experimental; if this sounds frightening, say N and sleep in peace.
1835      You can also say M here to compile this support as a module (which
1836      will be called arthur).
1837
1838endmenu
1839
1840menu "Power management options"
1841
1842source "kernel/power/Kconfig"
1843
1844config ARCH_SUSPEND_POSSIBLE
1845    def_bool y
1846
1847endmenu
1848
1849source "net/Kconfig"
1850
1851source "drivers/Kconfig"
1852
1853source "fs/Kconfig"
1854
1855source "arch/arm/Kconfig.debug"
1856
1857source "security/Kconfig"
1858
1859source "crypto/Kconfig"
1860
1861source "lib/Kconfig"
1862

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