Root/arch/ia64/kernel/entry.S

1/*
2 * arch/ia64/kernel/entry.S
3 *
4 * Kernel entry points.
5 *
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
15 */
16/*
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
19 * to physical mode.
20 *
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
23 * 11/07/2000
24 */
25/*
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
28 * pv_ops.
29 */
30/*
31 * Global (preserved) predicate usage on syscall entry/exit path:
32 *
33 * pKStk: See entry.h.
34 * pUStk: See entry.h.
35 * pSys: See entry.h.
36 * pNonSys: !pSys
37 */
38
39
40#include <asm/asmmacro.h>
41#include <asm/cache.h>
42#include <asm/errno.h>
43#include <asm/kregs.h>
44#include <asm/asm-offsets.h>
45#include <asm/pgtable.h>
46#include <asm/percpu.h>
47#include <asm/processor.h>
48#include <asm/thread_info.h>
49#include <asm/unistd.h>
50#include <asm/ftrace.h>
51
52#include "minstate.h"
53
54#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
55    /*
56     * execve() is special because in case of success, we need to
57     * setup a null register window frame.
58     */
59ENTRY(ia64_execve)
60    /*
61     * Allocate 8 input registers since ptrace() may clobber them
62     */
63    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
64    alloc loc1=ar.pfs,8,2,4,0
65    mov loc0=rp
66    .body
67    mov out0=in0 // filename
68    ;; // stop bit between alloc and call
69    mov out1=in1 // argv
70    mov out2=in2 // envp
71    add out3=16,sp // regs
72    br.call.sptk.many rp=sys_execve
73.ret0:
74    cmp4.ge p6,p7=r8,r0
75    mov ar.pfs=loc1 // restore ar.pfs
76    sxt4 r8=r8 // return 64-bit result
77    ;;
78    stf.spill [sp]=f0
79(p6) cmp.ne pKStk,pUStk=r0,r0 // a successful execve() lands us in user-mode...
80    mov rp=loc0
81(p6) mov ar.pfs=r0 // clear ar.pfs on success
82(p7) br.ret.sptk.many rp
83
84    /*
85     * In theory, we'd have to zap this state only to prevent leaking of
86     * security sensitive state (e.g., if current->mm->dumpable is zero). However,
87     * this executes in less than 20 cycles even on Itanium, so it's not worth
88     * optimizing for...).
89     */
90    mov ar.unat=0; mov ar.lc=0
91    mov r4=0; mov f2=f0; mov b1=r0
92    mov r5=0; mov f3=f0; mov b2=r0
93    mov r6=0; mov f4=f0; mov b3=r0
94    mov r7=0; mov f5=f0; mov b4=r0
95    ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
96    ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
97    ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
98    ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
99    ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
100    ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
101    ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
102    br.ret.sptk.many rp
103END(ia64_execve)
104
105/*
106 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
107 * u64 tls)
108 */
109GLOBAL_ENTRY(sys_clone2)
110    /*
111     * Allocate 8 input registers since ptrace() may clobber them
112     */
113    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
114    alloc r16=ar.pfs,8,2,6,0
115    DO_SAVE_SWITCH_STACK
116    adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
117    mov loc0=rp
118    mov loc1=r16 // save ar.pfs across do_fork
119    .body
120    mov out1=in1
121    mov out3=in2
122    tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
123    mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
124    ;;
125(p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
126    mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
127    adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
128    mov out0=in0 // out0 = clone_flags
129    br.call.sptk.many rp=do_fork
130.ret1: .restore sp
131    adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
132    mov ar.pfs=loc1
133    mov rp=loc0
134    br.ret.sptk.many rp
135END(sys_clone2)
136
137/*
138 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
139 * Deprecated. Use sys_clone2() instead.
140 */
141GLOBAL_ENTRY(sys_clone)
142    /*
143     * Allocate 8 input registers since ptrace() may clobber them
144     */
145    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
146    alloc r16=ar.pfs,8,2,6,0
147    DO_SAVE_SWITCH_STACK
148    adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
149    mov loc0=rp
150    mov loc1=r16 // save ar.pfs across do_fork
151    .body
152    mov out1=in1
153    mov out3=16 // stacksize (compensates for 16-byte scratch area)
154    tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
155    mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
156    ;;
157(p6) st8 [r2]=in4 // store TLS in r13 (tp)
158    mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
159    adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
160    mov out0=in0 // out0 = clone_flags
161    br.call.sptk.many rp=do_fork
162.ret2: .restore sp
163    adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
164    mov ar.pfs=loc1
165    mov rp=loc0
166    br.ret.sptk.many rp
167END(sys_clone)
168#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
169
170/*
171 * prev_task <- ia64_switch_to(struct task_struct *next)
172 * With Ingo's new scheduler, interrupts are disabled when this routine gets
173 * called. The code starting at .map relies on this. The rest of the code
174 * doesn't care about the interrupt masking status.
175 */
176GLOBAL_ENTRY(__paravirt_switch_to)
177    .prologue
178    alloc r16=ar.pfs,1,0,0,0
179    DO_SAVE_SWITCH_STACK
180    .body
181
182    adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
183    movl r25=init_task
184    mov r27=IA64_KR(CURRENT_STACK)
185    adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
186    dep r20=0,in0,61,3 // physical address of "next"
187    ;;
188    st8 [r22]=sp // save kernel stack pointer of old task
189    shr.u r26=r20,IA64_GRANULE_SHIFT
190    cmp.eq p7,p6=r25,in0
191    ;;
192    /*
193     * If we've already mapped this task's page, we can skip doing it again.
194     */
195(p6) cmp.eq p7,p6=r26,r27
196(p6) br.cond.dpnt .map
197    ;;
198.done:
199    ld8 sp=[r21] // load kernel stack pointer of new task
200    MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
201    mov r8=r13 // return pointer to previously running task
202    mov r13=in0 // set "current" pointer
203    ;;
204    DO_LOAD_SWITCH_STACK
205
206#ifdef CONFIG_SMP
207    sync.i // ensure "fc"s done by this CPU are visible on other CPUs
208#endif
209    br.ret.sptk.many rp // boogie on out in new context
210
211.map:
212    RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
213    movl r25=PAGE_KERNEL
214    ;;
215    srlz.d
216    or r23=r25,r20 // construct PA | page properties
217    mov r25=IA64_GRANULE_SHIFT<<2
218    ;;
219    MOV_TO_ITIR(p0, r25, r8)
220    MOV_TO_IFA(in0, r8) // VA of next task...
221    ;;
222    mov r25=IA64_TR_CURRENT_STACK
223    MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
224    ;;
225    itr.d dtr[r25]=r23 // wire in new mapping...
226    SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
227    br.cond.sptk .done
228END(__paravirt_switch_to)
229
230#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
231/*
232 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
233 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
234 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
235 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
236 * problem. Also, we don't need to specify unwind information for preserved registers
237 * that are not modified in save_switch_stack as the right unwind information is already
238 * specified at the call-site of save_switch_stack.
239 */
240
241/*
242 * save_switch_stack:
243 * - r16 holds ar.pfs
244 * - b7 holds address to return to
245 * - rp (b0) holds return address to save
246 */
247GLOBAL_ENTRY(save_switch_stack)
248    .prologue
249    .altrp b7
250    flushrs // flush dirty regs to backing store (must be first in insn group)
251    .save @priunat,r17
252    mov r17=ar.unat // preserve caller's
253    .body
254#ifdef CONFIG_ITANIUM
255    adds r2=16+128,sp
256    adds r3=16+64,sp
257    adds r14=SW(R4)+16,sp
258    ;;
259    st8.spill [r14]=r4,16 // spill r4
260    lfetch.fault.excl.nt1 [r3],128
261    ;;
262    lfetch.fault.excl.nt1 [r2],128
263    lfetch.fault.excl.nt1 [r3],128
264    ;;
265    lfetch.fault.excl [r2]
266    lfetch.fault.excl [r3]
267    adds r15=SW(R5)+16,sp
268#else
269    add r2=16+3*128,sp
270    add r3=16,sp
271    add r14=SW(R4)+16,sp
272    ;;
273    st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
274    lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
275    ;;
276    lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
277    lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
278    ;;
279    lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
280    lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
281    adds r15=SW(R5)+16,sp
282#endif
283    ;;
284    st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
285    mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
286    add r2=SW(F2)+16,sp // r2 = &sw->f2
287    ;;
288    st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
289    mov.m r18=ar.fpsr // preserve fpsr
290    add r3=SW(F3)+16,sp // r3 = &sw->f3
291    ;;
292    stf.spill [r2]=f2,32
293    mov.m r19=ar.rnat
294    mov r21=b0
295
296    stf.spill [r3]=f3,32
297    st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
298    mov r22=b1
299    ;;
300    // since we're done with the spills, read and save ar.unat:
301    mov.m r29=ar.unat
302    mov.m r20=ar.bspstore
303    mov r23=b2
304    stf.spill [r2]=f4,32
305    stf.spill [r3]=f5,32
306    mov r24=b3
307    ;;
308    st8 [r14]=r21,SW(B1)-SW(B0) // save b0
309    st8 [r15]=r23,SW(B3)-SW(B2) // save b2
310    mov r25=b4
311    mov r26=b5
312    ;;
313    st8 [r14]=r22,SW(B4)-SW(B1) // save b1
314    st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
315    mov r21=ar.lc // I-unit
316    stf.spill [r2]=f12,32
317    stf.spill [r3]=f13,32
318    ;;
319    st8 [r14]=r25,SW(B5)-SW(B4) // save b4
320    st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
321    stf.spill [r2]=f14,32
322    stf.spill [r3]=f15,32
323    ;;
324    st8 [r14]=r26 // save b5
325    st8 [r15]=r21 // save ar.lc
326    stf.spill [r2]=f16,32
327    stf.spill [r3]=f17,32
328    ;;
329    stf.spill [r2]=f18,32
330    stf.spill [r3]=f19,32
331    ;;
332    stf.spill [r2]=f20,32
333    stf.spill [r3]=f21,32
334    ;;
335    stf.spill [r2]=f22,32
336    stf.spill [r3]=f23,32
337    ;;
338    stf.spill [r2]=f24,32
339    stf.spill [r3]=f25,32
340    ;;
341    stf.spill [r2]=f26,32
342    stf.spill [r3]=f27,32
343    ;;
344    stf.spill [r2]=f28,32
345    stf.spill [r3]=f29,32
346    ;;
347    stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
348    stf.spill [r3]=f31,SW(PR)-SW(F31)
349    add r14=SW(CALLER_UNAT)+16,sp
350    ;;
351    st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
352    st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
353    mov r21=pr
354    ;;
355    st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
356    st8 [r3]=r21 // save predicate registers
357    ;;
358    st8 [r2]=r20 // save ar.bspstore
359    st8 [r14]=r18 // save fpsr
360    mov ar.rsc=3 // put RSE back into eager mode, pl 0
361    br.cond.sptk.many b7
362END(save_switch_stack)
363
364/*
365 * load_switch_stack:
366 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
367 * - b7 holds address to return to
368 * - must not touch r8-r11
369 */
370GLOBAL_ENTRY(load_switch_stack)
371    .prologue
372    .altrp b7
373
374    .body
375    lfetch.fault.nt1 [sp]
376    adds r2=SW(AR_BSPSTORE)+16,sp
377    adds r3=SW(AR_UNAT)+16,sp
378    mov ar.rsc=0 // put RSE into enforced lazy mode
379    adds r14=SW(CALLER_UNAT)+16,sp
380    adds r15=SW(AR_FPSR)+16,sp
381    ;;
382    ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
383    ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
384    ;;
385    ld8 r21=[r2],16 // restore b0
386    ld8 r22=[r3],16 // restore b1
387    ;;
388    ld8 r23=[r2],16 // restore b2
389    ld8 r24=[r3],16 // restore b3
390    ;;
391    ld8 r25=[r2],16 // restore b4
392    ld8 r26=[r3],16 // restore b5
393    ;;
394    ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
395    ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
396    ;;
397    ld8 r28=[r2] // restore pr
398    ld8 r30=[r3] // restore rnat
399    ;;
400    ld8 r18=[r14],16 // restore caller's unat
401    ld8 r19=[r15],24 // restore fpsr
402    ;;
403    ldf.fill f2=[r14],32
404    ldf.fill f3=[r15],32
405    ;;
406    ldf.fill f4=[r14],32
407    ldf.fill f5=[r15],32
408    ;;
409    ldf.fill f12=[r14],32
410    ldf.fill f13=[r15],32
411    ;;
412    ldf.fill f14=[r14],32
413    ldf.fill f15=[r15],32
414    ;;
415    ldf.fill f16=[r14],32
416    ldf.fill f17=[r15],32
417    ;;
418    ldf.fill f18=[r14],32
419    ldf.fill f19=[r15],32
420    mov b0=r21
421    ;;
422    ldf.fill f20=[r14],32
423    ldf.fill f21=[r15],32
424    mov b1=r22
425    ;;
426    ldf.fill f22=[r14],32
427    ldf.fill f23=[r15],32
428    mov b2=r23
429    ;;
430    mov ar.bspstore=r27
431    mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
432    mov b3=r24
433    ;;
434    ldf.fill f24=[r14],32
435    ldf.fill f25=[r15],32
436    mov b4=r25
437    ;;
438    ldf.fill f26=[r14],32
439    ldf.fill f27=[r15],32
440    mov b5=r26
441    ;;
442    ldf.fill f28=[r14],32
443    ldf.fill f29=[r15],32
444    mov ar.pfs=r16
445    ;;
446    ldf.fill f30=[r14],32
447    ldf.fill f31=[r15],24
448    mov ar.lc=r17
449    ;;
450    ld8.fill r4=[r14],16
451    ld8.fill r5=[r15],16
452    mov pr=r28,-1
453    ;;
454    ld8.fill r6=[r14],16
455    ld8.fill r7=[r15],16
456
457    mov ar.unat=r18 // restore caller's unat
458    mov ar.rnat=r30 // must restore after bspstore but before rsc!
459    mov ar.fpsr=r19 // restore fpsr
460    mov ar.rsc=3 // put RSE back into eager mode, pl 0
461    br.cond.sptk.many b7
462END(load_switch_stack)
463
464GLOBAL_ENTRY(prefetch_stack)
465    add r14 = -IA64_SWITCH_STACK_SIZE, sp
466    add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
467    ;;
468    ld8 r16 = [r15] // load next's stack pointer
469    lfetch.fault.excl [r14], 128
470    ;;
471    lfetch.fault.excl [r14], 128
472    lfetch.fault [r16], 128
473    ;;
474    lfetch.fault.excl [r14], 128
475    lfetch.fault [r16], 128
476    ;;
477    lfetch.fault.excl [r14], 128
478    lfetch.fault [r16], 128
479    ;;
480    lfetch.fault.excl [r14], 128
481    lfetch.fault [r16], 128
482    ;;
483    lfetch.fault [r16], 128
484    br.ret.sptk.many rp
485END(prefetch_stack)
486
487GLOBAL_ENTRY(kernel_execve)
488    rum psr.ac
489    mov r15=__NR_execve // put syscall number in place
490    break __BREAK_SYSCALL
491    br.ret.sptk.many rp
492END(kernel_execve)
493
494GLOBAL_ENTRY(clone)
495    mov r15=__NR_clone // put syscall number in place
496    break __BREAK_SYSCALL
497    br.ret.sptk.many rp
498END(clone)
499
500    /*
501     * Invoke a system call, but do some tracing before and after the call.
502     * We MUST preserve the current register frame throughout this routine
503     * because some system calls (such as ia64_execve) directly
504     * manipulate ar.pfs.
505     */
506GLOBAL_ENTRY(ia64_trace_syscall)
507    PT_REGS_UNWIND_INFO(0)
508    /*
509     * We need to preserve the scratch registers f6-f11 in case the system
510     * call is sigreturn.
511     */
512    adds r16=PT(F6)+16,sp
513    adds r17=PT(F7)+16,sp
514    ;;
515     stf.spill [r16]=f6,32
516     stf.spill [r17]=f7,32
517    ;;
518     stf.spill [r16]=f8,32
519     stf.spill [r17]=f9,32
520    ;;
521     stf.spill [r16]=f10
522     stf.spill [r17]=f11
523    br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
524    cmp.lt p6,p0=r8,r0 // check tracehook
525    adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
526    adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
527    mov r10=0
528(p6) br.cond.sptk strace_error // syscall failed ->
529    adds r16=PT(F6)+16,sp
530    adds r17=PT(F7)+16,sp
531    ;;
532    ldf.fill f6=[r16],32
533    ldf.fill f7=[r17],32
534    ;;
535    ldf.fill f8=[r16],32
536    ldf.fill f9=[r17],32
537    ;;
538    ldf.fill f10=[r16]
539    ldf.fill f11=[r17]
540    // the syscall number may have changed, so re-load it and re-calculate the
541    // syscall entry-point:
542    adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
543    ;;
544    ld8 r15=[r15]
545    mov r3=NR_syscalls - 1
546    ;;
547    adds r15=-1024,r15
548    movl r16=sys_call_table
549    ;;
550    shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
551    cmp.leu p6,p7=r15,r3
552    ;;
553(p6) ld8 r20=[r20] // load address of syscall entry point
554(p7) movl r20=sys_ni_syscall
555    ;;
556    mov b6=r20
557    br.call.sptk.many rp=b6 // do the syscall
558.strace_check_retval:
559    cmp.lt p6,p0=r8,r0 // syscall failed?
560    adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
561    adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
562    mov r10=0
563(p6) br.cond.sptk strace_error // syscall failed ->
564    ;; // avoid RAW on r10
565.strace_save_retval:
566.mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
567.mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
568    br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
569.ret3:
570(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
571(pUStk) rsm psr.i // disable interrupts
572    br.cond.sptk ia64_work_pending_syscall_end
573
574strace_error:
575    ld8 r3=[r2] // load pt_regs.r8
576    sub r9=0,r8 // negate return value to get errno value
577    ;;
578    cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
579    adds r3=16,r2 // r3=&pt_regs.r10
580    ;;
581(p6) mov r10=-1
582(p6) mov r8=r9
583    br.cond.sptk .strace_save_retval
584END(ia64_trace_syscall)
585
586    /*
587     * When traced and returning from sigreturn, we invoke syscall_trace but then
588     * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
589     */
590GLOBAL_ENTRY(ia64_strace_leave_kernel)
591    PT_REGS_UNWIND_INFO(0)
592{ /*
593     * Some versions of gas generate bad unwind info if the first instruction of a
594     * procedure doesn't go into the first slot of a bundle. This is a workaround.
595     */
596    nop.m 0
597    nop.i 0
598    br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
599}
600.ret4: br.cond.sptk ia64_leave_kernel
601END(ia64_strace_leave_kernel)
602
603GLOBAL_ENTRY(ia64_ret_from_clone)
604    PT_REGS_UNWIND_INFO(0)
605{ /*
606     * Some versions of gas generate bad unwind info if the first instruction of a
607     * procedure doesn't go into the first slot of a bundle. This is a workaround.
608     */
609    nop.m 0
610    nop.i 0
611    /*
612     * We need to call schedule_tail() to complete the scheduling process.
613     * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
614     * address of the previously executing task.
615     */
616    br.call.sptk.many rp=ia64_invoke_schedule_tail
617}
618.ret8:
619    adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
620    ;;
621    ld4 r2=[r2]
622    ;;
623    mov r8=0
624    and r2=_TIF_SYSCALL_TRACEAUDIT,r2
625    ;;
626    cmp.ne p6,p0=r2,r0
627(p6) br.cond.spnt .strace_check_retval
628    ;; // added stop bits to prevent r8 dependency
629END(ia64_ret_from_clone)
630    // fall through
631GLOBAL_ENTRY(ia64_ret_from_syscall)
632    PT_REGS_UNWIND_INFO(0)
633    cmp.ge p6,p7=r8,r0 // syscall executed successfully?
634    adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
635    mov r10=r0 // clear error indication in r10
636(p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
637#ifdef CONFIG_PARAVIRT
638    ;;
639    br.cond.sptk.few ia64_leave_syscall
640    ;;
641#endif /* CONFIG_PARAVIRT */
642END(ia64_ret_from_syscall)
643#ifndef CONFIG_PARAVIRT
644    // fall through
645#endif
646#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
647
648/*
649 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
650 * need to switch to bank 0 and doesn't restore the scratch registers.
651 * To avoid leaking kernel bits, the scratch registers are set to
652 * the following known-to-be-safe values:
653 *
654 * r1: restored (global pointer)
655 * r2: cleared
656 * r3: 1 (when returning to user-level)
657 * r8-r11: restored (syscall return value(s))
658 * r12: restored (user-level stack pointer)
659 * r13: restored (user-level thread pointer)
660 * r14: set to __kernel_syscall_via_epc
661 * r15: restored (syscall #)
662 * r16-r17: cleared
663 * r18: user-level b6
664 * r19: cleared
665 * r20: user-level ar.fpsr
666 * r21: user-level b0
667 * r22: cleared
668 * r23: user-level ar.bspstore
669 * r24: user-level ar.rnat
670 * r25: user-level ar.unat
671 * r26: user-level ar.pfs
672 * r27: user-level ar.rsc
673 * r28: user-level ip
674 * r29: user-level psr
675 * r30: user-level cfm
676 * r31: user-level pr
677 * f6-f11: cleared
678 * pr: restored (user-level pr)
679 * b0: restored (user-level rp)
680 * b6: restored
681 * b7: set to __kernel_syscall_via_epc
682 * ar.unat: restored (user-level ar.unat)
683 * ar.pfs: restored (user-level ar.pfs)
684 * ar.rsc: restored (user-level ar.rsc)
685 * ar.rnat: restored (user-level ar.rnat)
686 * ar.bspstore: restored (user-level ar.bspstore)
687 * ar.fpsr: restored (user-level ar.fpsr)
688 * ar.ccv: cleared
689 * ar.csd: cleared
690 * ar.ssd: cleared
691 */
692GLOBAL_ENTRY(__paravirt_leave_syscall)
693    PT_REGS_UNWIND_INFO(0)
694    /*
695     * work.need_resched etc. mustn't get changed by this CPU before it returns to
696     * user- or fsys-mode, hence we disable interrupts early on.
697     *
698     * p6 controls whether current_thread_info()->flags needs to be check for
699     * extra work. We always check for extra work when returning to user-level.
700     * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
701     * is 0. After extra work processing has been completed, execution
702     * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
703     * needs to be redone.
704     */
705#ifdef CONFIG_PREEMPT
706    RSM_PSR_I(p0, r2, r18) // disable interrupts
707    cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
708(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
709    ;;
710    .pred.rel.mutex pUStk,pKStk
711(pKStk) ld4 r21=[r20] // r21 <- preempt_count
712(pUStk) mov r21=0 // r21 <- 0
713    ;;
714    cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
715#else /* !CONFIG_PREEMPT */
716    RSM_PSR_I(pUStk, r2, r18)
717    cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
718(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
719#endif
720.global __paravirt_work_processed_syscall;
721__paravirt_work_processed_syscall:
722#ifdef CONFIG_VIRT_CPU_ACCOUNTING
723    adds r2=PT(LOADRS)+16,r12
724    MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
725    adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
726    ;;
727(p6) ld4 r31=[r18] // load current_thread_info()->flags
728    ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
729    adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
730    ;;
731#else
732    adds r2=PT(LOADRS)+16,r12
733    adds r3=PT(AR_BSPSTORE)+16,r12
734    adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
735    ;;
736(p6) ld4 r31=[r18] // load current_thread_info()->flags
737    ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
738    nop.i 0
739    ;;
740#endif
741    mov r16=ar.bsp // M2 get existing backing store pointer
742    ld8 r18=[r2],PT(R9)-PT(B6) // load b6
743(p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
744    ;;
745    ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
746(p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
747(p6) br.cond.spnt .work_pending_syscall
748    ;;
749    // start restoring the state saved on the kernel stack (struct pt_regs):
750    ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
751    ld8 r11=[r3],PT(CR_IIP)-PT(R11)
752(pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
753    ;;
754    invala // M0|1 invalidate ALAT
755    RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
756    cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
757
758    ld8 r29=[r2],16 // M0|1 load cr.ipsr
759    ld8 r28=[r3],16 // M0|1 load cr.iip
760#ifdef CONFIG_VIRT_CPU_ACCOUNTING
761(pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
762    ;;
763    ld8 r30=[r2],16 // M0|1 load cr.ifs
764    ld8 r25=[r3],16 // M0|1 load ar.unat
765(pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
766    ;;
767#else
768    mov r22=r0 // A clear r22
769    ;;
770    ld8 r30=[r2],16 // M0|1 load cr.ifs
771    ld8 r25=[r3],16 // M0|1 load ar.unat
772(pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
773    ;;
774#endif
775    ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
776    MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
777    nop 0
778    ;;
779    ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
780    ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
781    mov f6=f0 // F clear f6
782    ;;
783    ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
784    ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
785    mov f7=f0 // F clear f7
786    ;;
787    ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
788    ld8.fill r1=[r3],16 // M0|1 load r1
789(pUStk) mov r17=1 // A
790    ;;
791#ifdef CONFIG_VIRT_CPU_ACCOUNTING
792(pUStk) st1 [r15]=r17 // M2|3
793#else
794(pUStk) st1 [r14]=r17 // M2|3
795#endif
796    ld8.fill r13=[r3],16 // M0|1
797    mov f8=f0 // F clear f8
798    ;;
799    ld8.fill r12=[r2] // M0|1 restore r12 (sp)
800    ld8.fill r15=[r3] // M0|1 restore r15
801    mov b6=r18 // I0 restore b6
802
803    LOAD_PHYS_STACK_REG_SIZE(r17)
804    mov f9=f0 // F clear f9
805(pKStk) br.cond.dpnt.many skip_rbs_switch // B
806
807    srlz.d // M0 ensure interruption collection is off (for cover)
808    shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
809    COVER // B add current frame into dirty partition & set cr.ifs
810    ;;
811#ifdef CONFIG_VIRT_CPU_ACCOUNTING
812    mov r19=ar.bsp // M2 get new backing store pointer
813    st8 [r14]=r22 // M save time at leave
814    mov f10=f0 // F clear f10
815
816    mov r22=r0 // A clear r22
817    movl r14=__kernel_syscall_via_epc // X
818    ;;
819#else
820    mov r19=ar.bsp // M2 get new backing store pointer
821    mov f10=f0 // F clear f10
822
823    nop.m 0
824    movl r14=__kernel_syscall_via_epc // X
825    ;;
826#endif
827    mov.m ar.csd=r0 // M2 clear ar.csd
828    mov.m ar.ccv=r0 // M2 clear ar.ccv
829    mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
830
831    mov.m ar.ssd=r0 // M2 clear ar.ssd
832    mov f11=f0 // F clear f11
833    br.cond.sptk.many rbs_switch // B
834END(__paravirt_leave_syscall)
835
836GLOBAL_ENTRY(__paravirt_leave_kernel)
837    PT_REGS_UNWIND_INFO(0)
838    /*
839     * work.need_resched etc. mustn't get changed by this CPU before it returns to
840     * user- or fsys-mode, hence we disable interrupts early on.
841     *
842     * p6 controls whether current_thread_info()->flags needs to be check for
843     * extra work. We always check for extra work when returning to user-level.
844     * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
845     * is 0. After extra work processing has been completed, execution
846     * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
847     * needs to be redone.
848     */
849#ifdef CONFIG_PREEMPT
850    RSM_PSR_I(p0, r17, r31) // disable interrupts
851    cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
852(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
853    ;;
854    .pred.rel.mutex pUStk,pKStk
855(pKStk) ld4 r21=[r20] // r21 <- preempt_count
856(pUStk) mov r21=0 // r21 <- 0
857    ;;
858    cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
859#else
860    RSM_PSR_I(pUStk, r17, r31)
861    cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
862(pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
863#endif
864.work_processed_kernel:
865    adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
866    ;;
867(p6) ld4 r31=[r17] // load current_thread_info()->flags
868    adds r21=PT(PR)+16,r12
869    ;;
870
871    lfetch [r21],PT(CR_IPSR)-PT(PR)
872    adds r2=PT(B6)+16,r12
873    adds r3=PT(R16)+16,r12
874    ;;
875    lfetch [r21]
876    ld8 r28=[r2],8 // load b6
877    adds r29=PT(R24)+16,r12
878
879    ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
880    adds r30=PT(AR_CCV)+16,r12
881(p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
882    ;;
883    ld8.fill r24=[r29]
884    ld8 r15=[r30] // load ar.ccv
885(p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
886    ;;
887    ld8 r29=[r2],16 // load b7
888    ld8 r30=[r3],16 // load ar.csd
889(p6) br.cond.spnt .work_pending
890    ;;
891    ld8 r31=[r2],16 // load ar.ssd
892    ld8.fill r8=[r3],16
893    ;;
894    ld8.fill r9=[r2],16
895    ld8.fill r10=[r3],PT(R17)-PT(R10)
896    ;;
897    ld8.fill r11=[r2],PT(R18)-PT(R11)
898    ld8.fill r17=[r3],16
899    ;;
900    ld8.fill r18=[r2],16
901    ld8.fill r19=[r3],16
902    ;;
903    ld8.fill r20=[r2],16
904    ld8.fill r21=[r3],16
905    mov ar.csd=r30
906    mov ar.ssd=r31
907    ;;
908    RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
909    invala // invalidate ALAT
910    ;;
911    ld8.fill r22=[r2],24
912    ld8.fill r23=[r3],24
913    mov b6=r28
914    ;;
915    ld8.fill r25=[r2],16
916    ld8.fill r26=[r3],16
917    mov b7=r29
918    ;;
919    ld8.fill r27=[r2],16
920    ld8.fill r28=[r3],16
921    ;;
922    ld8.fill r29=[r2],16
923    ld8.fill r30=[r3],24
924    ;;
925    ld8.fill r31=[r2],PT(F9)-PT(R31)
926    adds r3=PT(F10)-PT(F6),r3
927    ;;
928    ldf.fill f9=[r2],PT(F6)-PT(F9)
929    ldf.fill f10=[r3],PT(F8)-PT(F10)
930    ;;
931    ldf.fill f6=[r2],PT(F7)-PT(F6)
932    ;;
933    ldf.fill f7=[r2],PT(F11)-PT(F7)
934    ldf.fill f8=[r3],32
935    ;;
936    srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
937    mov ar.ccv=r15
938    ;;
939    ldf.fill f11=[r2]
940    BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
941    ;;
942(pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
943    adds r16=PT(CR_IPSR)+16,r12
944    adds r17=PT(CR_IIP)+16,r12
945
946#ifdef CONFIG_VIRT_CPU_ACCOUNTING
947    .pred.rel.mutex pUStk,pKStk
948    MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
949    MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
950    nop.i 0
951    ;;
952#else
953    MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
954    nop.i 0
955    nop.i 0
956    ;;
957#endif
958    ld8 r29=[r16],16 // load cr.ipsr
959    ld8 r28=[r17],16 // load cr.iip
960    ;;
961    ld8 r30=[r16],16 // load cr.ifs
962    ld8 r25=[r17],16 // load ar.unat
963    ;;
964    ld8 r26=[r16],16 // load ar.pfs
965    ld8 r27=[r17],16 // load ar.rsc
966    cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
967    ;;
968    ld8 r24=[r16],16 // load ar.rnat (may be garbage)
969    ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
970    ;;
971    ld8 r31=[r16],16 // load predicates
972    ld8 r21=[r17],16 // load b0
973    ;;
974    ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
975    ld8.fill r1=[r17],16 // load r1
976    ;;
977    ld8.fill r12=[r16],16
978    ld8.fill r13=[r17],16
979#ifdef CONFIG_VIRT_CPU_ACCOUNTING
980(pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
981#else
982(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
983#endif
984    ;;
985    ld8 r20=[r16],16 // ar.fpsr
986    ld8.fill r15=[r17],16
987#ifdef CONFIG_VIRT_CPU_ACCOUNTING
988(pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
989#endif
990    ;;
991    ld8.fill r14=[r16],16
992    ld8.fill r2=[r17]
993(pUStk) mov r17=1
994    ;;
995#ifdef CONFIG_VIRT_CPU_ACCOUNTING
996    // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
997    // mib : mov add br -> mib : ld8 add br
998    // bbb_ : br nop cover;; mbb_ : mov br cover;;
999    //
1000    // no one require bsp in r16 if (pKStk) branch is selected.
1001(pUStk) st8 [r3]=r22 // save time at leave
1002(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1003    shr.u r18=r19,16 // get byte size of existing "dirty" partition
1004    ;;
1005    ld8.fill r3=[r16] // deferred
1006    LOAD_PHYS_STACK_REG_SIZE(r17)
1007(pKStk) br.cond.dpnt skip_rbs_switch
1008    mov r16=ar.bsp // get existing backing store pointer
1009#else
1010    ld8.fill r3=[r16]
1011(pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1012    shr.u r18=r19,16 // get byte size of existing "dirty" partition
1013    ;;
1014    mov r16=ar.bsp // get existing backing store pointer
1015    LOAD_PHYS_STACK_REG_SIZE(r17)
1016(pKStk) br.cond.dpnt skip_rbs_switch
1017#endif
1018
1019    /*
1020     * Restore user backing store.
1021     *
1022     * NOTE: alloc, loadrs, and cover can't be predicated.
1023     */
1024(pNonSys) br.cond.dpnt dont_preserve_current_frame
1025    COVER // add current frame into dirty partition and set cr.ifs
1026    ;;
1027    mov r19=ar.bsp // get new backing store pointer
1028rbs_switch:
1029    sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1030    cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1031    ;;
1032    sub r19=r19,r16 // calculate total byte size of dirty partition
1033    add r18=64,r18 // don't force in0-in7 into memory...
1034    ;;
1035    shl r19=r19,16 // shift size of dirty partition into loadrs position
1036    ;;
1037dont_preserve_current_frame:
1038    /*
1039     * To prevent leaking bits between the kernel and user-space,
1040     * we must clear the stacked registers in the "invalid" partition here.
1041     * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1042     * 5 registers/cycle on McKinley).
1043     */
1044# define pRecurse p6
1045# define pReturn p7
1046#ifdef CONFIG_ITANIUM
1047# define Nregs 10
1048#else
1049# define Nregs 14
1050#endif
1051    alloc loc0=ar.pfs,2,Nregs-2,2,0
1052    shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1053    sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1054    ;;
1055    mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1056    shladd in0=loc1,3,r17
1057    mov in1=0
1058    ;;
1059    TEXT_ALIGN(32)
1060rse_clear_invalid:
1061#ifdef CONFIG_ITANIUM
1062    // cycle 0
1063 { .mii
1064    alloc loc0=ar.pfs,2,Nregs-2,2,0
1065    cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1066    add out0=-Nregs*8,in0
1067}{ .mfb
1068    add out1=1,in1 // increment recursion count
1069    nop.f 0
1070    nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1071    ;;
1072}{ .mfi // cycle 1
1073    mov loc1=0
1074    nop.f 0
1075    mov loc2=0
1076}{ .mib
1077    mov loc3=0
1078    mov loc4=0
1079(pRecurse) br.call.sptk.many b0=rse_clear_invalid
1080
1081}{ .mfi // cycle 2
1082    mov loc5=0
1083    nop.f 0
1084    cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1085}{ .mib
1086    mov loc6=0
1087    mov loc7=0
1088(pReturn) br.ret.sptk.many b0
1089}
1090#else /* !CONFIG_ITANIUM */
1091    alloc loc0=ar.pfs,2,Nregs-2,2,0
1092    cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1093    add out0=-Nregs*8,in0
1094    add out1=1,in1 // increment recursion count
1095    mov loc1=0
1096    mov loc2=0
1097    ;;
1098    mov loc3=0
1099    mov loc4=0
1100    mov loc5=0
1101    mov loc6=0
1102    mov loc7=0
1103(pRecurse) br.call.dptk.few b0=rse_clear_invalid
1104    ;;
1105    mov loc8=0
1106    mov loc9=0
1107    cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1108    mov loc10=0
1109    mov loc11=0
1110(pReturn) br.ret.dptk.many b0
1111#endif /* !CONFIG_ITANIUM */
1112# undef pRecurse
1113# undef pReturn
1114    ;;
1115    alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1116    ;;
1117    loadrs
1118    ;;
1119skip_rbs_switch:
1120    mov ar.unat=r25 // M2
1121(pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1122(pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1123    ;;
1124(pUStk) mov ar.bspstore=r23 // M2
1125(pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1126(pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1127    ;;
1128    MOV_TO_IPSR(p0, r29, r25) // M2
1129    mov ar.pfs=r26 // I0
1130(pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1131
1132    MOV_TO_IFS(p9, r30, r25)// M2
1133    mov b0=r21 // I0
1134(pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1135
1136    mov ar.fpsr=r20 // M2
1137    MOV_TO_IIP(r28, r25) // M2
1138    nop 0
1139    ;;
1140(pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1141    nop 0
1142(pLvSys)mov r2=r0
1143
1144    mov ar.rsc=r27 // M2
1145    mov pr=r31,-1 // I0
1146    RFI // B
1147
1148    /*
1149     * On entry:
1150     * r20 = &current->thread_info->pre_count (if CONFIG_PREEMPT)
1151     * r31 = current->thread_info->flags
1152     * On exit:
1153     * p6 = TRUE if work-pending-check needs to be redone
1154     *
1155     * Interrupts are disabled on entry, reenabled depend on work, and
1156     * disabled on exit.
1157     */
1158.work_pending_syscall:
1159    add r2=-8,r2
1160    add r3=-8,r3
1161    ;;
1162    st8 [r2]=r8
1163    st8 [r3]=r10
1164.work_pending:
1165    tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1166(p6) br.cond.sptk.few .notify
1167#ifdef CONFIG_PREEMPT
1168(pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1169    ;;
1170(pKStk) st4 [r20]=r21
1171#endif
1172    SSM_PSR_I(p0, p6, r2) // enable interrupts
1173    br.call.spnt.many rp=schedule
1174.ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
1175    RSM_PSR_I(p0, r2, r20) // disable interrupts
1176    ;;
1177#ifdef CONFIG_PREEMPT
1178(pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1179    ;;
1180(pKStk) st4 [r20]=r0 // preempt_count() <- 0
1181#endif
1182(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1183    br.cond.sptk.many .work_processed_kernel
1184
1185.notify:
1186(pUStk) br.call.spnt.many rp=notify_resume_user
1187.ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
1188(pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1189    br.cond.sptk.many .work_processed_kernel
1190
1191.global __paravirt_pending_syscall_end;
1192__paravirt_pending_syscall_end:
1193    adds r2=PT(R8)+16,r12
1194    adds r3=PT(R10)+16,r12
1195    ;;
1196    ld8 r8=[r2]
1197    ld8 r10=[r3]
1198    br.cond.sptk.many __paravirt_work_processed_syscall_target
1199END(__paravirt_leave_kernel)
1200
1201#ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1202ENTRY(handle_syscall_error)
1203    /*
1204     * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1205     * lead us to mistake a negative return value as a failed syscall. Those syscall
1206     * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1207     * pt_regs.r8 is zero, we assume that the call completed successfully.
1208     */
1209    PT_REGS_UNWIND_INFO(0)
1210    ld8 r3=[r2] // load pt_regs.r8
1211    ;;
1212    cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1213    ;;
1214(p7) mov r10=-1
1215(p7) sub r8=0,r8 // negate return value to get errno
1216    br.cond.sptk ia64_leave_syscall
1217END(handle_syscall_error)
1218
1219    /*
1220     * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1221     * in case a system call gets restarted.
1222     */
1223GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1224    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1225    alloc loc1=ar.pfs,8,2,1,0
1226    mov loc0=rp
1227    mov out0=r8 // Address of previous task
1228    ;;
1229    br.call.sptk.many rp=schedule_tail
1230.ret11: mov ar.pfs=loc1
1231    mov rp=loc0
1232    br.ret.sptk.many rp
1233END(ia64_invoke_schedule_tail)
1234
1235    /*
1236     * Setup stack and call do_notify_resume_user(), keeping interrupts
1237     * disabled.
1238     *
1239     * Note that pSys and pNonSys need to be set up by the caller.
1240     * We declare 8 input registers so the system call args get preserved,
1241     * in case we need to restart a system call.
1242     */
1243GLOBAL_ENTRY(notify_resume_user)
1244    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1245    alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1246    mov r9=ar.unat
1247    mov loc0=rp // save return address
1248    mov out0=0 // there is no "oldset"
1249    adds out1=8,sp // out1=&sigscratch->ar_pfs
1250(pSys) mov out2=1 // out2==1 => we're in a syscall
1251    ;;
1252(pNonSys) mov out2=0 // out2==0 => not a syscall
1253    .fframe 16
1254    .spillsp ar.unat, 16
1255    st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1256    st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1257    .body
1258    br.call.sptk.many rp=do_notify_resume_user
1259.ret15: .restore sp
1260    adds sp=16,sp // pop scratch stack space
1261    ;;
1262    ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1263    mov rp=loc0
1264    ;;
1265    mov ar.unat=r9
1266    mov ar.pfs=loc1
1267    br.ret.sptk.many rp
1268END(notify_resume_user)
1269
1270ENTRY(sys_rt_sigreturn)
1271    PT_REGS_UNWIND_INFO(0)
1272    /*
1273     * Allocate 8 input registers since ptrace() may clobber them
1274     */
1275    alloc r2=ar.pfs,8,0,1,0
1276    .prologue
1277    PT_REGS_SAVES(16)
1278    adds sp=-16,sp
1279    .body
1280    cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1281    ;;
1282    /*
1283     * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1284     * syscall-entry path does not save them we save them here instead. Note: we
1285     * don't need to save any other registers that are not saved by the stream-lined
1286     * syscall path, because restore_sigcontext() restores them.
1287     */
1288    adds r16=PT(F6)+32,sp
1289    adds r17=PT(F7)+32,sp
1290    ;;
1291     stf.spill [r16]=f6,32
1292     stf.spill [r17]=f7,32
1293    ;;
1294     stf.spill [r16]=f8,32
1295     stf.spill [r17]=f9,32
1296    ;;
1297     stf.spill [r16]=f10
1298     stf.spill [r17]=f11
1299    adds out0=16,sp // out0 = &sigscratch
1300    br.call.sptk.many rp=ia64_rt_sigreturn
1301.ret19: .restore sp,0
1302    adds sp=16,sp
1303    ;;
1304    ld8 r9=[sp] // load new ar.unat
1305    mov.sptk b7=r8,ia64_native_leave_kernel
1306    ;;
1307    mov ar.unat=r9
1308    br.many b7
1309END(sys_rt_sigreturn)
1310
1311GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1312    .prologue
1313    /*
1314     * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1315     */
1316    mov r16=r0
1317    DO_SAVE_SWITCH_STACK
1318    br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1319.ret21: .body
1320    DO_LOAD_SWITCH_STACK
1321    br.cond.sptk.many rp // goes to ia64_leave_kernel
1322END(ia64_prepare_handle_unaligned)
1323
1324    //
1325    // unw_init_running(void (*callback)(info, arg), void *arg)
1326    //
1327# define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1328
1329GLOBAL_ENTRY(unw_init_running)
1330    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1331    alloc loc1=ar.pfs,2,3,3,0
1332    ;;
1333    ld8 loc2=[in0],8
1334    mov loc0=rp
1335    mov r16=loc1
1336    DO_SAVE_SWITCH_STACK
1337    .body
1338
1339    .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1340    .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1341    SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1342    adds sp=-EXTRA_FRAME_SIZE,sp
1343    .body
1344    ;;
1345    adds out0=16,sp // &info
1346    mov out1=r13 // current
1347    adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1348    br.call.sptk.many rp=unw_init_frame_info
13491: adds out0=16,sp // &info
1350    mov b6=loc2
1351    mov loc2=gp // save gp across indirect function call
1352    ;;
1353    ld8 gp=[in0]
1354    mov out1=in1 // arg
1355    br.call.sptk.many rp=b6 // invoke the callback function
13561: mov gp=loc2 // restore gp
1357
1358    // For now, we don't allow changing registers from within
1359    // unw_init_running; if we ever want to allow that, we'd
1360    // have to do a load_switch_stack here:
1361    .restore sp
1362    adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1363
1364    mov ar.pfs=loc1
1365    mov rp=loc0
1366    br.ret.sptk.many rp
1367END(unw_init_running)
1368
1369#ifdef CONFIG_FUNCTION_TRACER
1370#ifdef CONFIG_DYNAMIC_FTRACE
1371GLOBAL_ENTRY(_mcount)
1372    br ftrace_stub
1373END(_mcount)
1374
1375.here:
1376    br.ret.sptk.many b0
1377
1378GLOBAL_ENTRY(ftrace_caller)
1379    alloc out0 = ar.pfs, 8, 0, 4, 0
1380    mov out3 = r0
1381    ;;
1382    mov out2 = b0
1383    add r3 = 0x20, r3
1384    mov out1 = r1;
1385    br.call.sptk.many b0 = ftrace_patch_gp
1386    //this might be called from module, so we must patch gp
1387ftrace_patch_gp:
1388    movl gp=__gp
1389    mov b0 = r3
1390    ;;
1391.global ftrace_call;
1392ftrace_call:
1393{
1394    .mlx
1395    nop.m 0x0
1396    movl r3 = .here;;
1397}
1398    alloc loc0 = ar.pfs, 4, 4, 2, 0
1399    ;;
1400    mov loc1 = b0
1401    mov out0 = b0
1402    mov loc2 = r8
1403    mov loc3 = r15
1404    ;;
1405    adds out0 = -MCOUNT_INSN_SIZE, out0
1406    mov out1 = in2
1407    mov b6 = r3
1408
1409    br.call.sptk.many b0 = b6
1410    ;;
1411    mov ar.pfs = loc0
1412    mov b0 = loc1
1413    mov r8 = loc2
1414    mov r15 = loc3
1415    br ftrace_stub
1416    ;;
1417END(ftrace_caller)
1418
1419#else
1420GLOBAL_ENTRY(_mcount)
1421    movl r2 = ftrace_stub
1422    movl r3 = ftrace_trace_function;;
1423    ld8 r3 = [r3];;
1424    ld8 r3 = [r3];;
1425    cmp.eq p7,p0 = r2, r3
1426(p7) br.sptk.many ftrace_stub
1427    ;;
1428
1429    alloc loc0 = ar.pfs, 4, 4, 2, 0
1430    ;;
1431    mov loc1 = b0
1432    mov out0 = b0
1433    mov loc2 = r8
1434    mov loc3 = r15
1435    ;;
1436    adds out0 = -MCOUNT_INSN_SIZE, out0
1437    mov out1 = in2
1438    mov b6 = r3
1439
1440    br.call.sptk.many b0 = b6
1441    ;;
1442    mov ar.pfs = loc0
1443    mov b0 = loc1
1444    mov r8 = loc2
1445    mov r15 = loc3
1446    br ftrace_stub
1447    ;;
1448END(_mcount)
1449#endif
1450
1451GLOBAL_ENTRY(ftrace_stub)
1452    mov r3 = b0
1453    movl r2 = _mcount_ret_helper
1454    ;;
1455    mov b6 = r2
1456    mov b7 = r3
1457    br.ret.sptk.many b6
1458
1459_mcount_ret_helper:
1460    mov b0 = r42
1461    mov r1 = r41
1462    mov ar.pfs = r40
1463    br b7
1464END(ftrace_stub)
1465
1466#endif /* CONFIG_FUNCTION_TRACER */
1467
1468    .rodata
1469    .align 8
1470    .globl sys_call_table
1471sys_call_table:
1472    data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1473    data8 sys_exit // 1025
1474    data8 sys_read
1475    data8 sys_write
1476    data8 sys_open
1477    data8 sys_close
1478    data8 sys_creat // 1030
1479    data8 sys_link
1480    data8 sys_unlink
1481    data8 ia64_execve
1482    data8 sys_chdir
1483    data8 sys_fchdir // 1035
1484    data8 sys_utimes
1485    data8 sys_mknod
1486    data8 sys_chmod
1487    data8 sys_chown
1488    data8 sys_lseek // 1040
1489    data8 sys_getpid
1490    data8 sys_getppid
1491    data8 sys_mount
1492    data8 sys_umount
1493    data8 sys_setuid // 1045
1494    data8 sys_getuid
1495    data8 sys_geteuid
1496    data8 sys_ptrace
1497    data8 sys_access
1498    data8 sys_sync // 1050
1499    data8 sys_fsync
1500    data8 sys_fdatasync
1501    data8 sys_kill
1502    data8 sys_rename
1503    data8 sys_mkdir // 1055
1504    data8 sys_rmdir
1505    data8 sys_dup
1506    data8 sys_ia64_pipe
1507    data8 sys_times
1508    data8 ia64_brk // 1060
1509    data8 sys_setgid
1510    data8 sys_getgid
1511    data8 sys_getegid
1512    data8 sys_acct
1513    data8 sys_ioctl // 1065
1514    data8 sys_fcntl
1515    data8 sys_umask
1516    data8 sys_chroot
1517    data8 sys_ustat
1518    data8 sys_dup2 // 1070
1519    data8 sys_setreuid
1520    data8 sys_setregid
1521    data8 sys_getresuid
1522    data8 sys_setresuid
1523    data8 sys_getresgid // 1075
1524    data8 sys_setresgid
1525    data8 sys_getgroups
1526    data8 sys_setgroups
1527    data8 sys_getpgid
1528    data8 sys_setpgid // 1080
1529    data8 sys_setsid
1530    data8 sys_getsid
1531    data8 sys_sethostname
1532    data8 sys_setrlimit
1533    data8 sys_getrlimit // 1085
1534    data8 sys_getrusage
1535    data8 sys_gettimeofday
1536    data8 sys_settimeofday
1537    data8 sys_select
1538    data8 sys_poll // 1090
1539    data8 sys_symlink
1540    data8 sys_readlink
1541    data8 sys_uselib
1542    data8 sys_swapon
1543    data8 sys_swapoff // 1095
1544    data8 sys_reboot
1545    data8 sys_truncate
1546    data8 sys_ftruncate
1547    data8 sys_fchmod
1548    data8 sys_fchown // 1100
1549    data8 ia64_getpriority
1550    data8 sys_setpriority
1551    data8 sys_statfs
1552    data8 sys_fstatfs
1553    data8 sys_gettid // 1105
1554    data8 sys_semget
1555    data8 sys_semop
1556    data8 sys_semctl
1557    data8 sys_msgget
1558    data8 sys_msgsnd // 1110
1559    data8 sys_msgrcv
1560    data8 sys_msgctl
1561    data8 sys_shmget
1562    data8 sys_shmat
1563    data8 sys_shmdt // 1115
1564    data8 sys_shmctl
1565    data8 sys_syslog
1566    data8 sys_setitimer
1567    data8 sys_getitimer
1568    data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1569    data8 sys_ni_syscall /* was: ia64_oldlstat */
1570    data8 sys_ni_syscall /* was: ia64_oldfstat */
1571    data8 sys_vhangup
1572    data8 sys_lchown
1573    data8 sys_remap_file_pages // 1125
1574    data8 sys_wait4
1575    data8 sys_sysinfo
1576    data8 sys_clone
1577    data8 sys_setdomainname
1578    data8 sys_newuname // 1130
1579    data8 sys_adjtimex
1580    data8 sys_ni_syscall /* was: ia64_create_module */
1581    data8 sys_init_module
1582    data8 sys_delete_module
1583    data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1584    data8 sys_ni_syscall /* was: sys_query_module */
1585    data8 sys_quotactl
1586    data8 sys_bdflush
1587    data8 sys_sysfs
1588    data8 sys_personality // 1140
1589    data8 sys_ni_syscall // sys_afs_syscall
1590    data8 sys_setfsuid
1591    data8 sys_setfsgid
1592    data8 sys_getdents
1593    data8 sys_flock // 1145
1594    data8 sys_readv
1595    data8 sys_writev
1596    data8 sys_pread64
1597    data8 sys_pwrite64
1598    data8 sys_sysctl // 1150
1599    data8 sys_mmap
1600    data8 sys_munmap
1601    data8 sys_mlock
1602    data8 sys_mlockall
1603    data8 sys_mprotect // 1155
1604    data8 ia64_mremap
1605    data8 sys_msync
1606    data8 sys_munlock
1607    data8 sys_munlockall
1608    data8 sys_sched_getparam // 1160
1609    data8 sys_sched_setparam
1610    data8 sys_sched_getscheduler
1611    data8 sys_sched_setscheduler
1612    data8 sys_sched_yield
1613    data8 sys_sched_get_priority_max // 1165
1614    data8 sys_sched_get_priority_min
1615    data8 sys_sched_rr_get_interval
1616    data8 sys_nanosleep
1617    data8 sys_nfsservctl
1618    data8 sys_prctl // 1170
1619    data8 sys_getpagesize
1620    data8 sys_mmap2
1621    data8 sys_pciconfig_read
1622    data8 sys_pciconfig_write
1623    data8 sys_perfmonctl // 1175
1624    data8 sys_sigaltstack
1625    data8 sys_rt_sigaction
1626    data8 sys_rt_sigpending
1627    data8 sys_rt_sigprocmask
1628    data8 sys_rt_sigqueueinfo // 1180
1629    data8 sys_rt_sigreturn
1630    data8 sys_rt_sigsuspend
1631    data8 sys_rt_sigtimedwait
1632    data8 sys_getcwd
1633    data8 sys_capget // 1185
1634    data8 sys_capset
1635    data8 sys_sendfile64
1636    data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1637    data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1638    data8 sys_socket // 1190
1639    data8 sys_bind
1640    data8 sys_connect
1641    data8 sys_listen
1642    data8 sys_accept
1643    data8 sys_getsockname // 1195
1644    data8 sys_getpeername
1645    data8 sys_socketpair
1646    data8 sys_send
1647    data8 sys_sendto
1648    data8 sys_recv // 1200
1649    data8 sys_recvfrom
1650    data8 sys_shutdown
1651    data8 sys_setsockopt
1652    data8 sys_getsockopt
1653    data8 sys_sendmsg // 1205
1654    data8 sys_recvmsg
1655    data8 sys_pivot_root
1656    data8 sys_mincore
1657    data8 sys_madvise
1658    data8 sys_newstat // 1210
1659    data8 sys_newlstat
1660    data8 sys_newfstat
1661    data8 sys_clone2
1662    data8 sys_getdents64
1663    data8 sys_getunwind // 1215
1664    data8 sys_readahead
1665    data8 sys_setxattr
1666    data8 sys_lsetxattr
1667    data8 sys_fsetxattr
1668    data8 sys_getxattr // 1220
1669    data8 sys_lgetxattr
1670    data8 sys_fgetxattr
1671    data8 sys_listxattr
1672    data8 sys_llistxattr
1673    data8 sys_flistxattr // 1225
1674    data8 sys_removexattr
1675    data8 sys_lremovexattr
1676    data8 sys_fremovexattr
1677    data8 sys_tkill
1678    data8 sys_futex // 1230
1679    data8 sys_sched_setaffinity
1680    data8 sys_sched_getaffinity
1681    data8 sys_set_tid_address
1682    data8 sys_fadvise64_64
1683    data8 sys_tgkill // 1235
1684    data8 sys_exit_group
1685    data8 sys_lookup_dcookie
1686    data8 sys_io_setup
1687    data8 sys_io_destroy
1688    data8 sys_io_getevents // 1240
1689    data8 sys_io_submit
1690    data8 sys_io_cancel
1691    data8 sys_epoll_create
1692    data8 sys_epoll_ctl
1693    data8 sys_epoll_wait // 1245
1694    data8 sys_restart_syscall
1695    data8 sys_semtimedop
1696    data8 sys_timer_create
1697    data8 sys_timer_settime
1698    data8 sys_timer_gettime // 1250
1699    data8 sys_timer_getoverrun
1700    data8 sys_timer_delete
1701    data8 sys_clock_settime
1702    data8 sys_clock_gettime
1703    data8 sys_clock_getres // 1255
1704    data8 sys_clock_nanosleep
1705    data8 sys_fstatfs64
1706    data8 sys_statfs64
1707    data8 sys_mbind
1708    data8 sys_get_mempolicy // 1260
1709    data8 sys_set_mempolicy
1710    data8 sys_mq_open
1711    data8 sys_mq_unlink
1712    data8 sys_mq_timedsend
1713    data8 sys_mq_timedreceive // 1265
1714    data8 sys_mq_notify
1715    data8 sys_mq_getsetattr
1716    data8 sys_kexec_load
1717    data8 sys_ni_syscall // reserved for vserver
1718    data8 sys_waitid // 1270
1719    data8 sys_add_key
1720    data8 sys_request_key
1721    data8 sys_keyctl
1722    data8 sys_ioprio_set
1723    data8 sys_ioprio_get // 1275
1724    data8 sys_move_pages
1725    data8 sys_inotify_init
1726    data8 sys_inotify_add_watch
1727    data8 sys_inotify_rm_watch
1728    data8 sys_migrate_pages // 1280
1729    data8 sys_openat
1730    data8 sys_mkdirat
1731    data8 sys_mknodat
1732    data8 sys_fchownat
1733    data8 sys_futimesat // 1285
1734    data8 sys_newfstatat
1735    data8 sys_unlinkat
1736    data8 sys_renameat
1737    data8 sys_linkat
1738    data8 sys_symlinkat // 1290
1739    data8 sys_readlinkat
1740    data8 sys_fchmodat
1741    data8 sys_faccessat
1742    data8 sys_pselect6
1743    data8 sys_ppoll // 1295
1744    data8 sys_unshare
1745    data8 sys_splice
1746    data8 sys_set_robust_list
1747    data8 sys_get_robust_list
1748    data8 sys_sync_file_range // 1300
1749    data8 sys_tee
1750    data8 sys_vmsplice
1751    data8 sys_fallocate
1752    data8 sys_getcpu
1753    data8 sys_epoll_pwait // 1305
1754    data8 sys_utimensat
1755    data8 sys_signalfd
1756    data8 sys_ni_syscall
1757    data8 sys_eventfd
1758    data8 sys_timerfd_create // 1310
1759    data8 sys_timerfd_settime
1760    data8 sys_timerfd_gettime
1761    data8 sys_signalfd4
1762    data8 sys_eventfd2
1763    data8 sys_epoll_create1 // 1315
1764    data8 sys_dup3
1765    data8 sys_pipe2
1766    data8 sys_inotify_init1
1767    data8 sys_preadv
1768    data8 sys_pwritev // 1320
1769    data8 sys_rt_tgsigqueueinfo
1770    data8 sys_recvmmsg
1771    data8 sys_fanotify_init
1772    data8 sys_fanotify_mark
1773    data8 sys_prlimit64 // 1325
1774
1775    .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1776#endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
1777

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