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1 | /* |
2 | * IDE host driver for AT91 (SAM9, CAP9, AT572D940HF) Static Memory Controller |
3 | * with Compact Flash True IDE logic |
4 | * |
5 | * Copyright (c) 2008, 2009 Kelvatek Ltd. |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by |
9 | * the Free Software Foundation; either version 2 of the License, or |
10 | * (at your option) any later version. |
11 | * |
12 | * This program is distributed in the hope that it will be useful, |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
15 | * GNU General Public License for more details. |
16 | * |
17 | * You should have received a copy of the GNU General Public License |
18 | * along with this program; if not, write to the Free Software |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
20 | * |
21 | */ |
22 | |
23 | #include <linux/kernel.h> |
24 | #include <linux/module.h> |
25 | #include <linux/clk.h> |
26 | #include <linux/err.h> |
27 | #include <linux/ide.h> |
28 | #include <linux/platform_device.h> |
29 | |
30 | #include <mach/board.h> |
31 | #include <mach/gpio.h> |
32 | #include <mach/at91sam9_smc.h> |
33 | |
34 | #define DRV_NAME "at91_ide" |
35 | |
36 | #define perr(fmt, args...) pr_err(DRV_NAME ": " fmt, ##args) |
37 | #define pdbg(fmt, args...) pr_debug("%s " fmt, __func__, ##args) |
38 | |
39 | /* |
40 | * Access to IDE device is possible through EBI Static Memory Controller |
41 | * with Compact Flash logic. For details see EBI and SMC datasheet sections |
42 | * of any microcontroller from AT91SAM9 family. |
43 | * |
44 | * Within SMC chip select address space, lines A[23:21] distinguish Compact |
45 | * Flash modes (I/O, common memory, attribute memory, True IDE). IDE modes are: |
46 | * 0x00c0000 - True IDE |
47 | * 0x00e0000 - Alternate True IDE (Alt Status Register) |
48 | * |
49 | * On True IDE mode Task File and Data Register are mapped at the same address. |
50 | * To distinguish access between these two different bus data width is used: |
51 | * 8Bit for Task File, 16Bit for Data I/O. |
52 | * |
53 | * After initialization we do 8/16 bit flipping (changes in SMC MODE register) |
54 | * only inside IDE callback routines which are serialized by IDE layer, |
55 | * so no additional locking needed. |
56 | */ |
57 | |
58 | #define TASK_FILE 0x00c00000 |
59 | #define ALT_MODE 0x00e00000 |
60 | #define REGS_SIZE 8 |
61 | |
62 | #define enter_16bit(cs, mode) do { \ |
63 | mode = at91_sys_read(AT91_SMC_MODE(cs)); \ |
64 | at91_sys_write(AT91_SMC_MODE(cs), mode | AT91_SMC_DBW_16); \ |
65 | } while (0) |
66 | |
67 | #define leave_16bit(cs, mode) at91_sys_write(AT91_SMC_MODE(cs), mode); |
68 | |
69 | static void set_smc_timings(const u8 chipselect, const u16 cycle, |
70 | const u16 setup, const u16 pulse, |
71 | const u16 data_float, int use_iordy) |
72 | { |
73 | unsigned long mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | |
74 | AT91_SMC_BAT_SELECT; |
75 | |
76 | /* disable or enable waiting for IORDY signal */ |
77 | if (use_iordy) |
78 | mode |= AT91_SMC_EXNWMODE_READY; |
79 | |
80 | /* add data float cycles if needed */ |
81 | if (data_float) |
82 | mode |= AT91_SMC_TDF_(data_float); |
83 | |
84 | at91_sys_write(AT91_SMC_MODE(chipselect), mode); |
85 | |
86 | /* setup timings in SMC */ |
87 | at91_sys_write(AT91_SMC_SETUP(chipselect), AT91_SMC_NWESETUP_(setup) | |
88 | AT91_SMC_NCS_WRSETUP_(0) | |
89 | AT91_SMC_NRDSETUP_(setup) | |
90 | AT91_SMC_NCS_RDSETUP_(0)); |
91 | at91_sys_write(AT91_SMC_PULSE(chipselect), AT91_SMC_NWEPULSE_(pulse) | |
92 | AT91_SMC_NCS_WRPULSE_(cycle) | |
93 | AT91_SMC_NRDPULSE_(pulse) | |
94 | AT91_SMC_NCS_RDPULSE_(cycle)); |
95 | at91_sys_write(AT91_SMC_CYCLE(chipselect), AT91_SMC_NWECYCLE_(cycle) | |
96 | AT91_SMC_NRDCYCLE_(cycle)); |
97 | } |
98 | |
99 | static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz) |
100 | { |
101 | u64 tmp = ns; |
102 | |
103 | tmp *= mck_hz; |
104 | tmp += 1000*1000*1000 - 1; /* round up */ |
105 | do_div(tmp, 1000*1000*1000); |
106 | return (unsigned int) tmp; |
107 | } |
108 | |
109 | static void apply_timings(const u8 chipselect, const u8 pio, |
110 | const struct ide_timing *timing, int use_iordy) |
111 | { |
112 | unsigned int t0, t1, t2, t6z; |
113 | unsigned int cycle, setup, pulse, data_float; |
114 | unsigned int mck_hz; |
115 | struct clk *mck; |
116 | |
117 | /* see table 22 of Compact Flash standard 4.1 for the meaning, |
118 | * we do not stretch active (t2) time, so setup (t1) + hold time (th) |
119 | * assure at least minimal recovery (t2i) time */ |
120 | t0 = timing->cyc8b; |
121 | t1 = timing->setup; |
122 | t2 = timing->act8b; |
123 | t6z = (pio < 5) ? 30 : 20; |
124 | |
125 | pdbg("t0=%u t1=%u t2=%u t6z=%u\n", t0, t1, t2, t6z); |
126 | |
127 | mck = clk_get(NULL, "mck"); |
128 | BUG_ON(IS_ERR(mck)); |
129 | mck_hz = clk_get_rate(mck); |
130 | pdbg("mck_hz=%u\n", mck_hz); |
131 | |
132 | cycle = calc_mck_cycles(t0, mck_hz); |
133 | setup = calc_mck_cycles(t1, mck_hz); |
134 | pulse = calc_mck_cycles(t2, mck_hz); |
135 | data_float = calc_mck_cycles(t6z, mck_hz); |
136 | |
137 | pdbg("cycle=%u setup=%u pulse=%u data_float=%u\n", |
138 | cycle, setup, pulse, data_float); |
139 | |
140 | set_smc_timings(chipselect, cycle, setup, pulse, data_float, use_iordy); |
141 | } |
142 | |
143 | static void at91_ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd, |
144 | void *buf, unsigned int len) |
145 | { |
146 | ide_hwif_t *hwif = drive->hwif; |
147 | struct ide_io_ports *io_ports = &hwif->io_ports; |
148 | u8 chipselect = hwif->select_data; |
149 | unsigned long mode; |
150 | |
151 | pdbg("cs %u buf %p len %d\n", chipselect, buf, len); |
152 | |
153 | len++; |
154 | |
155 | enter_16bit(chipselect, mode); |
156 | readsw((void __iomem *)io_ports->data_addr, buf, len / 2); |
157 | leave_16bit(chipselect, mode); |
158 | } |
159 | |
160 | static void at91_ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd, |
161 | void *buf, unsigned int len) |
162 | { |
163 | ide_hwif_t *hwif = drive->hwif; |
164 | struct ide_io_ports *io_ports = &hwif->io_ports; |
165 | u8 chipselect = hwif->select_data; |
166 | unsigned long mode; |
167 | |
168 | pdbg("cs %u buf %p len %d\n", chipselect, buf, len); |
169 | |
170 | enter_16bit(chipselect, mode); |
171 | writesw((void __iomem *)io_ports->data_addr, buf, len / 2); |
172 | leave_16bit(chipselect, mode); |
173 | } |
174 | |
175 | static void at91_ide_set_pio_mode(ide_drive_t *drive, const u8 pio) |
176 | { |
177 | struct ide_timing *timing; |
178 | u8 chipselect = drive->hwif->select_data; |
179 | int use_iordy = 0; |
180 | |
181 | pdbg("chipselect %u pio %u\n", chipselect, pio); |
182 | |
183 | timing = ide_timing_find_mode(XFER_PIO_0 + pio); |
184 | BUG_ON(!timing); |
185 | |
186 | if (ide_pio_need_iordy(drive, pio)) |
187 | use_iordy = 1; |
188 | |
189 | apply_timings(chipselect, pio, timing, use_iordy); |
190 | } |
191 | |
192 | static const struct ide_tp_ops at91_ide_tp_ops = { |
193 | .exec_command = ide_exec_command, |
194 | .read_status = ide_read_status, |
195 | .read_altstatus = ide_read_altstatus, |
196 | .write_devctl = ide_write_devctl, |
197 | |
198 | .dev_select = ide_dev_select, |
199 | .tf_load = ide_tf_load, |
200 | .tf_read = ide_tf_read, |
201 | |
202 | .input_data = at91_ide_input_data, |
203 | .output_data = at91_ide_output_data, |
204 | }; |
205 | |
206 | static const struct ide_port_ops at91_ide_port_ops = { |
207 | .set_pio_mode = at91_ide_set_pio_mode, |
208 | }; |
209 | |
210 | static const struct ide_port_info at91_ide_port_info __initdata = { |
211 | .port_ops = &at91_ide_port_ops, |
212 | .tp_ops = &at91_ide_tp_ops, |
213 | .host_flags = IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA | IDE_HFLAG_SINGLE | |
214 | IDE_HFLAG_NO_IO_32BIT | IDE_HFLAG_UNMASK_IRQS, |
215 | .pio_mask = ATA_PIO6, |
216 | .chipset = ide_generic, |
217 | }; |
218 | |
219 | /* |
220 | * If interrupt is delivered through GPIO, IRQ are triggered on falling |
221 | * and rising edge of signal. Whereas IDE device request interrupt on high |
222 | * level (rising edge in our case). This mean we have fake interrupts, so |
223 | * we need to check interrupt pin and exit instantly from ISR when line |
224 | * is on low level. |
225 | */ |
226 | |
227 | irqreturn_t at91_irq_handler(int irq, void *dev_id) |
228 | { |
229 | int ntries = 8; |
230 | int pin_val1, pin_val2; |
231 | |
232 | /* additional deglitch, line can be noisy in badly designed PCB */ |
233 | do { |
234 | pin_val1 = at91_get_gpio_value(irq); |
235 | pin_val2 = at91_get_gpio_value(irq); |
236 | } while (pin_val1 != pin_val2 && --ntries > 0); |
237 | |
238 | if (pin_val1 == 0 || ntries <= 0) |
239 | return IRQ_HANDLED; |
240 | |
241 | return ide_intr(irq, dev_id); |
242 | } |
243 | |
244 | static int __init at91_ide_probe(struct platform_device *pdev) |
245 | { |
246 | int ret; |
247 | struct ide_hw hw, *hws[] = { &hw }; |
248 | struct ide_host *host; |
249 | struct resource *res; |
250 | unsigned long tf_base = 0, ctl_base = 0; |
251 | struct at91_cf_data *board = pdev->dev.platform_data; |
252 | |
253 | if (!board) |
254 | return -ENODEV; |
255 | |
256 | if (board->det_pin && at91_get_gpio_value(board->det_pin) != 0) { |
257 | perr("no device detected\n"); |
258 | return -ENODEV; |
259 | } |
260 | |
261 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
262 | if (!res) { |
263 | perr("can't get memory resource\n"); |
264 | return -ENODEV; |
265 | } |
266 | |
267 | if (!devm_request_mem_region(&pdev->dev, res->start + TASK_FILE, |
268 | REGS_SIZE, "ide") || |
269 | !devm_request_mem_region(&pdev->dev, res->start + ALT_MODE, |
270 | REGS_SIZE, "alt")) { |
271 | perr("memory resources in use\n"); |
272 | return -EBUSY; |
273 | } |
274 | |
275 | pdbg("chipselect %u irq %u res %08lx\n", board->chipselect, |
276 | board->irq_pin, (unsigned long) res->start); |
277 | |
278 | tf_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + TASK_FILE, |
279 | REGS_SIZE); |
280 | ctl_base = (unsigned long) devm_ioremap(&pdev->dev, res->start + ALT_MODE, |
281 | REGS_SIZE); |
282 | if (!tf_base || !ctl_base) { |
283 | perr("can't map memory regions\n"); |
284 | return -EBUSY; |
285 | } |
286 | |
287 | memset(&hw, 0, sizeof(hw)); |
288 | |
289 | if (board->flags & AT91_IDE_SWAP_A0_A2) { |
290 | /* workaround for stupid hardware bug */ |
291 | hw.io_ports.data_addr = tf_base + 0; |
292 | hw.io_ports.error_addr = tf_base + 4; |
293 | hw.io_ports.nsect_addr = tf_base + 2; |
294 | hw.io_ports.lbal_addr = tf_base + 6; |
295 | hw.io_ports.lbam_addr = tf_base + 1; |
296 | hw.io_ports.lbah_addr = tf_base + 5; |
297 | hw.io_ports.device_addr = tf_base + 3; |
298 | hw.io_ports.command_addr = tf_base + 7; |
299 | hw.io_ports.ctl_addr = ctl_base + 3; |
300 | } else |
301 | ide_std_init_ports(&hw, tf_base, ctl_base + 6); |
302 | |
303 | hw.irq = board->irq_pin; |
304 | hw.dev = &pdev->dev; |
305 | |
306 | host = ide_host_alloc(&at91_ide_port_info, hws, 1); |
307 | if (!host) { |
308 | perr("failed to allocate ide host\n"); |
309 | return -ENOMEM; |
310 | } |
311 | |
312 | /* setup Static Memory Controller - PIO 0 as default */ |
313 | apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0); |
314 | |
315 | /* with GPIO interrupt we have to do quirks in handler */ |
316 | if (board->irq_pin >= PIN_BASE) |
317 | host->irq_handler = at91_irq_handler; |
318 | |
319 | host->ports[0]->select_data = board->chipselect; |
320 | |
321 | ret = ide_host_register(host, &at91_ide_port_info, hws); |
322 | if (ret) { |
323 | perr("failed to register ide host\n"); |
324 | goto err_free_host; |
325 | } |
326 | platform_set_drvdata(pdev, host); |
327 | return 0; |
328 | |
329 | err_free_host: |
330 | ide_host_free(host); |
331 | return ret; |
332 | } |
333 | |
334 | static int __exit at91_ide_remove(struct platform_device *pdev) |
335 | { |
336 | struct ide_host *host = platform_get_drvdata(pdev); |
337 | |
338 | ide_host_remove(host); |
339 | return 0; |
340 | } |
341 | |
342 | static struct platform_driver at91_ide_driver = { |
343 | .driver = { |
344 | .name = DRV_NAME, |
345 | .owner = THIS_MODULE, |
346 | }, |
347 | .remove = __exit_p(at91_ide_remove), |
348 | }; |
349 | |
350 | static int __init at91_ide_init(void) |
351 | { |
352 | return platform_driver_probe(&at91_ide_driver, at91_ide_probe); |
353 | } |
354 | |
355 | static void __exit at91_ide_exit(void) |
356 | { |
357 | platform_driver_unregister(&at91_ide_driver); |
358 | } |
359 | |
360 | module_init(at91_ide_init); |
361 | module_exit(at91_ide_exit); |
362 | |
363 | MODULE_LICENSE("GPL"); |
364 | MODULE_AUTHOR("Stanislaw Gruszka <stf_xl@wp.pl>"); |
365 | |
366 |
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