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1 | /* |
2 | * Register definitions and functions for: |
3 | * Philips UCB1400 driver |
4 | * |
5 | * Based on ucb1400_ts: |
6 | * Author: Nicolas Pitre |
7 | * Created: September 25, 2006 |
8 | * Copyright: MontaVista Software, Inc. |
9 | * |
10 | * Spliting done by: Marek Vasut <marek.vasut@gmail.com> |
11 | * If something doesn't work and it worked before spliting, e-mail me, |
12 | * dont bother Nicolas please ;-) |
13 | * |
14 | * This program is free software; you can redistribute it and/or modify |
15 | * it under the terms of the GNU General Public License version 2 as |
16 | * published by the Free Software Foundation. |
17 | * |
18 | * This code is heavily based on ucb1x00-*.c copyrighted by Russell King |
19 | * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has |
20 | * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. |
21 | */ |
22 | |
23 | #ifndef _LINUX__UCB1400_H |
24 | #define _LINUX__UCB1400_H |
25 | |
26 | #include <sound/ac97_codec.h> |
27 | #include <linux/mutex.h> |
28 | #include <linux/platform_device.h> |
29 | #include <linux/gpio.h> |
30 | |
31 | /* |
32 | * UCB1400 AC-link registers |
33 | */ |
34 | |
35 | #define UCB_IO_DATA 0x5a |
36 | #define UCB_IO_DIR 0x5c |
37 | #define UCB_IE_RIS 0x5e |
38 | #define UCB_IE_FAL 0x60 |
39 | #define UCB_IE_STATUS 0x62 |
40 | #define UCB_IE_CLEAR 0x62 |
41 | #define UCB_IE_ADC (1 << 11) |
42 | #define UCB_IE_TSPX (1 << 12) |
43 | |
44 | #define UCB_TS_CR 0x64 |
45 | #define UCB_TS_CR_TSMX_POW (1 << 0) |
46 | #define UCB_TS_CR_TSPX_POW (1 << 1) |
47 | #define UCB_TS_CR_TSMY_POW (1 << 2) |
48 | #define UCB_TS_CR_TSPY_POW (1 << 3) |
49 | #define UCB_TS_CR_TSMX_GND (1 << 4) |
50 | #define UCB_TS_CR_TSPX_GND (1 << 5) |
51 | #define UCB_TS_CR_TSMY_GND (1 << 6) |
52 | #define UCB_TS_CR_TSPY_GND (1 << 7) |
53 | #define UCB_TS_CR_MODE_INT (0 << 8) |
54 | #define UCB_TS_CR_MODE_PRES (1 << 8) |
55 | #define UCB_TS_CR_MODE_POS (2 << 8) |
56 | #define UCB_TS_CR_BIAS_ENA (1 << 11) |
57 | #define UCB_TS_CR_TSPX_LOW (1 << 12) |
58 | #define UCB_TS_CR_TSMX_LOW (1 << 13) |
59 | |
60 | #define UCB_ADC_CR 0x66 |
61 | #define UCB_ADC_SYNC_ENA (1 << 0) |
62 | #define UCB_ADC_VREFBYP_CON (1 << 1) |
63 | #define UCB_ADC_INP_TSPX (0 << 2) |
64 | #define UCB_ADC_INP_TSMX (1 << 2) |
65 | #define UCB_ADC_INP_TSPY (2 << 2) |
66 | #define UCB_ADC_INP_TSMY (3 << 2) |
67 | #define UCB_ADC_INP_AD0 (4 << 2) |
68 | #define UCB_ADC_INP_AD1 (5 << 2) |
69 | #define UCB_ADC_INP_AD2 (6 << 2) |
70 | #define UCB_ADC_INP_AD3 (7 << 2) |
71 | #define UCB_ADC_EXT_REF (1 << 5) |
72 | #define UCB_ADC_START (1 << 7) |
73 | #define UCB_ADC_ENA (1 << 15) |
74 | |
75 | #define UCB_ADC_DATA 0x68 |
76 | #define UCB_ADC_DAT_VALID (1 << 15) |
77 | |
78 | #define UCB_FCSR 0x6c |
79 | #define UCB_FCSR_AVE (1 << 12) |
80 | |
81 | #define UCB_ADC_DAT_MASK 0x3ff |
82 | |
83 | #define UCB_ID 0x7e |
84 | #define UCB_ID_1400 0x4304 |
85 | |
86 | struct ucb1400_gpio_data { |
87 | int gpio_offset; |
88 | int (*gpio_setup)(struct device *dev, int ngpio); |
89 | int (*gpio_teardown)(struct device *dev, int ngpio); |
90 | }; |
91 | |
92 | struct ucb1400_gpio { |
93 | struct gpio_chip gc; |
94 | struct snd_ac97 *ac97; |
95 | }; |
96 | |
97 | struct ucb1400_ts { |
98 | struct input_dev *ts_idev; |
99 | struct task_struct *ts_task; |
100 | int id; |
101 | wait_queue_head_t ts_wait; |
102 | unsigned int ts_restart:1; |
103 | int irq; |
104 | unsigned int irq_pending; /* not bit field shared */ |
105 | struct snd_ac97 *ac97; |
106 | }; |
107 | |
108 | struct ucb1400 { |
109 | struct platform_device *ucb1400_ts; |
110 | struct platform_device *ucb1400_gpio; |
111 | }; |
112 | |
113 | struct ucb1400_pdata { |
114 | int irq; |
115 | }; |
116 | |
117 | static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg) |
118 | { |
119 | return ac97->bus->ops->read(ac97, reg); |
120 | } |
121 | |
122 | static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val) |
123 | { |
124 | ac97->bus->ops->write(ac97, reg, val); |
125 | } |
126 | |
127 | static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio) |
128 | { |
129 | return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio); |
130 | } |
131 | |
132 | static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio, |
133 | u16 val) |
134 | { |
135 | ucb1400_reg_write(ac97, UCB_IO_DATA, val ? |
136 | ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) : |
137 | ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio)); |
138 | } |
139 | |
140 | static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio) |
141 | { |
142 | return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio); |
143 | } |
144 | |
145 | static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio, |
146 | u16 dir) |
147 | { |
148 | ucb1400_reg_write(ac97, UCB_IO_DIR, dir ? |
149 | ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) : |
150 | ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio)); |
151 | } |
152 | |
153 | static inline void ucb1400_adc_enable(struct snd_ac97 *ac97) |
154 | { |
155 | ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA); |
156 | } |
157 | |
158 | static inline void ucb1400_adc_disable(struct snd_ac97 *ac97) |
159 | { |
160 | ucb1400_reg_write(ac97, UCB_ADC_CR, 0); |
161 | } |
162 | |
163 | |
164 | unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel, |
165 | int adcsync); |
166 | |
167 | #ifdef CONFIG_GPIO_UCB1400 |
168 | void __init ucb1400_gpio_set_data(struct ucb1400_gpio_data *data); |
169 | #else |
170 | static inline void ucb1400_gpio_set_data(struct ucb1400_gpio_data *data) {} |
171 | #endif |
172 | |
173 | #endif |
174 |
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